diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-22 13:56:57 -0500 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-22 13:56:57 -0500 |
commit | d04ef3a795b3b7b376a02713ed5e211e9ae1f917 (patch) | |
tree | 837da034751a2fc1be0fc5a105c218d41a498eb6 /include/asm-sparc64/cpudata.h | |
parent | 36177ba655c238e33400cc2837a28720b62784bd (diff) | |
parent | dcc1e8dd88d4bc55e32a26dad7633d20ffe606d2 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6:
[SPARC64]: Add a secondary TSB for hugepage mappings.
[SPARC]: Respect vm_page_prot in io_remap_page_range().
Diffstat (limited to 'include/asm-sparc64/cpudata.h')
-rw-r--r-- | include/asm-sparc64/cpudata.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h index c66a81bbc84d..9d6a6dbaf126 100644 --- a/include/asm-sparc64/cpudata.h +++ b/include/asm-sparc64/cpudata.h | |||
@@ -71,7 +71,8 @@ struct trap_per_cpu { | |||
71 | /* Dcache line 7: Physical addresses of CPU send mondo block and CPU list. */ | 71 | /* Dcache line 7: Physical addresses of CPU send mondo block and CPU list. */ |
72 | unsigned long cpu_mondo_block_pa; | 72 | unsigned long cpu_mondo_block_pa; |
73 | unsigned long cpu_list_pa; | 73 | unsigned long cpu_list_pa; |
74 | unsigned long __pad1[2]; | 74 | unsigned long tsb_huge; |
75 | unsigned long tsb_huge_temp; | ||
75 | 76 | ||
76 | /* Dcache line 8: Unused, needed to keep trap_block a power-of-2 in size. */ | 77 | /* Dcache line 8: Unused, needed to keep trap_block a power-of-2 in size. */ |
77 | unsigned long __pad2[4]; | 78 | unsigned long __pad2[4]; |
@@ -116,6 +117,8 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, | |||
116 | #define TRAP_PER_CPU_FAULT_INFO 0x40 | 117 | #define TRAP_PER_CPU_FAULT_INFO 0x40 |
117 | #define TRAP_PER_CPU_CPU_MONDO_BLOCK_PA 0xc0 | 118 | #define TRAP_PER_CPU_CPU_MONDO_BLOCK_PA 0xc0 |
118 | #define TRAP_PER_CPU_CPU_LIST_PA 0xc8 | 119 | #define TRAP_PER_CPU_CPU_LIST_PA 0xc8 |
120 | #define TRAP_PER_CPU_TSB_HUGE 0xd0 | ||
121 | #define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 | ||
119 | 122 | ||
120 | #define TRAP_BLOCK_SZ_SHIFT 8 | 123 | #define TRAP_BLOCK_SZ_SHIFT 8 |
121 | 124 | ||