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authorAdrian Bunk <bunk@stusta.de>2005-10-03 20:37:02 -0400
committerDavid S. Miller <davem@davemloft.net>2005-10-03 20:37:02 -0400
commit3115624eda34d0f4e673fc6bcea36b7ad701ee33 (patch)
treea81c9e0f3d84a96725e109452d4ddc90f95b513a /include/asm-sparc/obio.h
parented39f731ab2e77e58122232f6e27333331d7793d (diff)
[SPARC]: "extern inline" doesn't make much sense.
Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc/obio.h')
-rw-r--r--include/asm-sparc/obio.h30
1 files changed, 15 insertions, 15 deletions
diff --git a/include/asm-sparc/obio.h b/include/asm-sparc/obio.h
index 62e1d77965f3..47854a2a12cf 100644
--- a/include/asm-sparc/obio.h
+++ b/include/asm-sparc/obio.h
@@ -98,7 +98,7 @@
98 98
99#ifndef __ASSEMBLY__ 99#ifndef __ASSEMBLY__
100 100
101extern __inline__ int bw_get_intr_mask(int sbus_level) 101static inline int bw_get_intr_mask(int sbus_level)
102{ 102{
103 int mask; 103 int mask;
104 104
@@ -109,7 +109,7 @@ extern __inline__ int bw_get_intr_mask(int sbus_level)
109 return mask; 109 return mask;
110} 110}
111 111
112extern __inline__ void bw_clear_intr_mask(int sbus_level, int mask) 112static inline void bw_clear_intr_mask(int sbus_level, int mask)
113{ 113{
114 __asm__ __volatile__ ("stha %0, [%1] %2" : : 114 __asm__ __volatile__ ("stha %0, [%1] %2" : :
115 "r" (mask), 115 "r" (mask),
@@ -117,7 +117,7 @@ extern __inline__ void bw_clear_intr_mask(int sbus_level, int mask)
117 "i" (ASI_M_CTL)); 117 "i" (ASI_M_CTL));
118} 118}
119 119
120extern __inline__ unsigned bw_get_prof_limit(int cpu) 120static inline unsigned bw_get_prof_limit(int cpu)
121{ 121{
122 unsigned limit; 122 unsigned limit;
123 123
@@ -128,7 +128,7 @@ extern __inline__ unsigned bw_get_prof_limit(int cpu)
128 return limit; 128 return limit;
129} 129}
130 130
131extern __inline__ void bw_set_prof_limit(int cpu, unsigned limit) 131static inline void bw_set_prof_limit(int cpu, unsigned limit)
132{ 132{
133 __asm__ __volatile__ ("sta %0, [%1] %2" : : 133 __asm__ __volatile__ ("sta %0, [%1] %2" : :
134 "r" (limit), 134 "r" (limit),
@@ -136,7 +136,7 @@ extern __inline__ void bw_set_prof_limit(int cpu, unsigned limit)
136 "i" (ASI_M_CTL)); 136 "i" (ASI_M_CTL));
137} 137}
138 138
139extern __inline__ unsigned bw_get_ctrl(int cpu) 139static inline unsigned bw_get_ctrl(int cpu)
140{ 140{
141 unsigned ctrl; 141 unsigned ctrl;
142 142
@@ -147,7 +147,7 @@ extern __inline__ unsigned bw_get_ctrl(int cpu)
147 return ctrl; 147 return ctrl;
148} 148}
149 149
150extern __inline__ void bw_set_ctrl(int cpu, unsigned ctrl) 150static inline void bw_set_ctrl(int cpu, unsigned ctrl)
151{ 151{
152 __asm__ __volatile__ ("sta %0, [%1] %2" : : 152 __asm__ __volatile__ ("sta %0, [%1] %2" : :
153 "r" (ctrl), 153 "r" (ctrl),
@@ -157,7 +157,7 @@ extern __inline__ void bw_set_ctrl(int cpu, unsigned ctrl)
157 157
158extern unsigned char cpu_leds[32]; 158extern unsigned char cpu_leds[32];
159 159
160extern __inline__ void show_leds(int cpuid) 160static inline void show_leds(int cpuid)
161{ 161{
162 cpuid &= 0x1e; 162 cpuid &= 0x1e;
163 __asm__ __volatile__ ("stba %0, [%1] %2" : : 163 __asm__ __volatile__ ("stba %0, [%1] %2" : :
@@ -166,7 +166,7 @@ extern __inline__ void show_leds(int cpuid)
166 "i" (ASI_M_CTL)); 166 "i" (ASI_M_CTL));
167} 167}
168 168
169extern __inline__ unsigned cc_get_ipen(void) 169static inline unsigned cc_get_ipen(void)
170{ 170{
171 unsigned pending; 171 unsigned pending;
172 172
@@ -177,7 +177,7 @@ extern __inline__ unsigned cc_get_ipen(void)
177 return pending; 177 return pending;
178} 178}
179 179
180extern __inline__ void cc_set_iclr(unsigned clear) 180static inline void cc_set_iclr(unsigned clear)
181{ 181{
182 __asm__ __volatile__ ("stha %0, [%1] %2" : : 182 __asm__ __volatile__ ("stha %0, [%1] %2" : :
183 "r" (clear), 183 "r" (clear),
@@ -185,7 +185,7 @@ extern __inline__ void cc_set_iclr(unsigned clear)
185 "i" (ASI_M_MXCC)); 185 "i" (ASI_M_MXCC));
186} 186}
187 187
188extern __inline__ unsigned cc_get_imsk(void) 188static inline unsigned cc_get_imsk(void)
189{ 189{
190 unsigned mask; 190 unsigned mask;
191 191
@@ -196,7 +196,7 @@ extern __inline__ unsigned cc_get_imsk(void)
196 return mask; 196 return mask;
197} 197}
198 198
199extern __inline__ void cc_set_imsk(unsigned mask) 199static inline void cc_set_imsk(unsigned mask)
200{ 200{
201 __asm__ __volatile__ ("stha %0, [%1] %2" : : 201 __asm__ __volatile__ ("stha %0, [%1] %2" : :
202 "r" (mask), 202 "r" (mask),
@@ -204,7 +204,7 @@ extern __inline__ void cc_set_imsk(unsigned mask)
204 "i" (ASI_M_MXCC)); 204 "i" (ASI_M_MXCC));
205} 205}
206 206
207extern __inline__ unsigned cc_get_imsk_other(int cpuid) 207static inline unsigned cc_get_imsk_other(int cpuid)
208{ 208{
209 unsigned mask; 209 unsigned mask;
210 210
@@ -215,7 +215,7 @@ extern __inline__ unsigned cc_get_imsk_other(int cpuid)
215 return mask; 215 return mask;
216} 216}
217 217
218extern __inline__ void cc_set_imsk_other(int cpuid, unsigned mask) 218static inline void cc_set_imsk_other(int cpuid, unsigned mask)
219{ 219{
220 __asm__ __volatile__ ("stha %0, [%1] %2" : : 220 __asm__ __volatile__ ("stha %0, [%1] %2" : :
221 "r" (mask), 221 "r" (mask),
@@ -223,7 +223,7 @@ extern __inline__ void cc_set_imsk_other(int cpuid, unsigned mask)
223 "i" (ASI_M_CTL)); 223 "i" (ASI_M_CTL));
224} 224}
225 225
226extern __inline__ void cc_set_igen(unsigned gen) 226static inline void cc_set_igen(unsigned gen)
227{ 227{
228 __asm__ __volatile__ ("sta %0, [%1] %2" : : 228 __asm__ __volatile__ ("sta %0, [%1] %2" : :
229 "r" (gen), 229 "r" (gen),
@@ -239,7 +239,7 @@ extern __inline__ void cc_set_igen(unsigned gen)
239#define IGEN_MESSAGE(bcast, devid, sid, levels) \ 239#define IGEN_MESSAGE(bcast, devid, sid, levels) \
240 (((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels)) 240 (((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels))
241 241
242extern __inline__ void sun4d_send_ipi(int cpu, int level) 242static inline void sun4d_send_ipi(int cpu, int level)
243{ 243{
244 cc_set_igen(IGEN_MESSAGE(0, cpu << 3, 6 + ((level >> 1) & 7), 1 << (level - 1))); 244 cc_set_igen(IGEN_MESSAGE(0, cpu << 3, 6 + ((level >> 1) & 7), 1 << (level - 1)));
245} 245}