diff options
author | Sam Ravnborg <sam@ravnborg.org> | 2008-07-27 17:00:59 -0400 |
---|---|---|
committer | Sam Ravnborg <sam@ravnborg.org> | 2008-07-27 17:00:59 -0400 |
commit | a439fe51a1f8eb087c22dd24d69cebae4a3addac (patch) | |
tree | e32d1fa97a220ab598d8ab364205817c5bf2bd6f /include/asm-sparc/msi.h | |
parent | 837b41b5de356aa67abb2cadb5eef3efc7776f91 (diff) |
sparc, sparc64: use arch/sparc/include
The majority of this patch was created by the following script:
***
ASM=arch/sparc/include/asm
mkdir -p $ASM
git mv include/asm-sparc64/ftrace.h $ASM
git rm include/asm-sparc64/*
git mv include/asm-sparc/* $ASM
sed -ie 's/asm-sparc64/asm/g' $ASM/*
sed -ie 's/asm-sparc/asm/g' $ASM/*
***
The rest was an update of the top-level Makefile to use sparc
for header files when sparc64 is being build.
And a small fixlet to pick up the correct unistd.h from
sparc64 code.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Diffstat (limited to 'include/asm-sparc/msi.h')
-rw-r--r-- | include/asm-sparc/msi.h | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/include/asm-sparc/msi.h b/include/asm-sparc/msi.h deleted file mode 100644 index 724ca5667052..000000000000 --- a/include/asm-sparc/msi.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * msi.h: Defines specific to the MBus - Sbus - Interface. | ||
3 | * | ||
4 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | ||
5 | * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) | ||
6 | */ | ||
7 | |||
8 | #ifndef _SPARC_MSI_H | ||
9 | #define _SPARC_MSI_H | ||
10 | |||
11 | /* | ||
12 | * Locations of MSI Registers. | ||
13 | */ | ||
14 | #define MSI_MBUS_ARBEN 0xe0001008 /* MBus Arbiter Enable register */ | ||
15 | |||
16 | /* | ||
17 | * Useful bits in the MSI Registers. | ||
18 | */ | ||
19 | #define MSI_ASYNC_MODE 0x80000000 /* Operate the MSI asynchronously */ | ||
20 | |||
21 | |||
22 | static inline void msi_set_sync(void) | ||
23 | { | ||
24 | __asm__ __volatile__ ("lda [%0] %1, %%g3\n\t" | ||
25 | "andn %%g3, %2, %%g3\n\t" | ||
26 | "sta %%g3, [%0] %1\n\t" : : | ||
27 | "r" (MSI_MBUS_ARBEN), | ||
28 | "i" (ASI_M_CTL), "r" (MSI_ASYNC_MODE) : "g3"); | ||
29 | } | ||
30 | |||
31 | #endif /* !(_SPARC_MSI_H) */ | ||