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authorRobert P. J. Day <rpjday@mindspring.com>2007-10-19 17:10:43 -0400
committerAdrian Bunk <bunk@kernel.org>2007-10-19 17:10:43 -0400
commit3a4fa0a25da81600ea0bcd75692ae8ca6050d165 (patch)
treea4de1662e645c029cf3cf58f0646cbb1959861dc /include/asm-sh
parent18735dd8d2d37031b97f9e9e106acbaed01eb896 (diff)
Fix misspellings of "system", "controller", "interrupt" and "necessary".
Fix the various misspellings of "system", controller", "interrupt" and "[un]necessary". Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'include/asm-sh')
-rw-r--r--include/asm-sh/se7751.h2
-rw-r--r--include/asm-sh/systemh7751.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-sh/se7751.h b/include/asm-sh/se7751.h
index 02ca9347f043..b36792ac5d66 100644
--- a/include/asm-sh/se7751.h
+++ b/include/asm-sh/se7751.h
@@ -36,7 +36,7 @@
36#define PA_LED 0xba000000 /* LED */ 36#define PA_LED 0xba000000 /* LED */
37#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ 37#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */
38 38
39#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ 39#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */
40#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ 40#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */
41#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ 41#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */
42#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ 42#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */
diff --git a/include/asm-sh/systemh7751.h b/include/asm-sh/systemh7751.h
index b143bb2a2ca7..4161122c84ef 100644
--- a/include/asm-sh/systemh7751.h
+++ b/include/asm-sh/systemh7751.h
@@ -36,7 +36,7 @@
36#define PA_LED 0xba000000 /* LED */ 36#define PA_LED 0xba000000 /* LED */
37#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ 37#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */
38 38
39#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */ 39#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */
40#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ 40#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */
41#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ 41#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */
42#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ 42#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */