sh: Support for SH-4A memory barriers.

SH-4A supports 'synco' as a barrier, sprinkle it around
the cache ops as necessary..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 7 insertions, 0 deletions

diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index e89728d405d8..eb4902ed920a 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -84,10 +84,17 @@ static __inline__ unsigned long tas(volatile int *m)
 
 extern void __xchg_called_with_bad_pointer(void);
 
+#ifdef CONFIG_CPU_SH4A
+#define mb()    __asm__ __volatile__ ("synco": : :"memory")
+#define rmb()   mb()
+#define wmb()   __asm__ __volatile__ ("synco": : :"memory")
+#define read_barrier_depends()  do { } while(0)
+#else
 #define mb()    __asm__ __volatile__ ("": : :"memory")
 #define rmb()   mb()
 #define wmb()   __asm__ __volatile__ ("": : :"memory")
 #define read_barrier_depends()  do { } while(0)
+#endif
 
 #ifdef CONFIG_SMP
 #define smp_mb()        mb()