diff options
author | Paul Mundt <lethal@linux-sh.org> | 2007-11-28 01:56:27 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-01-27 23:18:58 -0500 |
commit | 3ee7702903c346fc814bd7540ba37eebef75054d (patch) | |
tree | a8862c569085da7e019d7830ba2b54e0b5aa73a7 /include/asm-sh | |
parent | 66d485b45a5493f6a2ca067c6f472e7b2ca342c2 (diff) |
sh: CCR1->CCR renaming for SH-2 parts.
Avoid namespace collision with a CCR1 definition. The general
SH code always expects CCR anyways, so there's no point in keeping
the CCR1 naming around.
Fixes up synclink collisions:
drivers/char/pcmcia/synclink_cs.c:283:1: warning: "CCR1" redefined
In file included from include/asm/cache.h:13,
from include/asm/processor_32.h:15,
from include/asm/processor.h:60,
from include/linux/prefetch.h:14,
from include/linux/list.h:8,
from include/linux/module.h:9,
from drivers/char/pcmcia/synclink_cs.c:38:
include/asm/cpu/cache.h:21:1: warning: this is the location of the previous definition
Reported-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh')
-rw-r--r-- | include/asm-sh/cpu-sh2/cache.h | 3 | ||||
-rw-r--r-- | include/asm-sh/cpu-sh2a/cache.h | 6 |
2 files changed, 2 insertions, 7 deletions
diff --git a/include/asm-sh/cpu-sh2/cache.h b/include/asm-sh/cpu-sh2/cache.h index 66388ce16c30..4e0b16500686 100644 --- a/include/asm-sh/cpu-sh2/cache.h +++ b/include/asm-sh/cpu-sh2/cache.h | |||
@@ -18,8 +18,7 @@ | |||
18 | #define SH_CACHE_ASSOC 8 | 18 | #define SH_CACHE_ASSOC 8 |
19 | 19 | ||
20 | #if defined(CONFIG_CPU_SUBTYPE_SH7619) | 20 | #if defined(CONFIG_CPU_SUBTYPE_SH7619) |
21 | #define CCR1 0xffffffec | 21 | #define CCR 0xffffffec |
22 | #define CCR CCR1 | ||
23 | 22 | ||
24 | #define CCR_CACHE_CE 0x01 /* Cache enable */ | 23 | #define CCR_CACHE_CE 0x01 /* Cache enable */ |
25 | #define CCR_CACHE_WT 0x06 /* CCR[bit1=1,bit2=1] */ | 24 | #define CCR_CACHE_WT 0x06 /* CCR[bit1=1,bit2=1] */ |
diff --git a/include/asm-sh/cpu-sh2a/cache.h b/include/asm-sh/cpu-sh2a/cache.h index d88774169b58..afe228b3f493 100644 --- a/include/asm-sh/cpu-sh2a/cache.h +++ b/include/asm-sh/cpu-sh2a/cache.h | |||
@@ -17,12 +17,9 @@ | |||
17 | #define SH_CACHE_COMBINED 4 | 17 | #define SH_CACHE_COMBINED 4 |
18 | #define SH_CACHE_ASSOC 8 | 18 | #define SH_CACHE_ASSOC 8 |
19 | 19 | ||
20 | #define CCR1 0xfffc1000 | 20 | #define CCR 0xfffc1000 /* CCR1 */ |
21 | #define CCR2 0xfffc1004 | 21 | #define CCR2 0xfffc1004 |
22 | 22 | ||
23 | /* CCR1 behaves more like the traditional CCR */ | ||
24 | #define CCR CCR1 | ||
25 | |||
26 | /* | 23 | /* |
27 | * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not | 24 | * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not |
28 | * listed here are reserved. | 25 | * listed here are reserved. |
@@ -41,4 +38,3 @@ | |||
41 | #define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI) | 38 | #define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI) |
42 | 39 | ||
43 | #endif /* __ASM_CPU_SH2A_CACHE_H */ | 40 | #endif /* __ASM_CPU_SH2A_CACHE_H */ |
44 | |||