diff options
author | Paul Mundt <lethal@linux-sh.org> | 2008-07-28 19:09:44 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-07-28 19:09:44 -0400 |
commit | f15cbe6f1a4b4d9df59142fc8e4abb973302cf44 (patch) | |
tree | 774d7b11abaaf33561ab8268bf51ddd9ceb79025 /include/asm-sh | |
parent | 25326277d8d1393d1c66240e6255aca780f9e3eb (diff) |
sh: migrate to arch/sh/include/
This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac.
Most of the moving about was done with Sam's directions at:
http://marc.info/?l=linux-sh&m=121724823706062&w=2
with subsequent hacking and fixups entirely my fault.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh')
249 files changed, 0 insertions, 16382 deletions
diff --git a/include/asm-sh/.gitignore b/include/asm-sh/.gitignore deleted file mode 100644 index 9218ef82b698..000000000000 --- a/include/asm-sh/.gitignore +++ /dev/null | |||
@@ -1,3 +0,0 @@ | |||
1 | cpu | ||
2 | mach | ||
3 | machtypes.h | ||
diff --git a/include/asm-sh/Kbuild b/include/asm-sh/Kbuild deleted file mode 100644 index 43910cdf78a5..000000000000 --- a/include/asm-sh/Kbuild +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | include include/asm-generic/Kbuild.asm | ||
2 | |||
3 | header-y += cpu-features.h | ||
4 | |||
5 | unifdef-y += unistd_32.h | ||
6 | unifdef-y += unistd_64.h | ||
7 | unifdef-y += posix_types_32.h | ||
8 | unifdef-y += posix_types_64.h | ||
diff --git a/include/asm-sh/a.out.h b/include/asm-sh/a.out.h deleted file mode 100644 index 1f93130e179c..000000000000 --- a/include/asm-sh/a.out.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | #ifndef __ASM_SH_A_OUT_H | ||
2 | #define __ASM_SH_A_OUT_H | ||
3 | |||
4 | struct exec | ||
5 | { | ||
6 | unsigned long a_info; /* Use macros N_MAGIC, etc for access */ | ||
7 | unsigned a_text; /* length of text, in bytes */ | ||
8 | unsigned a_data; /* length of data, in bytes */ | ||
9 | unsigned a_bss; /* length of uninitialized data area for file, in bytes */ | ||
10 | unsigned a_syms; /* length of symbol table data in file, in bytes */ | ||
11 | unsigned a_entry; /* start address */ | ||
12 | unsigned a_trsize; /* length of relocation info for text, in bytes */ | ||
13 | unsigned a_drsize; /* length of relocation info for data, in bytes */ | ||
14 | }; | ||
15 | |||
16 | #define N_TRSIZE(a) ((a).a_trsize) | ||
17 | #define N_DRSIZE(a) ((a).a_drsize) | ||
18 | #define N_SYMSIZE(a) ((a).a_syms) | ||
19 | |||
20 | #endif /* __ASM_SH_A_OUT_H */ | ||
diff --git a/include/asm-sh/adc.h b/include/asm-sh/adc.h deleted file mode 100644 index 5f85cf74d59d..000000000000 --- a/include/asm-sh/adc.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef __ASM_ADC_H | ||
2 | #define __ASM_ADC_H | ||
3 | #ifdef __KERNEL__ | ||
4 | /* | ||
5 | * Copyright (C) 2004 Andriy Skulysh | ||
6 | */ | ||
7 | |||
8 | #include <asm/cpu/adc.h> | ||
9 | |||
10 | int adc_single(unsigned int channel); | ||
11 | |||
12 | #endif /* __KERNEL__ */ | ||
13 | #endif /* __ASM_ADC_H */ | ||
diff --git a/include/asm-sh/addrspace.h b/include/asm-sh/addrspace.h deleted file mode 100644 index fa544fc38c23..000000000000 --- a/include/asm-sh/addrspace.h +++ /dev/null | |||
@@ -1,53 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1999 by Kaz Kojima | ||
7 | * | ||
8 | * Defitions for the address spaces of the SH CPUs. | ||
9 | */ | ||
10 | #ifndef __ASM_SH_ADDRSPACE_H | ||
11 | #define __ASM_SH_ADDRSPACE_H | ||
12 | |||
13 | #ifdef __KERNEL__ | ||
14 | |||
15 | #include <asm/cpu/addrspace.h> | ||
16 | |||
17 | /* If this CPU supports segmentation, hook up the helpers */ | ||
18 | #ifdef P1SEG | ||
19 | |||
20 | /* | ||
21 | [ P0/U0 (virtual) ] 0x00000000 <------ User space | ||
22 | [ P1 (fixed) cached ] 0x80000000 <------ Kernel space | ||
23 | [ P2 (fixed) non-cachable] 0xA0000000 <------ Physical access | ||
24 | [ P3 (virtual) cached] 0xC0000000 <------ vmalloced area | ||
25 | [ P4 control ] 0xE0000000 | ||
26 | */ | ||
27 | |||
28 | /* Returns the privileged segment base of a given address */ | ||
29 | #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) | ||
30 | |||
31 | /* Returns the physical address of a PnSEG (n=1,2) address */ | ||
32 | #define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) | ||
33 | |||
34 | #ifdef CONFIG_29BIT | ||
35 | /* | ||
36 | * Map an address to a certain privileged segment | ||
37 | */ | ||
38 | #define P1SEGADDR(a) \ | ||
39 | ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG)) | ||
40 | #define P2SEGADDR(a) \ | ||
41 | ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG)) | ||
42 | #define P3SEGADDR(a) \ | ||
43 | ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) | ||
44 | #define P4SEGADDR(a) \ | ||
45 | ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) | ||
46 | #endif /* 29BIT */ | ||
47 | #endif /* P1SEG */ | ||
48 | |||
49 | /* Check if an address can be reached in 29 bits */ | ||
50 | #define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000) | ||
51 | |||
52 | #endif /* __KERNEL__ */ | ||
53 | #endif /* __ASM_SH_ADDRSPACE_H */ | ||
diff --git a/include/asm-sh/atomic-grb.h b/include/asm-sh/atomic-grb.h deleted file mode 100644 index 4c5b7dbfcedb..000000000000 --- a/include/asm-sh/atomic-grb.h +++ /dev/null | |||
@@ -1,169 +0,0 @@ | |||
1 | #ifndef __ASM_SH_ATOMIC_GRB_H | ||
2 | #define __ASM_SH_ATOMIC_GRB_H | ||
3 | |||
4 | static inline void atomic_add(int i, atomic_t *v) | ||
5 | { | ||
6 | int tmp; | ||
7 | |||
8 | __asm__ __volatile__ ( | ||
9 | " .align 2 \n\t" | ||
10 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
11 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
12 | " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ | ||
13 | " mov.l @%1, %0 \n\t" /* load old value */ | ||
14 | " add %2, %0 \n\t" /* add */ | ||
15 | " mov.l %0, @%1 \n\t" /* store new value */ | ||
16 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
17 | : "=&r" (tmp), | ||
18 | "+r" (v) | ||
19 | : "r" (i) | ||
20 | : "memory" , "r0", "r1"); | ||
21 | } | ||
22 | |||
23 | static inline void atomic_sub(int i, atomic_t *v) | ||
24 | { | ||
25 | int tmp; | ||
26 | |||
27 | __asm__ __volatile__ ( | ||
28 | " .align 2 \n\t" | ||
29 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
30 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
31 | " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ | ||
32 | " mov.l @%1, %0 \n\t" /* load old value */ | ||
33 | " sub %2, %0 \n\t" /* sub */ | ||
34 | " mov.l %0, @%1 \n\t" /* store new value */ | ||
35 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
36 | : "=&r" (tmp), | ||
37 | "+r" (v) | ||
38 | : "r" (i) | ||
39 | : "memory" , "r0", "r1"); | ||
40 | } | ||
41 | |||
42 | static inline int atomic_add_return(int i, atomic_t *v) | ||
43 | { | ||
44 | int tmp; | ||
45 | |||
46 | __asm__ __volatile__ ( | ||
47 | " .align 2 \n\t" | ||
48 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
49 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
50 | " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ | ||
51 | " mov.l @%1, %0 \n\t" /* load old value */ | ||
52 | " add %2, %0 \n\t" /* add */ | ||
53 | " mov.l %0, @%1 \n\t" /* store new value */ | ||
54 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
55 | : "=&r" (tmp), | ||
56 | "+r" (v) | ||
57 | : "r" (i) | ||
58 | : "memory" , "r0", "r1"); | ||
59 | |||
60 | return tmp; | ||
61 | } | ||
62 | |||
63 | static inline int atomic_sub_return(int i, atomic_t *v) | ||
64 | { | ||
65 | int tmp; | ||
66 | |||
67 | __asm__ __volatile__ ( | ||
68 | " .align 2 \n\t" | ||
69 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
70 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
71 | " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ | ||
72 | " mov.l @%1, %0 \n\t" /* load old value */ | ||
73 | " sub %2, %0 \n\t" /* sub */ | ||
74 | " mov.l %0, @%1 \n\t" /* store new value */ | ||
75 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
76 | : "=&r" (tmp), | ||
77 | "+r" (v) | ||
78 | : "r" (i) | ||
79 | : "memory", "r0", "r1"); | ||
80 | |||
81 | return tmp; | ||
82 | } | ||
83 | |||
84 | static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) | ||
85 | { | ||
86 | int tmp; | ||
87 | unsigned int _mask = ~mask; | ||
88 | |||
89 | __asm__ __volatile__ ( | ||
90 | " .align 2 \n\t" | ||
91 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
92 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
93 | " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ | ||
94 | " mov.l @%1, %0 \n\t" /* load old value */ | ||
95 | " and %2, %0 \n\t" /* add */ | ||
96 | " mov.l %0, @%1 \n\t" /* store new value */ | ||
97 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
98 | : "=&r" (tmp), | ||
99 | "+r" (v) | ||
100 | : "r" (_mask) | ||
101 | : "memory" , "r0", "r1"); | ||
102 | } | ||
103 | |||
104 | static inline void atomic_set_mask(unsigned int mask, atomic_t *v) | ||
105 | { | ||
106 | int tmp; | ||
107 | |||
108 | __asm__ __volatile__ ( | ||
109 | " .align 2 \n\t" | ||
110 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
111 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
112 | " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ | ||
113 | " mov.l @%1, %0 \n\t" /* load old value */ | ||
114 | " or %2, %0 \n\t" /* or */ | ||
115 | " mov.l %0, @%1 \n\t" /* store new value */ | ||
116 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
117 | : "=&r" (tmp), | ||
118 | "+r" (v) | ||
119 | : "r" (mask) | ||
120 | : "memory" , "r0", "r1"); | ||
121 | } | ||
122 | |||
123 | static inline int atomic_cmpxchg(atomic_t *v, int old, int new) | ||
124 | { | ||
125 | int ret; | ||
126 | |||
127 | __asm__ __volatile__ ( | ||
128 | " .align 2 \n\t" | ||
129 | " mova 1f, r0 \n\t" | ||
130 | " nop \n\t" | ||
131 | " mov r15, r1 \n\t" | ||
132 | " mov #-8, r15 \n\t" | ||
133 | " mov.l @%1, %0 \n\t" | ||
134 | " cmp/eq %2, %0 \n\t" | ||
135 | " bf 1f \n\t" | ||
136 | " mov.l %3, @%1 \n\t" | ||
137 | "1: mov r1, r15 \n\t" | ||
138 | : "=&r" (ret) | ||
139 | : "r" (v), "r" (old), "r" (new) | ||
140 | : "memory" , "r0", "r1" , "t"); | ||
141 | |||
142 | return ret; | ||
143 | } | ||
144 | |||
145 | static inline int atomic_add_unless(atomic_t *v, int a, int u) | ||
146 | { | ||
147 | int ret; | ||
148 | unsigned long tmp; | ||
149 | |||
150 | __asm__ __volatile__ ( | ||
151 | " .align 2 \n\t" | ||
152 | " mova 1f, r0 \n\t" | ||
153 | " nop \n\t" | ||
154 | " mov r15, r1 \n\t" | ||
155 | " mov #-12, r15 \n\t" | ||
156 | " mov.l @%2, %1 \n\t" | ||
157 | " mov %1, %0 \n\t" | ||
158 | " cmp/eq %4, %0 \n\t" | ||
159 | " bt/s 1f \n\t" | ||
160 | " add %3, %1 \n\t" | ||
161 | " mov.l %1, @%2 \n\t" | ||
162 | "1: mov r1, r15 \n\t" | ||
163 | : "=&r" (ret), "=&r" (tmp) | ||
164 | : "r" (v), "r" (a), "r" (u) | ||
165 | : "memory" , "r0", "r1" , "t"); | ||
166 | |||
167 | return ret != u; | ||
168 | } | ||
169 | #endif /* __ASM_SH_ATOMIC_GRB_H */ | ||
diff --git a/include/asm-sh/atomic-irq.h b/include/asm-sh/atomic-irq.h deleted file mode 100644 index 74f7943cff6f..000000000000 --- a/include/asm-sh/atomic-irq.h +++ /dev/null | |||
@@ -1,71 +0,0 @@ | |||
1 | #ifndef __ASM_SH_ATOMIC_IRQ_H | ||
2 | #define __ASM_SH_ATOMIC_IRQ_H | ||
3 | |||
4 | /* | ||
5 | * To get proper branch prediction for the main line, we must branch | ||
6 | * forward to code at the end of this object's .text section, then | ||
7 | * branch back to restart the operation. | ||
8 | */ | ||
9 | static inline void atomic_add(int i, atomic_t *v) | ||
10 | { | ||
11 | unsigned long flags; | ||
12 | |||
13 | local_irq_save(flags); | ||
14 | *(long *)v += i; | ||
15 | local_irq_restore(flags); | ||
16 | } | ||
17 | |||
18 | static inline void atomic_sub(int i, atomic_t *v) | ||
19 | { | ||
20 | unsigned long flags; | ||
21 | |||
22 | local_irq_save(flags); | ||
23 | *(long *)v -= i; | ||
24 | local_irq_restore(flags); | ||
25 | } | ||
26 | |||
27 | static inline int atomic_add_return(int i, atomic_t *v) | ||
28 | { | ||
29 | unsigned long temp, flags; | ||
30 | |||
31 | local_irq_save(flags); | ||
32 | temp = *(long *)v; | ||
33 | temp += i; | ||
34 | *(long *)v = temp; | ||
35 | local_irq_restore(flags); | ||
36 | |||
37 | return temp; | ||
38 | } | ||
39 | |||
40 | static inline int atomic_sub_return(int i, atomic_t *v) | ||
41 | { | ||
42 | unsigned long temp, flags; | ||
43 | |||
44 | local_irq_save(flags); | ||
45 | temp = *(long *)v; | ||
46 | temp -= i; | ||
47 | *(long *)v = temp; | ||
48 | local_irq_restore(flags); | ||
49 | |||
50 | return temp; | ||
51 | } | ||
52 | |||
53 | static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) | ||
54 | { | ||
55 | unsigned long flags; | ||
56 | |||
57 | local_irq_save(flags); | ||
58 | *(long *)v &= ~mask; | ||
59 | local_irq_restore(flags); | ||
60 | } | ||
61 | |||
62 | static inline void atomic_set_mask(unsigned int mask, atomic_t *v) | ||
63 | { | ||
64 | unsigned long flags; | ||
65 | |||
66 | local_irq_save(flags); | ||
67 | *(long *)v |= mask; | ||
68 | local_irq_restore(flags); | ||
69 | } | ||
70 | |||
71 | #endif /* __ASM_SH_ATOMIC_IRQ_H */ | ||
diff --git a/include/asm-sh/atomic-llsc.h b/include/asm-sh/atomic-llsc.h deleted file mode 100644 index 4b00b78e3f4f..000000000000 --- a/include/asm-sh/atomic-llsc.h +++ /dev/null | |||
@@ -1,107 +0,0 @@ | |||
1 | #ifndef __ASM_SH_ATOMIC_LLSC_H | ||
2 | #define __ASM_SH_ATOMIC_LLSC_H | ||
3 | |||
4 | /* | ||
5 | * To get proper branch prediction for the main line, we must branch | ||
6 | * forward to code at the end of this object's .text section, then | ||
7 | * branch back to restart the operation. | ||
8 | */ | ||
9 | static inline void atomic_add(int i, atomic_t *v) | ||
10 | { | ||
11 | unsigned long tmp; | ||
12 | |||
13 | __asm__ __volatile__ ( | ||
14 | "1: movli.l @%2, %0 ! atomic_add \n" | ||
15 | " add %1, %0 \n" | ||
16 | " movco.l %0, @%2 \n" | ||
17 | " bf 1b \n" | ||
18 | : "=&z" (tmp) | ||
19 | : "r" (i), "r" (&v->counter) | ||
20 | : "t"); | ||
21 | } | ||
22 | |||
23 | static inline void atomic_sub(int i, atomic_t *v) | ||
24 | { | ||
25 | unsigned long tmp; | ||
26 | |||
27 | __asm__ __volatile__ ( | ||
28 | "1: movli.l @%2, %0 ! atomic_sub \n" | ||
29 | " sub %1, %0 \n" | ||
30 | " movco.l %0, @%2 \n" | ||
31 | " bf 1b \n" | ||
32 | : "=&z" (tmp) | ||
33 | : "r" (i), "r" (&v->counter) | ||
34 | : "t"); | ||
35 | } | ||
36 | |||
37 | /* | ||
38 | * SH-4A note: | ||
39 | * | ||
40 | * We basically get atomic_xxx_return() for free compared with | ||
41 | * atomic_xxx(). movli.l/movco.l require r0 due to the instruction | ||
42 | * encoding, so the retval is automatically set without having to | ||
43 | * do any special work. | ||
44 | */ | ||
45 | static inline int atomic_add_return(int i, atomic_t *v) | ||
46 | { | ||
47 | unsigned long temp; | ||
48 | |||
49 | __asm__ __volatile__ ( | ||
50 | "1: movli.l @%2, %0 ! atomic_add_return \n" | ||
51 | " add %1, %0 \n" | ||
52 | " movco.l %0, @%2 \n" | ||
53 | " bf 1b \n" | ||
54 | " synco \n" | ||
55 | : "=&z" (temp) | ||
56 | : "r" (i), "r" (&v->counter) | ||
57 | : "t"); | ||
58 | |||
59 | return temp; | ||
60 | } | ||
61 | |||
62 | static inline int atomic_sub_return(int i, atomic_t *v) | ||
63 | { | ||
64 | unsigned long temp; | ||
65 | |||
66 | __asm__ __volatile__ ( | ||
67 | "1: movli.l @%2, %0 ! atomic_sub_return \n" | ||
68 | " sub %1, %0 \n" | ||
69 | " movco.l %0, @%2 \n" | ||
70 | " bf 1b \n" | ||
71 | " synco \n" | ||
72 | : "=&z" (temp) | ||
73 | : "r" (i), "r" (&v->counter) | ||
74 | : "t"); | ||
75 | |||
76 | return temp; | ||
77 | } | ||
78 | |||
79 | static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) | ||
80 | { | ||
81 | unsigned long tmp; | ||
82 | |||
83 | __asm__ __volatile__ ( | ||
84 | "1: movli.l @%2, %0 ! atomic_clear_mask \n" | ||
85 | " and %1, %0 \n" | ||
86 | " movco.l %0, @%2 \n" | ||
87 | " bf 1b \n" | ||
88 | : "=&z" (tmp) | ||
89 | : "r" (~mask), "r" (&v->counter) | ||
90 | : "t"); | ||
91 | } | ||
92 | |||
93 | static inline void atomic_set_mask(unsigned int mask, atomic_t *v) | ||
94 | { | ||
95 | unsigned long tmp; | ||
96 | |||
97 | __asm__ __volatile__ ( | ||
98 | "1: movli.l @%2, %0 ! atomic_set_mask \n" | ||
99 | " or %1, %0 \n" | ||
100 | " movco.l %0, @%2 \n" | ||
101 | " bf 1b \n" | ||
102 | : "=&z" (tmp) | ||
103 | : "r" (mask), "r" (&v->counter) | ||
104 | : "t"); | ||
105 | } | ||
106 | |||
107 | #endif /* __ASM_SH_ATOMIC_LLSC_H */ | ||
diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h deleted file mode 100644 index c043ef003028..000000000000 --- a/include/asm-sh/atomic.h +++ /dev/null | |||
@@ -1,89 +0,0 @@ | |||
1 | #ifndef __ASM_SH_ATOMIC_H | ||
2 | #define __ASM_SH_ATOMIC_H | ||
3 | |||
4 | /* | ||
5 | * Atomic operations that C can't guarantee us. Useful for | ||
6 | * resource counting etc.. | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | typedef struct { volatile int counter; } atomic_t; | ||
11 | |||
12 | #define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) | ||
13 | |||
14 | #define atomic_read(v) ((v)->counter) | ||
15 | #define atomic_set(v,i) ((v)->counter = (i)) | ||
16 | |||
17 | #include <linux/compiler.h> | ||
18 | #include <asm/system.h> | ||
19 | |||
20 | #if defined(CONFIG_GUSA_RB) | ||
21 | #include <asm/atomic-grb.h> | ||
22 | #elif defined(CONFIG_CPU_SH4A) | ||
23 | #include <asm/atomic-llsc.h> | ||
24 | #else | ||
25 | #include <asm/atomic-irq.h> | ||
26 | #endif | ||
27 | |||
28 | #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) | ||
29 | |||
30 | #define atomic_dec_return(v) atomic_sub_return(1,(v)) | ||
31 | #define atomic_inc_return(v) atomic_add_return(1,(v)) | ||
32 | |||
33 | /* | ||
34 | * atomic_inc_and_test - increment and test | ||
35 | * @v: pointer of type atomic_t | ||
36 | * | ||
37 | * Atomically increments @v by 1 | ||
38 | * and returns true if the result is zero, or false for all | ||
39 | * other cases. | ||
40 | */ | ||
41 | #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) | ||
42 | |||
43 | #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) | ||
44 | #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) | ||
45 | |||
46 | #define atomic_inc(v) atomic_add(1,(v)) | ||
47 | #define atomic_dec(v) atomic_sub(1,(v)) | ||
48 | |||
49 | #ifndef CONFIG_GUSA_RB | ||
50 | static inline int atomic_cmpxchg(atomic_t *v, int old, int new) | ||
51 | { | ||
52 | int ret; | ||
53 | unsigned long flags; | ||
54 | |||
55 | local_irq_save(flags); | ||
56 | ret = v->counter; | ||
57 | if (likely(ret == old)) | ||
58 | v->counter = new; | ||
59 | local_irq_restore(flags); | ||
60 | |||
61 | return ret; | ||
62 | } | ||
63 | |||
64 | static inline int atomic_add_unless(atomic_t *v, int a, int u) | ||
65 | { | ||
66 | int ret; | ||
67 | unsigned long flags; | ||
68 | |||
69 | local_irq_save(flags); | ||
70 | ret = v->counter; | ||
71 | if (ret != u) | ||
72 | v->counter += a; | ||
73 | local_irq_restore(flags); | ||
74 | |||
75 | return ret != u; | ||
76 | } | ||
77 | #endif | ||
78 | |||
79 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | ||
80 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | ||
81 | |||
82 | /* Atomic operations are already serializing on SH */ | ||
83 | #define smp_mb__before_atomic_dec() barrier() | ||
84 | #define smp_mb__after_atomic_dec() barrier() | ||
85 | #define smp_mb__before_atomic_inc() barrier() | ||
86 | #define smp_mb__after_atomic_inc() barrier() | ||
87 | |||
88 | #include <asm-generic/atomic.h> | ||
89 | #endif /* __ASM_SH_ATOMIC_H */ | ||
diff --git a/include/asm-sh/auxvec.h b/include/asm-sh/auxvec.h deleted file mode 100644 index a6b9d4f4859e..000000000000 --- a/include/asm-sh/auxvec.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | #ifndef __ASM_SH_AUXVEC_H | ||
2 | #define __ASM_SH_AUXVEC_H | ||
3 | |||
4 | /* | ||
5 | * Architecture-neutral AT_ values in 0-17, leave some room | ||
6 | * for more of them. | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * This entry gives some information about the FPU initialization | ||
11 | * performed by the kernel. | ||
12 | */ | ||
13 | #define AT_FPUCW 18 /* Used FPU control word. */ | ||
14 | |||
15 | #ifdef CONFIG_VSYSCALL | ||
16 | /* | ||
17 | * Only define this in the vsyscall case, the entry point to | ||
18 | * the vsyscall page gets placed here. The kernel will attempt | ||
19 | * to build a gate VMA we don't care about otherwise.. | ||
20 | */ | ||
21 | #define AT_SYSINFO_EHDR 33 | ||
22 | #endif | ||
23 | |||
24 | /* | ||
25 | * More complete cache descriptions than AT_[DIU]CACHEBSIZE. If the | ||
26 | * value is -1, then the cache doesn't exist. Otherwise: | ||
27 | * | ||
28 | * bit 0-3: Cache set-associativity; 0 means fully associative. | ||
29 | * bit 4-7: Log2 of cacheline size. | ||
30 | * bit 8-31: Size of the entire cache >> 8. | ||
31 | */ | ||
32 | #define AT_L1I_CACHESHAPE 34 | ||
33 | #define AT_L1D_CACHESHAPE 35 | ||
34 | #define AT_L2_CACHESHAPE 36 | ||
35 | |||
36 | #endif /* __ASM_SH_AUXVEC_H */ | ||
diff --git a/include/asm-sh/bitops-grb.h b/include/asm-sh/bitops-grb.h deleted file mode 100644 index a5907b94395b..000000000000 --- a/include/asm-sh/bitops-grb.h +++ /dev/null | |||
@@ -1,169 +0,0 @@ | |||
1 | #ifndef __ASM_SH_BITOPS_GRB_H | ||
2 | #define __ASM_SH_BITOPS_GRB_H | ||
3 | |||
4 | static inline void set_bit(int nr, volatile void * addr) | ||
5 | { | ||
6 | int mask; | ||
7 | volatile unsigned int *a = addr; | ||
8 | unsigned long tmp; | ||
9 | |||
10 | a += nr >> 5; | ||
11 | mask = 1 << (nr & 0x1f); | ||
12 | |||
13 | __asm__ __volatile__ ( | ||
14 | " .align 2 \n\t" | ||
15 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
16 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
17 | " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ | ||
18 | " mov.l @%1, %0 \n\t" /* load old value */ | ||
19 | " or %2, %0 \n\t" /* or */ | ||
20 | " mov.l %0, @%1 \n\t" /* store new value */ | ||
21 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
22 | : "=&r" (tmp), | ||
23 | "+r" (a) | ||
24 | : "r" (mask) | ||
25 | : "memory" , "r0", "r1"); | ||
26 | } | ||
27 | |||
28 | static inline void clear_bit(int nr, volatile void * addr) | ||
29 | { | ||
30 | int mask; | ||
31 | volatile unsigned int *a = addr; | ||
32 | unsigned long tmp; | ||
33 | |||
34 | a += nr >> 5; | ||
35 | mask = ~(1 << (nr & 0x1f)); | ||
36 | __asm__ __volatile__ ( | ||
37 | " .align 2 \n\t" | ||
38 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
39 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
40 | " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ | ||
41 | " mov.l @%1, %0 \n\t" /* load old value */ | ||
42 | " and %2, %0 \n\t" /* and */ | ||
43 | " mov.l %0, @%1 \n\t" /* store new value */ | ||
44 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
45 | : "=&r" (tmp), | ||
46 | "+r" (a) | ||
47 | : "r" (mask) | ||
48 | : "memory" , "r0", "r1"); | ||
49 | } | ||
50 | |||
51 | static inline void change_bit(int nr, volatile void * addr) | ||
52 | { | ||
53 | int mask; | ||
54 | volatile unsigned int *a = addr; | ||
55 | unsigned long tmp; | ||
56 | |||
57 | a += nr >> 5; | ||
58 | mask = 1 << (nr & 0x1f); | ||
59 | __asm__ __volatile__ ( | ||
60 | " .align 2 \n\t" | ||
61 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
62 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
63 | " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ | ||
64 | " mov.l @%1, %0 \n\t" /* load old value */ | ||
65 | " xor %2, %0 \n\t" /* xor */ | ||
66 | " mov.l %0, @%1 \n\t" /* store new value */ | ||
67 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
68 | : "=&r" (tmp), | ||
69 | "+r" (a) | ||
70 | : "r" (mask) | ||
71 | : "memory" , "r0", "r1"); | ||
72 | } | ||
73 | |||
74 | static inline int test_and_set_bit(int nr, volatile void * addr) | ||
75 | { | ||
76 | int mask, retval; | ||
77 | volatile unsigned int *a = addr; | ||
78 | unsigned long tmp; | ||
79 | |||
80 | a += nr >> 5; | ||
81 | mask = 1 << (nr & 0x1f); | ||
82 | |||
83 | __asm__ __volatile__ ( | ||
84 | " .align 2 \n\t" | ||
85 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
86 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
87 | " mov #-14, r15 \n\t" /* LOGIN: r15 = size */ | ||
88 | " mov.l @%2, %0 \n\t" /* load old value */ | ||
89 | " mov %0, %1 \n\t" | ||
90 | " tst %1, %3 \n\t" /* T = ((*a & mask) == 0) */ | ||
91 | " mov #-1, %1 \n\t" /* retvat = -1 */ | ||
92 | " negc %1, %1 \n\t" /* retval = (mask & *a) != 0 */ | ||
93 | " or %3, %0 \n\t" | ||
94 | " mov.l %0, @%2 \n\t" /* store new value */ | ||
95 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
96 | : "=&r" (tmp), | ||
97 | "=&r" (retval), | ||
98 | "+r" (a) | ||
99 | : "r" (mask) | ||
100 | : "memory" , "r0", "r1" ,"t"); | ||
101 | |||
102 | return retval; | ||
103 | } | ||
104 | |||
105 | static inline int test_and_clear_bit(int nr, volatile void * addr) | ||
106 | { | ||
107 | int mask, retval,not_mask; | ||
108 | volatile unsigned int *a = addr; | ||
109 | unsigned long tmp; | ||
110 | |||
111 | a += nr >> 5; | ||
112 | mask = 1 << (nr & 0x1f); | ||
113 | |||
114 | not_mask = ~mask; | ||
115 | |||
116 | __asm__ __volatile__ ( | ||
117 | " .align 2 \n\t" | ||
118 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
119 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
120 | " mov #-14, r15 \n\t" /* LOGIN */ | ||
121 | " mov.l @%2, %0 \n\t" /* load old value */ | ||
122 | " mov %0, %1 \n\t" /* %1 = *a */ | ||
123 | " tst %1, %3 \n\t" /* T = ((*a & mask) == 0) */ | ||
124 | " mov #-1, %1 \n\t" /* retvat = -1 */ | ||
125 | " negc %1, %1 \n\t" /* retval = (mask & *a) != 0 */ | ||
126 | " and %4, %0 \n\t" | ||
127 | " mov.l %0, @%2 \n\t" /* store new value */ | ||
128 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
129 | : "=&r" (tmp), | ||
130 | "=&r" (retval), | ||
131 | "+r" (a) | ||
132 | : "r" (mask), | ||
133 | "r" (not_mask) | ||
134 | : "memory" , "r0", "r1", "t"); | ||
135 | |||
136 | return retval; | ||
137 | } | ||
138 | |||
139 | static inline int test_and_change_bit(int nr, volatile void * addr) | ||
140 | { | ||
141 | int mask, retval; | ||
142 | volatile unsigned int *a = addr; | ||
143 | unsigned long tmp; | ||
144 | |||
145 | a += nr >> 5; | ||
146 | mask = 1 << (nr & 0x1f); | ||
147 | |||
148 | __asm__ __volatile__ ( | ||
149 | " .align 2 \n\t" | ||
150 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
151 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
152 | " mov #-14, r15 \n\t" /* LOGIN */ | ||
153 | " mov.l @%2, %0 \n\t" /* load old value */ | ||
154 | " mov %0, %1 \n\t" /* %1 = *a */ | ||
155 | " tst %1, %3 \n\t" /* T = ((*a & mask) == 0) */ | ||
156 | " mov #-1, %1 \n\t" /* retvat = -1 */ | ||
157 | " negc %1, %1 \n\t" /* retval = (mask & *a) != 0 */ | ||
158 | " xor %3, %0 \n\t" | ||
159 | " mov.l %0, @%2 \n\t" /* store new value */ | ||
160 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
161 | : "=&r" (tmp), | ||
162 | "=&r" (retval), | ||
163 | "+r" (a) | ||
164 | : "r" (mask) | ||
165 | : "memory" , "r0", "r1", "t"); | ||
166 | |||
167 | return retval; | ||
168 | } | ||
169 | #endif /* __ASM_SH_BITOPS_GRB_H */ | ||
diff --git a/include/asm-sh/bitops-irq.h b/include/asm-sh/bitops-irq.h deleted file mode 100644 index 653a12750584..000000000000 --- a/include/asm-sh/bitops-irq.h +++ /dev/null | |||
@@ -1,91 +0,0 @@ | |||
1 | #ifndef __ASM_SH_BITOPS_IRQ_H | ||
2 | #define __ASM_SH_BITOPS_IRQ_H | ||
3 | |||
4 | static inline void set_bit(int nr, volatile void *addr) | ||
5 | { | ||
6 | int mask; | ||
7 | volatile unsigned int *a = addr; | ||
8 | unsigned long flags; | ||
9 | |||
10 | a += nr >> 5; | ||
11 | mask = 1 << (nr & 0x1f); | ||
12 | local_irq_save(flags); | ||
13 | *a |= mask; | ||
14 | local_irq_restore(flags); | ||
15 | } | ||
16 | |||
17 | static inline void clear_bit(int nr, volatile void *addr) | ||
18 | { | ||
19 | int mask; | ||
20 | volatile unsigned int *a = addr; | ||
21 | unsigned long flags; | ||
22 | |||
23 | a += nr >> 5; | ||
24 | mask = 1 << (nr & 0x1f); | ||
25 | local_irq_save(flags); | ||
26 | *a &= ~mask; | ||
27 | local_irq_restore(flags); | ||
28 | } | ||
29 | |||
30 | static inline void change_bit(int nr, volatile void *addr) | ||
31 | { | ||
32 | int mask; | ||
33 | volatile unsigned int *a = addr; | ||
34 | unsigned long flags; | ||
35 | |||
36 | a += nr >> 5; | ||
37 | mask = 1 << (nr & 0x1f); | ||
38 | local_irq_save(flags); | ||
39 | *a ^= mask; | ||
40 | local_irq_restore(flags); | ||
41 | } | ||
42 | |||
43 | static inline int test_and_set_bit(int nr, volatile void *addr) | ||
44 | { | ||
45 | int mask, retval; | ||
46 | volatile unsigned int *a = addr; | ||
47 | unsigned long flags; | ||
48 | |||
49 | a += nr >> 5; | ||
50 | mask = 1 << (nr & 0x1f); | ||
51 | local_irq_save(flags); | ||
52 | retval = (mask & *a) != 0; | ||
53 | *a |= mask; | ||
54 | local_irq_restore(flags); | ||
55 | |||
56 | return retval; | ||
57 | } | ||
58 | |||
59 | static inline int test_and_clear_bit(int nr, volatile void *addr) | ||
60 | { | ||
61 | int mask, retval; | ||
62 | volatile unsigned int *a = addr; | ||
63 | unsigned long flags; | ||
64 | |||
65 | a += nr >> 5; | ||
66 | mask = 1 << (nr & 0x1f); | ||
67 | local_irq_save(flags); | ||
68 | retval = (mask & *a) != 0; | ||
69 | *a &= ~mask; | ||
70 | local_irq_restore(flags); | ||
71 | |||
72 | return retval; | ||
73 | } | ||
74 | |||
75 | static inline int test_and_change_bit(int nr, volatile void *addr) | ||
76 | { | ||
77 | int mask, retval; | ||
78 | volatile unsigned int *a = addr; | ||
79 | unsigned long flags; | ||
80 | |||
81 | a += nr >> 5; | ||
82 | mask = 1 << (nr & 0x1f); | ||
83 | local_irq_save(flags); | ||
84 | retval = (mask & *a) != 0; | ||
85 | *a ^= mask; | ||
86 | local_irq_restore(flags); | ||
87 | |||
88 | return retval; | ||
89 | } | ||
90 | |||
91 | #endif /* __ASM_SH_BITOPS_IRQ_H */ | ||
diff --git a/include/asm-sh/bitops.h b/include/asm-sh/bitops.h deleted file mode 100644 index d7d382f63ee5..000000000000 --- a/include/asm-sh/bitops.h +++ /dev/null | |||
@@ -1,103 +0,0 @@ | |||
1 | #ifndef __ASM_SH_BITOPS_H | ||
2 | #define __ASM_SH_BITOPS_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | #ifndef _LINUX_BITOPS_H | ||
7 | #error only <linux/bitops.h> can be included directly | ||
8 | #endif | ||
9 | |||
10 | #include <asm/system.h> | ||
11 | /* For __swab32 */ | ||
12 | #include <asm/byteorder.h> | ||
13 | |||
14 | #ifdef CONFIG_GUSA_RB | ||
15 | #include <asm/bitops-grb.h> | ||
16 | #else | ||
17 | #include <asm/bitops-irq.h> | ||
18 | #endif | ||
19 | |||
20 | |||
21 | /* | ||
22 | * clear_bit() doesn't provide any barrier for the compiler. | ||
23 | */ | ||
24 | #define smp_mb__before_clear_bit() barrier() | ||
25 | #define smp_mb__after_clear_bit() barrier() | ||
26 | |||
27 | #include <asm-generic/bitops/non-atomic.h> | ||
28 | |||
29 | #ifdef CONFIG_SUPERH32 | ||
30 | static inline unsigned long ffz(unsigned long word) | ||
31 | { | ||
32 | unsigned long result; | ||
33 | |||
34 | __asm__("1:\n\t" | ||
35 | "shlr %1\n\t" | ||
36 | "bt/s 1b\n\t" | ||
37 | " add #1, %0" | ||
38 | : "=r" (result), "=r" (word) | ||
39 | : "0" (~0L), "1" (word) | ||
40 | : "t"); | ||
41 | return result; | ||
42 | } | ||
43 | |||
44 | /** | ||
45 | * __ffs - find first bit in word. | ||
46 | * @word: The word to search | ||
47 | * | ||
48 | * Undefined if no bit exists, so code should check against 0 first. | ||
49 | */ | ||
50 | static inline unsigned long __ffs(unsigned long word) | ||
51 | { | ||
52 | unsigned long result; | ||
53 | |||
54 | __asm__("1:\n\t" | ||
55 | "shlr %1\n\t" | ||
56 | "bf/s 1b\n\t" | ||
57 | " add #1, %0" | ||
58 | : "=r" (result), "=r" (word) | ||
59 | : "0" (~0L), "1" (word) | ||
60 | : "t"); | ||
61 | return result; | ||
62 | } | ||
63 | #else | ||
64 | static inline unsigned long ffz(unsigned long word) | ||
65 | { | ||
66 | unsigned long result, __d2, __d3; | ||
67 | |||
68 | __asm__("gettr tr0, %2\n\t" | ||
69 | "pta $+32, tr0\n\t" | ||
70 | "andi %1, 1, %3\n\t" | ||
71 | "beq %3, r63, tr0\n\t" | ||
72 | "pta $+4, tr0\n" | ||
73 | "0:\n\t" | ||
74 | "shlri.l %1, 1, %1\n\t" | ||
75 | "addi %0, 1, %0\n\t" | ||
76 | "andi %1, 1, %3\n\t" | ||
77 | "beqi %3, 1, tr0\n" | ||
78 | "1:\n\t" | ||
79 | "ptabs %2, tr0\n\t" | ||
80 | : "=r" (result), "=r" (word), "=r" (__d2), "=r" (__d3) | ||
81 | : "0" (0L), "1" (word)); | ||
82 | |||
83 | return result; | ||
84 | } | ||
85 | |||
86 | #include <asm-generic/bitops/__ffs.h> | ||
87 | #endif | ||
88 | |||
89 | #include <asm-generic/bitops/find.h> | ||
90 | #include <asm-generic/bitops/ffs.h> | ||
91 | #include <asm-generic/bitops/hweight.h> | ||
92 | #include <asm-generic/bitops/lock.h> | ||
93 | #include <asm-generic/bitops/sched.h> | ||
94 | #include <asm-generic/bitops/ext2-non-atomic.h> | ||
95 | #include <asm-generic/bitops/ext2-atomic.h> | ||
96 | #include <asm-generic/bitops/minix.h> | ||
97 | #include <asm-generic/bitops/fls.h> | ||
98 | #include <asm-generic/bitops/__fls.h> | ||
99 | #include <asm-generic/bitops/fls64.h> | ||
100 | |||
101 | #endif /* __KERNEL__ */ | ||
102 | |||
103 | #endif /* __ASM_SH_BITOPS_H */ | ||
diff --git a/include/asm-sh/bug.h b/include/asm-sh/bug.h deleted file mode 100644 index c01718040166..000000000000 --- a/include/asm-sh/bug.h +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | #ifndef __ASM_SH_BUG_H | ||
2 | #define __ASM_SH_BUG_H | ||
3 | |||
4 | #define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */ | ||
5 | |||
6 | #ifdef CONFIG_GENERIC_BUG | ||
7 | #define HAVE_ARCH_BUG | ||
8 | #define HAVE_ARCH_WARN_ON | ||
9 | |||
10 | /** | ||
11 | * _EMIT_BUG_ENTRY | ||
12 | * %1 - __FILE__ | ||
13 | * %2 - __LINE__ | ||
14 | * %3 - trap type | ||
15 | * %4 - sizeof(struct bug_entry) | ||
16 | * | ||
17 | * The trapa opcode itself sits in %0. | ||
18 | * The %O notation is used to avoid # generation. | ||
19 | * | ||
20 | * The offending file and line are encoded in the __bug_table section. | ||
21 | */ | ||
22 | #ifdef CONFIG_DEBUG_BUGVERBOSE | ||
23 | #define _EMIT_BUG_ENTRY \ | ||
24 | "\t.pushsection __bug_table,\"a\"\n" \ | ||
25 | "2:\t.long 1b, %O1\n" \ | ||
26 | "\t.short %O2, %O3\n" \ | ||
27 | "\t.org 2b+%O4\n" \ | ||
28 | "\t.popsection\n" | ||
29 | #else | ||
30 | #define _EMIT_BUG_ENTRY \ | ||
31 | "\t.pushsection __bug_table,\"a\"\n" \ | ||
32 | "2:\t.long 1b\n" \ | ||
33 | "\t.short %O3\n" \ | ||
34 | "\t.org 2b+%O4\n" \ | ||
35 | "\t.popsection\n" | ||
36 | #endif | ||
37 | |||
38 | #define BUG() \ | ||
39 | do { \ | ||
40 | __asm__ __volatile__ ( \ | ||
41 | "1:\t.short %O0\n" \ | ||
42 | _EMIT_BUG_ENTRY \ | ||
43 | : \ | ||
44 | : "n" (TRAPA_BUG_OPCODE), \ | ||
45 | "i" (__FILE__), \ | ||
46 | "i" (__LINE__), "i" (0), \ | ||
47 | "i" (sizeof(struct bug_entry))); \ | ||
48 | } while (0) | ||
49 | |||
50 | #define __WARN() \ | ||
51 | do { \ | ||
52 | __asm__ __volatile__ ( \ | ||
53 | "1:\t.short %O0\n" \ | ||
54 | _EMIT_BUG_ENTRY \ | ||
55 | : \ | ||
56 | : "n" (TRAPA_BUG_OPCODE), \ | ||
57 | "i" (__FILE__), \ | ||
58 | "i" (__LINE__), \ | ||
59 | "i" (BUGFLAG_WARNING), \ | ||
60 | "i" (sizeof(struct bug_entry))); \ | ||
61 | } while (0) | ||
62 | |||
63 | #define WARN_ON(x) ({ \ | ||
64 | int __ret_warn_on = !!(x); \ | ||
65 | if (__builtin_constant_p(__ret_warn_on)) { \ | ||
66 | if (__ret_warn_on) \ | ||
67 | __WARN(); \ | ||
68 | } else { \ | ||
69 | if (unlikely(__ret_warn_on)) \ | ||
70 | __WARN(); \ | ||
71 | } \ | ||
72 | unlikely(__ret_warn_on); \ | ||
73 | }) | ||
74 | |||
75 | #endif /* CONFIG_GENERIC_BUG */ | ||
76 | |||
77 | #include <asm-generic/bug.h> | ||
78 | |||
79 | #endif /* __ASM_SH_BUG_H */ | ||
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h deleted file mode 100644 index 121b2ecddfc3..000000000000 --- a/include/asm-sh/bugs.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | #ifndef __ASM_SH_BUGS_H | ||
2 | #define __ASM_SH_BUGS_H | ||
3 | |||
4 | /* | ||
5 | * This is included by init/main.c to check for architecture-dependent bugs. | ||
6 | * | ||
7 | * Needs: | ||
8 | * void check_bugs(void); | ||
9 | */ | ||
10 | |||
11 | /* | ||
12 | * I don't know of any Super-H bugs yet. | ||
13 | */ | ||
14 | |||
15 | #include <asm/processor.h> | ||
16 | |||
17 | static void __init check_bugs(void) | ||
18 | { | ||
19 | extern unsigned long loops_per_jiffy; | ||
20 | char *p = &init_utsname()->machine[2]; /* "sh" */ | ||
21 | |||
22 | current_cpu_data.loops_per_jiffy = loops_per_jiffy; | ||
23 | |||
24 | switch (current_cpu_data.type) { | ||
25 | case CPU_SH7619: | ||
26 | *p++ = '2'; | ||
27 | break; | ||
28 | case CPU_SH7203 ... CPU_MXG: | ||
29 | *p++ = '2'; | ||
30 | *p++ = 'a'; | ||
31 | break; | ||
32 | case CPU_SH7705 ... CPU_SH7729: | ||
33 | *p++ = '3'; | ||
34 | break; | ||
35 | case CPU_SH7750 ... CPU_SH4_501: | ||
36 | *p++ = '4'; | ||
37 | break; | ||
38 | case CPU_SH7763 ... CPU_SHX3: | ||
39 | *p++ = '4'; | ||
40 | *p++ = 'a'; | ||
41 | break; | ||
42 | case CPU_SH7343 ... CPU_SH7366: | ||
43 | *p++ = '4'; | ||
44 | *p++ = 'a'; | ||
45 | *p++ = 'l'; | ||
46 | *p++ = '-'; | ||
47 | *p++ = 'd'; | ||
48 | *p++ = 's'; | ||
49 | *p++ = 'p'; | ||
50 | break; | ||
51 | case CPU_SH5_101 ... CPU_SH5_103: | ||
52 | *p++ = '6'; | ||
53 | *p++ = '4'; | ||
54 | break; | ||
55 | case CPU_SH_NONE: | ||
56 | /* | ||
57 | * Specifically use CPU_SH_NONE rather than default:, | ||
58 | * so we're able to have the compiler whine about | ||
59 | * unhandled enumerations. | ||
60 | */ | ||
61 | break; | ||
62 | } | ||
63 | |||
64 | printk("CPU: %s\n", get_cpu_subtype(¤t_cpu_data)); | ||
65 | |||
66 | #ifndef __LITTLE_ENDIAN__ | ||
67 | /* 'eb' means 'Endian Big' */ | ||
68 | *p++ = 'e'; | ||
69 | *p++ = 'b'; | ||
70 | #endif | ||
71 | *p = '\0'; | ||
72 | } | ||
73 | #endif /* __ASM_SH_BUGS_H */ | ||
diff --git a/include/asm-sh/byteorder.h b/include/asm-sh/byteorder.h deleted file mode 100644 index 4c13e6117563..000000000000 --- a/include/asm-sh/byteorder.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | #ifndef __ASM_SH_BYTEORDER_H | ||
2 | #define __ASM_SH_BYTEORDER_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 1999 Niibe Yutaka | ||
6 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
7 | */ | ||
8 | #include <linux/compiler.h> | ||
9 | #include <linux/types.h> | ||
10 | |||
11 | static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) | ||
12 | { | ||
13 | __asm__( | ||
14 | #ifdef __SH5__ | ||
15 | "byterev %0, %0\n\t" | ||
16 | "shari %0, 32, %0" | ||
17 | #else | ||
18 | "swap.b %0, %0\n\t" | ||
19 | "swap.w %0, %0\n\t" | ||
20 | "swap.b %0, %0" | ||
21 | #endif | ||
22 | : "=r" (x) | ||
23 | : "0" (x)); | ||
24 | |||
25 | return x; | ||
26 | } | ||
27 | |||
28 | static inline __attribute_const__ __u16 ___arch__swab16(__u16 x) | ||
29 | { | ||
30 | __asm__( | ||
31 | #ifdef __SH5__ | ||
32 | "byterev %0, %0\n\t" | ||
33 | "shari %0, 32, %0" | ||
34 | #else | ||
35 | "swap.b %0, %0" | ||
36 | #endif | ||
37 | : "=r" (x) | ||
38 | : "0" (x)); | ||
39 | |||
40 | return x; | ||
41 | } | ||
42 | |||
43 | static inline __u64 ___arch__swab64(__u64 val) | ||
44 | { | ||
45 | union { | ||
46 | struct { __u32 a,b; } s; | ||
47 | __u64 u; | ||
48 | } v, w; | ||
49 | v.u = val; | ||
50 | w.s.b = ___arch__swab32(v.s.a); | ||
51 | w.s.a = ___arch__swab32(v.s.b); | ||
52 | return w.u; | ||
53 | } | ||
54 | |||
55 | #define __arch__swab64(x) ___arch__swab64(x) | ||
56 | #define __arch__swab32(x) ___arch__swab32(x) | ||
57 | #define __arch__swab16(x) ___arch__swab16(x) | ||
58 | |||
59 | #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) | ||
60 | # define __BYTEORDER_HAS_U64__ | ||
61 | # define __SWAB_64_THRU_32__ | ||
62 | #endif | ||
63 | |||
64 | #ifdef __LITTLE_ENDIAN__ | ||
65 | #include <linux/byteorder/little_endian.h> | ||
66 | #else | ||
67 | #include <linux/byteorder/big_endian.h> | ||
68 | #endif | ||
69 | |||
70 | #endif /* __ASM_SH_BYTEORDER_H */ | ||
diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h deleted file mode 100644 index 083419f47c65..000000000000 --- a/include/asm-sh/cache.h +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | /* $Id: cache.h,v 1.6 2004/03/11 18:08:05 lethal Exp $ | ||
2 | * | ||
3 | * include/asm-sh/cache.h | ||
4 | * | ||
5 | * Copyright 1999 (C) Niibe Yutaka | ||
6 | * Copyright 2002, 2003 (C) Paul Mundt | ||
7 | */ | ||
8 | #ifndef __ASM_SH_CACHE_H | ||
9 | #define __ASM_SH_CACHE_H | ||
10 | #ifdef __KERNEL__ | ||
11 | |||
12 | #include <linux/init.h> | ||
13 | #include <asm/cpu/cache.h> | ||
14 | |||
15 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | ||
16 | |||
17 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) | ||
18 | |||
19 | #ifndef __ASSEMBLY__ | ||
20 | struct cache_info { | ||
21 | unsigned int ways; /* Number of cache ways */ | ||
22 | unsigned int sets; /* Number of cache sets */ | ||
23 | unsigned int linesz; /* Cache line size (bytes) */ | ||
24 | |||
25 | unsigned int way_size; /* sets * line size */ | ||
26 | |||
27 | /* | ||
28 | * way_incr is the address offset for accessing the next way | ||
29 | * in memory mapped cache array ops. | ||
30 | */ | ||
31 | unsigned int way_incr; | ||
32 | unsigned int entry_shift; | ||
33 | unsigned int entry_mask; | ||
34 | |||
35 | /* | ||
36 | * Compute a mask which selects the address bits which overlap between | ||
37 | * 1. those used to select the cache set during indexing | ||
38 | * 2. those in the physical page number. | ||
39 | */ | ||
40 | unsigned int alias_mask; | ||
41 | |||
42 | unsigned int n_aliases; /* Number of aliases */ | ||
43 | |||
44 | unsigned long flags; | ||
45 | }; | ||
46 | |||
47 | int __init detect_cpu_and_cache_system(void); | ||
48 | |||
49 | #endif /* __ASSEMBLY__ */ | ||
50 | #endif /* __KERNEL__ */ | ||
51 | #endif /* __ASM_SH_CACHE_H */ | ||
diff --git a/include/asm-sh/cacheflush.h b/include/asm-sh/cacheflush.h deleted file mode 100644 index e034c3604111..000000000000 --- a/include/asm-sh/cacheflush.h +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CACHEFLUSH_H | ||
2 | #define __ASM_SH_CACHEFLUSH_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | #ifdef CONFIG_CACHE_OFF | ||
7 | /* | ||
8 | * Nothing to do when the cache is disabled, initial flush and explicit | ||
9 | * disabling is handled at CPU init time. | ||
10 | * | ||
11 | * See arch/sh/kernel/cpu/init.c:cache_init(). | ||
12 | */ | ||
13 | #define p3_cache_init() do { } while (0) | ||
14 | #define flush_cache_all() do { } while (0) | ||
15 | #define flush_cache_mm(mm) do { } while (0) | ||
16 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
17 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
18 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
19 | #define flush_dcache_page(page) do { } while (0) | ||
20 | #define flush_icache_range(start, end) do { } while (0) | ||
21 | #define flush_icache_page(vma,pg) do { } while (0) | ||
22 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
23 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
24 | #define flush_cache_sigtramp(vaddr) do { } while (0) | ||
25 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | ||
26 | #define __flush_wback_region(start, size) do { (void)(start); } while (0) | ||
27 | #define __flush_purge_region(start, size) do { (void)(start); } while (0) | ||
28 | #define __flush_invalidate_region(start, size) do { (void)(start); } while (0) | ||
29 | #else | ||
30 | #include <asm/cpu/cacheflush.h> | ||
31 | |||
32 | /* | ||
33 | * Consistent DMA requires that the __flush_xxx() primitives must be set | ||
34 | * for any of the enabled non-coherent caches (most of the UP CPUs), | ||
35 | * regardless of PIPT or VIPT cache configurations. | ||
36 | */ | ||
37 | |||
38 | /* Flush (write-back only) a region (smaller than a page) */ | ||
39 | extern void __flush_wback_region(void *start, int size); | ||
40 | /* Flush (write-back & invalidate) a region (smaller than a page) */ | ||
41 | extern void __flush_purge_region(void *start, int size); | ||
42 | /* Flush (invalidate only) a region (smaller than a page) */ | ||
43 | extern void __flush_invalidate_region(void *start, int size); | ||
44 | #endif | ||
45 | |||
46 | #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE | ||
47 | static inline void flush_kernel_dcache_page(struct page *page) | ||
48 | { | ||
49 | flush_dcache_page(page); | ||
50 | } | ||
51 | |||
52 | #if defined(CONFIG_CPU_SH4) && !defined(CONFIG_CACHE_OFF) | ||
53 | extern void copy_to_user_page(struct vm_area_struct *vma, | ||
54 | struct page *page, unsigned long vaddr, void *dst, const void *src, | ||
55 | unsigned long len); | ||
56 | |||
57 | extern void copy_from_user_page(struct vm_area_struct *vma, | ||
58 | struct page *page, unsigned long vaddr, void *dst, const void *src, | ||
59 | unsigned long len); | ||
60 | #else | ||
61 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | ||
62 | do { \ | ||
63 | flush_cache_page(vma, vaddr, page_to_pfn(page));\ | ||
64 | memcpy(dst, src, len); \ | ||
65 | flush_icache_user_range(vma, page, vaddr, len); \ | ||
66 | } while (0) | ||
67 | |||
68 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | ||
69 | do { \ | ||
70 | flush_cache_page(vma, vaddr, page_to_pfn(page));\ | ||
71 | memcpy(dst, src, len); \ | ||
72 | } while (0) | ||
73 | #endif | ||
74 | |||
75 | #define flush_cache_vmap(start, end) flush_cache_all() | ||
76 | #define flush_cache_vunmap(start, end) flush_cache_all() | ||
77 | |||
78 | #define HAVE_ARCH_UNMAPPED_AREA | ||
79 | |||
80 | #endif /* __KERNEL__ */ | ||
81 | #endif /* __ASM_SH_CACHEFLUSH_H */ | ||
diff --git a/include/asm-sh/checksum.h b/include/asm-sh/checksum.h deleted file mode 100644 index 67496ab0ef04..000000000000 --- a/include/asm-sh/checksum.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | #ifdef CONFIG_SUPERH32 | ||
2 | # include "checksum_32.h" | ||
3 | #else | ||
4 | # include "checksum_64.h" | ||
5 | #endif | ||
diff --git a/include/asm-sh/checksum_32.h b/include/asm-sh/checksum_32.h deleted file mode 100644 index 14b7ac2f0a07..000000000000 --- a/include/asm-sh/checksum_32.h +++ /dev/null | |||
@@ -1,215 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CHECKSUM_H | ||
2 | #define __ASM_SH_CHECKSUM_H | ||
3 | |||
4 | /* | ||
5 | * This file is subject to the terms and conditions of the GNU General Public | ||
6 | * License. See the file "COPYING" in the main directory of this archive | ||
7 | * for more details. | ||
8 | * | ||
9 | * Copyright (C) 1999 by Kaz Kojima & Niibe Yutaka | ||
10 | */ | ||
11 | |||
12 | #include <linux/in6.h> | ||
13 | |||
14 | /* | ||
15 | * computes the checksum of a memory block at buff, length len, | ||
16 | * and adds in "sum" (32-bit) | ||
17 | * | ||
18 | * returns a 32-bit number suitable for feeding into itself | ||
19 | * or csum_tcpudp_magic | ||
20 | * | ||
21 | * this function must be called with even lengths, except | ||
22 | * for the last fragment, which may be odd | ||
23 | * | ||
24 | * it's best to have buff aligned on a 32-bit boundary | ||
25 | */ | ||
26 | asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); | ||
27 | |||
28 | /* | ||
29 | * the same as csum_partial, but copies from src while it | ||
30 | * checksums, and handles user-space pointer exceptions correctly, when needed. | ||
31 | * | ||
32 | * here even more important to align src and dst on a 32-bit (or even | ||
33 | * better 64-bit) boundary | ||
34 | */ | ||
35 | |||
36 | asmlinkage __wsum csum_partial_copy_generic(const void *src, void *dst, | ||
37 | int len, __wsum sum, | ||
38 | int *src_err_ptr, int *dst_err_ptr); | ||
39 | |||
40 | /* | ||
41 | * Note: when you get a NULL pointer exception here this means someone | ||
42 | * passed in an incorrect kernel address to one of these functions. | ||
43 | * | ||
44 | * If you use these functions directly please don't forget the | ||
45 | * access_ok(). | ||
46 | */ | ||
47 | static inline | ||
48 | __wsum csum_partial_copy_nocheck(const void *src, void *dst, | ||
49 | int len, __wsum sum) | ||
50 | { | ||
51 | return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL); | ||
52 | } | ||
53 | |||
54 | static inline | ||
55 | __wsum csum_partial_copy_from_user(const void __user *src, void *dst, | ||
56 | int len, __wsum sum, int *err_ptr) | ||
57 | { | ||
58 | return csum_partial_copy_generic((__force const void *)src, dst, | ||
59 | len, sum, err_ptr, NULL); | ||
60 | } | ||
61 | |||
62 | /* | ||
63 | * Fold a partial checksum | ||
64 | */ | ||
65 | |||
66 | static inline __sum16 csum_fold(__wsum sum) | ||
67 | { | ||
68 | unsigned int __dummy; | ||
69 | __asm__("swap.w %0, %1\n\t" | ||
70 | "extu.w %0, %0\n\t" | ||
71 | "extu.w %1, %1\n\t" | ||
72 | "add %1, %0\n\t" | ||
73 | "swap.w %0, %1\n\t" | ||
74 | "add %1, %0\n\t" | ||
75 | "not %0, %0\n\t" | ||
76 | : "=r" (sum), "=&r" (__dummy) | ||
77 | : "0" (sum) | ||
78 | : "t"); | ||
79 | return (__force __sum16)sum; | ||
80 | } | ||
81 | |||
82 | /* | ||
83 | * This is a version of ip_compute_csum() optimized for IP headers, | ||
84 | * which always checksum on 4 octet boundaries. | ||
85 | * | ||
86 | * i386 version by Jorge Cwik <jorge@laser.satlink.net>, adapted | ||
87 | * for linux by * Arnt Gulbrandsen. | ||
88 | */ | ||
89 | static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) | ||
90 | { | ||
91 | unsigned int sum, __dummy0, __dummy1; | ||
92 | |||
93 | __asm__ __volatile__( | ||
94 | "mov.l @%1+, %0\n\t" | ||
95 | "mov.l @%1+, %3\n\t" | ||
96 | "add #-2, %2\n\t" | ||
97 | "clrt\n\t" | ||
98 | "1:\t" | ||
99 | "addc %3, %0\n\t" | ||
100 | "movt %4\n\t" | ||
101 | "mov.l @%1+, %3\n\t" | ||
102 | "dt %2\n\t" | ||
103 | "bf/s 1b\n\t" | ||
104 | " cmp/eq #1, %4\n\t" | ||
105 | "addc %3, %0\n\t" | ||
106 | "addc %2, %0" /* Here %2 is 0, add carry-bit */ | ||
107 | /* Since the input registers which are loaded with iph and ihl | ||
108 | are modified, we must also specify them as outputs, or gcc | ||
109 | will assume they contain their original values. */ | ||
110 | : "=r" (sum), "=r" (iph), "=r" (ihl), "=&r" (__dummy0), "=&z" (__dummy1) | ||
111 | : "1" (iph), "2" (ihl) | ||
112 | : "t", "memory"); | ||
113 | |||
114 | return csum_fold(sum); | ||
115 | } | ||
116 | |||
117 | static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, | ||
118 | unsigned short len, | ||
119 | unsigned short proto, | ||
120 | __wsum sum) | ||
121 | { | ||
122 | #ifdef __LITTLE_ENDIAN__ | ||
123 | unsigned long len_proto = (proto + len) << 8; | ||
124 | #else | ||
125 | unsigned long len_proto = proto + len; | ||
126 | #endif | ||
127 | __asm__("clrt\n\t" | ||
128 | "addc %0, %1\n\t" | ||
129 | "addc %2, %1\n\t" | ||
130 | "addc %3, %1\n\t" | ||
131 | "movt %0\n\t" | ||
132 | "add %1, %0" | ||
133 | : "=r" (sum), "=r" (len_proto) | ||
134 | : "r" (daddr), "r" (saddr), "1" (len_proto), "0" (sum) | ||
135 | : "t"); | ||
136 | |||
137 | return sum; | ||
138 | } | ||
139 | |||
140 | /* | ||
141 | * computes the checksum of the TCP/UDP pseudo-header | ||
142 | * returns a 16-bit checksum, already complemented | ||
143 | */ | ||
144 | static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, | ||
145 | unsigned short len, | ||
146 | unsigned short proto, | ||
147 | __wsum sum) | ||
148 | { | ||
149 | return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum)); | ||
150 | } | ||
151 | |||
152 | /* | ||
153 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
154 | * in icmp.c | ||
155 | */ | ||
156 | static inline __sum16 ip_compute_csum(const void *buff, int len) | ||
157 | { | ||
158 | return csum_fold(csum_partial(buff, len, 0)); | ||
159 | } | ||
160 | |||
161 | #define _HAVE_ARCH_IPV6_CSUM | ||
162 | static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, | ||
163 | const struct in6_addr *daddr, | ||
164 | __u32 len, unsigned short proto, | ||
165 | __wsum sum) | ||
166 | { | ||
167 | unsigned int __dummy; | ||
168 | __asm__("clrt\n\t" | ||
169 | "mov.l @(0,%2), %1\n\t" | ||
170 | "addc %1, %0\n\t" | ||
171 | "mov.l @(4,%2), %1\n\t" | ||
172 | "addc %1, %0\n\t" | ||
173 | "mov.l @(8,%2), %1\n\t" | ||
174 | "addc %1, %0\n\t" | ||
175 | "mov.l @(12,%2), %1\n\t" | ||
176 | "addc %1, %0\n\t" | ||
177 | "mov.l @(0,%3), %1\n\t" | ||
178 | "addc %1, %0\n\t" | ||
179 | "mov.l @(4,%3), %1\n\t" | ||
180 | "addc %1, %0\n\t" | ||
181 | "mov.l @(8,%3), %1\n\t" | ||
182 | "addc %1, %0\n\t" | ||
183 | "mov.l @(12,%3), %1\n\t" | ||
184 | "addc %1, %0\n\t" | ||
185 | "addc %4, %0\n\t" | ||
186 | "addc %5, %0\n\t" | ||
187 | "movt %1\n\t" | ||
188 | "add %1, %0\n" | ||
189 | : "=r" (sum), "=&r" (__dummy) | ||
190 | : "r" (saddr), "r" (daddr), | ||
191 | "r" (htonl(len)), "r" (htonl(proto)), "0" (sum) | ||
192 | : "t"); | ||
193 | |||
194 | return csum_fold(sum); | ||
195 | } | ||
196 | |||
197 | /* | ||
198 | * Copy and checksum to user | ||
199 | */ | ||
200 | #define HAVE_CSUM_COPY_USER | ||
201 | static inline __wsum csum_and_copy_to_user(const void *src, | ||
202 | void __user *dst, | ||
203 | int len, __wsum sum, | ||
204 | int *err_ptr) | ||
205 | { | ||
206 | if (access_ok(VERIFY_WRITE, dst, len)) | ||
207 | return csum_partial_copy_generic((__force const void *)src, | ||
208 | dst, len, sum, NULL, err_ptr); | ||
209 | |||
210 | if (len) | ||
211 | *err_ptr = -EFAULT; | ||
212 | |||
213 | return (__force __wsum)-1; /* invalid checksum */ | ||
214 | } | ||
215 | #endif /* __ASM_SH_CHECKSUM_H */ | ||
diff --git a/include/asm-sh/checksum_64.h b/include/asm-sh/checksum_64.h deleted file mode 100644 index 9c62a031a8f5..000000000000 --- a/include/asm-sh/checksum_64.h +++ /dev/null | |||
@@ -1,78 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CHECKSUM_64_H | ||
2 | #define __ASM_SH_CHECKSUM_64_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-sh/checksum_64.h | ||
6 | * | ||
7 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General Public | ||
10 | * License. See the file "COPYING" in the main directory of this archive | ||
11 | * for more details. | ||
12 | */ | ||
13 | |||
14 | /* | ||
15 | * computes the checksum of a memory block at buff, length len, | ||
16 | * and adds in "sum" (32-bit) | ||
17 | * | ||
18 | * returns a 32-bit number suitable for feeding into itself | ||
19 | * or csum_tcpudp_magic | ||
20 | * | ||
21 | * this function must be called with even lengths, except | ||
22 | * for the last fragment, which may be odd | ||
23 | * | ||
24 | * it's best to have buff aligned on a 32-bit boundary | ||
25 | */ | ||
26 | asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); | ||
27 | |||
28 | /* | ||
29 | * Note: when you get a NULL pointer exception here this means someone | ||
30 | * passed in an incorrect kernel address to one of these functions. | ||
31 | * | ||
32 | * If you use these functions directly please don't forget the | ||
33 | * access_ok(). | ||
34 | */ | ||
35 | |||
36 | |||
37 | __wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, | ||
38 | __wsum sum); | ||
39 | |||
40 | __wsum csum_partial_copy_from_user(const void __user *src, void *dst, | ||
41 | int len, __wsum sum, int *err_ptr); | ||
42 | |||
43 | static inline __sum16 csum_fold(__wsum csum) | ||
44 | { | ||
45 | u32 sum = (__force u32)csum; | ||
46 | sum = (sum & 0xffff) + (sum >> 16); | ||
47 | sum = (sum & 0xffff) + (sum >> 16); | ||
48 | return (__force __sum16)~sum; | ||
49 | } | ||
50 | |||
51 | __sum16 ip_fast_csum(const void *iph, unsigned int ihl); | ||
52 | |||
53 | __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, | ||
54 | unsigned short len, unsigned short proto, | ||
55 | __wsum sum); | ||
56 | |||
57 | /* | ||
58 | * computes the checksum of the TCP/UDP pseudo-header | ||
59 | * returns a 16-bit checksum, already complemented | ||
60 | */ | ||
61 | static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, | ||
62 | unsigned short len, | ||
63 | unsigned short proto, | ||
64 | __wsum sum) | ||
65 | { | ||
66 | return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); | ||
67 | } | ||
68 | |||
69 | /* | ||
70 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
71 | * in icmp.c | ||
72 | */ | ||
73 | static inline __sum16 ip_compute_csum(const void *buff, int len) | ||
74 | { | ||
75 | return csum_fold(csum_partial(buff, len, 0)); | ||
76 | } | ||
77 | |||
78 | #endif /* __ASM_SH_CHECKSUM_64_H */ | ||
diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h deleted file mode 100644 index 720dfab7b15e..000000000000 --- a/include/asm-sh/clock.h +++ /dev/null | |||
@@ -1,97 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CLOCK_H | ||
2 | #define __ASM_SH_CLOCK_H | ||
3 | |||
4 | #include <linux/kref.h> | ||
5 | #include <linux/list.h> | ||
6 | #include <linux/seq_file.h> | ||
7 | #include <linux/clk.h> | ||
8 | #include <linux/err.h> | ||
9 | |||
10 | struct clk; | ||
11 | |||
12 | struct clk_ops { | ||
13 | void (*init)(struct clk *clk); | ||
14 | void (*enable)(struct clk *clk); | ||
15 | void (*disable)(struct clk *clk); | ||
16 | void (*recalc)(struct clk *clk); | ||
17 | int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); | ||
18 | long (*round_rate)(struct clk *clk, unsigned long rate); | ||
19 | }; | ||
20 | |||
21 | struct clk { | ||
22 | struct list_head node; | ||
23 | const char *name; | ||
24 | int id; | ||
25 | struct module *owner; | ||
26 | |||
27 | struct clk *parent; | ||
28 | struct clk_ops *ops; | ||
29 | |||
30 | struct kref kref; | ||
31 | |||
32 | unsigned long rate; | ||
33 | unsigned long flags; | ||
34 | unsigned long arch_flags; | ||
35 | }; | ||
36 | |||
37 | #define CLK_ALWAYS_ENABLED (1 << 0) | ||
38 | #define CLK_RATE_PROPAGATES (1 << 1) | ||
39 | |||
40 | /* Should be defined by processor-specific code */ | ||
41 | void arch_init_clk_ops(struct clk_ops **, int type); | ||
42 | |||
43 | /* arch/sh/kernel/cpu/clock.c */ | ||
44 | int clk_init(void); | ||
45 | |||
46 | void clk_recalc_rate(struct clk *); | ||
47 | |||
48 | int clk_register(struct clk *); | ||
49 | void clk_unregister(struct clk *); | ||
50 | |||
51 | static inline int clk_always_enable(const char *id) | ||
52 | { | ||
53 | struct clk *clk; | ||
54 | int ret; | ||
55 | |||
56 | clk = clk_get(NULL, id); | ||
57 | if (IS_ERR(clk)) | ||
58 | return PTR_ERR(clk); | ||
59 | |||
60 | ret = clk_enable(clk); | ||
61 | if (ret) | ||
62 | clk_put(clk); | ||
63 | |||
64 | return ret; | ||
65 | } | ||
66 | |||
67 | /* the exported API, in addition to clk_set_rate */ | ||
68 | /** | ||
69 | * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter | ||
70 | * @clk: clock source | ||
71 | * @rate: desired clock rate in Hz | ||
72 | * @algo_id: algorithm id to be passed down to ops->set_rate | ||
73 | * | ||
74 | * Returns success (0) or negative errno. | ||
75 | */ | ||
76 | int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id); | ||
77 | |||
78 | enum clk_sh_algo_id { | ||
79 | NO_CHANGE = 0, | ||
80 | |||
81 | IUS_N1_N1, | ||
82 | IUS_322, | ||
83 | IUS_522, | ||
84 | IUS_N11, | ||
85 | |||
86 | SB_N1, | ||
87 | |||
88 | SB3_N1, | ||
89 | SB3_32, | ||
90 | SB3_43, | ||
91 | SB3_54, | ||
92 | |||
93 | BP_N1, | ||
94 | |||
95 | IP_N1, | ||
96 | }; | ||
97 | #endif /* __ASM_SH_CLOCK_H */ | ||
diff --git a/include/asm-sh/cmpxchg-grb.h b/include/asm-sh/cmpxchg-grb.h deleted file mode 100644 index e2681abe764f..000000000000 --- a/include/asm-sh/cmpxchg-grb.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CMPXCHG_GRB_H | ||
2 | #define __ASM_SH_CMPXCHG_GRB_H | ||
3 | |||
4 | static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) | ||
5 | { | ||
6 | unsigned long retval; | ||
7 | |||
8 | __asm__ __volatile__ ( | ||
9 | " .align 2 \n\t" | ||
10 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
11 | " nop \n\t" | ||
12 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
13 | " mov #-4, r15 \n\t" /* LOGIN */ | ||
14 | " mov.l @%1, %0 \n\t" /* load old value */ | ||
15 | " mov.l %2, @%1 \n\t" /* store new value */ | ||
16 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
17 | : "=&r" (retval), | ||
18 | "+r" (m) | ||
19 | : "r" (val) | ||
20 | : "memory", "r0", "r1"); | ||
21 | |||
22 | return retval; | ||
23 | } | ||
24 | |||
25 | static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val) | ||
26 | { | ||
27 | unsigned long retval; | ||
28 | |||
29 | __asm__ __volatile__ ( | ||
30 | " .align 2 \n\t" | ||
31 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
32 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
33 | " mov #-6, r15 \n\t" /* LOGIN */ | ||
34 | " mov.b @%1, %0 \n\t" /* load old value */ | ||
35 | " extu.b %0, %0 \n\t" /* extend as unsigned */ | ||
36 | " mov.b %2, @%1 \n\t" /* store new value */ | ||
37 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
38 | : "=&r" (retval), | ||
39 | "+r" (m) | ||
40 | : "r" (val) | ||
41 | : "memory" , "r0", "r1"); | ||
42 | |||
43 | return retval; | ||
44 | } | ||
45 | |||
46 | static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old, | ||
47 | unsigned long new) | ||
48 | { | ||
49 | unsigned long retval; | ||
50 | |||
51 | __asm__ __volatile__ ( | ||
52 | " .align 2 \n\t" | ||
53 | " mova 1f, r0 \n\t" /* r0 = end point */ | ||
54 | " nop \n\t" | ||
55 | " mov r15, r1 \n\t" /* r1 = saved sp */ | ||
56 | " mov #-8, r15 \n\t" /* LOGIN */ | ||
57 | " mov.l @%1, %0 \n\t" /* load old value */ | ||
58 | " cmp/eq %0, %2 \n\t" | ||
59 | " bf 1f \n\t" /* if not equal */ | ||
60 | " mov.l %2, @%1 \n\t" /* store new value */ | ||
61 | "1: mov r1, r15 \n\t" /* LOGOUT */ | ||
62 | : "=&r" (retval), | ||
63 | "+r" (m) | ||
64 | : "r" (new) | ||
65 | : "memory" , "r0", "r1", "t"); | ||
66 | |||
67 | return retval; | ||
68 | } | ||
69 | |||
70 | #endif /* __ASM_SH_CMPXCHG_GRB_H */ | ||
diff --git a/include/asm-sh/cmpxchg-irq.h b/include/asm-sh/cmpxchg-irq.h deleted file mode 100644 index 43049ec0554b..000000000000 --- a/include/asm-sh/cmpxchg-irq.h +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CMPXCHG_IRQ_H | ||
2 | #define __ASM_SH_CMPXCHG_IRQ_H | ||
3 | |||
4 | static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) | ||
5 | { | ||
6 | unsigned long flags, retval; | ||
7 | |||
8 | local_irq_save(flags); | ||
9 | retval = *m; | ||
10 | *m = val; | ||
11 | local_irq_restore(flags); | ||
12 | return retval; | ||
13 | } | ||
14 | |||
15 | static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val) | ||
16 | { | ||
17 | unsigned long flags, retval; | ||
18 | |||
19 | local_irq_save(flags); | ||
20 | retval = *m; | ||
21 | *m = val & 0xff; | ||
22 | local_irq_restore(flags); | ||
23 | return retval; | ||
24 | } | ||
25 | |||
26 | static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old, | ||
27 | unsigned long new) | ||
28 | { | ||
29 | __u32 retval; | ||
30 | unsigned long flags; | ||
31 | |||
32 | local_irq_save(flags); | ||
33 | retval = *m; | ||
34 | if (retval == old) | ||
35 | *m = new; | ||
36 | local_irq_restore(flags); /* implies memory barrier */ | ||
37 | return retval; | ||
38 | } | ||
39 | |||
40 | #endif /* __ASM_SH_CMPXCHG_IRQ_H */ | ||
diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h deleted file mode 100644 index 86308aa39731..000000000000 --- a/include/asm-sh/cpu-features.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_FEATURES_H | ||
2 | #define __ASM_SH_CPU_FEATURES_H | ||
3 | |||
4 | /* | ||
5 | * Processor flags | ||
6 | * | ||
7 | * Note: When adding a new flag, keep cpu_flags[] in | ||
8 | * arch/sh/kernel/setup.c in sync so symbolic name | ||
9 | * mapping of the processor flags has a chance of being | ||
10 | * reasonably accurate. | ||
11 | * | ||
12 | * These flags are also available through the ELF | ||
13 | * auxiliary vector as AT_HWCAP. | ||
14 | */ | ||
15 | #define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ | ||
16 | #define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ | ||
17 | #define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ | ||
18 | #define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ | ||
19 | #define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ | ||
20 | #define CPU_HAS_PTEA 0x0020 /* PTEA register */ | ||
21 | #define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ | ||
22 | #define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */ | ||
23 | #define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */ | ||
24 | |||
25 | #endif /* __ASM_SH_CPU_FEATURES_H */ | ||
diff --git a/include/asm-sh/cpu-sh2/addrspace.h b/include/asm-sh/cpu-sh2/addrspace.h deleted file mode 100644 index 2b9ab93efa4e..000000000000 --- a/include/asm-sh/cpu-sh2/addrspace.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * Definitions for the address spaces of the SH-2 CPUs. | ||
3 | * | ||
4 | * Copyright (C) 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH2_ADDRSPACE_H | ||
11 | #define __ASM_CPU_SH2_ADDRSPACE_H | ||
12 | |||
13 | #define P0SEG 0x00000000 | ||
14 | #define P1SEG 0x80000000 | ||
15 | #define P2SEG 0xa0000000 | ||
16 | #define P3SEG 0xc0000000 | ||
17 | #define P4SEG 0xe0000000 | ||
18 | |||
19 | #endif /* __ASM_CPU_SH2_ADDRSPACE_H */ | ||
diff --git a/include/asm-sh/cpu-sh2/cache.h b/include/asm-sh/cpu-sh2/cache.h deleted file mode 100644 index 4e0b16500686..000000000000 --- a/include/asm-sh/cpu-sh2/cache.h +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh2/cache.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH2_CACHE_H | ||
11 | #define __ASM_CPU_SH2_CACHE_H | ||
12 | |||
13 | #define L1_CACHE_SHIFT 4 | ||
14 | |||
15 | #define SH_CACHE_VALID 1 | ||
16 | #define SH_CACHE_UPDATED 2 | ||
17 | #define SH_CACHE_COMBINED 4 | ||
18 | #define SH_CACHE_ASSOC 8 | ||
19 | |||
20 | #if defined(CONFIG_CPU_SUBTYPE_SH7619) | ||
21 | #define CCR 0xffffffec | ||
22 | |||
23 | #define CCR_CACHE_CE 0x01 /* Cache enable */ | ||
24 | #define CCR_CACHE_WT 0x06 /* CCR[bit1=1,bit2=1] */ | ||
25 | /* 0x00000000-0x7fffffff: Write-through */ | ||
26 | /* 0x80000000-0x9fffffff: Write-back */ | ||
27 | /* 0xc0000000-0xdfffffff: Write-through */ | ||
28 | #define CCR_CACHE_CB 0x00 /* CCR[bit1=0,bit2=0] */ | ||
29 | /* 0x00000000-0x7fffffff: Write-back */ | ||
30 | /* 0x80000000-0x9fffffff: Write-through */ | ||
31 | /* 0xc0000000-0xdfffffff: Write-back */ | ||
32 | #define CCR_CACHE_CF 0x08 /* Cache invalidate */ | ||
33 | |||
34 | #define CACHE_OC_ADDRESS_ARRAY 0xf0000000 | ||
35 | #define CACHE_OC_DATA_ARRAY 0xf1000000 | ||
36 | |||
37 | #define CCR_CACHE_ENABLE CCR_CACHE_CE | ||
38 | #define CCR_CACHE_INVALIDATE CCR_CACHE_CF | ||
39 | #endif | ||
40 | |||
41 | #endif /* __ASM_CPU_SH2_CACHE_H */ | ||
diff --git a/include/asm-sh/cpu-sh2/cacheflush.h b/include/asm-sh/cpu-sh2/cacheflush.h deleted file mode 100644 index 2979efb26de3..000000000000 --- a/include/asm-sh/cpu-sh2/cacheflush.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh2/cacheflush.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH2_CACHEFLUSH_H | ||
11 | #define __ASM_CPU_SH2_CACHEFLUSH_H | ||
12 | |||
13 | /* | ||
14 | * Cache flushing: | ||
15 | * | ||
16 | * - flush_cache_all() flushes entire cache | ||
17 | * - flush_cache_mm(mm) flushes the specified mm context's cache lines | ||
18 | * - flush_cache_dup mm(mm) handles cache flushing when forking | ||
19 | * - flush_cache_page(mm, vmaddr, pfn) flushes a single page | ||
20 | * - flush_cache_range(vma, start, end) flushes a range of pages | ||
21 | * | ||
22 | * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache | ||
23 | * - flush_icache_range(start, end) flushes(invalidates) a range for icache | ||
24 | * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache | ||
25 | * | ||
26 | * Caches are indexed (effectively) by physical address on SH-2, so | ||
27 | * we don't need them. | ||
28 | */ | ||
29 | #define flush_cache_all() do { } while (0) | ||
30 | #define flush_cache_mm(mm) do { } while (0) | ||
31 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
32 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
33 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
34 | #define flush_dcache_page(page) do { } while (0) | ||
35 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
36 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
37 | #define flush_icache_range(start, end) do { } while (0) | ||
38 | #define flush_icache_page(vma,pg) do { } while (0) | ||
39 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | ||
40 | #define flush_cache_sigtramp(vaddr) do { } while (0) | ||
41 | |||
42 | #define p3_cache_init() do { } while (0) | ||
43 | #endif /* __ASM_CPU_SH2_CACHEFLUSH_H */ | ||
44 | |||
diff --git a/include/asm-sh/cpu-sh2/dma.h b/include/asm-sh/cpu-sh2/dma.h deleted file mode 100644 index d66b43cdc637..000000000000 --- a/include/asm-sh/cpu-sh2/dma.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* | ||
2 | * Definitions for the SH-2 DMAC. | ||
3 | * | ||
4 | * Copyright (C) 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH2_DMA_H | ||
11 | #define __ASM_CPU_SH2_DMA_H | ||
12 | |||
13 | #define SH_MAX_DMA_CHANNELS 2 | ||
14 | |||
15 | #define SAR ((unsigned long[]){ 0xffffff80, 0xffffff90 }) | ||
16 | #define DAR ((unsigned long[]){ 0xffffff84, 0xffffff94 }) | ||
17 | #define DMATCR ((unsigned long[]){ 0xffffff88, 0xffffff98 }) | ||
18 | #define CHCR ((unsigned long[]){ 0xfffffffc, 0xffffff9c }) | ||
19 | |||
20 | #define DMAOR 0xffffffb0 | ||
21 | |||
22 | #endif /* __ASM_CPU_SH2_DMA_H */ | ||
23 | |||
diff --git a/include/asm-sh/cpu-sh2/freq.h b/include/asm-sh/cpu-sh2/freq.h deleted file mode 100644 index 31de475da70b..000000000000 --- a/include/asm-sh/cpu-sh2/freq.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh2/freq.h | ||
3 | * | ||
4 | * Copyright (C) 2006 Yoshinori Sato | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH2_FREQ_H | ||
11 | #define __ASM_CPU_SH2_FREQ_H | ||
12 | |||
13 | #if defined(CONFIG_CPU_SUBTYPE_SH7619) | ||
14 | #define FREQCR 0xf815ff80 | ||
15 | #endif | ||
16 | |||
17 | #endif /* __ASM_CPU_SH2_FREQ_H */ | ||
18 | |||
diff --git a/include/asm-sh/cpu-sh2/mmu_context.h b/include/asm-sh/cpu-sh2/mmu_context.h deleted file mode 100644 index beeb299e01ec..000000000000 --- a/include/asm-sh/cpu-sh2/mmu_context.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh2/mmu_context.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH2_MMU_CONTEXT_H | ||
11 | #define __ASM_CPU_SH2_MMU_CONTEXT_H | ||
12 | |||
13 | /* No MMU */ | ||
14 | |||
15 | #endif /* __ASM_CPU_SH2_MMU_CONTEXT_H */ | ||
16 | |||
diff --git a/include/asm-sh/cpu-sh2/rtc.h b/include/asm-sh/cpu-sh2/rtc.h deleted file mode 100644 index 39e2d6e94782..000000000000 --- a/include/asm-sh/cpu-sh2/rtc.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH2_RTC_H | ||
2 | #define __ASM_SH_CPU_SH2_RTC_H | ||
3 | |||
4 | #define rtc_reg_size sizeof(u16) | ||
5 | #define RTC_BIT_INVERTED 0 | ||
6 | #define RTC_DEF_CAPABILITIES 0UL | ||
7 | |||
8 | #endif /* __ASM_SH_CPU_SH2_RTC_H */ | ||
diff --git a/include/asm-sh/cpu-sh2/sigcontext.h b/include/asm-sh/cpu-sh2/sigcontext.h deleted file mode 100644 index fe5c15dd6e87..000000000000 --- a/include/asm-sh/cpu-sh2/sigcontext.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | #ifndef __ASM_CPU_SH2_SIGCONTEXT_H | ||
2 | #define __ASM_CPU_SH2_SIGCONTEXT_H | ||
3 | |||
4 | struct sigcontext { | ||
5 | unsigned long oldmask; | ||
6 | |||
7 | /* CPU registers */ | ||
8 | unsigned long sc_regs[16]; | ||
9 | unsigned long sc_pc; | ||
10 | unsigned long sc_pr; | ||
11 | unsigned long sc_sr; | ||
12 | unsigned long sc_gbr; | ||
13 | unsigned long sc_mach; | ||
14 | unsigned long sc_macl; | ||
15 | }; | ||
16 | |||
17 | #endif /* __ASM_CPU_SH2_SIGCONTEXT_H */ | ||
diff --git a/include/asm-sh/cpu-sh2/timer.h b/include/asm-sh/cpu-sh2/timer.h deleted file mode 100644 index a39c241e8195..000000000000 --- a/include/asm-sh/cpu-sh2/timer.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_CPU_SH2_TIMER_H | ||
2 | #define __ASM_CPU_SH2_TIMER_H | ||
3 | |||
4 | /* Nothing needed yet */ | ||
5 | |||
6 | #endif /* __ASM_CPU_SH2_TIMER_H */ | ||
diff --git a/include/asm-sh/cpu-sh2/ubc.h b/include/asm-sh/cpu-sh2/ubc.h deleted file mode 100644 index ba0e87f19c7a..000000000000 --- a/include/asm-sh/cpu-sh2/ubc.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh2/ubc.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH2_UBC_H | ||
11 | #define __ASM_CPU_SH2_UBC_H | ||
12 | |||
13 | #define UBC_BARA 0xffffff40 | ||
14 | #define UBC_BAMRA 0xffffff44 | ||
15 | #define UBC_BBRA 0xffffff48 | ||
16 | #define UBC_BARB 0xffffff60 | ||
17 | #define UBC_BAMRB 0xffffff64 | ||
18 | #define UBC_BBRB 0xffffff68 | ||
19 | #define UBC_BDRB 0xffffff70 | ||
20 | #define UBC_BDMRB 0xffffff74 | ||
21 | #define UBC_BRCR 0xffffff78 | ||
22 | |||
23 | /* | ||
24 | * We don't have any ASID changes to make in the UBC on the SH-2. | ||
25 | * | ||
26 | * Make these purposely invalid to track misuse. | ||
27 | */ | ||
28 | #define UBC_BASRA 0x00000000 | ||
29 | #define UBC_BASRB 0x00000000 | ||
30 | |||
31 | #endif /* __ASM_CPU_SH2_UBC_H */ | ||
32 | |||
diff --git a/include/asm-sh/cpu-sh2/watchdog.h b/include/asm-sh/cpu-sh2/watchdog.h deleted file mode 100644 index 393161c9c6d0..000000000000 --- a/include/asm-sh/cpu-sh2/watchdog.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh2/watchdog.h | ||
3 | * | ||
4 | * Copyright (C) 2002, 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH2_WATCHDOG_H | ||
11 | #define __ASM_CPU_SH2_WATCHDOG_H | ||
12 | |||
13 | /* | ||
14 | * More SH-2 brilliance .. its not good enough that we can't read | ||
15 | * and write the same sizes to WTCNT, now we have to read and write | ||
16 | * with different sizes at different addresses for WTCNT _and_ RSTCSR. | ||
17 | * | ||
18 | * At least on the bright side no one has managed to screw over WTCSR | ||
19 | * in this fashion .. yet. | ||
20 | */ | ||
21 | /* Register definitions */ | ||
22 | #define WTCNT 0xfffffe80 | ||
23 | #define WTCSR 0xfffffe80 | ||
24 | #define RSTCSR 0xfffffe82 | ||
25 | |||
26 | #define WTCNT_R (WTCNT + 1) | ||
27 | #define RSTCSR_R (RSTCSR + 1) | ||
28 | |||
29 | /* Bit definitions */ | ||
30 | #define WTCSR_IOVF 0x80 | ||
31 | #define WTCSR_WT 0x40 | ||
32 | #define WTCSR_TME 0x20 | ||
33 | #define WTCSR_RSTS 0x00 | ||
34 | |||
35 | #define RSTCSR_RSTS 0x20 | ||
36 | |||
37 | /** | ||
38 | * sh_wdt_read_rstcsr - Read from Reset Control/Status Register | ||
39 | * | ||
40 | * Reads back the RSTCSR value. | ||
41 | */ | ||
42 | static inline __u8 sh_wdt_read_rstcsr(void) | ||
43 | { | ||
44 | /* | ||
45 | * Same read/write brain-damage as for WTCNT here.. | ||
46 | */ | ||
47 | return ctrl_inb(RSTCSR_R); | ||
48 | } | ||
49 | |||
50 | /** | ||
51 | * sh_wdt_write_csr - Write to Reset Control/Status Register | ||
52 | * | ||
53 | * @val: Value to write | ||
54 | * | ||
55 | * Writes the given value @val to the lower byte of the control/status | ||
56 | * register. The upper byte is set manually on each write. | ||
57 | */ | ||
58 | static inline void sh_wdt_write_rstcsr(__u8 val) | ||
59 | { | ||
60 | /* | ||
61 | * Note: Due to the brain-damaged nature of this register, | ||
62 | * we can't presently touch the WOVF bit, since the upper byte | ||
63 | * has to be swapped for this. So just leave it alone.. | ||
64 | */ | ||
65 | ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, RSTCSR); | ||
66 | } | ||
67 | |||
68 | #endif /* __ASM_CPU_SH2_WATCHDOG_H */ | ||
69 | |||
diff --git a/include/asm-sh/cpu-sh2a/addrspace.h b/include/asm-sh/cpu-sh2a/addrspace.h deleted file mode 100644 index 795ddd6856a3..000000000000 --- a/include/asm-sh/cpu-sh2a/addrspace.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH2A_ADDRSPACE_H | ||
2 | #define __ASM_SH_CPU_SH2A_ADDRSPACE_H | ||
3 | |||
4 | #define P0SEG 0x00000000 | ||
5 | #define P1SEG 0x00000000 | ||
6 | #define P2SEG 0x20000000 | ||
7 | #define P3SEG 0x00000000 | ||
8 | #define P4SEG 0x80000000 | ||
9 | |||
10 | #endif /* __ASM_SH_CPU_SH2A_ADDRSPACE_H */ | ||
diff --git a/include/asm-sh/cpu-sh2a/cache.h b/include/asm-sh/cpu-sh2a/cache.h deleted file mode 100644 index afe228b3f493..000000000000 --- a/include/asm-sh/cpu-sh2a/cache.h +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh2a/cache.h | ||
3 | * | ||
4 | * Copyright (C) 2004 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH2A_CACHE_H | ||
11 | #define __ASM_CPU_SH2A_CACHE_H | ||
12 | |||
13 | #define L1_CACHE_SHIFT 4 | ||
14 | |||
15 | #define SH_CACHE_VALID 1 | ||
16 | #define SH_CACHE_UPDATED 2 | ||
17 | #define SH_CACHE_COMBINED 4 | ||
18 | #define SH_CACHE_ASSOC 8 | ||
19 | |||
20 | #define CCR 0xfffc1000 /* CCR1 */ | ||
21 | #define CCR2 0xfffc1004 | ||
22 | |||
23 | /* | ||
24 | * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not | ||
25 | * listed here are reserved. | ||
26 | */ | ||
27 | #define CCR_CACHE_CB 0x0000 /* Hack */ | ||
28 | #define CCR_CACHE_OCE 0x0001 | ||
29 | #define CCR_CACHE_WT 0x0002 | ||
30 | #define CCR_CACHE_OCI 0x0008 /* OCF */ | ||
31 | #define CCR_CACHE_ICE 0x0100 | ||
32 | #define CCR_CACHE_ICI 0x0800 /* ICF */ | ||
33 | |||
34 | #define CACHE_IC_ADDRESS_ARRAY 0xf0000000 | ||
35 | #define CACHE_OC_ADDRESS_ARRAY 0xf0800000 | ||
36 | |||
37 | #define CCR_CACHE_ENABLE (CCR_CACHE_OCE | CCR_CACHE_ICE) | ||
38 | #define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI) | ||
39 | |||
40 | #endif /* __ASM_CPU_SH2A_CACHE_H */ | ||
diff --git a/include/asm-sh/cpu-sh2a/cacheflush.h b/include/asm-sh/cpu-sh2a/cacheflush.h deleted file mode 100644 index fa3186c73350..000000000000 --- a/include/asm-sh/cpu-sh2a/cacheflush.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm/cpu-sh2/cacheflush.h> | ||
diff --git a/include/asm-sh/cpu-sh2a/dma.h b/include/asm-sh/cpu-sh2a/dma.h deleted file mode 100644 index 0d5ad85c1de8..000000000000 --- a/include/asm-sh/cpu-sh2a/dma.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm/cpu-sh2/dma.h> | ||
diff --git a/include/asm-sh/cpu-sh2a/freq.h b/include/asm-sh/cpu-sh2a/freq.h deleted file mode 100644 index 830fd43b6cdc..000000000000 --- a/include/asm-sh/cpu-sh2a/freq.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh2a/freq.h | ||
3 | * | ||
4 | * Copyright (C) 2006 Yoshinori Sato | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH2A_FREQ_H | ||
11 | #define __ASM_CPU_SH2A_FREQ_H | ||
12 | |||
13 | #define FREQCR 0xfffe0010 | ||
14 | |||
15 | #endif /* __ASM_CPU_SH2A_FREQ_H */ | ||
16 | |||
diff --git a/include/asm-sh/cpu-sh2a/mmu_context.h b/include/asm-sh/cpu-sh2a/mmu_context.h deleted file mode 100644 index cd2387f7db9e..000000000000 --- a/include/asm-sh/cpu-sh2a/mmu_context.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm/cpu-sh2/mmu_context.h> | ||
diff --git a/include/asm-sh/cpu-sh2a/rtc.h b/include/asm-sh/cpu-sh2a/rtc.h deleted file mode 100644 index afb511e2bed7..000000000000 --- a/include/asm-sh/cpu-sh2a/rtc.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH2A_RTC_H | ||
2 | #define __ASM_SH_CPU_SH2A_RTC_H | ||
3 | |||
4 | #define rtc_reg_size sizeof(u16) | ||
5 | #define RTC_BIT_INVERTED 0 | ||
6 | #define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR | ||
7 | |||
8 | #endif /* __ASM_SH_CPU_SH2A_RTC_H */ | ||
diff --git a/include/asm-sh/cpu-sh2a/timer.h b/include/asm-sh/cpu-sh2a/timer.h deleted file mode 100644 index fee504adf11e..000000000000 --- a/include/asm-sh/cpu-sh2a/timer.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm/cpu-sh2/timer.h> | ||
diff --git a/include/asm-sh/cpu-sh2a/ubc.h b/include/asm-sh/cpu-sh2a/ubc.h deleted file mode 100644 index cf28062b96a2..000000000000 --- a/include/asm-sh/cpu-sh2a/ubc.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm/cpu-sh2/ubc.h> | ||
diff --git a/include/asm-sh/cpu-sh2a/watchdog.h b/include/asm-sh/cpu-sh2a/watchdog.h deleted file mode 100644 index c1b3e2488478..000000000000 --- a/include/asm-sh/cpu-sh2a/watchdog.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm/cpu-sh2/watchdog.h> | ||
diff --git a/include/asm-sh/cpu-sh3/adc.h b/include/asm-sh/cpu-sh3/adc.h deleted file mode 100644 index b289e3ca19a6..000000000000 --- a/include/asm-sh/cpu-sh3/adc.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | #ifndef __ASM_CPU_SH3_ADC_H | ||
2 | #define __ASM_CPU_SH3_ADC_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 2004 Andriy Skulysh | ||
6 | */ | ||
7 | |||
8 | |||
9 | #define ADDRAH 0xa4000080 | ||
10 | #define ADDRAL 0xa4000082 | ||
11 | #define ADDRBH 0xa4000084 | ||
12 | #define ADDRBL 0xa4000086 | ||
13 | #define ADDRCH 0xa4000088 | ||
14 | #define ADDRCL 0xa400008a | ||
15 | #define ADDRDH 0xa400008c | ||
16 | #define ADDRDL 0xa400008e | ||
17 | #define ADCSR 0xa4000090 | ||
18 | |||
19 | #define ADCSR_ADF 0x80 | ||
20 | #define ADCSR_ADIE 0x40 | ||
21 | #define ADCSR_ADST 0x20 | ||
22 | #define ADCSR_MULTI 0x10 | ||
23 | #define ADCSR_CKS 0x08 | ||
24 | #define ADCSR_CH_MASK 0x07 | ||
25 | |||
26 | #define ADCR 0xa4000092 | ||
27 | |||
28 | #endif /* __ASM_CPU_SH3_ADC_H */ | ||
diff --git a/include/asm-sh/cpu-sh3/addrspace.h b/include/asm-sh/cpu-sh3/addrspace.h deleted file mode 100644 index 0f94726c7d62..000000000000 --- a/include/asm-sh/cpu-sh3/addrspace.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1999 by Kaz Kojima | ||
7 | * | ||
8 | * Defitions for the address spaces of the SH-3 CPUs. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH3_ADDRSPACE_H | ||
11 | #define __ASM_CPU_SH3_ADDRSPACE_H | ||
12 | |||
13 | #define P0SEG 0x00000000 | ||
14 | #define P1SEG 0x80000000 | ||
15 | #define P2SEG 0xa0000000 | ||
16 | #define P3SEG 0xc0000000 | ||
17 | #define P4SEG 0xe0000000 | ||
18 | |||
19 | #endif /* __ASM_CPU_SH3_ADDRSPACE_H */ | ||
diff --git a/include/asm-sh/cpu-sh3/cache.h b/include/asm-sh/cpu-sh3/cache.h deleted file mode 100644 index bee2d81c56bf..000000000000 --- a/include/asm-sh/cpu-sh3/cache.h +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh3/cache.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH3_CACHE_H | ||
11 | #define __ASM_CPU_SH3_CACHE_H | ||
12 | |||
13 | #define L1_CACHE_SHIFT 4 | ||
14 | |||
15 | #define SH_CACHE_VALID 1 | ||
16 | #define SH_CACHE_UPDATED 2 | ||
17 | #define SH_CACHE_COMBINED 4 | ||
18 | #define SH_CACHE_ASSOC 8 | ||
19 | |||
20 | #define CCR 0xffffffec /* Address of Cache Control Register */ | ||
21 | |||
22 | #define CCR_CACHE_CE 0x01 /* Cache Enable */ | ||
23 | #define CCR_CACHE_WT 0x02 /* Write-Through (for P0,U0,P3) (else writeback) */ | ||
24 | #define CCR_CACHE_CB 0x04 /* Write-Back (for P1) (else writethrough) */ | ||
25 | #define CCR_CACHE_CF 0x08 /* Cache Flush */ | ||
26 | #define CCR_CACHE_ORA 0x20 /* RAM mode */ | ||
27 | |||
28 | #define CACHE_OC_ADDRESS_ARRAY 0xf0000000 | ||
29 | #define CACHE_PHYSADDR_MASK 0x1ffffc00 | ||
30 | |||
31 | #define CCR_CACHE_ENABLE CCR_CACHE_CE | ||
32 | #define CCR_CACHE_INVALIDATE CCR_CACHE_CF | ||
33 | |||
34 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | ||
35 | defined(CONFIG_CPU_SUBTYPE_SH7710) || \ | ||
36 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | ||
37 | defined(CONFIG_CPU_SUBTYPE_SH7721) | ||
38 | #define CCR3_REG 0xa40000b4 | ||
39 | #define CCR_CACHE_16KB 0x00010000 | ||
40 | #define CCR_CACHE_32KB 0x00020000 | ||
41 | #endif | ||
42 | |||
43 | #endif /* __ASM_CPU_SH3_CACHE_H */ | ||
diff --git a/include/asm-sh/cpu-sh3/cacheflush.h b/include/asm-sh/cpu-sh3/cacheflush.h deleted file mode 100644 index f70d8ef76a15..000000000000 --- a/include/asm-sh/cpu-sh3/cacheflush.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh3/cacheflush.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH3_CACHEFLUSH_H | ||
11 | #define __ASM_CPU_SH3_CACHEFLUSH_H | ||
12 | |||
13 | /* | ||
14 | * Cache flushing: | ||
15 | * | ||
16 | * - flush_cache_all() flushes entire cache | ||
17 | * - flush_cache_mm(mm) flushes the specified mm context's cache lines | ||
18 | * - flush_cache_dup mm(mm) handles cache flushing when forking | ||
19 | * - flush_cache_page(mm, vmaddr, pfn) flushes a single page | ||
20 | * - flush_cache_range(vma, start, end) flushes a range of pages | ||
21 | * | ||
22 | * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache | ||
23 | * - flush_icache_range(start, end) flushes(invalidates) a range for icache | ||
24 | * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache | ||
25 | * | ||
26 | * Caches are indexed (effectively) by physical address on SH-3, so | ||
27 | * we don't need them. | ||
28 | */ | ||
29 | |||
30 | #if defined(CONFIG_SH7705_CACHE_32KB) | ||
31 | |||
32 | /* SH7705 is an SH3 processor with 32KB cache. This has alias issues like the | ||
33 | * SH4. Unlike the SH4 this is a unified cache so we need to do some work | ||
34 | * in mmap when 'exec'ing a new binary | ||
35 | */ | ||
36 | /* 32KB cache, 4kb PAGE sizes need to check bit 12 */ | ||
37 | #define CACHE_ALIAS 0x00001000 | ||
38 | |||
39 | #define PG_mapped PG_arch_1 | ||
40 | |||
41 | void flush_cache_all(void); | ||
42 | void flush_cache_mm(struct mm_struct *mm); | ||
43 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) | ||
44 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | ||
45 | unsigned long end); | ||
46 | void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); | ||
47 | void flush_dcache_page(struct page *pg); | ||
48 | void flush_icache_range(unsigned long start, unsigned long end); | ||
49 | void flush_icache_page(struct vm_area_struct *vma, struct page *page); | ||
50 | #else | ||
51 | #define flush_cache_all() do { } while (0) | ||
52 | #define flush_cache_mm(mm) do { } while (0) | ||
53 | #define flush_cache_dup_mm(mm) do { } while (0) | ||
54 | #define flush_cache_range(vma, start, end) do { } while (0) | ||
55 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | ||
56 | #define flush_dcache_page(page) do { } while (0) | ||
57 | #define flush_icache_range(start, end) do { } while (0) | ||
58 | #define flush_icache_page(vma,pg) do { } while (0) | ||
59 | #endif | ||
60 | |||
61 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
62 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
63 | |||
64 | /* SH3 has unified cache so no special action needed here */ | ||
65 | #define flush_cache_sigtramp(vaddr) do { } while (0) | ||
66 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | ||
67 | |||
68 | #define p3_cache_init() do { } while (0) | ||
69 | |||
70 | #endif /* __ASM_CPU_SH3_CACHEFLUSH_H */ | ||
diff --git a/include/asm-sh/cpu-sh3/dac.h b/include/asm-sh/cpu-sh3/dac.h deleted file mode 100644 index 05fda8316ebc..000000000000 --- a/include/asm-sh/cpu-sh3/dac.h +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | #ifndef __ASM_CPU_SH3_DAC_H | ||
2 | #define __ASM_CPU_SH3_DAC_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 2003 Andriy Skulysh | ||
6 | */ | ||
7 | |||
8 | |||
9 | #define DADR0 0xa40000a0 | ||
10 | #define DADR1 0xa40000a2 | ||
11 | #define DACR 0xa40000a4 | ||
12 | #define DACR_DAOE1 0x80 | ||
13 | #define DACR_DAOE0 0x40 | ||
14 | #define DACR_DAE 0x20 | ||
15 | |||
16 | |||
17 | static __inline__ void sh_dac_enable(int channel) | ||
18 | { | ||
19 | unsigned char v; | ||
20 | v = ctrl_inb(DACR); | ||
21 | if(channel) v |= DACR_DAOE1; | ||
22 | else v |= DACR_DAOE0; | ||
23 | ctrl_outb(v,DACR); | ||
24 | } | ||
25 | |||
26 | static __inline__ void sh_dac_disable(int channel) | ||
27 | { | ||
28 | unsigned char v; | ||
29 | v = ctrl_inb(DACR); | ||
30 | if(channel) v &= ~DACR_DAOE1; | ||
31 | else v &= ~DACR_DAOE0; | ||
32 | ctrl_outb(v,DACR); | ||
33 | } | ||
34 | |||
35 | static __inline__ void sh_dac_output(u8 value, int channel) | ||
36 | { | ||
37 | if(channel) ctrl_outb(value,DADR1); | ||
38 | else ctrl_outb(value,DADR0); | ||
39 | } | ||
40 | |||
41 | #endif /* __ASM_CPU_SH3_DAC_H */ | ||
diff --git a/include/asm-sh/cpu-sh3/dma.h b/include/asm-sh/cpu-sh3/dma.h deleted file mode 100644 index 6813c3220a1d..000000000000 --- a/include/asm-sh/cpu-sh3/dma.h +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | #ifndef __ASM_CPU_SH3_DMA_H | ||
2 | #define __ASM_CPU_SH3_DMA_H | ||
3 | |||
4 | |||
5 | #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | ||
6 | defined(CONFIG_CPU_SUBTYPE_SH7721) | ||
7 | #define SH_DMAC_BASE 0xa4010020 | ||
8 | #else | ||
9 | #define SH_DMAC_BASE 0xa4000020 | ||
10 | #endif | ||
11 | |||
12 | #if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
13 | #define DMTE0_IRQ 48 | ||
14 | #define DMTE1_IRQ 49 | ||
15 | #define DMTE2_IRQ 50 | ||
16 | #define DMTE3_IRQ 51 | ||
17 | #define DMTE4_IRQ 76 | ||
18 | #define DMTE5_IRQ 77 | ||
19 | #endif | ||
20 | |||
21 | /* Definitions for the SuperH DMAC */ | ||
22 | #define TM_BURST 0x00000020 | ||
23 | #define TS_8 0x00000000 | ||
24 | #define TS_16 0x00000008 | ||
25 | #define TS_32 0x00000010 | ||
26 | #define TS_128 0x00000018 | ||
27 | |||
28 | #define CHCR_TS_MASK 0x18 | ||
29 | #define CHCR_TS_SHIFT 3 | ||
30 | |||
31 | #define DMAOR_INIT DMAOR_DME | ||
32 | |||
33 | /* | ||
34 | * The SuperH DMAC supports a number of transmit sizes, we list them here, | ||
35 | * with their respective values as they appear in the CHCR registers. | ||
36 | */ | ||
37 | enum { | ||
38 | XMIT_SZ_8BIT, | ||
39 | XMIT_SZ_16BIT, | ||
40 | XMIT_SZ_32BIT, | ||
41 | XMIT_SZ_128BIT, | ||
42 | }; | ||
43 | |||
44 | static unsigned int ts_shift[] __maybe_unused = { | ||
45 | [XMIT_SZ_8BIT] = 0, | ||
46 | [XMIT_SZ_16BIT] = 1, | ||
47 | [XMIT_SZ_32BIT] = 2, | ||
48 | [XMIT_SZ_128BIT] = 4, | ||
49 | }; | ||
50 | |||
51 | #endif /* __ASM_CPU_SH3_DMA_H */ | ||
diff --git a/include/asm-sh/cpu-sh3/freq.h b/include/asm-sh/cpu-sh3/freq.h deleted file mode 100644 index 53c62302b2e3..000000000000 --- a/include/asm-sh/cpu-sh3/freq.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh3/freq.h | ||
3 | * | ||
4 | * Copyright (C) 2002, 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH3_FREQ_H | ||
11 | #define __ASM_CPU_SH3_FREQ_H | ||
12 | |||
13 | #ifdef CONFIG_CPU_SUBTYPE_SH7712 | ||
14 | #define FRQCR 0xA415FF80 | ||
15 | #else | ||
16 | #define FRQCR 0xffffff80 | ||
17 | #endif | ||
18 | |||
19 | #define MIN_DIVISOR_NR 0 | ||
20 | #define MAX_DIVISOR_NR 4 | ||
21 | |||
22 | #define FRQCR_CKOEN 0x0100 | ||
23 | #define FRQCR_PLLEN 0x0080 | ||
24 | #define FRQCR_PSTBY 0x0040 | ||
25 | |||
26 | #endif /* __ASM_CPU_SH3_FREQ_H */ | ||
27 | |||
diff --git a/include/asm-sh/cpu-sh3/gpio.h b/include/asm-sh/cpu-sh3/gpio.h deleted file mode 100644 index 4e53eb314b8f..000000000000 --- a/include/asm-sh/cpu-sh3/gpio.h +++ /dev/null | |||
@@ -1,67 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh3/gpio.h | ||
3 | * | ||
4 | * Copyright (C) 2007 Markus Brunner, Mark Jonas | ||
5 | * | ||
6 | * Addresses for the Pin Function Controller | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | #ifndef _CPU_SH3_GPIO_H | ||
13 | #define _CPU_SH3_GPIO_H | ||
14 | |||
15 | #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | ||
16 | defined(CONFIG_CPU_SUBTYPE_SH7721) | ||
17 | |||
18 | /* Control registers */ | ||
19 | #define PORT_PACR 0xA4050100UL | ||
20 | #define PORT_PBCR 0xA4050102UL | ||
21 | #define PORT_PCCR 0xA4050104UL | ||
22 | #define PORT_PDCR 0xA4050106UL | ||
23 | #define PORT_PECR 0xA4050108UL | ||
24 | #define PORT_PFCR 0xA405010AUL | ||
25 | #define PORT_PGCR 0xA405010CUL | ||
26 | #define PORT_PHCR 0xA405010EUL | ||
27 | #define PORT_PJCR 0xA4050110UL | ||
28 | #define PORT_PKCR 0xA4050112UL | ||
29 | #define PORT_PLCR 0xA4050114UL | ||
30 | #define PORT_PMCR 0xA4050116UL | ||
31 | #define PORT_PPCR 0xA4050118UL | ||
32 | #define PORT_PRCR 0xA405011AUL | ||
33 | #define PORT_PSCR 0xA405011CUL | ||
34 | #define PORT_PTCR 0xA405011EUL | ||
35 | #define PORT_PUCR 0xA4050120UL | ||
36 | #define PORT_PVCR 0xA4050122UL | ||
37 | |||
38 | /* Data registers */ | ||
39 | #define PORT_PADR 0xA4050140UL | ||
40 | /* Address of PORT_PBDR is wrong in the datasheet, see errata 2005-09-21 */ | ||
41 | #define PORT_PBDR 0xA4050142UL | ||
42 | #define PORT_PCDR 0xA4050144UL | ||
43 | #define PORT_PDDR 0xA4050146UL | ||
44 | #define PORT_PEDR 0xA4050148UL | ||
45 | #define PORT_PFDR 0xA405014AUL | ||
46 | #define PORT_PGDR 0xA405014CUL | ||
47 | #define PORT_PHDR 0xA405014EUL | ||
48 | #define PORT_PJDR 0xA4050150UL | ||
49 | #define PORT_PKDR 0xA4050152UL | ||
50 | #define PORT_PLDR 0xA4050154UL | ||
51 | #define PORT_PMDR 0xA4050156UL | ||
52 | #define PORT_PPDR 0xA4050158UL | ||
53 | #define PORT_PRDR 0xA405015AUL | ||
54 | #define PORT_PSDR 0xA405015CUL | ||
55 | #define PORT_PTDR 0xA405015EUL | ||
56 | #define PORT_PUDR 0xA4050160UL | ||
57 | #define PORT_PVDR 0xA4050162UL | ||
58 | |||
59 | /* Pin Select Registers */ | ||
60 | #define PORT_PSELA 0xA4050124UL | ||
61 | #define PORT_PSELB 0xA4050126UL | ||
62 | #define PORT_PSELC 0xA4050128UL | ||
63 | #define PORT_PSELD 0xA405012AUL | ||
64 | |||
65 | #endif | ||
66 | |||
67 | #endif | ||
diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h deleted file mode 100644 index ab09da73ce77..000000000000 --- a/include/asm-sh/cpu-sh3/mmu_context.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh3/mmu_context.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH3_MMU_CONTEXT_H | ||
11 | #define __ASM_CPU_SH3_MMU_CONTEXT_H | ||
12 | |||
13 | #define MMU_PTEH 0xFFFFFFF0 /* Page table entry register HIGH */ | ||
14 | #define MMU_PTEL 0xFFFFFFF4 /* Page table entry register LOW */ | ||
15 | #define MMU_TTB 0xFFFFFFF8 /* Translation table base register */ | ||
16 | #define MMU_TEA 0xFFFFFFFC /* TLB Exception Address */ | ||
17 | |||
18 | #define MMUCR 0xFFFFFFE0 /* MMU Control Register */ | ||
19 | |||
20 | #define MMU_TLB_ADDRESS_ARRAY 0xF2000000 | ||
21 | #define MMU_PAGE_ASSOC_BIT 0x80 | ||
22 | |||
23 | #define MMU_NTLB_ENTRIES 128 /* for 7708 */ | ||
24 | #define MMU_NTLB_WAYS 4 | ||
25 | #define MMU_CONTROL_INIT 0x007 /* SV=0, TF=1, IX=1, AT=1 */ | ||
26 | |||
27 | #define TRA 0xffffffd0 | ||
28 | #define EXPEVT 0xffffffd4 | ||
29 | |||
30 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | ||
31 | defined(CONFIG_CPU_SUBTYPE_SH7706) || \ | ||
32 | defined(CONFIG_CPU_SUBTYPE_SH7707) || \ | ||
33 | defined(CONFIG_CPU_SUBTYPE_SH7709) || \ | ||
34 | defined(CONFIG_CPU_SUBTYPE_SH7710) || \ | ||
35 | defined(CONFIG_CPU_SUBTYPE_SH7712) || \ | ||
36 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | ||
37 | defined(CONFIG_CPU_SUBTYPE_SH7721) | ||
38 | #define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ | ||
39 | #else | ||
40 | #define INTEVT 0xffffffd8 | ||
41 | #endif | ||
42 | |||
43 | #endif /* __ASM_CPU_SH3_MMU_CONTEXT_H */ | ||
44 | |||
diff --git a/include/asm-sh/cpu-sh3/rtc.h b/include/asm-sh/cpu-sh3/rtc.h deleted file mode 100644 index 319404aaee37..000000000000 --- a/include/asm-sh/cpu-sh3/rtc.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH3_RTC_H | ||
2 | #define __ASM_SH_CPU_SH3_RTC_H | ||
3 | |||
4 | #define rtc_reg_size sizeof(u16) | ||
5 | #define RTC_BIT_INVERTED 0 /* No bug on SH7708, SH7709A */ | ||
6 | #define RTC_DEF_CAPABILITIES 0UL | ||
7 | |||
8 | #endif /* __ASM_SH_CPU_SH3_RTC_H */ | ||
diff --git a/include/asm-sh/cpu-sh3/sigcontext.h b/include/asm-sh/cpu-sh3/sigcontext.h deleted file mode 100644 index 17310dc03dcd..000000000000 --- a/include/asm-sh/cpu-sh3/sigcontext.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | #ifndef __ASM_CPU_SH3_SIGCONTEXT_H | ||
2 | #define __ASM_CPU_SH3_SIGCONTEXT_H | ||
3 | |||
4 | struct sigcontext { | ||
5 | unsigned long oldmask; | ||
6 | |||
7 | /* CPU registers */ | ||
8 | unsigned long sc_regs[16]; | ||
9 | unsigned long sc_pc; | ||
10 | unsigned long sc_pr; | ||
11 | unsigned long sc_sr; | ||
12 | unsigned long sc_gbr; | ||
13 | unsigned long sc_mach; | ||
14 | unsigned long sc_macl; | ||
15 | }; | ||
16 | |||
17 | #endif /* __ASM_CPU_SH3_SIGCONTEXT_H */ | ||
diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h deleted file mode 100644 index 793acf12aa08..000000000000 --- a/include/asm-sh/cpu-sh3/timer.h +++ /dev/null | |||
@@ -1,67 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh3/timer.h | ||
3 | * | ||
4 | * Copyright (C) 2004 Lineo Solutions, Inc. | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH3_TIMER_H | ||
11 | #define __ASM_CPU_SH3_TIMER_H | ||
12 | |||
13 | /* | ||
14 | * --------------------------------------------------------------------------- | ||
15 | * TMU Common definitions for SH3 processors | ||
16 | * SH7706 | ||
17 | * SH7709S | ||
18 | * SH7727 | ||
19 | * SH7729R | ||
20 | * SH7710 | ||
21 | * SH7720 | ||
22 | * SH7710 | ||
23 | * --------------------------------------------------------------------------- | ||
24 | */ | ||
25 | |||
26 | #if !defined(CONFIG_CPU_SUBTYPE_SH7720) && !defined(CONFIG_CPU_SUBTYPE_SH7721) | ||
27 | #define TMU_TOCR 0xfffffe90 /* Byte access */ | ||
28 | #endif | ||
29 | |||
30 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ | ||
31 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | ||
32 | defined(CONFIG_CPU_SUBTYPE_SH7721) | ||
33 | #define TMU_012_TSTR 0xa412fe92 /* Byte access */ | ||
34 | |||
35 | #define TMU0_TCOR 0xa412fe94 /* Long access */ | ||
36 | #define TMU0_TCNT 0xa412fe98 /* Long access */ | ||
37 | #define TMU0_TCR 0xa412fe9c /* Word access */ | ||
38 | |||
39 | #define TMU1_TCOR 0xa412fea0 /* Long access */ | ||
40 | #define TMU1_TCNT 0xa412fea4 /* Long access */ | ||
41 | #define TMU1_TCR 0xa412fea8 /* Word access */ | ||
42 | |||
43 | #define TMU2_TCOR 0xa412feac /* Long access */ | ||
44 | #define TMU2_TCNT 0xa412feb0 /* Long access */ | ||
45 | #define TMU2_TCR 0xa412feb4 /* Word access */ | ||
46 | |||
47 | #else | ||
48 | #define TMU_012_TSTR 0xfffffe92 /* Byte access */ | ||
49 | |||
50 | #define TMU0_TCOR 0xfffffe94 /* Long access */ | ||
51 | #define TMU0_TCNT 0xfffffe98 /* Long access */ | ||
52 | #define TMU0_TCR 0xfffffe9c /* Word access */ | ||
53 | |||
54 | #define TMU1_TCOR 0xfffffea0 /* Long access */ | ||
55 | #define TMU1_TCNT 0xfffffea4 /* Long access */ | ||
56 | #define TMU1_TCR 0xfffffea8 /* Word access */ | ||
57 | |||
58 | #define TMU2_TCOR 0xfffffeac /* Long access */ | ||
59 | #define TMU2_TCNT 0xfffffeb0 /* Long access */ | ||
60 | #define TMU2_TCR 0xfffffeb4 /* Word access */ | ||
61 | #if !defined(CONFIG_CPU_SUBTYPE_SH7720) && !defined(CONFIG_CPU_SUBTYPE_SH7721) | ||
62 | #define TMU2_TCPR2 0xfffffeb8 /* Long access */ | ||
63 | #endif | ||
64 | #endif | ||
65 | |||
66 | #endif /* __ASM_CPU_SH3_TIMER_H */ | ||
67 | |||
diff --git a/include/asm-sh/cpu-sh3/ubc.h b/include/asm-sh/cpu-sh3/ubc.h deleted file mode 100644 index 4e6381d5ff7a..000000000000 --- a/include/asm-sh/cpu-sh3/ubc.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh3/ubc.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * Copyright (C) 2003 Paul Mundt | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #ifndef __ASM_CPU_SH3_UBC_H | ||
12 | #define __ASM_CPU_SH3_UBC_H | ||
13 | |||
14 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ | ||
15 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | ||
16 | defined(CONFIG_CPU_SUBTYPE_SH7721) | ||
17 | #define UBC_BARA 0xa4ffffb0 | ||
18 | #define UBC_BAMRA 0xa4ffffb4 | ||
19 | #define UBC_BBRA 0xa4ffffb8 | ||
20 | #define UBC_BASRA 0xffffffe4 | ||
21 | #define UBC_BARB 0xa4ffffa0 | ||
22 | #define UBC_BAMRB 0xa4ffffa4 | ||
23 | #define UBC_BBRB 0xa4ffffa8 | ||
24 | #define UBC_BASRB 0xffffffe8 | ||
25 | #define UBC_BDRB 0xa4ffff90 | ||
26 | #define UBC_BDMRB 0xa4ffff94 | ||
27 | #define UBC_BRCR 0xa4ffff98 | ||
28 | #else | ||
29 | #define UBC_BARA 0xffffffb0 | ||
30 | #define UBC_BAMRA 0xffffffb4 | ||
31 | #define UBC_BBRA 0xffffffb8 | ||
32 | #define UBC_BASRA 0xffffffe4 | ||
33 | #define UBC_BARB 0xffffffa0 | ||
34 | #define UBC_BAMRB 0xffffffa4 | ||
35 | #define UBC_BBRB 0xffffffa8 | ||
36 | #define UBC_BASRB 0xffffffe8 | ||
37 | #define UBC_BDRB 0xffffff90 | ||
38 | #define UBC_BDMRB 0xffffff94 | ||
39 | #define UBC_BRCR 0xffffff98 | ||
40 | #endif | ||
41 | |||
42 | #endif /* __ASM_CPU_SH3_UBC_H */ | ||
diff --git a/include/asm-sh/cpu-sh3/watchdog.h b/include/asm-sh/cpu-sh3/watchdog.h deleted file mode 100644 index 4ee0347298d8..000000000000 --- a/include/asm-sh/cpu-sh3/watchdog.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh3/watchdog.h | ||
3 | * | ||
4 | * Copyright (C) 2002, 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH3_WATCHDOG_H | ||
11 | #define __ASM_CPU_SH3_WATCHDOG_H | ||
12 | |||
13 | /* Register definitions */ | ||
14 | #define WTCNT 0xffffff84 | ||
15 | #define WTCSR 0xffffff86 | ||
16 | |||
17 | /* Bit definitions */ | ||
18 | #define WTCSR_TME 0x80 | ||
19 | #define WTCSR_WT 0x40 | ||
20 | #define WTCSR_RSTS 0x20 | ||
21 | #define WTCSR_WOVF 0x10 | ||
22 | #define WTCSR_IOVF 0x08 | ||
23 | |||
24 | #endif /* __ASM_CPU_SH3_WATCHDOG_H */ | ||
25 | |||
diff --git a/include/asm-sh/cpu-sh4/addrspace.h b/include/asm-sh/cpu-sh4/addrspace.h deleted file mode 100644 index a3fa733c1c7d..000000000000 --- a/include/asm-sh/cpu-sh4/addrspace.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1999 by Kaz Kojima | ||
7 | * | ||
8 | * Defitions for the address spaces of the SH-4 CPUs. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH4_ADDRSPACE_H | ||
11 | #define __ASM_CPU_SH4_ADDRSPACE_H | ||
12 | |||
13 | #define P0SEG 0x00000000 | ||
14 | #define P1SEG 0x80000000 | ||
15 | #define P2SEG 0xa0000000 | ||
16 | #define P3SEG 0xc0000000 | ||
17 | #define P4SEG 0xe0000000 | ||
18 | |||
19 | /* Detailed P4SEG */ | ||
20 | #define P4SEG_STORE_QUE (P4SEG) | ||
21 | #define P4SEG_IC_ADDR 0xf0000000 | ||
22 | #define P4SEG_IC_DATA 0xf1000000 | ||
23 | #define P4SEG_ITLB_ADDR 0xf2000000 | ||
24 | #define P4SEG_ITLB_DATA 0xf3000000 | ||
25 | #define P4SEG_OC_ADDR 0xf4000000 | ||
26 | #define P4SEG_OC_DATA 0xf5000000 | ||
27 | #define P4SEG_TLB_ADDR 0xf6000000 | ||
28 | #define P4SEG_TLB_DATA 0xf7000000 | ||
29 | #define P4SEG_REG_BASE 0xff000000 | ||
30 | |||
31 | #define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ | ||
32 | #define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ | ||
33 | |||
34 | #endif /* __ASM_CPU_SH4_ADDRSPACE_H */ | ||
35 | |||
diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h deleted file mode 100644 index 1c61ebf5c8e3..000000000000 --- a/include/asm-sh/cpu-sh4/cache.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh4/cache.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH4_CACHE_H | ||
11 | #define __ASM_CPU_SH4_CACHE_H | ||
12 | |||
13 | #define L1_CACHE_SHIFT 5 | ||
14 | |||
15 | #define SH_CACHE_VALID 1 | ||
16 | #define SH_CACHE_UPDATED 2 | ||
17 | #define SH_CACHE_COMBINED 4 | ||
18 | #define SH_CACHE_ASSOC 8 | ||
19 | |||
20 | #define CCR 0xff00001c /* Address of Cache Control Register */ | ||
21 | #define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */ | ||
22 | #define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/ | ||
23 | #define CCR_CACHE_CB 0x0004 /* Copy-Back (for P1) (else writethrough) */ | ||
24 | #define CCR_CACHE_OCI 0x0008 /* OC Invalidate */ | ||
25 | #define CCR_CACHE_ORA 0x0020 /* OC RAM Mode */ | ||
26 | #define CCR_CACHE_OIX 0x0080 /* OC Index Enable */ | ||
27 | #define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ | ||
28 | #define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ | ||
29 | #define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ | ||
30 | #ifndef CONFIG_CPU_SH4A | ||
31 | #define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ | ||
32 | #endif | ||
33 | |||
34 | /* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */ | ||
35 | #define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE) | ||
36 | #define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI|CCR_CACHE_ICI) | ||
37 | |||
38 | #define CACHE_IC_ADDRESS_ARRAY 0xf0000000 | ||
39 | #define CACHE_OC_ADDRESS_ARRAY 0xf4000000 | ||
40 | |||
41 | #endif /* __ASM_CPU_SH4_CACHE_H */ | ||
42 | |||
diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h deleted file mode 100644 index 065306d376eb..000000000000 --- a/include/asm-sh/cpu-sh4/cacheflush.h +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh4/cacheflush.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * Copyright (C) 2003 Paul Mundt | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #ifndef __ASM_CPU_SH4_CACHEFLUSH_H | ||
12 | #define __ASM_CPU_SH4_CACHEFLUSH_H | ||
13 | |||
14 | /* | ||
15 | * Caches are broken on SH-4 (unless we use write-through | ||
16 | * caching; in which case they're only semi-broken), | ||
17 | * so we need them. | ||
18 | */ | ||
19 | void flush_cache_all(void); | ||
20 | void flush_dcache_all(void); | ||
21 | void flush_cache_mm(struct mm_struct *mm); | ||
22 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) | ||
23 | void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | ||
24 | unsigned long end); | ||
25 | void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, | ||
26 | unsigned long pfn); | ||
27 | void flush_dcache_page(struct page *pg); | ||
28 | |||
29 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
30 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
31 | |||
32 | void flush_icache_range(unsigned long start, unsigned long end); | ||
33 | void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, | ||
34 | unsigned long addr, int len); | ||
35 | |||
36 | #define flush_icache_page(vma,pg) do { } while (0) | ||
37 | |||
38 | /* Initialization of P3 area for copy_user_page */ | ||
39 | void p3_cache_init(void); | ||
40 | |||
41 | #define PG_mapped PG_arch_1 | ||
42 | |||
43 | #endif /* __ASM_CPU_SH4_CACHEFLUSH_H */ | ||
diff --git a/include/asm-sh/cpu-sh4/dma-sh7780.h b/include/asm-sh/cpu-sh4/dma-sh7780.h deleted file mode 100644 index 71b426a6e482..000000000000 --- a/include/asm-sh/cpu-sh4/dma-sh7780.h +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H | ||
2 | #define __ASM_SH_CPU_SH4_DMA_SH7780_H | ||
3 | |||
4 | #define REQ_HE 0x000000C0 | ||
5 | #define REQ_H 0x00000080 | ||
6 | #define REQ_LE 0x00000040 | ||
7 | #define TM_BURST 0x0000020 | ||
8 | #define TS_8 0x00000000 | ||
9 | #define TS_16 0x00000008 | ||
10 | #define TS_32 0x00000010 | ||
11 | #define TS_16BLK 0x00000018 | ||
12 | #define TS_32BLK 0x00100000 | ||
13 | |||
14 | /* | ||
15 | * The SuperH DMAC supports a number of transmit sizes, we list them here, | ||
16 | * with their respective values as they appear in the CHCR registers. | ||
17 | * | ||
18 | * Defaults to a 64-bit transfer size. | ||
19 | */ | ||
20 | enum { | ||
21 | XMIT_SZ_8BIT, | ||
22 | XMIT_SZ_16BIT, | ||
23 | XMIT_SZ_32BIT, | ||
24 | XMIT_SZ_128BIT, | ||
25 | XMIT_SZ_256BIT, | ||
26 | }; | ||
27 | |||
28 | /* | ||
29 | * The DMA count is defined as the number of bytes to transfer. | ||
30 | */ | ||
31 | static unsigned int ts_shift[] __maybe_unused = { | ||
32 | [XMIT_SZ_8BIT] = 0, | ||
33 | [XMIT_SZ_16BIT] = 1, | ||
34 | [XMIT_SZ_32BIT] = 2, | ||
35 | [XMIT_SZ_128BIT] = 4, | ||
36 | [XMIT_SZ_256BIT] = 5, | ||
37 | }; | ||
38 | |||
39 | #endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ | ||
diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h deleted file mode 100644 index aaf71b018c28..000000000000 --- a/include/asm-sh/cpu-sh4/dma.h +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | #ifndef __ASM_CPU_SH4_DMA_H | ||
2 | #define __ASM_CPU_SH4_DMA_H | ||
3 | |||
4 | #define DMAOR_INIT ( 0x8000 | DMAOR_DME ) | ||
5 | |||
6 | /* SH7751/7760/7780 DMA IRQ sources */ | ||
7 | #define DMTE0_IRQ 34 | ||
8 | #define DMTE1_IRQ 35 | ||
9 | #define DMTE2_IRQ 36 | ||
10 | #define DMTE3_IRQ 37 | ||
11 | #define DMTE4_IRQ 44 | ||
12 | #define DMTE5_IRQ 45 | ||
13 | #define DMTE6_IRQ 46 | ||
14 | #define DMTE7_IRQ 47 | ||
15 | #define DMAE_IRQ 38 | ||
16 | |||
17 | #ifdef CONFIG_CPU_SH4A | ||
18 | #define SH_DMAC_BASE 0xfc808020 | ||
19 | |||
20 | #define CHCR_TS_MASK 0x18 | ||
21 | #define CHCR_TS_SHIFT 3 | ||
22 | |||
23 | #include <asm/cpu/dma-sh7780.h> | ||
24 | #else | ||
25 | #define SH_DMAC_BASE 0xffa00000 | ||
26 | |||
27 | /* Definitions for the SuperH DMAC */ | ||
28 | #define TM_BURST 0x0000080 | ||
29 | #define TS_8 0x00000010 | ||
30 | #define TS_16 0x00000020 | ||
31 | #define TS_32 0x00000030 | ||
32 | #define TS_64 0x00000000 | ||
33 | |||
34 | #define CHCR_TS_MASK 0x70 | ||
35 | #define CHCR_TS_SHIFT 4 | ||
36 | |||
37 | #define DMAOR_COD 0x00000008 | ||
38 | |||
39 | /* | ||
40 | * The SuperH DMAC supports a number of transmit sizes, we list them here, | ||
41 | * with their respective values as they appear in the CHCR registers. | ||
42 | * | ||
43 | * Defaults to a 64-bit transfer size. | ||
44 | */ | ||
45 | enum { | ||
46 | XMIT_SZ_64BIT, | ||
47 | XMIT_SZ_8BIT, | ||
48 | XMIT_SZ_16BIT, | ||
49 | XMIT_SZ_32BIT, | ||
50 | XMIT_SZ_256BIT, | ||
51 | }; | ||
52 | |||
53 | /* | ||
54 | * The DMA count is defined as the number of bytes to transfer. | ||
55 | */ | ||
56 | static unsigned int ts_shift[] __maybe_unused = { | ||
57 | [XMIT_SZ_64BIT] = 3, | ||
58 | [XMIT_SZ_8BIT] = 0, | ||
59 | [XMIT_SZ_16BIT] = 1, | ||
60 | [XMIT_SZ_32BIT] = 2, | ||
61 | [XMIT_SZ_256BIT] = 5, | ||
62 | }; | ||
63 | #endif | ||
64 | |||
65 | #endif /* __ASM_CPU_SH4_DMA_H */ | ||
diff --git a/include/asm-sh/cpu-sh4/fpu.h b/include/asm-sh/cpu-sh4/fpu.h deleted file mode 100644 index febef7342528..000000000000 --- a/include/asm-sh/cpu-sh4/fpu.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/sh/kernel/cpu/sh4/sh4_fpu.h | ||
3 | * | ||
4 | * Copyright (C) 2006 STMicroelectronics Limited | ||
5 | * Author: Carl Shaw <carl.shaw@st.com> | ||
6 | * | ||
7 | * May be copied or modified under the terms of the GNU General Public | ||
8 | * License Version 2. See linux/COPYING for more information. | ||
9 | * | ||
10 | * Definitions for SH4 FPU operations | ||
11 | */ | ||
12 | |||
13 | #ifndef __CPU_SH4_FPU_H | ||
14 | #define __CPU_SH4_FPU_H | ||
15 | |||
16 | #define FPSCR_ENABLE_MASK 0x00000f80UL | ||
17 | |||
18 | #define FPSCR_FMOV_DOUBLE (1<<1) | ||
19 | |||
20 | #define FPSCR_CAUSE_INEXACT (1<<12) | ||
21 | #define FPSCR_CAUSE_UNDERFLOW (1<<13) | ||
22 | #define FPSCR_CAUSE_OVERFLOW (1<<14) | ||
23 | #define FPSCR_CAUSE_DIVZERO (1<<15) | ||
24 | #define FPSCR_CAUSE_INVALID (1<<16) | ||
25 | #define FPSCR_CAUSE_ERROR (1<<17) | ||
26 | |||
27 | #define FPSCR_DBL_PRECISION (1<<19) | ||
28 | #define FPSCR_ROUNDING_MODE(x) ((x >> 20) & 3) | ||
29 | #define FPSCR_RM_NEAREST (0) | ||
30 | #define FPSCR_RM_ZERO (1) | ||
31 | |||
32 | #endif | ||
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h deleted file mode 100644 index c23af81c2e70..000000000000 --- a/include/asm-sh/cpu-sh4/freq.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh4/freq.h | ||
3 | * | ||
4 | * Copyright (C) 2002, 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH4_FREQ_H | ||
11 | #define __ASM_CPU_SH4_FREQ_H | ||
12 | |||
13 | #if defined(CONFIG_CPU_SUBTYPE_SH7722) || \ | ||
14 | defined(CONFIG_CPU_SUBTYPE_SH7723) || \ | ||
15 | defined(CONFIG_CPU_SUBTYPE_SH7343) || \ | ||
16 | defined(CONFIG_CPU_SUBTYPE_SH7366) | ||
17 | #define FRQCR 0xa4150000 | ||
18 | #define VCLKCR 0xa4150004 | ||
19 | #define SCLKACR 0xa4150008 | ||
20 | #define SCLKBCR 0xa415000c | ||
21 | #define IrDACLKCR 0xa4150010 | ||
22 | #define MSTPCR0 0xa4150030 | ||
23 | #define MSTPCR1 0xa4150034 | ||
24 | #define MSTPCR2 0xa4150038 | ||
25 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ | ||
26 | defined(CONFIG_CPU_SUBTYPE_SH7780) | ||
27 | #define FRQCR 0xffc80000 | ||
28 | #elif defined(CONFIG_CPU_SUBTYPE_SH7785) | ||
29 | #define FRQCR0 0xffc80000 | ||
30 | #define FRQCR1 0xffc80004 | ||
31 | #define FRQMR1 0xffc80014 | ||
32 | #elif defined(CONFIG_CPU_SUBTYPE_SHX3) | ||
33 | #define FRQCR 0xffc00014 | ||
34 | #else | ||
35 | #define FRQCR 0xffc00000 | ||
36 | #define FRQCR_PSTBY 0x0200 | ||
37 | #define FRQCR_PLLEN 0x0400 | ||
38 | #define FRQCR_CKOEN 0x0800 | ||
39 | #endif | ||
40 | #define MIN_DIVISOR_NR 0 | ||
41 | #define MAX_DIVISOR_NR 3 | ||
42 | |||
43 | #endif /* __ASM_CPU_SH4_FREQ_H */ | ||
44 | |||
diff --git a/include/asm-sh/cpu-sh4/mmu_context.h b/include/asm-sh/cpu-sh4/mmu_context.h deleted file mode 100644 index 9ea8eb27b18e..000000000000 --- a/include/asm-sh/cpu-sh4/mmu_context.h +++ /dev/null | |||
@@ -1,63 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh4/mmu_context.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH4_MMU_CONTEXT_H | ||
11 | #define __ASM_CPU_SH4_MMU_CONTEXT_H | ||
12 | |||
13 | #define MMU_PTEH 0xFF000000 /* Page table entry register HIGH */ | ||
14 | #define MMU_PTEL 0xFF000004 /* Page table entry register LOW */ | ||
15 | #define MMU_TTB 0xFF000008 /* Translation table base register */ | ||
16 | #define MMU_TEA 0xFF00000C /* TLB Exception Address */ | ||
17 | #define MMU_PTEA 0xFF000034 /* Page table entry assistance register */ | ||
18 | |||
19 | #define MMUCR 0xFF000010 /* MMU Control Register */ | ||
20 | |||
21 | #define MMU_ITLB_ADDRESS_ARRAY 0xF2000000 | ||
22 | #define MMU_UTLB_ADDRESS_ARRAY 0xF6000000 | ||
23 | #define MMU_PAGE_ASSOC_BIT 0x80 | ||
24 | |||
25 | #define MMUCR_TI (1<<2) | ||
26 | |||
27 | #ifdef CONFIG_X2TLB | ||
28 | #define MMUCR_ME (1 << 7) | ||
29 | #else | ||
30 | #define MMUCR_ME (0) | ||
31 | #endif | ||
32 | |||
33 | #if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) | ||
34 | #define MMUCR_SE (1 << 4) | ||
35 | #else | ||
36 | #define MMUCR_SE (0) | ||
37 | #endif | ||
38 | |||
39 | #ifdef CONFIG_SH_STORE_QUEUES | ||
40 | #define MMUCR_SQMD (1 << 9) | ||
41 | #else | ||
42 | #define MMUCR_SQMD (0) | ||
43 | #endif | ||
44 | |||
45 | #define MMU_NTLB_ENTRIES 64 | ||
46 | #define MMU_CONTROL_INIT (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE) | ||
47 | |||
48 | #define MMU_ITLB_DATA_ARRAY 0xF3000000 | ||
49 | #define MMU_UTLB_DATA_ARRAY 0xF7000000 | ||
50 | |||
51 | #define MMU_UTLB_ENTRIES 64 | ||
52 | #define MMU_U_ENTRY_SHIFT 8 | ||
53 | #define MMU_UTLB_VALID 0x100 | ||
54 | #define MMU_ITLB_ENTRIES 4 | ||
55 | #define MMU_I_ENTRY_SHIFT 8 | ||
56 | #define MMU_ITLB_VALID 0x100 | ||
57 | |||
58 | #define TRA 0xff000020 | ||
59 | #define EXPEVT 0xff000024 | ||
60 | #define INTEVT 0xff000028 | ||
61 | |||
62 | #endif /* __ASM_CPU_SH4_MMU_CONTEXT_H */ | ||
63 | |||
diff --git a/include/asm-sh/cpu-sh4/rtc.h b/include/asm-sh/cpu-sh4/rtc.h deleted file mode 100644 index 25b1e6adfe8c..000000000000 --- a/include/asm-sh/cpu-sh4/rtc.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH4_RTC_H | ||
2 | #define __ASM_SH_CPU_SH4_RTC_H | ||
3 | |||
4 | #ifdef CONFIG_CPU_SUBTYPE_SH7723 | ||
5 | #define rtc_reg_size sizeof(u16) | ||
6 | #else | ||
7 | #define rtc_reg_size sizeof(u32) | ||
8 | #endif | ||
9 | |||
10 | #define RTC_BIT_INVERTED 0x40 /* bug on SH7750, SH7750S */ | ||
11 | #define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR | ||
12 | |||
13 | #endif /* __ASM_SH_CPU_SH4_RTC_H */ | ||
diff --git a/include/asm-sh/cpu-sh4/sigcontext.h b/include/asm-sh/cpu-sh4/sigcontext.h deleted file mode 100644 index ab392f120e06..000000000000 --- a/include/asm-sh/cpu-sh4/sigcontext.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | #ifndef __ASM_CPU_SH4_SIGCONTEXT_H | ||
2 | #define __ASM_CPU_SH4_SIGCONTEXT_H | ||
3 | |||
4 | struct sigcontext { | ||
5 | unsigned long oldmask; | ||
6 | |||
7 | /* CPU registers */ | ||
8 | unsigned long sc_regs[16]; | ||
9 | unsigned long sc_pc; | ||
10 | unsigned long sc_pr; | ||
11 | unsigned long sc_sr; | ||
12 | unsigned long sc_gbr; | ||
13 | unsigned long sc_mach; | ||
14 | unsigned long sc_macl; | ||
15 | |||
16 | /* FPU registers */ | ||
17 | unsigned long sc_fpregs[16]; | ||
18 | unsigned long sc_xfpregs[16]; | ||
19 | unsigned int sc_fpscr; | ||
20 | unsigned int sc_fpul; | ||
21 | unsigned int sc_ownedfp; | ||
22 | }; | ||
23 | |||
24 | #endif /* __ASM_CPU_SH4_SIGCONTEXT_H */ | ||
diff --git a/include/asm-sh/cpu-sh4/sq.h b/include/asm-sh/cpu-sh4/sq.h deleted file mode 100644 index 586d6491816a..000000000000 --- a/include/asm-sh/cpu-sh4/sq.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh4/sq.h | ||
3 | * | ||
4 | * Copyright (C) 2001, 2002, 2003 Paul Mundt | ||
5 | * Copyright (C) 2001, 2002 M. R. Brown | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #ifndef __ASM_CPU_SH4_SQ_H | ||
12 | #define __ASM_CPU_SH4_SQ_H | ||
13 | |||
14 | #include <asm/addrspace.h> | ||
15 | |||
16 | /* | ||
17 | * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be | ||
18 | * mapped to any physical address space. Since data is written (and aligned) | ||
19 | * to 32-byte boundaries, we need to be sure that all allocations are aligned. | ||
20 | */ | ||
21 | #define SQ_SIZE 32 | ||
22 | #define SQ_ALIGN_MASK (~(SQ_SIZE - 1)) | ||
23 | #define SQ_ALIGN(addr) (((addr)+SQ_SIZE-1) & SQ_ALIGN_MASK) | ||
24 | |||
25 | #define SQ_QACR0 (P4SEG_REG_BASE + 0x38) | ||
26 | #define SQ_QACR1 (P4SEG_REG_BASE + 0x3c) | ||
27 | #define SQ_ADDRMAX (P4SEG_STORE_QUE + 0x04000000) | ||
28 | |||
29 | /* arch/sh/kernel/cpu/sh4/sq.c */ | ||
30 | unsigned long sq_remap(unsigned long phys, unsigned int size, | ||
31 | const char *name, unsigned long flags); | ||
32 | void sq_unmap(unsigned long vaddr); | ||
33 | void sq_flush_range(unsigned long start, unsigned int len); | ||
34 | |||
35 | #endif /* __ASM_CPU_SH4_SQ_H */ | ||
diff --git a/include/asm-sh/cpu-sh4/timer.h b/include/asm-sh/cpu-sh4/timer.h deleted file mode 100644 index d1e796b96888..000000000000 --- a/include/asm-sh/cpu-sh4/timer.h +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh4/timer.h | ||
3 | * | ||
4 | * Copyright (C) 2004 Lineo Solutions, Inc. | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH4_TIMER_H | ||
11 | #define __ASM_CPU_SH4_TIMER_H | ||
12 | |||
13 | /* | ||
14 | * --------------------------------------------------------------------------- | ||
15 | * TMU Common definitions for SH4 processors | ||
16 | * SH7750S/SH7750R | ||
17 | * SH7751/SH7751R | ||
18 | * SH7760 | ||
19 | * SH-X3 | ||
20 | * --------------------------------------------------------------------------- | ||
21 | */ | ||
22 | #ifdef CONFIG_CPU_SUBTYPE_SHX3 | ||
23 | #define TMU_012_BASE 0xffc10000 | ||
24 | #define TMU_345_BASE 0xffc20000 | ||
25 | #else | ||
26 | #define TMU_012_BASE 0xffd80000 | ||
27 | #define TMU_345_BASE 0xfe100000 | ||
28 | #endif | ||
29 | |||
30 | #define TMU_TOCR TMU_012_BASE /* Not supported on all CPUs */ | ||
31 | |||
32 | #define TMU_012_TSTR (TMU_012_BASE + 0x04) | ||
33 | #define TMU_345_TSTR (TMU_345_BASE + 0x04) | ||
34 | |||
35 | #define TMU0_TCOR (TMU_012_BASE + 0x08) | ||
36 | #define TMU0_TCNT (TMU_012_BASE + 0x0c) | ||
37 | #define TMU0_TCR (TMU_012_BASE + 0x10) | ||
38 | |||
39 | #define TMU1_TCOR (TMU_012_BASE + 0x14) | ||
40 | #define TMU1_TCNT (TMU_012_BASE + 0x18) | ||
41 | #define TMU1_TCR (TMU_012_BASE + 0x1c) | ||
42 | |||
43 | #define TMU2_TCOR (TMU_012_BASE + 0x20) | ||
44 | #define TMU2_TCNT (TMU_012_BASE + 0x24) | ||
45 | #define TMU2_TCR (TMU_012_BASE + 0x28) | ||
46 | #define TMU2_TCPR (TMU_012_BASE + 0x2c) | ||
47 | |||
48 | #define TMU3_TCOR (TMU_345_BASE + 0x08) | ||
49 | #define TMU3_TCNT (TMU_345_BASE + 0x0c) | ||
50 | #define TMU3_TCR (TMU_345_BASE + 0x10) | ||
51 | |||
52 | #define TMU4_TCOR (TMU_345_BASE + 0x14) | ||
53 | #define TMU4_TCNT (TMU_345_BASE + 0x18) | ||
54 | #define TMU4_TCR (TMU_345_BASE + 0x1c) | ||
55 | |||
56 | #define TMU5_TCOR (TMU_345_BASE + 0x20) | ||
57 | #define TMU5_TCNT (TMU_345_BASE + 0x24) | ||
58 | #define TMU5_TCR (TMU_345_BASE + 0x28) | ||
59 | |||
60 | #endif /* __ASM_CPU_SH4_TIMER_H */ | ||
diff --git a/include/asm-sh/cpu-sh4/ubc.h b/include/asm-sh/cpu-sh4/ubc.h deleted file mode 100644 index c86e17050935..000000000000 --- a/include/asm-sh/cpu-sh4/ubc.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh4/ubc.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * Copyright (C) 2003 Paul Mundt | ||
6 | * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | #ifndef __ASM_CPU_SH4_UBC_H | ||
13 | #define __ASM_CPU_SH4_UBC_H | ||
14 | |||
15 | #if defined(CONFIG_CPU_SH4A) | ||
16 | #define UBC_CBR0 0xff200000 | ||
17 | #define UBC_CRR0 0xff200004 | ||
18 | #define UBC_CAR0 0xff200008 | ||
19 | #define UBC_CAMR0 0xff20000c | ||
20 | #define UBC_CBR1 0xff200020 | ||
21 | #define UBC_CRR1 0xff200024 | ||
22 | #define UBC_CAR1 0xff200028 | ||
23 | #define UBC_CAMR1 0xff20002c | ||
24 | #define UBC_CDR1 0xff200030 | ||
25 | #define UBC_CDMR1 0xff200034 | ||
26 | #define UBC_CETR1 0xff200038 | ||
27 | #define UBC_CCMFR 0xff200600 | ||
28 | #define UBC_CBCR 0xff200620 | ||
29 | |||
30 | /* CBR */ | ||
31 | #define UBC_CBR_AIE (0x01<<30) | ||
32 | #define UBC_CBR_ID_INST (0x01<<4) | ||
33 | #define UBC_CBR_RW_READ (0x01<<1) | ||
34 | #define UBC_CBR_CE (0x01) | ||
35 | |||
36 | #define UBC_CBR_AIV_MASK (0x00FF0000) | ||
37 | #define UBC_CBR_AIV_SHIFT (16) | ||
38 | #define UBC_CBR_AIV_SET(asid) (((asid)<<UBC_CBR_AIV_SHIFT) & UBC_CBR_AIV_MASK) | ||
39 | |||
40 | #define UBC_CBR_INIT 0x20000000 | ||
41 | |||
42 | /* CRR */ | ||
43 | #define UBC_CRR_RES (0x01<<13) | ||
44 | #define UBC_CRR_PCB (0x01<<1) | ||
45 | #define UBC_CRR_BIE (0x01) | ||
46 | |||
47 | #define UBC_CRR_INIT 0x00002000 | ||
48 | |||
49 | #else /* CONFIG_CPU_SH4 */ | ||
50 | #define UBC_BARA 0xff200000 | ||
51 | #define UBC_BAMRA 0xff200004 | ||
52 | #define UBC_BBRA 0xff200008 | ||
53 | #define UBC_BASRA 0xff000014 | ||
54 | #define UBC_BARB 0xff20000c | ||
55 | #define UBC_BAMRB 0xff200010 | ||
56 | #define UBC_BBRB 0xff200014 | ||
57 | #define UBC_BASRB 0xff000018 | ||
58 | #define UBC_BDRB 0xff200018 | ||
59 | #define UBC_BDMRB 0xff20001c | ||
60 | #define UBC_BRCR 0xff200020 | ||
61 | #endif /* CONFIG_CPU_SH4 */ | ||
62 | |||
63 | #endif /* __ASM_CPU_SH4_UBC_H */ | ||
64 | |||
diff --git a/include/asm-sh/cpu-sh4/watchdog.h b/include/asm-sh/cpu-sh4/watchdog.h deleted file mode 100644 index 259f6a0ce23d..000000000000 --- a/include/asm-sh/cpu-sh4/watchdog.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh4/watchdog.h | ||
3 | * | ||
4 | * Copyright (C) 2002, 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH4_WATCHDOG_H | ||
11 | #define __ASM_CPU_SH4_WATCHDOG_H | ||
12 | |||
13 | /* Register definitions */ | ||
14 | #define WTCNT 0xffc00008 | ||
15 | #define WTCSR 0xffc0000c | ||
16 | |||
17 | /* Bit definitions */ | ||
18 | #define WTCSR_TME 0x80 | ||
19 | #define WTCSR_WT 0x40 | ||
20 | #define WTCSR_RSTS 0x20 | ||
21 | #define WTCSR_WOVF 0x10 | ||
22 | #define WTCSR_IOVF 0x08 | ||
23 | |||
24 | #endif /* __ASM_CPU_SH4_WATCHDOG_H */ | ||
25 | |||
diff --git a/include/asm-sh/cpu-sh5/addrspace.h b/include/asm-sh/cpu-sh5/addrspace.h deleted file mode 100644 index dc36b9a03af6..000000000000 --- a/include/asm-sh/cpu-sh5/addrspace.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH5_ADDRSPACE_H | ||
2 | #define __ASM_SH_CPU_SH5_ADDRSPACE_H | ||
3 | |||
4 | #define PHYS_PERIPHERAL_BLOCK 0x09000000 | ||
5 | #define PHYS_DMAC_BLOCK 0x0e000000 | ||
6 | #define PHYS_PCI_BLOCK 0x60000000 | ||
7 | #define PHYS_EMI_BLOCK 0xff000000 | ||
8 | |||
9 | /* No segmentation.. */ | ||
10 | |||
11 | #endif /* __ASM_SH_CPU_SH5_ADDRSPACE_H */ | ||
diff --git a/include/asm-sh/cpu-sh5/cache.h b/include/asm-sh/cpu-sh5/cache.h deleted file mode 100644 index ed050ab526f2..000000000000 --- a/include/asm-sh/cpu-sh5/cache.h +++ /dev/null | |||
@@ -1,97 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH5_CACHE_H | ||
2 | #define __ASM_SH_CPU_SH5_CACHE_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-sh/cpu-sh5/cache.h | ||
6 | * | ||
7 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
8 | * Copyright (C) 2003, 2004 Paul Mundt | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
13 | */ | ||
14 | |||
15 | #define L1_CACHE_SHIFT 5 | ||
16 | |||
17 | /* Valid and Dirty bits */ | ||
18 | #define SH_CACHE_VALID (1LL<<0) | ||
19 | #define SH_CACHE_UPDATED (1LL<<57) | ||
20 | |||
21 | /* Unimplemented compat bits.. */ | ||
22 | #define SH_CACHE_COMBINED 0 | ||
23 | #define SH_CACHE_ASSOC 0 | ||
24 | |||
25 | /* Cache flags */ | ||
26 | #define SH_CACHE_MODE_WT (1LL<<0) | ||
27 | #define SH_CACHE_MODE_WB (1LL<<1) | ||
28 | |||
29 | /* | ||
30 | * Control Registers. | ||
31 | */ | ||
32 | #define ICCR_BASE 0x01600000 /* Instruction Cache Control Register */ | ||
33 | #define ICCR_REG0 0 /* Register 0 offset */ | ||
34 | #define ICCR_REG1 1 /* Register 1 offset */ | ||
35 | #define ICCR0 ICCR_BASE+ICCR_REG0 | ||
36 | #define ICCR1 ICCR_BASE+ICCR_REG1 | ||
37 | |||
38 | #define ICCR0_OFF 0x0 /* Set ICACHE off */ | ||
39 | #define ICCR0_ON 0x1 /* Set ICACHE on */ | ||
40 | #define ICCR0_ICI 0x2 /* Invalidate all in IC */ | ||
41 | |||
42 | #define ICCR1_NOLOCK 0x0 /* Set No Locking */ | ||
43 | |||
44 | #define OCCR_BASE 0x01E00000 /* Operand Cache Control Register */ | ||
45 | #define OCCR_REG0 0 /* Register 0 offset */ | ||
46 | #define OCCR_REG1 1 /* Register 1 offset */ | ||
47 | #define OCCR0 OCCR_BASE+OCCR_REG0 | ||
48 | #define OCCR1 OCCR_BASE+OCCR_REG1 | ||
49 | |||
50 | #define OCCR0_OFF 0x0 /* Set OCACHE off */ | ||
51 | #define OCCR0_ON 0x1 /* Set OCACHE on */ | ||
52 | #define OCCR0_OCI 0x2 /* Invalidate all in OC */ | ||
53 | #define OCCR0_WT 0x4 /* Set OCACHE in WT Mode */ | ||
54 | #define OCCR0_WB 0x0 /* Set OCACHE in WB Mode */ | ||
55 | |||
56 | #define OCCR1_NOLOCK 0x0 /* Set No Locking */ | ||
57 | |||
58 | /* | ||
59 | * SH-5 | ||
60 | * A bit of description here, for neff=32. | ||
61 | * | ||
62 | * |<--- tag (19 bits) --->| | ||
63 | * +-----------------------------+-----------------+------+----------+------+ | ||
64 | * | | | ways |set index |offset| | ||
65 | * +-----------------------------+-----------------+------+----------+------+ | ||
66 | * ^ 2 bits 8 bits 5 bits | ||
67 | * +- Bit 31 | ||
68 | * | ||
69 | * Cacheline size is based on offset: 5 bits = 32 bytes per line | ||
70 | * A cache line is identified by a tag + set but OCACHETAG/ICACHETAG | ||
71 | * have a broader space for registers. These are outlined by | ||
72 | * CACHE_?C_*_STEP below. | ||
73 | * | ||
74 | */ | ||
75 | |||
76 | /* Instruction cache */ | ||
77 | #define CACHE_IC_ADDRESS_ARRAY 0x01000000 | ||
78 | |||
79 | /* Operand Cache */ | ||
80 | #define CACHE_OC_ADDRESS_ARRAY 0x01800000 | ||
81 | |||
82 | /* These declarations relate to cache 'synonyms' in the operand cache. A | ||
83 | 'synonym' occurs where effective address bits overlap between those used for | ||
84 | indexing the cache sets and those passed to the MMU for translation. In the | ||
85 | case of SH5-101 & SH5-103, only bit 12 is affected for 4k pages. */ | ||
86 | |||
87 | #define CACHE_OC_N_SYNBITS 1 /* Number of synonym bits */ | ||
88 | #define CACHE_OC_SYN_SHIFT 12 | ||
89 | /* Mask to select synonym bit(s) */ | ||
90 | #define CACHE_OC_SYN_MASK (((1UL<<CACHE_OC_N_SYNBITS)-1)<<CACHE_OC_SYN_SHIFT) | ||
91 | |||
92 | /* | ||
93 | * Instruction cache can't be invalidated based on physical addresses. | ||
94 | * No Instruction Cache defines required, then. | ||
95 | */ | ||
96 | |||
97 | #endif /* __ASM_SH_CPU_SH5_CACHE_H */ | ||
diff --git a/include/asm-sh/cpu-sh5/cacheflush.h b/include/asm-sh/cpu-sh5/cacheflush.h deleted file mode 100644 index 5a11f0b7e66a..000000000000 --- a/include/asm-sh/cpu-sh5/cacheflush.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH5_CACHEFLUSH_H | ||
2 | #define __ASM_SH_CPU_SH5_CACHEFLUSH_H | ||
3 | |||
4 | #ifndef __ASSEMBLY__ | ||
5 | |||
6 | struct vm_area_struct; | ||
7 | struct page; | ||
8 | struct mm_struct; | ||
9 | |||
10 | extern void flush_cache_all(void); | ||
11 | extern void flush_cache_mm(struct mm_struct *mm); | ||
12 | extern void flush_cache_sigtramp(unsigned long vaddr); | ||
13 | extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, | ||
14 | unsigned long end); | ||
15 | extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); | ||
16 | extern void flush_dcache_page(struct page *pg); | ||
17 | extern void flush_icache_range(unsigned long start, unsigned long end); | ||
18 | extern void flush_icache_user_range(struct vm_area_struct *vma, | ||
19 | struct page *page, unsigned long addr, | ||
20 | int len); | ||
21 | |||
22 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) | ||
23 | |||
24 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
25 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
26 | |||
27 | #define flush_icache_page(vma, page) do { } while (0) | ||
28 | void p3_cache_init(void); | ||
29 | |||
30 | #endif /* __ASSEMBLY__ */ | ||
31 | |||
32 | #endif /* __ASM_SH_CPU_SH5_CACHEFLUSH_H */ | ||
33 | |||
diff --git a/include/asm-sh/cpu-sh5/dma.h b/include/asm-sh/cpu-sh5/dma.h deleted file mode 100644 index 7bf6bb3d35ed..000000000000 --- a/include/asm-sh/cpu-sh5/dma.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH5_DMA_H | ||
2 | #define __ASM_SH_CPU_SH5_DMA_H | ||
3 | |||
4 | /* Nothing yet */ | ||
5 | |||
6 | #endif /* __ASM_SH_CPU_SH5_DMA_H */ | ||
diff --git a/include/asm-sh/cpu-sh5/irq.h b/include/asm-sh/cpu-sh5/irq.h deleted file mode 100644 index f0f0756e6e84..000000000000 --- a/include/asm-sh/cpu-sh5/irq.h +++ /dev/null | |||
@@ -1,117 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH5_IRQ_H | ||
2 | #define __ASM_SH_CPU_SH5_IRQ_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-sh/cpu-sh5/irq.h | ||
6 | * | ||
7 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General Public | ||
10 | * License. See the file "COPYING" in the main directory of this archive | ||
11 | * for more details. | ||
12 | */ | ||
13 | |||
14 | |||
15 | /* | ||
16 | * Encoded IRQs are not considered worth to be supported. | ||
17 | * Main reason is that there's no per-encoded-interrupt | ||
18 | * enable/disable mechanism (as there was in SH3/4). | ||
19 | * An all enabled/all disabled is worth only if there's | ||
20 | * a cascaded IC to disable/enable/ack on. Until such | ||
21 | * IC is available there's no such support. | ||
22 | * | ||
23 | * Presumably Encoded IRQs may use extra IRQs beyond 64, | ||
24 | * below. Some logic must be added to cope with IRQ_IRL? | ||
25 | * in an exclusive way. | ||
26 | * | ||
27 | * Priorities are set at Platform level, when IRQ_IRL0-3 | ||
28 | * are set to 0 Encoding is allowed. Otherwise it's not | ||
29 | * allowed. | ||
30 | */ | ||
31 | |||
32 | /* Independent IRQs */ | ||
33 | #define IRQ_IRL0 0 | ||
34 | #define IRQ_IRL1 1 | ||
35 | #define IRQ_IRL2 2 | ||
36 | #define IRQ_IRL3 3 | ||
37 | |||
38 | #define IRQ_INTA 4 | ||
39 | #define IRQ_INTB 5 | ||
40 | #define IRQ_INTC 6 | ||
41 | #define IRQ_INTD 7 | ||
42 | |||
43 | #define IRQ_SERR 12 | ||
44 | #define IRQ_ERR 13 | ||
45 | #define IRQ_PWR3 14 | ||
46 | #define IRQ_PWR2 15 | ||
47 | #define IRQ_PWR1 16 | ||
48 | #define IRQ_PWR0 17 | ||
49 | |||
50 | #define IRQ_DMTE0 18 | ||
51 | #define IRQ_DMTE1 19 | ||
52 | #define IRQ_DMTE2 20 | ||
53 | #define IRQ_DMTE3 21 | ||
54 | #define IRQ_DAERR 22 | ||
55 | |||
56 | #define IRQ_TUNI0 32 | ||
57 | #define IRQ_TUNI1 33 | ||
58 | #define IRQ_TUNI2 34 | ||
59 | #define IRQ_TICPI2 35 | ||
60 | |||
61 | #define IRQ_ATI 36 | ||
62 | #define IRQ_PRI 37 | ||
63 | #define IRQ_CUI 38 | ||
64 | |||
65 | #define IRQ_ERI 39 | ||
66 | #define IRQ_RXI 40 | ||
67 | #define IRQ_BRI 41 | ||
68 | #define IRQ_TXI 42 | ||
69 | |||
70 | #define IRQ_ITI 63 | ||
71 | |||
72 | #define NR_INTC_IRQS 64 | ||
73 | |||
74 | #ifdef CONFIG_SH_CAYMAN | ||
75 | #define NR_EXT_IRQS 32 | ||
76 | #define START_EXT_IRQS 64 | ||
77 | |||
78 | /* PCI bus 2 uses encoded external interrupts on the Cayman board */ | ||
79 | #define IRQ_P2INTA (START_EXT_IRQS + (3*8) + 0) | ||
80 | #define IRQ_P2INTB (START_EXT_IRQS + (3*8) + 1) | ||
81 | #define IRQ_P2INTC (START_EXT_IRQS + (3*8) + 2) | ||
82 | #define IRQ_P2INTD (START_EXT_IRQS + (3*8) + 3) | ||
83 | |||
84 | #define I8042_KBD_IRQ (START_EXT_IRQS + 2) | ||
85 | #define I8042_AUX_IRQ (START_EXT_IRQS + 6) | ||
86 | |||
87 | #define IRQ_CFCARD (START_EXT_IRQS + 7) | ||
88 | #define IRQ_PCMCIA (0) | ||
89 | |||
90 | #else | ||
91 | #define NR_EXT_IRQS 0 | ||
92 | #endif | ||
93 | |||
94 | /* Default IRQs, fixed */ | ||
95 | #define TIMER_IRQ IRQ_TUNI0 | ||
96 | #define RTC_IRQ IRQ_CUI | ||
97 | |||
98 | /* Default Priorities, Platform may choose differently */ | ||
99 | #define NO_PRIORITY 0 /* Disabled */ | ||
100 | #define TIMER_PRIORITY 2 | ||
101 | #define RTC_PRIORITY TIMER_PRIORITY | ||
102 | #define SCIF_PRIORITY 3 | ||
103 | #define INTD_PRIORITY 3 | ||
104 | #define IRL3_PRIORITY 4 | ||
105 | #define INTC_PRIORITY 6 | ||
106 | #define IRL2_PRIORITY 7 | ||
107 | #define INTB_PRIORITY 9 | ||
108 | #define IRL1_PRIORITY 10 | ||
109 | #define INTA_PRIORITY 12 | ||
110 | #define IRL0_PRIORITY 13 | ||
111 | #define TOP_PRIORITY 15 | ||
112 | |||
113 | extern int intc_evt_to_irq[(0xE20/0x20)+1]; | ||
114 | int intc_irq_describe(char* p, int irq); | ||
115 | extern int platform_int_priority[NR_INTC_IRQS]; | ||
116 | |||
117 | #endif /* __ASM_SH_CPU_SH5_IRQ_H */ | ||
diff --git a/include/asm-sh/cpu-sh5/mmu_context.h b/include/asm-sh/cpu-sh5/mmu_context.h deleted file mode 100644 index 68a1d2cff457..000000000000 --- a/include/asm-sh/cpu-sh5/mmu_context.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH5_MMU_CONTEXT_H | ||
2 | #define __ASM_SH_CPU_SH5_MMU_CONTEXT_H | ||
3 | |||
4 | /* Common defines */ | ||
5 | #define TLB_STEP 0x00000010 | ||
6 | #define TLB_PTEH 0x00000000 | ||
7 | #define TLB_PTEL 0x00000008 | ||
8 | |||
9 | /* PTEH defines */ | ||
10 | #define PTEH_ASID_SHIFT 2 | ||
11 | #define PTEH_VALID 0x0000000000000001 | ||
12 | #define PTEH_SHARED 0x0000000000000002 | ||
13 | #define PTEH_MATCH_ASID 0x00000000000003ff | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | /* This has to be a common function because the next location to fill | ||
17 | * information is shared. */ | ||
18 | extern void __do_tlb_refill(unsigned long address, unsigned long long is_text_not_data, pte_t *pte); | ||
19 | #endif /* __ASSEMBLY__ */ | ||
20 | |||
21 | #endif /* __ASM_SH_CPU_SH5_MMU_CONTEXT_H */ | ||
diff --git a/include/asm-sh/cpu-sh5/registers.h b/include/asm-sh/cpu-sh5/registers.h deleted file mode 100644 index 6664ea6f1566..000000000000 --- a/include/asm-sh/cpu-sh5/registers.h +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH5_REGISTERS_H | ||
2 | #define __ASM_SH_CPU_SH5_REGISTERS_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-sh/cpu-sh5/registers.h | ||
6 | * | ||
7 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
8 | * Copyright (C) 2004 Richard Curnow | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
13 | */ | ||
14 | |||
15 | #ifdef __ASSEMBLY__ | ||
16 | /* ===================================================================== | ||
17 | ** | ||
18 | ** Section 1: acts on assembly sources pre-processed by GPP ( <source.S>). | ||
19 | ** Assigns symbolic names to control & target registers. | ||
20 | */ | ||
21 | |||
22 | /* | ||
23 | * Define some useful aliases for control registers. | ||
24 | */ | ||
25 | #define SR cr0 | ||
26 | #define SSR cr1 | ||
27 | #define PSSR cr2 | ||
28 | /* cr3 UNDEFINED */ | ||
29 | #define INTEVT cr4 | ||
30 | #define EXPEVT cr5 | ||
31 | #define PEXPEVT cr6 | ||
32 | #define TRA cr7 | ||
33 | #define SPC cr8 | ||
34 | #define PSPC cr9 | ||
35 | #define RESVEC cr10 | ||
36 | #define VBR cr11 | ||
37 | /* cr12 UNDEFINED */ | ||
38 | #define TEA cr13 | ||
39 | /* cr14-cr15 UNDEFINED */ | ||
40 | #define DCR cr16 | ||
41 | #define KCR0 cr17 | ||
42 | #define KCR1 cr18 | ||
43 | /* cr19-cr31 UNDEFINED */ | ||
44 | /* cr32-cr61 RESERVED */ | ||
45 | #define CTC cr62 | ||
46 | #define USR cr63 | ||
47 | |||
48 | /* | ||
49 | * ABI dependent registers (general purpose set) | ||
50 | */ | ||
51 | #define RET r2 | ||
52 | #define ARG1 r2 | ||
53 | #define ARG2 r3 | ||
54 | #define ARG3 r4 | ||
55 | #define ARG4 r5 | ||
56 | #define ARG5 r6 | ||
57 | #define ARG6 r7 | ||
58 | #define SP r15 | ||
59 | #define LINK r18 | ||
60 | #define ZERO r63 | ||
61 | |||
62 | /* | ||
63 | * Status register defines: used only by assembly sources (and | ||
64 | * syntax independednt) | ||
65 | */ | ||
66 | #define SR_RESET_VAL 0x0000000050008000 | ||
67 | #define SR_HARMLESS 0x00000000500080f0 /* Write ignores for most */ | ||
68 | #define SR_ENABLE_FPU 0xffffffffffff7fff /* AND with this */ | ||
69 | |||
70 | #if defined (CONFIG_SH64_SR_WATCH) | ||
71 | #define SR_ENABLE_MMU 0x0000000084000000 /* OR with this */ | ||
72 | #else | ||
73 | #define SR_ENABLE_MMU 0x0000000080000000 /* OR with this */ | ||
74 | #endif | ||
75 | |||
76 | #define SR_UNBLOCK_EXC 0xffffffffefffffff /* AND with this */ | ||
77 | #define SR_BLOCK_EXC 0x0000000010000000 /* OR with this */ | ||
78 | |||
79 | #else /* Not __ASSEMBLY__ syntax */ | ||
80 | |||
81 | /* | ||
82 | ** Stringify reg. name | ||
83 | */ | ||
84 | #define __str(x) #x | ||
85 | |||
86 | /* Stringify control register names for use in inline assembly */ | ||
87 | #define __SR __str(SR) | ||
88 | #define __SSR __str(SSR) | ||
89 | #define __PSSR __str(PSSR) | ||
90 | #define __INTEVT __str(INTEVT) | ||
91 | #define __EXPEVT __str(EXPEVT) | ||
92 | #define __PEXPEVT __str(PEXPEVT) | ||
93 | #define __TRA __str(TRA) | ||
94 | #define __SPC __str(SPC) | ||
95 | #define __PSPC __str(PSPC) | ||
96 | #define __RESVEC __str(RESVEC) | ||
97 | #define __VBR __str(VBR) | ||
98 | #define __TEA __str(TEA) | ||
99 | #define __DCR __str(DCR) | ||
100 | #define __KCR0 __str(KCR0) | ||
101 | #define __KCR1 __str(KCR1) | ||
102 | #define __CTC __str(CTC) | ||
103 | #define __USR __str(USR) | ||
104 | |||
105 | #endif /* __ASSEMBLY__ */ | ||
106 | #endif /* __ASM_SH_CPU_SH5_REGISTERS_H */ | ||
diff --git a/include/asm-sh/cpu-sh5/rtc.h b/include/asm-sh/cpu-sh5/rtc.h deleted file mode 100644 index 12ea0ed144e1..000000000000 --- a/include/asm-sh/cpu-sh5/rtc.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH5_RTC_H | ||
2 | #define __ASM_SH_CPU_SH5_RTC_H | ||
3 | |||
4 | #define rtc_reg_size sizeof(u32) | ||
5 | #define RTC_BIT_INVERTED 0 /* The SH-5 RTC is surprisingly sane! */ | ||
6 | #define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR | ||
7 | |||
8 | #endif /* __ASM_SH_CPU_SH5_RTC_H */ | ||
diff --git a/include/asm-sh/cpu-sh5/timer.h b/include/asm-sh/cpu-sh5/timer.h deleted file mode 100644 index 88da9b341a36..000000000000 --- a/include/asm-sh/cpu-sh5/timer.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CPU_SH5_TIMER_H | ||
2 | #define __ASM_SH_CPU_SH5_TIMER_H | ||
3 | |||
4 | #endif /* __ASM_SH_CPU_SH5_TIMER_H */ | ||
diff --git a/include/asm-sh/cputime.h b/include/asm-sh/cputime.h deleted file mode 100644 index 6ca395d1393e..000000000000 --- a/include/asm-sh/cputime.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __SH_CPUTIME_H | ||
2 | #define __SH_CPUTIME_H | ||
3 | |||
4 | #include <asm-generic/cputime.h> | ||
5 | |||
6 | #endif /* __SH_CPUTIME_H */ | ||
diff --git a/include/asm-sh/current.h b/include/asm-sh/current.h deleted file mode 100644 index 62b63880b333..000000000000 --- a/include/asm-sh/current.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | #ifndef __ASM_SH_CURRENT_H | ||
2 | #define __ASM_SH_CURRENT_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 1999 Niibe Yutaka | ||
6 | * | ||
7 | */ | ||
8 | |||
9 | #include <linux/thread_info.h> | ||
10 | |||
11 | struct task_struct; | ||
12 | |||
13 | static __inline__ struct task_struct * get_current(void) | ||
14 | { | ||
15 | return current_thread_info()->task; | ||
16 | } | ||
17 | |||
18 | #define current get_current() | ||
19 | |||
20 | #endif /* __ASM_SH_CURRENT_H */ | ||
diff --git a/include/asm-sh/delay.h b/include/asm-sh/delay.h deleted file mode 100644 index 4b16bf9b56bd..000000000000 --- a/include/asm-sh/delay.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | #ifndef __ASM_SH_DELAY_H | ||
2 | #define __ASM_SH_DELAY_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 1993 Linus Torvalds | ||
6 | * | ||
7 | * Delay routines calling functions in arch/sh/lib/delay.c | ||
8 | */ | ||
9 | |||
10 | extern void __bad_udelay(void); | ||
11 | extern void __bad_ndelay(void); | ||
12 | |||
13 | extern void __udelay(unsigned long usecs); | ||
14 | extern void __ndelay(unsigned long nsecs); | ||
15 | extern void __const_udelay(unsigned long xloops); | ||
16 | extern void __delay(unsigned long loops); | ||
17 | |||
18 | #define udelay(n) (__builtin_constant_p(n) ? \ | ||
19 | ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c6ul)) : \ | ||
20 | __udelay(n)) | ||
21 | |||
22 | #define ndelay(n) (__builtin_constant_p(n) ? \ | ||
23 | ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \ | ||
24 | __ndelay(n)) | ||
25 | |||
26 | #endif /* __ASM_SH_DELAY_H */ | ||
diff --git a/include/asm-sh/device.h b/include/asm-sh/device.h deleted file mode 100644 index efd511d0803a..000000000000 --- a/include/asm-sh/device.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | /* | ||
2 | * Arch specific extensions to struct device | ||
3 | * | ||
4 | * This file is released under the GPLv2 | ||
5 | */ | ||
6 | #include <asm-generic/device.h> | ||
7 | |||
8 | struct platform_device; | ||
9 | /* allocate contiguous memory chunk and fill in struct resource */ | ||
10 | int platform_resource_setup_memory(struct platform_device *pdev, | ||
11 | char *name, unsigned long memsize); | ||
12 | |||
diff --git a/include/asm-sh/div64.h b/include/asm-sh/div64.h deleted file mode 100644 index 6cd978cefb28..000000000000 --- a/include/asm-sh/div64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/div64.h> | ||
diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h deleted file mode 100644 index 6c0b8a2de143..000000000000 --- a/include/asm-sh/dma-mapping.h +++ /dev/null | |||
@@ -1,192 +0,0 @@ | |||
1 | #ifndef __ASM_SH_DMA_MAPPING_H | ||
2 | #define __ASM_SH_DMA_MAPPING_H | ||
3 | |||
4 | #include <linux/mm.h> | ||
5 | #include <linux/scatterlist.h> | ||
6 | #include <asm/cacheflush.h> | ||
7 | #include <asm/io.h> | ||
8 | |||
9 | extern struct bus_type pci_bus_type; | ||
10 | |||
11 | #define dma_supported(dev, mask) (1) | ||
12 | |||
13 | static inline int dma_set_mask(struct device *dev, u64 mask) | ||
14 | { | ||
15 | if (!dev->dma_mask || !dma_supported(dev, mask)) | ||
16 | return -EIO; | ||
17 | |||
18 | *dev->dma_mask = mask; | ||
19 | |||
20 | return 0; | ||
21 | } | ||
22 | |||
23 | void *dma_alloc_coherent(struct device *dev, size_t size, | ||
24 | dma_addr_t *dma_handle, gfp_t flag); | ||
25 | |||
26 | void dma_free_coherent(struct device *dev, size_t size, | ||
27 | void *vaddr, dma_addr_t dma_handle); | ||
28 | |||
29 | void dma_cache_sync(struct device *dev, void *vaddr, size_t size, | ||
30 | enum dma_data_direction dir); | ||
31 | |||
32 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) | ||
33 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) | ||
34 | #define dma_is_consistent(d, h) (1) | ||
35 | |||
36 | static inline dma_addr_t dma_map_single(struct device *dev, | ||
37 | void *ptr, size_t size, | ||
38 | enum dma_data_direction dir) | ||
39 | { | ||
40 | #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
41 | if (dev->bus == &pci_bus_type) | ||
42 | return virt_to_phys(ptr); | ||
43 | #endif | ||
44 | dma_cache_sync(dev, ptr, size, dir); | ||
45 | |||
46 | return virt_to_phys(ptr); | ||
47 | } | ||
48 | |||
49 | #define dma_unmap_single(dev, addr, size, dir) do { } while (0) | ||
50 | |||
51 | static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, | ||
52 | int nents, enum dma_data_direction dir) | ||
53 | { | ||
54 | int i; | ||
55 | |||
56 | for (i = 0; i < nents; i++) { | ||
57 | #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
58 | dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir); | ||
59 | #endif | ||
60 | sg[i].dma_address = sg_phys(&sg[i]); | ||
61 | } | ||
62 | |||
63 | return nents; | ||
64 | } | ||
65 | |||
66 | #define dma_unmap_sg(dev, sg, nents, dir) do { } while (0) | ||
67 | |||
68 | static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, | ||
69 | unsigned long offset, size_t size, | ||
70 | enum dma_data_direction dir) | ||
71 | { | ||
72 | return dma_map_single(dev, page_address(page) + offset, size, dir); | ||
73 | } | ||
74 | |||
75 | static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, | ||
76 | size_t size, enum dma_data_direction dir) | ||
77 | { | ||
78 | dma_unmap_single(dev, dma_address, size, dir); | ||
79 | } | ||
80 | |||
81 | static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle, | ||
82 | size_t size, enum dma_data_direction dir) | ||
83 | { | ||
84 | #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
85 | if (dev->bus == &pci_bus_type) | ||
86 | return; | ||
87 | #endif | ||
88 | dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir); | ||
89 | } | ||
90 | |||
91 | static inline void dma_sync_single_range(struct device *dev, | ||
92 | dma_addr_t dma_handle, | ||
93 | unsigned long offset, size_t size, | ||
94 | enum dma_data_direction dir) | ||
95 | { | ||
96 | #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
97 | if (dev->bus == &pci_bus_type) | ||
98 | return; | ||
99 | #endif | ||
100 | dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir); | ||
101 | } | ||
102 | |||
103 | static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, | ||
104 | int nelems, enum dma_data_direction dir) | ||
105 | { | ||
106 | int i; | ||
107 | |||
108 | for (i = 0; i < nelems; i++) { | ||
109 | #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
110 | dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir); | ||
111 | #endif | ||
112 | sg[i].dma_address = sg_phys(&sg[i]); | ||
113 | } | ||
114 | } | ||
115 | |||
116 | static inline void dma_sync_single_for_cpu(struct device *dev, | ||
117 | dma_addr_t dma_handle, size_t size, | ||
118 | enum dma_data_direction dir) | ||
119 | { | ||
120 | dma_sync_single(dev, dma_handle, size, dir); | ||
121 | } | ||
122 | |||
123 | static inline void dma_sync_single_for_device(struct device *dev, | ||
124 | dma_addr_t dma_handle, | ||
125 | size_t size, | ||
126 | enum dma_data_direction dir) | ||
127 | { | ||
128 | dma_sync_single(dev, dma_handle, size, dir); | ||
129 | } | ||
130 | |||
131 | static inline void dma_sync_single_range_for_cpu(struct device *dev, | ||
132 | dma_addr_t dma_handle, | ||
133 | unsigned long offset, | ||
134 | size_t size, | ||
135 | enum dma_data_direction direction) | ||
136 | { | ||
137 | dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction); | ||
138 | } | ||
139 | |||
140 | static inline void dma_sync_single_range_for_device(struct device *dev, | ||
141 | dma_addr_t dma_handle, | ||
142 | unsigned long offset, | ||
143 | size_t size, | ||
144 | enum dma_data_direction direction) | ||
145 | { | ||
146 | dma_sync_single_for_device(dev, dma_handle+offset, size, direction); | ||
147 | } | ||
148 | |||
149 | |||
150 | static inline void dma_sync_sg_for_cpu(struct device *dev, | ||
151 | struct scatterlist *sg, int nelems, | ||
152 | enum dma_data_direction dir) | ||
153 | { | ||
154 | dma_sync_sg(dev, sg, nelems, dir); | ||
155 | } | ||
156 | |||
157 | static inline void dma_sync_sg_for_device(struct device *dev, | ||
158 | struct scatterlist *sg, int nelems, | ||
159 | enum dma_data_direction dir) | ||
160 | { | ||
161 | dma_sync_sg(dev, sg, nelems, dir); | ||
162 | } | ||
163 | |||
164 | |||
165 | static inline int dma_get_cache_alignment(void) | ||
166 | { | ||
167 | /* | ||
168 | * Each processor family will define its own L1_CACHE_SHIFT, | ||
169 | * L1_CACHE_BYTES wraps to this, so this is always safe. | ||
170 | */ | ||
171 | return L1_CACHE_BYTES; | ||
172 | } | ||
173 | |||
174 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) | ||
175 | { | ||
176 | return dma_addr == 0; | ||
177 | } | ||
178 | |||
179 | #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY | ||
180 | |||
181 | extern int | ||
182 | dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, | ||
183 | dma_addr_t device_addr, size_t size, int flags); | ||
184 | |||
185 | extern void | ||
186 | dma_release_declared_memory(struct device *dev); | ||
187 | |||
188 | extern void * | ||
189 | dma_mark_declared_memory_occupied(struct device *dev, | ||
190 | dma_addr_t device_addr, size_t size); | ||
191 | |||
192 | #endif /* __ASM_SH_DMA_MAPPING_H */ | ||
diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h deleted file mode 100644 index a65b02fd186e..000000000000 --- a/include/asm-sh/dma.h +++ /dev/null | |||
@@ -1,166 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/dma.h | ||
3 | * | ||
4 | * Copyright (C) 2003, 2004 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_SH_DMA_H | ||
11 | #define __ASM_SH_DMA_H | ||
12 | #ifdef __KERNEL__ | ||
13 | |||
14 | #include <linux/spinlock.h> | ||
15 | #include <linux/wait.h> | ||
16 | #include <linux/sched.h> | ||
17 | #include <linux/sysdev.h> | ||
18 | #include <asm/cpu/dma.h> | ||
19 | |||
20 | /* The maximum address that we can perform a DMA transfer to on this platform */ | ||
21 | /* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any | ||
22 | occurrence should be flagged as an error. */ | ||
23 | /* But... */ | ||
24 | /* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */ | ||
25 | #define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000) | ||
26 | |||
27 | #ifdef CONFIG_NR_DMA_CHANNELS | ||
28 | # define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS) | ||
29 | #else | ||
30 | # define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) | ||
31 | #endif | ||
32 | |||
33 | /* | ||
34 | * Read and write modes can mean drastically different things depending on the | ||
35 | * channel configuration. Consult your DMAC documentation and module | ||
36 | * implementation for further clues. | ||
37 | */ | ||
38 | #define DMA_MODE_READ 0x00 | ||
39 | #define DMA_MODE_WRITE 0x01 | ||
40 | #define DMA_MODE_MASK 0x01 | ||
41 | |||
42 | #define DMA_AUTOINIT 0x10 | ||
43 | |||
44 | /* | ||
45 | * DMAC (dma_info) flags | ||
46 | */ | ||
47 | enum { | ||
48 | DMAC_CHANNELS_CONFIGURED = 0x01, | ||
49 | DMAC_CHANNELS_TEI_CAPABLE = 0x02, /* Transfer end interrupt */ | ||
50 | }; | ||
51 | |||
52 | /* | ||
53 | * DMA channel capabilities / flags | ||
54 | */ | ||
55 | enum { | ||
56 | DMA_CONFIGURED = 0x01, | ||
57 | |||
58 | /* | ||
59 | * Transfer end interrupt, inherited from DMAC. | ||
60 | * wait_queue used in dma_wait_for_completion. | ||
61 | */ | ||
62 | DMA_TEI_CAPABLE = 0x02, | ||
63 | }; | ||
64 | |||
65 | extern spinlock_t dma_spin_lock; | ||
66 | |||
67 | struct dma_channel; | ||
68 | |||
69 | struct dma_ops { | ||
70 | int (*request)(struct dma_channel *chan); | ||
71 | void (*free)(struct dma_channel *chan); | ||
72 | |||
73 | int (*get_residue)(struct dma_channel *chan); | ||
74 | int (*xfer)(struct dma_channel *chan); | ||
75 | int (*configure)(struct dma_channel *chan, unsigned long flags); | ||
76 | int (*extend)(struct dma_channel *chan, unsigned long op, void *param); | ||
77 | }; | ||
78 | |||
79 | struct dma_channel { | ||
80 | char dev_id[16]; /* unique name per DMAC of channel */ | ||
81 | |||
82 | unsigned int chan; /* DMAC channel number */ | ||
83 | unsigned int vchan; /* Virtual channel number */ | ||
84 | |||
85 | unsigned int mode; | ||
86 | unsigned int count; | ||
87 | |||
88 | unsigned long sar; | ||
89 | unsigned long dar; | ||
90 | |||
91 | const char **caps; | ||
92 | |||
93 | unsigned long flags; | ||
94 | atomic_t busy; | ||
95 | |||
96 | wait_queue_head_t wait_queue; | ||
97 | |||
98 | struct sys_device dev; | ||
99 | void *priv_data; | ||
100 | }; | ||
101 | |||
102 | struct dma_info { | ||
103 | struct platform_device *pdev; | ||
104 | |||
105 | const char *name; | ||
106 | unsigned int nr_channels; | ||
107 | unsigned long flags; | ||
108 | |||
109 | struct dma_ops *ops; | ||
110 | struct dma_channel *channels; | ||
111 | |||
112 | struct list_head list; | ||
113 | int first_channel_nr; | ||
114 | int first_vchannel_nr; | ||
115 | }; | ||
116 | |||
117 | struct dma_chan_caps { | ||
118 | int ch_num; | ||
119 | const char **caplist; | ||
120 | }; | ||
121 | |||
122 | #define to_dma_channel(channel) container_of(channel, struct dma_channel, dev) | ||
123 | |||
124 | /* arch/sh/drivers/dma/dma-api.c */ | ||
125 | extern int dma_xfer(unsigned int chan, unsigned long from, | ||
126 | unsigned long to, size_t size, unsigned int mode); | ||
127 | |||
128 | #define dma_write(chan, from, to, size) \ | ||
129 | dma_xfer(chan, from, to, size, DMA_MODE_WRITE) | ||
130 | #define dma_write_page(chan, from, to) \ | ||
131 | dma_write(chan, from, to, PAGE_SIZE) | ||
132 | |||
133 | #define dma_read(chan, from, to, size) \ | ||
134 | dma_xfer(chan, from, to, size, DMA_MODE_READ) | ||
135 | #define dma_read_page(chan, from, to) \ | ||
136 | dma_read(chan, from, to, PAGE_SIZE) | ||
137 | |||
138 | extern int request_dma_bycap(const char **dmac, const char **caps, | ||
139 | const char *dev_id); | ||
140 | extern int request_dma(unsigned int chan, const char *dev_id); | ||
141 | extern void free_dma(unsigned int chan); | ||
142 | extern int get_dma_residue(unsigned int chan); | ||
143 | extern struct dma_info *get_dma_info(unsigned int chan); | ||
144 | extern struct dma_channel *get_dma_channel(unsigned int chan); | ||
145 | extern void dma_wait_for_completion(unsigned int chan); | ||
146 | extern void dma_configure_channel(unsigned int chan, unsigned long flags); | ||
147 | |||
148 | extern int register_dmac(struct dma_info *info); | ||
149 | extern void unregister_dmac(struct dma_info *info); | ||
150 | extern struct dma_info *get_dma_info_by_name(const char *dmac_name); | ||
151 | |||
152 | extern int dma_extend(unsigned int chan, unsigned long op, void *param); | ||
153 | extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist); | ||
154 | |||
155 | /* arch/sh/drivers/dma/dma-sysfs.c */ | ||
156 | extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *); | ||
157 | extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *); | ||
158 | |||
159 | #ifdef CONFIG_PCI | ||
160 | extern int isa_dma_bridge_buggy; | ||
161 | #else | ||
162 | #define isa_dma_bridge_buggy (0) | ||
163 | #endif | ||
164 | |||
165 | #endif /* __KERNEL__ */ | ||
166 | #endif /* __ASM_SH_DMA_H */ | ||
diff --git a/include/asm-sh/dmabrg.h b/include/asm-sh/dmabrg.h deleted file mode 100644 index c5edba216cf1..000000000000 --- a/include/asm-sh/dmabrg.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* | ||
2 | * SH7760 DMABRG (USB/Audio) support | ||
3 | */ | ||
4 | |||
5 | #ifndef _DMABRG_H_ | ||
6 | #define _DMABRG_H_ | ||
7 | |||
8 | /* IRQ sources */ | ||
9 | #define DMABRGIRQ_USBDMA 0 | ||
10 | #define DMABRGIRQ_USBDMAERR 1 | ||
11 | #define DMABRGIRQ_A0TXF 2 | ||
12 | #define DMABRGIRQ_A0TXH 3 | ||
13 | #define DMABRGIRQ_A0RXF 4 | ||
14 | #define DMABRGIRQ_A0RXH 5 | ||
15 | #define DMABRGIRQ_A1TXF 6 | ||
16 | #define DMABRGIRQ_A1TXH 7 | ||
17 | #define DMABRGIRQ_A1RXF 8 | ||
18 | #define DMABRGIRQ_A1RXH 9 | ||
19 | |||
20 | extern int dmabrg_request_irq(unsigned int, void(*)(void *), void *); | ||
21 | extern void dmabrg_free_irq(unsigned int); | ||
22 | |||
23 | #endif | ||
diff --git a/include/asm-sh/dreamcast/dma.h b/include/asm-sh/dreamcast/dma.h deleted file mode 100644 index ddd68e788705..000000000000 --- a/include/asm-sh/dreamcast/dma.h +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/dreamcast/dma.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_SH_DREAMCAST_DMA_H | ||
11 | #define __ASM_SH_DREAMCAST_DMA_H | ||
12 | |||
13 | /* Number of DMA channels */ | ||
14 | #define ONCHIP_NR_DMA_CHANNELS 4 | ||
15 | #define G2_NR_DMA_CHANNELS 4 | ||
16 | #define PVR2_NR_DMA_CHANNELS 1 | ||
17 | |||
18 | /* Channels for cascading */ | ||
19 | #define PVR2_CASCADE_CHAN 2 | ||
20 | #define G2_CASCADE_CHAN 3 | ||
21 | |||
22 | /* PVR2 DMA Registers */ | ||
23 | #define PVR2_DMA_BASE 0xa05f6800 | ||
24 | #define PVR2_DMA_ADDR (PVR2_DMA_BASE + 0) | ||
25 | #define PVR2_DMA_COUNT (PVR2_DMA_BASE + 4) | ||
26 | #define PVR2_DMA_MODE (PVR2_DMA_BASE + 8) | ||
27 | #define PVR2_DMA_LMMODE0 (PVR2_DMA_BASE + 132) | ||
28 | #define PVR2_DMA_LMMODE1 (PVR2_DMA_BASE + 136) | ||
29 | |||
30 | /* G2 DMA Register */ | ||
31 | #define G2_DMA_BASE 0xa05f7800 | ||
32 | |||
33 | #endif /* __ASM_SH_DREAMCAST_DMA_H */ | ||
34 | |||
diff --git a/include/asm-sh/dreamcast/maple.h b/include/asm-sh/dreamcast/maple.h deleted file mode 100644 index 51f6a87f1f11..000000000000 --- a/include/asm-sh/dreamcast/maple.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | #ifndef __ASM_MAPLE_H | ||
2 | #define __ASM_MAPLE_H | ||
3 | |||
4 | #define MAPLE_PORTS 4 | ||
5 | #define MAPLE_PNP_INTERVAL HZ | ||
6 | #define MAPLE_MAXPACKETS 8 | ||
7 | #define MAPLE_DMA_ORDER 14 | ||
8 | #define MAPLE_DMA_SIZE (1 << MAPLE_DMA_ORDER) | ||
9 | #define MAPLE_DMA_PAGES ((MAPLE_DMA_ORDER > PAGE_SHIFT) ? \ | ||
10 | MAPLE_DMA_ORDER - PAGE_SHIFT : 0) | ||
11 | |||
12 | /* Maple Bus registers */ | ||
13 | #define MAPLE_BASE 0xa05f6c00 | ||
14 | #define MAPLE_DMAADDR (MAPLE_BASE+0x04) | ||
15 | #define MAPLE_TRIGTYPE (MAPLE_BASE+0x10) | ||
16 | #define MAPLE_ENABLE (MAPLE_BASE+0x14) | ||
17 | #define MAPLE_STATE (MAPLE_BASE+0x18) | ||
18 | #define MAPLE_SPEED (MAPLE_BASE+0x80) | ||
19 | #define MAPLE_RESET (MAPLE_BASE+0x8c) | ||
20 | |||
21 | #define MAPLE_MAGIC 0x6155404f | ||
22 | #define MAPLE_2MBPS 0 | ||
23 | #define MAPLE_TIMEOUT(n) ((n)<<15) | ||
24 | |||
25 | /* Function codes */ | ||
26 | #define MAPLE_FUNC_CONTROLLER 0x001 | ||
27 | #define MAPLE_FUNC_MEMCARD 0x002 | ||
28 | #define MAPLE_FUNC_LCD 0x004 | ||
29 | #define MAPLE_FUNC_CLOCK 0x008 | ||
30 | #define MAPLE_FUNC_MICROPHONE 0x010 | ||
31 | #define MAPLE_FUNC_ARGUN 0x020 | ||
32 | #define MAPLE_FUNC_KEYBOARD 0x040 | ||
33 | #define MAPLE_FUNC_LIGHTGUN 0x080 | ||
34 | #define MAPLE_FUNC_PURUPURU 0x100 | ||
35 | #define MAPLE_FUNC_MOUSE 0x200 | ||
36 | |||
37 | #endif /* __ASM_MAPLE_H */ | ||
diff --git a/include/asm-sh/dreamcast/pci.h b/include/asm-sh/dreamcast/pci.h deleted file mode 100644 index e401b24b0d8e..000000000000 --- a/include/asm-sh/dreamcast/pci.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/dreamcast/pci.h | ||
3 | * | ||
4 | * Copyright (C) 2001, 2002 M. R. Brown | ||
5 | * Copyright (C) 2002, 2003 Paul Mundt | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #ifndef __ASM_SH_DREAMCAST_PCI_H | ||
12 | #define __ASM_SH_DREAMCAST_PCI_H | ||
13 | |||
14 | #include <asm/mach/sysasic.h> | ||
15 | |||
16 | #define GAPSPCI_REGS 0x01001400 | ||
17 | #define GAPSPCI_DMA_BASE 0x01840000 | ||
18 | #define GAPSPCI_DMA_SIZE 32768 | ||
19 | #define GAPSPCI_BBA_CONFIG 0x01001600 | ||
20 | #define GAPSPCI_BBA_CONFIG_SIZE 0x2000 | ||
21 | |||
22 | #define GAPSPCI_IRQ HW_EVENT_EXTERNAL | ||
23 | |||
24 | #endif /* __ASM_SH_DREAMCAST_PCI_H */ | ||
25 | |||
diff --git a/include/asm-sh/dreamcast/sysasic.h b/include/asm-sh/dreamcast/sysasic.h deleted file mode 100644 index f33426608a87..000000000000 --- a/include/asm-sh/dreamcast/sysasic.h +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* include/asm-sh/dreamcast/sysasic.h | ||
2 | * | ||
3 | * Definitions for the Dreamcast System ASIC and related peripherals. | ||
4 | * | ||
5 | * Copyright (c) 2001 M. R. Brown <mrbrown@linuxdc.org> | ||
6 | * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org> | ||
7 | * | ||
8 | * This file is part of the LinuxDC project (www.linuxdc.org) | ||
9 | * | ||
10 | * Released under the terms of the GNU GPL v2.0. | ||
11 | * | ||
12 | */ | ||
13 | #ifndef __ASM_SH_DREAMCAST_SYSASIC_H | ||
14 | #define __ASM_SH_DREAMCAST_SYSASIC_H | ||
15 | |||
16 | #include <asm/irq.h> | ||
17 | |||
18 | /* Hardware events - | ||
19 | |||
20 | Each of these events correspond to a bit within the Event Mask Registers/ | ||
21 | Event Status Registers. Because of the virtual IRQ numbering scheme, a | ||
22 | base offset must be used when calculating the virtual IRQ that each event | ||
23 | takes. | ||
24 | */ | ||
25 | |||
26 | #define HW_EVENT_IRQ_BASE 48 | ||
27 | |||
28 | /* IRQ 13 */ | ||
29 | #define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */ | ||
30 | #define HW_EVENT_MAPLE_DMA (HW_EVENT_IRQ_BASE + 12) /* Maple DMA complete */ | ||
31 | #define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */ | ||
32 | #define HW_EVENT_G2_DMA (HW_EVENT_IRQ_BASE + 15) /* G2 DMA complete */ | ||
33 | #define HW_EVENT_PVR2_DMA (HW_EVENT_IRQ_BASE + 19) /* PVR2 DMA complete */ | ||
34 | |||
35 | /* IRQ 11 */ | ||
36 | #define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */ | ||
37 | #define HW_EVENT_AICA_SYS (HW_EVENT_IRQ_BASE + 33) /* AICA-related */ | ||
38 | #define HW_EVENT_EXTERNAL (HW_EVENT_IRQ_BASE + 35) /* Ext. (expansion) */ | ||
39 | |||
40 | #define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95) | ||
41 | |||
42 | #endif /* __ASM_SH_DREAMCAST_SYSASIC_H */ | ||
43 | |||
diff --git a/include/asm-sh/edosk7705.h b/include/asm-sh/edosk7705.h deleted file mode 100644 index 5bdc9d9be3de..000000000000 --- a/include/asm-sh/edosk7705.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/edosk7705.h | ||
3 | * | ||
4 | * Modified version of io_se.h for the EDOSK7705 specific functions. | ||
5 | * | ||
6 | * May be copied or modified under the terms of the GNU General Public | ||
7 | * License. See linux/COPYING for more information. | ||
8 | * | ||
9 | * IO functions for an Hitachi EDOSK7705 development board | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_SH_EDOSK7705_IO_H | ||
13 | #define __ASM_SH_EDOSK7705_IO_H | ||
14 | |||
15 | #include <asm/io_generic.h> | ||
16 | |||
17 | extern unsigned char sh_edosk7705_inb(unsigned long port); | ||
18 | extern unsigned int sh_edosk7705_inl(unsigned long port); | ||
19 | |||
20 | extern void sh_edosk7705_outb(unsigned char value, unsigned long port); | ||
21 | extern void sh_edosk7705_outl(unsigned int value, unsigned long port); | ||
22 | |||
23 | extern void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count); | ||
24 | extern void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count); | ||
25 | extern void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count); | ||
26 | extern void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count); | ||
27 | |||
28 | extern unsigned long sh_edosk7705_isa_port2addr(unsigned long offset); | ||
29 | |||
30 | #endif /* __ASM_SH_EDOSK7705_IO_H */ | ||
diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h deleted file mode 100644 index f01449a8d378..000000000000 --- a/include/asm-sh/elf.h +++ /dev/null | |||
@@ -1,244 +0,0 @@ | |||
1 | #ifndef __ASM_SH_ELF_H | ||
2 | #define __ASM_SH_ELF_H | ||
3 | |||
4 | #include <linux/utsname.h> | ||
5 | #include <asm/auxvec.h> | ||
6 | #include <asm/ptrace.h> | ||
7 | #include <asm/user.h> | ||
8 | |||
9 | /* ELF header e_flags defines */ | ||
10 | #define EF_SH_PIC 0x100 /* -fpic */ | ||
11 | #define EF_SH_FDPIC 0x8000 /* -mfdpic */ | ||
12 | |||
13 | /* SH (particularly SHcompact) relocation types */ | ||
14 | #define R_SH_NONE 0 | ||
15 | #define R_SH_DIR32 1 | ||
16 | #define R_SH_REL32 2 | ||
17 | #define R_SH_DIR8WPN 3 | ||
18 | #define R_SH_IND12W 4 | ||
19 | #define R_SH_DIR8WPL 5 | ||
20 | #define R_SH_DIR8WPZ 6 | ||
21 | #define R_SH_DIR8BP 7 | ||
22 | #define R_SH_DIR8W 8 | ||
23 | #define R_SH_DIR8L 9 | ||
24 | #define R_SH_SWITCH16 25 | ||
25 | #define R_SH_SWITCH32 26 | ||
26 | #define R_SH_USES 27 | ||
27 | #define R_SH_COUNT 28 | ||
28 | #define R_SH_ALIGN 29 | ||
29 | #define R_SH_CODE 30 | ||
30 | #define R_SH_DATA 31 | ||
31 | #define R_SH_LABEL 32 | ||
32 | #define R_SH_SWITCH8 33 | ||
33 | #define R_SH_GNU_VTINHERIT 34 | ||
34 | #define R_SH_GNU_VTENTRY 35 | ||
35 | #define R_SH_TLS_GD_32 144 | ||
36 | #define R_SH_TLS_LD_32 145 | ||
37 | #define R_SH_TLS_LDO_32 146 | ||
38 | #define R_SH_TLS_IE_32 147 | ||
39 | #define R_SH_TLS_LE_32 148 | ||
40 | #define R_SH_TLS_DTPMOD32 149 | ||
41 | #define R_SH_TLS_DTPOFF32 150 | ||
42 | #define R_SH_TLS_TPOFF32 151 | ||
43 | #define R_SH_GOT32 160 | ||
44 | #define R_SH_PLT32 161 | ||
45 | #define R_SH_COPY 162 | ||
46 | #define R_SH_GLOB_DAT 163 | ||
47 | #define R_SH_JMP_SLOT 164 | ||
48 | #define R_SH_RELATIVE 165 | ||
49 | #define R_SH_GOTOFF 166 | ||
50 | #define R_SH_GOTPC 167 | ||
51 | |||
52 | /* FDPIC relocs */ | ||
53 | #define R_SH_GOT20 70 | ||
54 | #define R_SH_GOTOFF20 71 | ||
55 | #define R_SH_GOTFUNCDESC 72 | ||
56 | #define R_SH_GOTFUNCDESC20 73 | ||
57 | #define R_SH_GOTOFFFUNCDESC 74 | ||
58 | #define R_SH_GOTOFFFUNCDESC20 75 | ||
59 | #define R_SH_FUNCDESC 76 | ||
60 | #define R_SH_FUNCDESC_VALUE 77 | ||
61 | |||
62 | #if 0 /* XXX - later .. */ | ||
63 | #define R_SH_GOT20 198 | ||
64 | #define R_SH_GOTOFF20 199 | ||
65 | #define R_SH_GOTFUNCDESC 200 | ||
66 | #define R_SH_GOTFUNCDESC20 201 | ||
67 | #define R_SH_GOTOFFFUNCDESC 202 | ||
68 | #define R_SH_GOTOFFFUNCDESC20 203 | ||
69 | #define R_SH_FUNCDESC 204 | ||
70 | #define R_SH_FUNCDESC_VALUE 205 | ||
71 | #endif | ||
72 | |||
73 | /* SHmedia relocs */ | ||
74 | #define R_SH_IMM_LOW16 246 | ||
75 | #define R_SH_IMM_LOW16_PCREL 247 | ||
76 | #define R_SH_IMM_MEDLOW16 248 | ||
77 | #define R_SH_IMM_MEDLOW16_PCREL 249 | ||
78 | /* Keep this the last entry. */ | ||
79 | #define R_SH_NUM 256 | ||
80 | |||
81 | /* | ||
82 | * ELF register definitions.. | ||
83 | */ | ||
84 | |||
85 | typedef unsigned long elf_greg_t; | ||
86 | |||
87 | #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) | ||
88 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | ||
89 | |||
90 | typedef struct user_fpu_struct elf_fpregset_t; | ||
91 | |||
92 | /* | ||
93 | * These are used to set parameters in the core dumps. | ||
94 | */ | ||
95 | #define ELF_CLASS ELFCLASS32 | ||
96 | #ifdef __LITTLE_ENDIAN__ | ||
97 | #define ELF_DATA ELFDATA2LSB | ||
98 | #else | ||
99 | #define ELF_DATA ELFDATA2MSB | ||
100 | #endif | ||
101 | #define ELF_ARCH EM_SH | ||
102 | |||
103 | #ifdef __KERNEL__ | ||
104 | /* | ||
105 | * This is used to ensure we don't load something for the wrong architecture. | ||
106 | */ | ||
107 | #define elf_check_arch(x) ((x)->e_machine == EM_SH) | ||
108 | #define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC) | ||
109 | #define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC) | ||
110 | |||
111 | #define USE_ELF_CORE_DUMP | ||
112 | #define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC | ||
113 | #define ELF_EXEC_PAGESIZE PAGE_SIZE | ||
114 | |||
115 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical | ||
116 | use of this is to invoke "./ld.so someprog" to test out a new version of | ||
117 | the loader. We need to make sure that it is out of the way of the program | ||
118 | that it will "exec", and that there is sufficient room for the brk. */ | ||
119 | |||
120 | #define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) | ||
121 | |||
122 | #define ELF_CORE_COPY_REGS(_dest,_regs) \ | ||
123 | memcpy((char *) &_dest, (char *) _regs, \ | ||
124 | sizeof(struct pt_regs)); | ||
125 | |||
126 | /* This yields a mask that user programs can use to figure out what | ||
127 | instruction set this CPU supports. This could be done in user space, | ||
128 | but it's not easy, and we've already done it here. */ | ||
129 | |||
130 | #define ELF_HWCAP (boot_cpu_data.flags) | ||
131 | |||
132 | /* This yields a string that ld.so will use to load implementation | ||
133 | specific libraries for optimization. This is more specific in | ||
134 | intent than poking at uname or /proc/cpuinfo. | ||
135 | |||
136 | For the moment, we have only optimizations for the Intel generations, | ||
137 | but that could change... */ | ||
138 | |||
139 | #define ELF_PLATFORM (utsname()->machine) | ||
140 | |||
141 | #ifdef __SH5__ | ||
142 | #define ELF_PLAT_INIT(_r, load_addr) \ | ||
143 | do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \ | ||
144 | _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \ | ||
145 | _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \ | ||
146 | _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; _r->regs[15]=0; \ | ||
147 | _r->regs[16]=0; _r->regs[17]=0; _r->regs[18]=0; _r->regs[19]=0; \ | ||
148 | _r->regs[20]=0; _r->regs[21]=0; _r->regs[22]=0; _r->regs[23]=0; \ | ||
149 | _r->regs[24]=0; _r->regs[25]=0; _r->regs[26]=0; _r->regs[27]=0; \ | ||
150 | _r->regs[28]=0; _r->regs[29]=0; _r->regs[30]=0; _r->regs[31]=0; \ | ||
151 | _r->regs[32]=0; _r->regs[33]=0; _r->regs[34]=0; _r->regs[35]=0; \ | ||
152 | _r->regs[36]=0; _r->regs[37]=0; _r->regs[38]=0; _r->regs[39]=0; \ | ||
153 | _r->regs[40]=0; _r->regs[41]=0; _r->regs[42]=0; _r->regs[43]=0; \ | ||
154 | _r->regs[44]=0; _r->regs[45]=0; _r->regs[46]=0; _r->regs[47]=0; \ | ||
155 | _r->regs[48]=0; _r->regs[49]=0; _r->regs[50]=0; _r->regs[51]=0; \ | ||
156 | _r->regs[52]=0; _r->regs[53]=0; _r->regs[54]=0; _r->regs[55]=0; \ | ||
157 | _r->regs[56]=0; _r->regs[57]=0; _r->regs[58]=0; _r->regs[59]=0; \ | ||
158 | _r->regs[60]=0; _r->regs[61]=0; _r->regs[62]=0; \ | ||
159 | _r->tregs[0]=0; _r->tregs[1]=0; _r->tregs[2]=0; _r->tregs[3]=0; \ | ||
160 | _r->tregs[4]=0; _r->tregs[5]=0; _r->tregs[6]=0; _r->tregs[7]=0; \ | ||
161 | _r->sr = SR_FD | SR_MMU; } while (0) | ||
162 | #else | ||
163 | #define ELF_PLAT_INIT(_r, load_addr) \ | ||
164 | do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \ | ||
165 | _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \ | ||
166 | _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \ | ||
167 | _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; \ | ||
168 | _r->sr = SR_FD; } while (0) | ||
169 | |||
170 | #define ELF_FDPIC_PLAT_INIT(_r, _exec_map_addr, _interp_map_addr, \ | ||
171 | _dynamic_addr) \ | ||
172 | do { \ | ||
173 | _r->regs[0] = 0; \ | ||
174 | _r->regs[1] = 0; \ | ||
175 | _r->regs[2] = 0; \ | ||
176 | _r->regs[3] = 0; \ | ||
177 | _r->regs[4] = 0; \ | ||
178 | _r->regs[5] = 0; \ | ||
179 | _r->regs[6] = 0; \ | ||
180 | _r->regs[7] = 0; \ | ||
181 | _r->regs[8] = _exec_map_addr; \ | ||
182 | _r->regs[9] = _interp_map_addr; \ | ||
183 | _r->regs[10] = _dynamic_addr; \ | ||
184 | _r->regs[11] = 0; \ | ||
185 | _r->regs[12] = 0; \ | ||
186 | _r->regs[13] = 0; \ | ||
187 | _r->regs[14] = 0; \ | ||
188 | _r->sr = SR_FD; \ | ||
189 | } while (0) | ||
190 | #endif | ||
191 | |||
192 | #define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) | ||
193 | struct task_struct; | ||
194 | extern int dump_task_regs (struct task_struct *, elf_gregset_t *); | ||
195 | extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *); | ||
196 | |||
197 | #define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) | ||
198 | #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) | ||
199 | |||
200 | #ifdef CONFIG_VSYSCALL | ||
201 | /* vDSO has arch_setup_additional_pages */ | ||
202 | #define ARCH_HAS_SETUP_ADDITIONAL_PAGES | ||
203 | struct linux_binprm; | ||
204 | extern int arch_setup_additional_pages(struct linux_binprm *bprm, | ||
205 | int executable_stack); | ||
206 | |||
207 | extern unsigned int vdso_enabled; | ||
208 | extern void __kernel_vsyscall; | ||
209 | |||
210 | #define VDSO_BASE ((unsigned long)current->mm->context.vdso) | ||
211 | #define VDSO_SYM(x) (VDSO_BASE + (unsigned long)(x)) | ||
212 | |||
213 | #define VSYSCALL_AUX_ENT \ | ||
214 | if (vdso_enabled) \ | ||
215 | NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); | ||
216 | #else | ||
217 | #define VSYSCALL_AUX_ENT | ||
218 | #endif /* CONFIG_VSYSCALL */ | ||
219 | |||
220 | #ifdef CONFIG_SH_FPU | ||
221 | #define FPU_AUX_ENT NEW_AUX_ENT(AT_FPUCW, FPSCR_INIT) | ||
222 | #else | ||
223 | #define FPU_AUX_ENT | ||
224 | #endif | ||
225 | |||
226 | extern int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; | ||
227 | |||
228 | /* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */ | ||
229 | #define ARCH_DLINFO \ | ||
230 | do { \ | ||
231 | /* Optional FPU initialization */ \ | ||
232 | FPU_AUX_ENT; \ | ||
233 | \ | ||
234 | /* Optional vsyscall entry */ \ | ||
235 | VSYSCALL_AUX_ENT; \ | ||
236 | \ | ||
237 | /* Cache desc */ \ | ||
238 | NEW_AUX_ENT(AT_L1I_CACHESHAPE, l1i_cache_shape); \ | ||
239 | NEW_AUX_ENT(AT_L1D_CACHESHAPE, l1d_cache_shape); \ | ||
240 | NEW_AUX_ENT(AT_L2_CACHESHAPE, l2_cache_shape); \ | ||
241 | } while (0) | ||
242 | |||
243 | #endif /* __KERNEL__ */ | ||
244 | #endif /* __ASM_SH_ELF_H */ | ||
diff --git a/include/asm-sh/emergency-restart.h b/include/asm-sh/emergency-restart.h deleted file mode 100644 index 108d8c48e42e..000000000000 --- a/include/asm-sh/emergency-restart.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_EMERGENCY_RESTART_H | ||
2 | #define _ASM_EMERGENCY_RESTART_H | ||
3 | |||
4 | #include <asm-generic/emergency-restart.h> | ||
5 | |||
6 | #endif /* _ASM_EMERGENCY_RESTART_H */ | ||
diff --git a/include/asm-sh/entry-macros.S b/include/asm-sh/entry-macros.S deleted file mode 100644 index 2dab0b8d9454..000000000000 --- a/include/asm-sh/entry-macros.S +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | ! entry.S macro define | ||
2 | |||
3 | .macro cli | ||
4 | stc sr, r0 | ||
5 | or #0xf0, r0 | ||
6 | ldc r0, sr | ||
7 | .endm | ||
8 | |||
9 | .macro sti | ||
10 | mov #0xf0, r11 | ||
11 | extu.b r11, r11 | ||
12 | not r11, r11 | ||
13 | stc sr, r10 | ||
14 | and r11, r10 | ||
15 | #ifdef CONFIG_CPU_HAS_SR_RB | ||
16 | stc k_g_imask, r11 | ||
17 | or r11, r10 | ||
18 | #endif | ||
19 | ldc r10, sr | ||
20 | .endm | ||
21 | |||
22 | .macro get_current_thread_info, ti, tmp | ||
23 | #ifdef CONFIG_CPU_HAS_SR_RB | ||
24 | stc r7_bank, \ti | ||
25 | #else | ||
26 | mov #((THREAD_SIZE - 1) >> 10) ^ 0xff, \tmp | ||
27 | shll8 \tmp | ||
28 | shll2 \tmp | ||
29 | mov r15, \ti | ||
30 | and \tmp, \ti | ||
31 | #endif | ||
32 | .endm | ||
33 | |||
diff --git a/include/asm-sh/errno.h b/include/asm-sh/errno.h deleted file mode 100644 index 51cf6f9cebb8..000000000000 --- a/include/asm-sh/errno.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_SH_ERRNO_H | ||
2 | #define __ASM_SH_ERRNO_H | ||
3 | |||
4 | #include <asm-generic/errno.h> | ||
5 | |||
6 | #endif /* __ASM_SH_ERRNO_H */ | ||
diff --git a/include/asm-sh/fb.h b/include/asm-sh/fb.h deleted file mode 100644 index d92e99cd8c8a..000000000000 --- a/include/asm-sh/fb.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | #ifndef _ASM_FB_H_ | ||
2 | #define _ASM_FB_H_ | ||
3 | |||
4 | #include <linux/fb.h> | ||
5 | #include <linux/fs.h> | ||
6 | #include <asm/page.h> | ||
7 | |||
8 | static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, | ||
9 | unsigned long off) | ||
10 | { | ||
11 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); | ||
12 | } | ||
13 | |||
14 | static inline int fb_is_primary_device(struct fb_info *info) | ||
15 | { | ||
16 | return 0; | ||
17 | } | ||
18 | |||
19 | #endif /* _ASM_FB_H_ */ | ||
diff --git a/include/asm-sh/fcntl.h b/include/asm-sh/fcntl.h deleted file mode 100644 index 46ab12db5739..000000000000 --- a/include/asm-sh/fcntl.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/fcntl.h> | ||
diff --git a/include/asm-sh/fixmap.h b/include/asm-sh/fixmap.h deleted file mode 100644 index 721fcc4d5e98..000000000000 --- a/include/asm-sh/fixmap.h +++ /dev/null | |||
@@ -1,117 +0,0 @@ | |||
1 | /* | ||
2 | * fixmap.h: compile-time virtual memory allocation | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright (C) 1998 Ingo Molnar | ||
9 | * | ||
10 | * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999 | ||
11 | */ | ||
12 | |||
13 | #ifndef _ASM_FIXMAP_H | ||
14 | #define _ASM_FIXMAP_H | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <asm/page.h> | ||
18 | #ifdef CONFIG_HIGHMEM | ||
19 | #include <linux/threads.h> | ||
20 | #include <asm/kmap_types.h> | ||
21 | #endif | ||
22 | |||
23 | /* | ||
24 | * Here we define all the compile-time 'special' virtual | ||
25 | * addresses. The point is to have a constant address at | ||
26 | * compile time, but to set the physical address only | ||
27 | * in the boot process. We allocate these special addresses | ||
28 | * from the end of P3 backwards. | ||
29 | * Also this lets us do fail-safe vmalloc(), we | ||
30 | * can guarantee that these special addresses and | ||
31 | * vmalloc()-ed addresses never overlap. | ||
32 | * | ||
33 | * these 'compile-time allocated' memory buffers are | ||
34 | * fixed-size 4k pages. (or larger if used with an increment | ||
35 | * highger than 1) use fixmap_set(idx,phys) to associate | ||
36 | * physical memory with fixmap indices. | ||
37 | * | ||
38 | * TLB entries of such buffers will not be flushed across | ||
39 | * task switches. | ||
40 | */ | ||
41 | |||
42 | /* | ||
43 | * on UP currently we will have no trace of the fixmap mechanizm, | ||
44 | * no page table allocations, etc. This might change in the | ||
45 | * future, say framebuffers for the console driver(s) could be | ||
46 | * fix-mapped? | ||
47 | */ | ||
48 | enum fixed_addresses { | ||
49 | #define FIX_N_COLOURS 16 | ||
50 | FIX_CMAP_BEGIN, | ||
51 | FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS, | ||
52 | FIX_UNCACHED, | ||
53 | #ifdef CONFIG_HIGHMEM | ||
54 | FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ | ||
55 | FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, | ||
56 | #endif | ||
57 | __end_of_fixed_addresses | ||
58 | }; | ||
59 | |||
60 | extern void __set_fixmap(enum fixed_addresses idx, | ||
61 | unsigned long phys, pgprot_t flags); | ||
62 | |||
63 | #define set_fixmap(idx, phys) \ | ||
64 | __set_fixmap(idx, phys, PAGE_KERNEL) | ||
65 | /* | ||
66 | * Some hardware wants to get fixmapped without caching. | ||
67 | */ | ||
68 | #define set_fixmap_nocache(idx, phys) \ | ||
69 | __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE) | ||
70 | /* | ||
71 | * used by vmalloc.c. | ||
72 | * | ||
73 | * Leave one empty page between vmalloc'ed areas and | ||
74 | * the start of the fixmap, and leave one page empty | ||
75 | * at the top of mem.. | ||
76 | */ | ||
77 | #ifdef CONFIG_SUPERH32 | ||
78 | #define FIXADDR_TOP (P4SEG - PAGE_SIZE) | ||
79 | #else | ||
80 | #define FIXADDR_TOP (0xff000000 - PAGE_SIZE) | ||
81 | #endif | ||
82 | #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) | ||
83 | #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) | ||
84 | |||
85 | #define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) | ||
86 | #define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) | ||
87 | |||
88 | extern void __this_fixmap_does_not_exist(void); | ||
89 | |||
90 | /* | ||
91 | * 'index to address' translation. If anyone tries to use the idx | ||
92 | * directly without tranlation, we catch the bug with a NULL-deference | ||
93 | * kernel oops. Illegal ranges of incoming indices are caught too. | ||
94 | */ | ||
95 | static inline unsigned long fix_to_virt(const unsigned int idx) | ||
96 | { | ||
97 | /* | ||
98 | * this branch gets completely eliminated after inlining, | ||
99 | * except when someone tries to use fixaddr indices in an | ||
100 | * illegal way. (such as mixing up address types or using | ||
101 | * out-of-range indices). | ||
102 | * | ||
103 | * If it doesn't get removed, the linker will complain | ||
104 | * loudly with a reasonably clear error message.. | ||
105 | */ | ||
106 | if (idx >= __end_of_fixed_addresses) | ||
107 | __this_fixmap_does_not_exist(); | ||
108 | |||
109 | return __fix_to_virt(idx); | ||
110 | } | ||
111 | |||
112 | static inline unsigned long virt_to_fix(const unsigned long vaddr) | ||
113 | { | ||
114 | BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); | ||
115 | return __virt_to_fix(vaddr); | ||
116 | } | ||
117 | #endif | ||
diff --git a/include/asm-sh/flat.h b/include/asm-sh/flat.h deleted file mode 100644 index 0cc800299e06..000000000000 --- a/include/asm-sh/flat.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/flat.h | ||
3 | * | ||
4 | * uClinux flat-format executables | ||
5 | * | ||
6 | * Copyright (C) 2003 Paul Mundt | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive for | ||
10 | * more details. | ||
11 | */ | ||
12 | #ifndef __ASM_SH_FLAT_H | ||
13 | #define __ASM_SH_FLAT_H | ||
14 | |||
15 | #define flat_stack_align(sp) /* nothing needed */ | ||
16 | #define flat_argvp_envp_on_stack() 0 | ||
17 | #define flat_old_ram_flag(flags) (flags) | ||
18 | #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) | ||
19 | #define flat_get_addr_from_rp(rp, relval, flags, p) get_unaligned(rp) | ||
20 | #define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) | ||
21 | #define flat_get_relocate_addr(rel) (rel) | ||
22 | #define flat_set_persistent(relval, p) ({ (void)p; 0; }) | ||
23 | |||
24 | #endif /* __ASM_SH_FLAT_H */ | ||
diff --git a/include/asm-sh/fpu.h b/include/asm-sh/fpu.h deleted file mode 100644 index 91462fea1507..000000000000 --- a/include/asm-sh/fpu.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | #ifndef __ASM_SH_FPU_H | ||
2 | #define __ASM_SH_FPU_H | ||
3 | |||
4 | #ifndef __ASSEMBLY__ | ||
5 | #include <linux/preempt.h> | ||
6 | #include <asm/ptrace.h> | ||
7 | |||
8 | #ifdef CONFIG_SH_FPU | ||
9 | static inline void release_fpu(struct pt_regs *regs) | ||
10 | { | ||
11 | regs->sr |= SR_FD; | ||
12 | } | ||
13 | |||
14 | static inline void grab_fpu(struct pt_regs *regs) | ||
15 | { | ||
16 | regs->sr &= ~SR_FD; | ||
17 | } | ||
18 | |||
19 | struct task_struct; | ||
20 | |||
21 | extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); | ||
22 | #else | ||
23 | |||
24 | #define release_fpu(regs) do { } while (0) | ||
25 | #define grab_fpu(regs) do { } while (0) | ||
26 | |||
27 | static inline void save_fpu(struct task_struct *tsk, struct pt_regs *regs) | ||
28 | { | ||
29 | clear_tsk_thread_flag(tsk, TIF_USEDFPU); | ||
30 | } | ||
31 | #endif | ||
32 | |||
33 | extern int do_fpu_inst(unsigned short, struct pt_regs *); | ||
34 | |||
35 | static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs) | ||
36 | { | ||
37 | preempt_disable(); | ||
38 | if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) | ||
39 | save_fpu(tsk, regs); | ||
40 | preempt_enable(); | ||
41 | } | ||
42 | |||
43 | static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs) | ||
44 | { | ||
45 | preempt_disable(); | ||
46 | if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { | ||
47 | clear_tsk_thread_flag(tsk, TIF_USEDFPU); | ||
48 | release_fpu(regs); | ||
49 | } | ||
50 | preempt_enable(); | ||
51 | } | ||
52 | |||
53 | #endif /* __ASSEMBLY__ */ | ||
54 | |||
55 | #endif /* __ASM_SH_FPU_H */ | ||
diff --git a/include/asm-sh/freq.h b/include/asm-sh/freq.h deleted file mode 100644 index 39c0e091cf58..000000000000 --- a/include/asm-sh/freq.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/freq.h | ||
3 | * | ||
4 | * Copyright (C) 2002, 2003 Paul Mundt | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | #ifndef __ASM_SH_FREQ_H | ||
12 | #define __ASM_SH_FREQ_H | ||
13 | #ifdef __KERNEL__ | ||
14 | |||
15 | #include <asm/cpu/freq.h> | ||
16 | |||
17 | #endif /* __KERNEL__ */ | ||
18 | #endif /* __ASM_SH_FREQ_H */ | ||
diff --git a/include/asm-sh/futex-irq.h b/include/asm-sh/futex-irq.h deleted file mode 100644 index a9f16a7f9aea..000000000000 --- a/include/asm-sh/futex-irq.h +++ /dev/null | |||
@@ -1,111 +0,0 @@ | |||
1 | #ifndef __ASM_SH_FUTEX_IRQ_H | ||
2 | #define __ASM_SH_FUTEX_IRQ_H | ||
3 | |||
4 | #include <asm/system.h> | ||
5 | |||
6 | static inline int atomic_futex_op_xchg_set(int oparg, int __user *uaddr, | ||
7 | int *oldval) | ||
8 | { | ||
9 | unsigned long flags; | ||
10 | int ret; | ||
11 | |||
12 | local_irq_save(flags); | ||
13 | |||
14 | ret = get_user(*oldval, uaddr); | ||
15 | if (!ret) | ||
16 | ret = put_user(oparg, uaddr); | ||
17 | |||
18 | local_irq_restore(flags); | ||
19 | |||
20 | return ret; | ||
21 | } | ||
22 | |||
23 | static inline int atomic_futex_op_xchg_add(int oparg, int __user *uaddr, | ||
24 | int *oldval) | ||
25 | { | ||
26 | unsigned long flags; | ||
27 | int ret; | ||
28 | |||
29 | local_irq_save(flags); | ||
30 | |||
31 | ret = get_user(*oldval, uaddr); | ||
32 | if (!ret) | ||
33 | ret = put_user(*oldval + oparg, uaddr); | ||
34 | |||
35 | local_irq_restore(flags); | ||
36 | |||
37 | return ret; | ||
38 | } | ||
39 | |||
40 | static inline int atomic_futex_op_xchg_or(int oparg, int __user *uaddr, | ||
41 | int *oldval) | ||
42 | { | ||
43 | unsigned long flags; | ||
44 | int ret; | ||
45 | |||
46 | local_irq_save(flags); | ||
47 | |||
48 | ret = get_user(*oldval, uaddr); | ||
49 | if (!ret) | ||
50 | ret = put_user(*oldval | oparg, uaddr); | ||
51 | |||
52 | local_irq_restore(flags); | ||
53 | |||
54 | return ret; | ||
55 | } | ||
56 | |||
57 | static inline int atomic_futex_op_xchg_and(int oparg, int __user *uaddr, | ||
58 | int *oldval) | ||
59 | { | ||
60 | unsigned long flags; | ||
61 | int ret; | ||
62 | |||
63 | local_irq_save(flags); | ||
64 | |||
65 | ret = get_user(*oldval, uaddr); | ||
66 | if (!ret) | ||
67 | ret = put_user(*oldval & oparg, uaddr); | ||
68 | |||
69 | local_irq_restore(flags); | ||
70 | |||
71 | return ret; | ||
72 | } | ||
73 | |||
74 | static inline int atomic_futex_op_xchg_xor(int oparg, int __user *uaddr, | ||
75 | int *oldval) | ||
76 | { | ||
77 | unsigned long flags; | ||
78 | int ret; | ||
79 | |||
80 | local_irq_save(flags); | ||
81 | |||
82 | ret = get_user(*oldval, uaddr); | ||
83 | if (!ret) | ||
84 | ret = put_user(*oldval ^ oparg, uaddr); | ||
85 | |||
86 | local_irq_restore(flags); | ||
87 | |||
88 | return ret; | ||
89 | } | ||
90 | |||
91 | static inline int atomic_futex_op_cmpxchg_inatomic(int __user *uaddr, | ||
92 | int oldval, int newval) | ||
93 | { | ||
94 | unsigned long flags; | ||
95 | int ret, prev = 0; | ||
96 | |||
97 | local_irq_save(flags); | ||
98 | |||
99 | ret = get_user(prev, uaddr); | ||
100 | if (!ret && oldval == prev) | ||
101 | ret = put_user(newval, uaddr); | ||
102 | |||
103 | local_irq_restore(flags); | ||
104 | |||
105 | if (ret) | ||
106 | return ret; | ||
107 | |||
108 | return prev; | ||
109 | } | ||
110 | |||
111 | #endif /* __ASM_SH_FUTEX_IRQ_H */ | ||
diff --git a/include/asm-sh/futex.h b/include/asm-sh/futex.h deleted file mode 100644 index 68256ec5fa35..000000000000 --- a/include/asm-sh/futex.h +++ /dev/null | |||
@@ -1,77 +0,0 @@ | |||
1 | #ifndef __ASM_SH_FUTEX_H | ||
2 | #define __ASM_SH_FUTEX_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | #include <linux/futex.h> | ||
7 | #include <linux/uaccess.h> | ||
8 | #include <asm/errno.h> | ||
9 | |||
10 | /* XXX: UP variants, fix for SH-4A and SMP.. */ | ||
11 | #include <asm/futex-irq.h> | ||
12 | |||
13 | static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) | ||
14 | { | ||
15 | int op = (encoded_op >> 28) & 7; | ||
16 | int cmp = (encoded_op >> 24) & 15; | ||
17 | int oparg = (encoded_op << 8) >> 20; | ||
18 | int cmparg = (encoded_op << 20) >> 20; | ||
19 | int oldval = 0, ret; | ||
20 | |||
21 | if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) | ||
22 | oparg = 1 << oparg; | ||
23 | |||
24 | if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) | ||
25 | return -EFAULT; | ||
26 | |||
27 | pagefault_disable(); | ||
28 | |||
29 | switch (op) { | ||
30 | case FUTEX_OP_SET: | ||
31 | ret = atomic_futex_op_xchg_set(oparg, uaddr, &oldval); | ||
32 | break; | ||
33 | case FUTEX_OP_ADD: | ||
34 | ret = atomic_futex_op_xchg_add(oparg, uaddr, &oldval); | ||
35 | break; | ||
36 | case FUTEX_OP_OR: | ||
37 | ret = atomic_futex_op_xchg_or(oparg, uaddr, &oldval); | ||
38 | break; | ||
39 | case FUTEX_OP_ANDN: | ||
40 | ret = atomic_futex_op_xchg_and(~oparg, uaddr, &oldval); | ||
41 | break; | ||
42 | case FUTEX_OP_XOR: | ||
43 | ret = atomic_futex_op_xchg_xor(oparg, uaddr, &oldval); | ||
44 | break; | ||
45 | default: | ||
46 | ret = -ENOSYS; | ||
47 | break; | ||
48 | } | ||
49 | |||
50 | pagefault_enable(); | ||
51 | |||
52 | if (!ret) { | ||
53 | switch (cmp) { | ||
54 | case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; | ||
55 | case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; | ||
56 | case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; | ||
57 | case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; | ||
58 | case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; | ||
59 | case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; | ||
60 | default: ret = -ENOSYS; | ||
61 | } | ||
62 | } | ||
63 | |||
64 | return ret; | ||
65 | } | ||
66 | |||
67 | static inline int | ||
68 | futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) | ||
69 | { | ||
70 | if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) | ||
71 | return -EFAULT; | ||
72 | |||
73 | return atomic_futex_op_cmpxchg_inatomic(uaddr, oldval, newval); | ||
74 | } | ||
75 | |||
76 | #endif /* __KERNEL__ */ | ||
77 | #endif /* __ASM_SH_FUTEX_H */ | ||
diff --git a/include/asm-sh/gpio.h b/include/asm-sh/gpio.h deleted file mode 100644 index 9bb27e0f11a4..000000000000 --- a/include/asm-sh/gpio.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/gpio.h | ||
3 | * | ||
4 | * Copyright (C) 2007 Markus Brunner, Mark Jonas | ||
5 | * | ||
6 | * Addresses for the Pin Function Controller | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | #ifndef __ASM_SH_GPIO_H | ||
13 | #define __ASM_SH_GPIO_H | ||
14 | |||
15 | #if defined(CONFIG_CPU_SH3) | ||
16 | #include <asm/cpu/gpio.h> | ||
17 | #endif | ||
18 | |||
19 | #endif /* __ASM_SH_GPIO_H */ | ||
diff --git a/include/asm-sh/hardirq.h b/include/asm-sh/hardirq.h deleted file mode 100644 index 715ee237fc77..000000000000 --- a/include/asm-sh/hardirq.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | #ifndef __ASM_SH_HARDIRQ_H | ||
2 | #define __ASM_SH_HARDIRQ_H | ||
3 | |||
4 | #include <linux/threads.h> | ||
5 | #include <linux/irq.h> | ||
6 | |||
7 | /* entry.S is sensitive to the offsets of these fields */ | ||
8 | typedef struct { | ||
9 | unsigned int __softirq_pending; | ||
10 | } ____cacheline_aligned irq_cpustat_t; | ||
11 | |||
12 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | ||
13 | |||
14 | extern void ack_bad_irq(unsigned int irq); | ||
15 | |||
16 | #endif /* __ASM_SH_HARDIRQ_H */ | ||
diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h deleted file mode 100644 index 8c1353baf00f..000000000000 --- a/include/asm-sh/hd64461.h +++ /dev/null | |||
@@ -1,250 +0,0 @@ | |||
1 | #ifndef __ASM_SH_HD64461 | ||
2 | #define __ASM_SH_HD64461 | ||
3 | /* | ||
4 | * Copyright (C) 2007 Kristoffer Ericson <Kristoffer.Ericson@gmail.com> | ||
5 | * Copyright (C) 2004 Paul Mundt | ||
6 | * Copyright (C) 2000 YAEGASHI Takeshi | ||
7 | * | ||
8 | * Hitachi HD64461 companion chip support | ||
9 | * (please note manual reference 0x10000000 = 0xb0000000) | ||
10 | */ | ||
11 | |||
12 | /* Constants for PCMCIA mappings */ | ||
13 | #define HD64461_PCC_WINDOW 0x01000000 | ||
14 | |||
15 | /* Area 6 - Slot 0 - memory and/or IO card */ | ||
16 | #define HD64461_PCC0_BASE (CONFIG_HD64461_IOBASE + 0x8000000) | ||
17 | #define HD64461_PCC0_ATTR (HD64461_PCC0_BASE) /* 0xb80000000 */ | ||
18 | #define HD64461_PCC0_COMM (HD64461_PCC0_BASE+HD64461_PCC_WINDOW) /* 0xb90000000 */ | ||
19 | #define HD64461_PCC0_IO (HD64461_PCC0_BASE+2*HD64461_PCC_WINDOW) /* 0xba0000000 */ | ||
20 | |||
21 | /* Area 5 - Slot 1 - memory card only */ | ||
22 | #define HD64461_PCC1_BASE (CONFIG_HD64461_IOBASE + 0x4000000) | ||
23 | #define HD64461_PCC1_ATTR (HD64461_PCC1_BASE) /* 0xb4000000 */ | ||
24 | #define HD64461_PCC1_COMM (HD64461_PCC1_BASE+HD64461_PCC_WINDOW) /* 0xb5000000 */ | ||
25 | |||
26 | /* Standby Control Register for HD64461 */ | ||
27 | #define HD64461_STBCR CONFIG_HD64461_IOBASE | ||
28 | #define HD64461_STBCR_CKIO_STBY 0x2000 | ||
29 | #define HD64461_STBCR_SAFECKE_IST 0x1000 | ||
30 | #define HD64461_STBCR_SLCKE_IST 0x0800 | ||
31 | #define HD64461_STBCR_SAFECKE_OST 0x0400 | ||
32 | #define HD64461_STBCR_SLCKE_OST 0x0200 | ||
33 | #define HD64461_STBCR_SMIAST 0x0100 | ||
34 | #define HD64461_STBCR_SLCDST 0x0080 | ||
35 | #define HD64461_STBCR_SPC0ST 0x0040 | ||
36 | #define HD64461_STBCR_SPC1ST 0x0020 | ||
37 | #define HD64461_STBCR_SAFEST 0x0010 | ||
38 | #define HD64461_STBCR_STM0ST 0x0008 | ||
39 | #define HD64461_STBCR_STM1ST 0x0004 | ||
40 | #define HD64461_STBCR_SIRST 0x0002 | ||
41 | #define HD64461_STBCR_SURTST 0x0001 | ||
42 | |||
43 | /* System Configuration Register */ | ||
44 | #define HD64461_SYSCR (CONFIG_HD64461_IOBASE + 0x02) | ||
45 | |||
46 | /* CPU Data Bus Control Register */ | ||
47 | #define HD64461_SCPUCR (CONFIG_HD64461_IOBASE + 0x04) | ||
48 | |||
49 | /* Base Address Register */ | ||
50 | #define HD64461_LCDCBAR (CONFIG_HD64461_IOBASE + 0x1000) | ||
51 | |||
52 | /* Line increment address */ | ||
53 | #define HD64461_LCDCLOR (CONFIG_HD64461_IOBASE + 0x1002) | ||
54 | |||
55 | /* Controls LCD controller */ | ||
56 | #define HD64461_LCDCCR (CONFIG_HD64461_IOBASE + 0x1004) | ||
57 | |||
58 | /* LCCDR control bits */ | ||
59 | #define HD64461_LCDCCR_STBACK 0x0400 /* Standby Back */ | ||
60 | #define HD64461_LCDCCR_STREQ 0x0100 /* Standby Request */ | ||
61 | #define HD64461_LCDCCR_MOFF 0x0080 /* Memory Off */ | ||
62 | #define HD64461_LCDCCR_REFSEL 0x0040 /* Refresh Select */ | ||
63 | #define HD64461_LCDCCR_EPON 0x0020 /* End Power On */ | ||
64 | #define HD64461_LCDCCR_SPON 0x0010 /* Start Power On */ | ||
65 | |||
66 | /* Controls LCD (1) */ | ||
67 | #define HD64461_LDR1 (CONFIG_HD64461_IOBASE + 0x1010) | ||
68 | #define HD64461_LDR1_DON 0x01 /* Display On */ | ||
69 | #define HD64461_LDR1_DINV 0x80 /* Display Invert */ | ||
70 | |||
71 | /* Controls LCD (2) */ | ||
72 | #define HD64461_LDR2 (CONFIG_HD64461_IOBASE + 0x1012) | ||
73 | #define HD64461_LDHNCR (CONFIG_HD64461_IOBASE + 0x1014) /* Number of horizontal characters */ | ||
74 | #define HD64461_LDHNSR (CONFIG_HD64461_IOBASE + 0x1016) /* Specify output start position + width of CL1 */ | ||
75 | #define HD64461_LDVNTR (CONFIG_HD64461_IOBASE + 0x1018) /* Specify total vertical lines */ | ||
76 | #define HD64461_LDVNDR (CONFIG_HD64461_IOBASE + 0x101a) /* specify number of display vertical lines */ | ||
77 | #define HD64461_LDVSPR (CONFIG_HD64461_IOBASE + 0x101c) /* specify vertical synchronization pos and AC nr */ | ||
78 | |||
79 | /* Controls LCD (3) */ | ||
80 | #define HD64461_LDR3 (CONFIG_HD64461_IOBASE + 0x101e) | ||
81 | |||
82 | /* Palette Registers */ | ||
83 | #define HD64461_CPTWAR (CONFIG_HD64461_IOBASE + 0x1030) /* Color Palette Write Address Register */ | ||
84 | #define HD64461_CPTWDR (CONFIG_HD64461_IOBASE + 0x1032) /* Color Palette Write Data Register */ | ||
85 | #define HD64461_CPTRAR (CONFIG_HD64461_IOBASE + 0x1034) /* Color Palette Read Address Register */ | ||
86 | #define HD64461_CPTRDR (CONFIG_HD64461_IOBASE + 0x1036) /* Color Palette Read Data Register */ | ||
87 | |||
88 | #define HD64461_GRDOR (CONFIG_HD64461_IOBASE + 0x1040) /* Display Resolution Offset Register */ | ||
89 | #define HD64461_GRSCR (CONFIG_HD64461_IOBASE + 0x1042) /* Solid Color Register */ | ||
90 | #define HD64461_GRCFGR (CONFIG_HD64461_IOBASE + 0x1044) /* Accelerator Configuration Register */ | ||
91 | |||
92 | #define HD64461_GRCFGR_ACCSTATUS 0x10 /* Accelerator Status */ | ||
93 | #define HD64461_GRCFGR_ACCRESET 0x08 /* Accelerator Reset */ | ||
94 | #define HD64461_GRCFGR_ACCSTART_BITBLT 0x06 /* Accelerator Start BITBLT */ | ||
95 | #define HD64461_GRCFGR_ACCSTART_LINE 0x04 /* Accelerator Start Line Drawing */ | ||
96 | #define HD64461_GRCFGR_COLORDEPTH16 0x01 /* Sets Colordepth 16 for Accelerator */ | ||
97 | #define HD64461_GRCFGR_COLORDEPTH8 0x01 /* Sets Colordepth 8 for Accelerator */ | ||
98 | |||
99 | /* Line Drawing Registers */ | ||
100 | #define HD64461_LNSARH (CONFIG_HD64461_IOBASE + 0x1046) /* Line Start Address Register (H) */ | ||
101 | #define HD64461_LNSARL (CONFIG_HD64461_IOBASE + 0x1048) /* Line Start Address Register (L) */ | ||
102 | #define HD64461_LNAXLR (CONFIG_HD64461_IOBASE + 0x104a) /* Axis Pixel Length Register */ | ||
103 | #define HD64461_LNDGR (CONFIG_HD64461_IOBASE + 0x104c) /* Diagonal Register */ | ||
104 | #define HD64461_LNAXR (CONFIG_HD64461_IOBASE + 0x104e) /* Axial Register */ | ||
105 | #define HD64461_LNERTR (CONFIG_HD64461_IOBASE + 0x1050) /* Start Error Term Register */ | ||
106 | #define HD64461_LNMDR (CONFIG_HD64461_IOBASE + 0x1052) /* Line Mode Register */ | ||
107 | |||
108 | /* BitBLT Registers */ | ||
109 | #define HD64461_BBTSSARH (CONFIG_HD64461_IOBASE + 0x1054) /* Source Start Address Register (H) */ | ||
110 | #define HD64461_BBTSSARL (CONFIG_HD64461_IOBASE + 0x1056) /* Source Start Address Register (L) */ | ||
111 | #define HD64461_BBTDSARH (CONFIG_HD64461_IOBASE + 0x1058) /* Destination Start Address Register (H) */ | ||
112 | #define HD64461_BBTDSARL (CONFIG_HD64461_IOBASE + 0x105a) /* Destination Start Address Register (L) */ | ||
113 | #define HD64461_BBTDWR (CONFIG_HD64461_IOBASE + 0x105c) /* Destination Block Width Register */ | ||
114 | #define HD64461_BBTDHR (CONFIG_HD64461_IOBASE + 0x105e) /* Destination Block Height Register */ | ||
115 | #define HD64461_BBTPARH (CONFIG_HD64461_IOBASE + 0x1060) /* Pattern Start Address Register (H) */ | ||
116 | #define HD64461_BBTPARL (CONFIG_HD64461_IOBASE + 0x1062) /* Pattern Start Address Register (L) */ | ||
117 | #define HD64461_BBTMARH (CONFIG_HD64461_IOBASE + 0x1064) /* Mask Start Address Register (H) */ | ||
118 | #define HD64461_BBTMARL (CONFIG_HD64461_IOBASE + 0x1066) /* Mask Start Address Register (L) */ | ||
119 | #define HD64461_BBTROPR (CONFIG_HD64461_IOBASE + 0x1068) /* ROP Register */ | ||
120 | #define HD64461_BBTMDR (CONFIG_HD64461_IOBASE + 0x106a) /* BitBLT Mode Register */ | ||
121 | |||
122 | /* PC Card Controller Registers */ | ||
123 | /* Maps to Physical Area 6 */ | ||
124 | #define HD64461_PCC0ISR (CONFIG_HD64461_IOBASE + 0x2000) /* socket 0 interface status */ | ||
125 | #define HD64461_PCC0GCR (CONFIG_HD64461_IOBASE + 0x2002) /* socket 0 general control */ | ||
126 | #define HD64461_PCC0CSCR (CONFIG_HD64461_IOBASE + 0x2004) /* socket 0 card status change */ | ||
127 | #define HD64461_PCC0CSCIER (CONFIG_HD64461_IOBASE + 0x2006) /* socket 0 card status change interrupt enable */ | ||
128 | #define HD64461_PCC0SCR (CONFIG_HD64461_IOBASE + 0x2008) /* socket 0 software control */ | ||
129 | /* Maps to Physical Area 5 */ | ||
130 | #define HD64461_PCC1ISR (CONFIG_HD64461_IOBASE + 0x2010) /* socket 1 interface status */ | ||
131 | #define HD64461_PCC1GCR (CONFIG_HD64461_IOBASE + 0x2012) /* socket 1 general control */ | ||
132 | #define HD64461_PCC1CSCR (CONFIG_HD64461_IOBASE + 0x2014) /* socket 1 card status change */ | ||
133 | #define HD64461_PCC1CSCIER (CONFIG_HD64461_IOBASE + 0x2016) /* socket 1 card status change interrupt enable */ | ||
134 | #define HD64461_PCC1SCR (CONFIG_HD64461_IOBASE + 0x2018) /* socket 1 software control */ | ||
135 | |||
136 | /* PCC Interface Status Register */ | ||
137 | #define HD64461_PCCISR_READY 0x80 /* card ready */ | ||
138 | #define HD64461_PCCISR_MWP 0x40 /* card write-protected */ | ||
139 | #define HD64461_PCCISR_VS2 0x20 /* voltage select pin 2 */ | ||
140 | #define HD64461_PCCISR_VS1 0x10 /* voltage select pin 1 */ | ||
141 | #define HD64461_PCCISR_CD2 0x08 /* card detect 2 */ | ||
142 | #define HD64461_PCCISR_CD1 0x04 /* card detect 1 */ | ||
143 | #define HD64461_PCCISR_BVD2 0x02 /* battery 1 */ | ||
144 | #define HD64461_PCCISR_BVD1 0x01 /* battery 1 */ | ||
145 | |||
146 | #define HD64461_PCCISR_PCD_MASK 0x0c /* card detect */ | ||
147 | #define HD64461_PCCISR_BVD_MASK 0x03 /* battery voltage */ | ||
148 | #define HD64461_PCCISR_BVD_BATGOOD 0x03 /* battery good */ | ||
149 | #define HD64461_PCCISR_BVD_BATWARN 0x01 /* battery low warning */ | ||
150 | #define HD64461_PCCISR_BVD_BATDEAD1 0x02 /* battery dead */ | ||
151 | #define HD64461_PCCISR_BVD_BATDEAD2 0x00 /* battery dead */ | ||
152 | |||
153 | /* PCC General Control Register */ | ||
154 | #define HD64461_PCCGCR_DRVE 0x80 /* output drive */ | ||
155 | #define HD64461_PCCGCR_PCCR 0x40 /* PC card reset */ | ||
156 | #define HD64461_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */ | ||
157 | #define HD64461_PCCGCR_VCC0 0x10 /* voltage control pin VCC0SEL0 */ | ||
158 | #define HD64461_PCCGCR_PMMOD 0x08 /* memory mode */ | ||
159 | #define HD64461_PCCGCR_PA25 0x04 /* pin A25 */ | ||
160 | #define HD64461_PCCGCR_PA24 0x02 /* pin A24 */ | ||
161 | #define HD64461_PCCGCR_REG 0x01 /* pin PCC0REG# */ | ||
162 | |||
163 | /* PCC Card Status Change Register */ | ||
164 | #define HD64461_PCCCSCR_SCDI 0x80 /* sw card detect intr */ | ||
165 | #define HD64461_PCCCSCR_SRV1 0x40 /* reserved */ | ||
166 | #define HD64461_PCCCSCR_IREQ 0x20 /* IREQ intr req */ | ||
167 | #define HD64461_PCCCSCR_SC 0x10 /* STSCHG (status change) pin */ | ||
168 | #define HD64461_PCCCSCR_CDC 0x08 /* CD (card detect) change */ | ||
169 | #define HD64461_PCCCSCR_RC 0x04 /* READY change */ | ||
170 | #define HD64461_PCCCSCR_BW 0x02 /* battery warning change */ | ||
171 | #define HD64461_PCCCSCR_BD 0x01 /* battery dead change */ | ||
172 | |||
173 | /* PCC Card Status Change Interrupt Enable Register */ | ||
174 | #define HD64461_PCCCSCIER_CRE 0x80 /* change reset enable */ | ||
175 | #define HD64461_PCCCSCIER_IREQE_MASK 0x60 /* IREQ enable */ | ||
176 | #define HD64461_PCCCSCIER_IREQE_DISABLED 0x00 /* IREQ disabled */ | ||
177 | #define HD64461_PCCCSCIER_IREQE_LEVEL 0x20 /* IREQ level-triggered */ | ||
178 | #define HD64461_PCCCSCIER_IREQE_FALLING 0x40 /* IREQ falling-edge-trig */ | ||
179 | #define HD64461_PCCCSCIER_IREQE_RISING 0x60 /* IREQ rising-edge-trig */ | ||
180 | |||
181 | #define HD64461_PCCCSCIER_SCE 0x10 /* status change enable */ | ||
182 | #define HD64461_PCCCSCIER_CDE 0x08 /* card detect change enable */ | ||
183 | #define HD64461_PCCCSCIER_RE 0x04 /* ready change enable */ | ||
184 | #define HD64461_PCCCSCIER_BWE 0x02 /* battery warn change enable */ | ||
185 | #define HD64461_PCCCSCIER_BDE 0x01 /* battery dead change enable*/ | ||
186 | |||
187 | /* PCC Software Control Register */ | ||
188 | #define HD64461_PCCSCR_VCC1 0x02 /* voltage control pin 1 */ | ||
189 | #define HD64461_PCCSCR_SWP 0x01 /* write protect */ | ||
190 | |||
191 | /* PCC0 Output Pins Control Register */ | ||
192 | #define HD64461_P0OCR (CONFIG_HD64461_IOBASE + 0x202a) | ||
193 | |||
194 | /* PCC1 Output Pins Control Register */ | ||
195 | #define HD64461_P1OCR (CONFIG_HD64461_IOBASE + 0x202c) | ||
196 | |||
197 | /* PC Card General Control Register */ | ||
198 | #define HD64461_PGCR (CONFIG_HD64461_IOBASE + 0x202e) | ||
199 | |||
200 | /* Port Control Registers */ | ||
201 | #define HD64461_GPACR (CONFIG_HD64461_IOBASE + 0x4000) /* Port A - Handles IRDA/TIMER */ | ||
202 | #define HD64461_GPBCR (CONFIG_HD64461_IOBASE + 0x4002) /* Port B - Handles UART */ | ||
203 | #define HD64461_GPCCR (CONFIG_HD64461_IOBASE + 0x4004) /* Port C - Handles PCMCIA 1 */ | ||
204 | #define HD64461_GPDCR (CONFIG_HD64461_IOBASE + 0x4006) /* Port D - Handles PCMCIA 1 */ | ||
205 | |||
206 | /* Port Control Data Registers */ | ||
207 | #define HD64461_GPADR (CONFIG_HD64461_IOBASE + 0x4010) /* A */ | ||
208 | #define HD64461_GPBDR (CONFIG_HD64461_IOBASE + 0x4012) /* B */ | ||
209 | #define HD64461_GPCDR (CONFIG_HD64461_IOBASE + 0x4014) /* C */ | ||
210 | #define HD64461_GPDDR (CONFIG_HD64461_IOBASE + 0x4016) /* D */ | ||
211 | |||
212 | /* Interrupt Control Registers */ | ||
213 | #define HD64461_GPAICR (CONFIG_HD64461_IOBASE + 0x4020) /* A */ | ||
214 | #define HD64461_GPBICR (CONFIG_HD64461_IOBASE + 0x4022) /* B */ | ||
215 | #define HD64461_GPCICR (CONFIG_HD64461_IOBASE + 0x4024) /* C */ | ||
216 | #define HD64461_GPDICR (CONFIG_HD64461_IOBASE + 0x4026) /* D */ | ||
217 | |||
218 | /* Interrupt Status Registers */ | ||
219 | #define HD64461_GPAISR (CONFIG_HD64461_IOBASE + 0x4040) /* A */ | ||
220 | #define HD64461_GPBISR (CONFIG_HD64461_IOBASE + 0x4042) /* B */ | ||
221 | #define HD64461_GPCISR (CONFIG_HD64461_IOBASE + 0x4044) /* C */ | ||
222 | #define HD64461_GPDISR (CONFIG_HD64461_IOBASE + 0x4046) /* D */ | ||
223 | |||
224 | /* Interrupt Request Register & Interrupt Mask Register */ | ||
225 | #define HD64461_NIRR (CONFIG_HD64461_IOBASE + 0x5000) | ||
226 | #define HD64461_NIMR (CONFIG_HD64461_IOBASE + 0x5002) | ||
227 | |||
228 | #define HD64461_IRQBASE OFFCHIP_IRQ_BASE | ||
229 | #define OFFCHIP_IRQ_BASE 64 | ||
230 | #define HD64461_IRQ_NUM 16 | ||
231 | |||
232 | #define HD64461_IRQ_UART (HD64461_IRQBASE+5) | ||
233 | #define HD64461_IRQ_IRDA (HD64461_IRQBASE+6) | ||
234 | #define HD64461_IRQ_TMU1 (HD64461_IRQBASE+9) | ||
235 | #define HD64461_IRQ_TMU0 (HD64461_IRQBASE+10) | ||
236 | #define HD64461_IRQ_GPIO (HD64461_IRQBASE+11) | ||
237 | #define HD64461_IRQ_AFE (HD64461_IRQBASE+12) | ||
238 | #define HD64461_IRQ_PCC1 (HD64461_IRQBASE+13) | ||
239 | #define HD64461_IRQ_PCC0 (HD64461_IRQBASE+14) | ||
240 | |||
241 | #define __IO_PREFIX hd64461 | ||
242 | #include <asm/io_generic.h> | ||
243 | |||
244 | /* arch/sh/cchips/hd6446x/hd64461/setup.c */ | ||
245 | int hd64461_irq_demux(int irq); | ||
246 | void hd64461_register_irq_demux(int irq, | ||
247 | int (*demux) (int irq, void *dev), void *dev); | ||
248 | void hd64461_unregister_irq_demux(int irq); | ||
249 | |||
250 | #endif | ||
diff --git a/include/asm-sh/hd64465/gpio.h b/include/asm-sh/hd64465/gpio.h deleted file mode 100644 index a3cdca2713dd..000000000000 --- a/include/asm-sh/hd64465/gpio.h +++ /dev/null | |||
@@ -1,46 +0,0 @@ | |||
1 | #ifndef _ASM_SH_HD64465_GPIO_ | ||
2 | #define _ASM_SH_HD64465_GPIO_ 1 | ||
3 | /* | ||
4 | * $Id: gpio.h,v 1.3 2003/05/04 19:30:14 lethal Exp $ | ||
5 | * | ||
6 | * Hitachi HD64465 companion chip: General Purpose IO pins support. | ||
7 | * This layer enables other device drivers to configure GPIO | ||
8 | * pins, get and set their values, and register an interrupt | ||
9 | * routine for when input pins change in hardware. | ||
10 | * | ||
11 | * by Greg Banks <gbanks@pocketpenguins.com> | ||
12 | * (c) 2000 PocketPenguins Inc. | ||
13 | */ | ||
14 | #include <asm/hd64465.h> | ||
15 | |||
16 | /* Macro to construct a portpin number (used in all | ||
17 | * subsequent functions) from a port letter and a pin | ||
18 | * number, e.g. HD64465_GPIO_PORTPIN('A', 5). | ||
19 | */ | ||
20 | #define HD64465_GPIO_PORTPIN(port,pin) (((port)-'A')<<3|(pin)) | ||
21 | |||
22 | /* Pin configuration constants for _configure() */ | ||
23 | #define HD64465_GPIO_FUNCTION2 0 /* use the pin's *other* function */ | ||
24 | #define HD64465_GPIO_OUT 1 /* output */ | ||
25 | #define HD64465_GPIO_IN_PULLUP 2 /* input, pull-up MOS on */ | ||
26 | #define HD64465_GPIO_IN 3 /* input */ | ||
27 | |||
28 | /* Configure a pin's direction */ | ||
29 | extern void hd64465_gpio_configure(int portpin, int direction); | ||
30 | |||
31 | /* Get, set value */ | ||
32 | extern void hd64465_gpio_set_pin(int portpin, unsigned int value); | ||
33 | extern unsigned int hd64465_gpio_get_pin(int portpin); | ||
34 | extern void hd64465_gpio_set_port(int port, unsigned int value); | ||
35 | extern unsigned int hd64465_gpio_get_port(int port); | ||
36 | |||
37 | /* mode constants for _register_irq() */ | ||
38 | #define HD64465_GPIO_FALLING 0 | ||
39 | #define HD64465_GPIO_RISING 1 | ||
40 | |||
41 | /* Interrupt on external value change */ | ||
42 | extern void hd64465_gpio_register_irq(int portpin, int mode, | ||
43 | void (*handler)(int portpin, void *dev), void *dev); | ||
44 | extern void hd64465_gpio_unregister_irq(int portpin); | ||
45 | |||
46 | #endif /* _ASM_SH_HD64465_GPIO_ */ | ||
diff --git a/include/asm-sh/hd64465/hd64465.h b/include/asm-sh/hd64465/hd64465.h deleted file mode 100644 index cfd0e803d2a2..000000000000 --- a/include/asm-sh/hd64465/hd64465.h +++ /dev/null | |||
@@ -1,256 +0,0 @@ | |||
1 | #ifndef _ASM_SH_HD64465_ | ||
2 | #define _ASM_SH_HD64465_ 1 | ||
3 | /* | ||
4 | * $Id: hd64465.h,v 1.3 2003/05/04 19:30:15 lethal Exp $ | ||
5 | * | ||
6 | * Hitachi HD64465 companion chip support | ||
7 | * | ||
8 | * by Greg Banks <gbanks@pocketpenguins.com> | ||
9 | * (c) 2000 PocketPenguins Inc. | ||
10 | * | ||
11 | * Derived from <asm/hd64461.h> which bore the message: | ||
12 | * Copyright (C) 2000 YAEGASHI Takeshi | ||
13 | */ | ||
14 | #include <asm/io.h> | ||
15 | #include <asm/irq.h> | ||
16 | |||
17 | /* | ||
18 | * Note that registers are defined here as virtual port numbers, | ||
19 | * which have no meaning except to get translated by hd64465_isa_port2addr() | ||
20 | * to an address in the range 0xb0000000-0xb3ffffff. Note that | ||
21 | * this translation happens to consist of adding the lower 16 bits | ||
22 | * of the virtual port number to 0xb0000000. Note also that the manual | ||
23 | * shows addresses as absolute physical addresses starting at 0x10000000, | ||
24 | * so e.g. the NIRR register is listed as 0x15000 here, 0x10005000 in the | ||
25 | * manual, and accessed using address 0xb0005000 - Greg. | ||
26 | */ | ||
27 | |||
28 | /* System registers */ | ||
29 | #define HD64465_REG_SRR 0x1000c /* System Revision Register */ | ||
30 | #define HD64465_REG_SDID 0x10010 /* System Device ID Reg */ | ||
31 | #define HD64465_SDID 0x8122 /* 64465 device ID */ | ||
32 | |||
33 | /* Power Management registers */ | ||
34 | #define HD64465_REG_SMSCR 0x10000 /* System Module Standby Control Reg */ | ||
35 | #define HD64465_SMSCR_PS2ST 0x4000 /* PS/2 Standby */ | ||
36 | #define HD64465_SMSCR_ADCST 0x1000 /* ADC Standby */ | ||
37 | #define HD64465_SMSCR_UARTST 0x0800 /* UART Standby */ | ||
38 | #define HD64465_SMSCR_SCDIST 0x0200 /* Serial Codec Standby */ | ||
39 | #define HD64465_SMSCR_PPST 0x0100 /* Parallel Port Standby */ | ||
40 | #define HD64465_SMSCR_PC0ST 0x0040 /* PCMCIA0 Standby */ | ||
41 | #define HD64465_SMSCR_PC1ST 0x0020 /* PCMCIA1 Standby */ | ||
42 | #define HD64465_SMSCR_AFEST 0x0010 /* AFE Standby */ | ||
43 | #define HD64465_SMSCR_TM0ST 0x0008 /* Timer0 Standby */ | ||
44 | #define HD64465_SMSCR_TM1ST 0x0004 /* Timer1 Standby */ | ||
45 | #define HD64465_SMSCR_IRDAST 0x0002 /* IRDA Standby */ | ||
46 | #define HD64465_SMSCR_KBCST 0x0001 /* Keyboard Controller Standby */ | ||
47 | |||
48 | /* Interrupt Controller registers */ | ||
49 | #define HD64465_REG_NIRR 0x15000 /* Interrupt Request Register */ | ||
50 | #define HD64465_REG_NIMR 0x15002 /* Interrupt Mask Register */ | ||
51 | #define HD64465_REG_NITR 0x15004 /* Interrupt Trigger Mode Register */ | ||
52 | |||
53 | /* Timer registers */ | ||
54 | #define HD64465_REG_TCVR1 0x16000 /* Timer 1 constant value register */ | ||
55 | #define HD64465_REG_TCVR0 0x16002 /* Timer 0 constant value register */ | ||
56 | #define HD64465_REG_TRVR1 0x16004 /* Timer 1 read value register */ | ||
57 | #define HD64465_REG_TRVR0 0x16006 /* Timer 0 read value register */ | ||
58 | #define HD64465_REG_TCR1 0x16008 /* Timer 1 control register */ | ||
59 | #define HD64465_REG_TCR0 0x1600A /* Timer 0 control register */ | ||
60 | #define HD64465_TCR_EADT 0x10 /* Enable ADTRIG# signal */ | ||
61 | #define HD64465_TCR_ETMO 0x08 /* Enable TMO signal */ | ||
62 | #define HD64465_TCR_PST_MASK 0x06 /* Clock Prescale */ | ||
63 | #define HD64465_TCR_PST_1 0x06 /* 1:1 */ | ||
64 | #define HD64465_TCR_PST_4 0x04 /* 1:4 */ | ||
65 | #define HD64465_TCR_PST_8 0x02 /* 1:8 */ | ||
66 | #define HD64465_TCR_PST_16 0x00 /* 1:16 */ | ||
67 | #define HD64465_TCR_TSTP 0x01 /* Start/Stop timer */ | ||
68 | #define HD64465_REG_TIRR 0x1600C /* Timer interrupt request register */ | ||
69 | #define HD64465_REG_TIDR 0x1600E /* Timer interrupt disable register */ | ||
70 | #define HD64465_REG_PWM1CS 0x16010 /* PWM 1 clock scale register */ | ||
71 | #define HD64465_REG_PWM1LPC 0x16012 /* PWM 1 low pulse width counter register */ | ||
72 | #define HD64465_REG_PWM1HPC 0x16014 /* PWM 1 high pulse width counter register */ | ||
73 | #define HD64465_REG_PWM0CS 0x16018 /* PWM 0 clock scale register */ | ||
74 | #define HD64465_REG_PWM0LPC 0x1601A /* PWM 0 low pulse width counter register */ | ||
75 | #define HD64465_REG_PWM0HPC 0x1601C /* PWM 0 high pulse width counter register */ | ||
76 | |||
77 | /* Analog/Digital Converter registers */ | ||
78 | #define HD64465_REG_ADDRA 0x1E000 /* A/D data register A */ | ||
79 | #define HD64465_REG_ADDRB 0x1E002 /* A/D data register B */ | ||
80 | #define HD64465_REG_ADDRC 0x1E004 /* A/D data register C */ | ||
81 | #define HD64465_REG_ADDRD 0x1E006 /* A/D data register D */ | ||
82 | #define HD64465_REG_ADCSR 0x1E008 /* A/D control/status register */ | ||
83 | #define HD64465_ADCSR_ADF 0x80 /* A/D End Flag */ | ||
84 | #define HD64465_ADCSR_ADST 0x40 /* A/D Start Flag */ | ||
85 | #define HD64465_ADCSR_ADIS 0x20 /* A/D Interrupt Status */ | ||
86 | #define HD64465_ADCSR_TRGE 0x10 /* A/D Trigger Enable */ | ||
87 | #define HD64465_ADCSR_ADIE 0x08 /* A/D Interrupt Enable */ | ||
88 | #define HD64465_ADCSR_SCAN 0x04 /* A/D Scan Mode */ | ||
89 | #define HD64465_ADCSR_CH_MASK 0x03 /* A/D Channel */ | ||
90 | #define HD64465_REG_ADCALCR 0x1E00A /* A/D calibration sample control */ | ||
91 | #define HD64465_REG_ADCAL 0x1E00C /* A/D calibration data register */ | ||
92 | |||
93 | |||
94 | /* General Purpose I/O ports registers */ | ||
95 | #define HD64465_REG_GPACR 0x14000 /* Port A Control Register */ | ||
96 | #define HD64465_REG_GPBCR 0x14002 /* Port B Control Register */ | ||
97 | #define HD64465_REG_GPCCR 0x14004 /* Port C Control Register */ | ||
98 | #define HD64465_REG_GPDCR 0x14006 /* Port D Control Register */ | ||
99 | #define HD64465_REG_GPECR 0x14008 /* Port E Control Register */ | ||
100 | #define HD64465_REG_GPADR 0x14010 /* Port A Data Register */ | ||
101 | #define HD64465_REG_GPBDR 0x14012 /* Port B Data Register */ | ||
102 | #define HD64465_REG_GPCDR 0x14014 /* Port C Data Register */ | ||
103 | #define HD64465_REG_GPDDR 0x14016 /* Port D Data Register */ | ||
104 | #define HD64465_REG_GPEDR 0x14018 /* Port E Data Register */ | ||
105 | #define HD64465_REG_GPAICR 0x14020 /* Port A Interrupt Control Register */ | ||
106 | #define HD64465_REG_GPBICR 0x14022 /* Port B Interrupt Control Register */ | ||
107 | #define HD64465_REG_GPCICR 0x14024 /* Port C Interrupt Control Register */ | ||
108 | #define HD64465_REG_GPDICR 0x14026 /* Port D Interrupt Control Register */ | ||
109 | #define HD64465_REG_GPEICR 0x14028 /* Port E Interrupt Control Register */ | ||
110 | #define HD64465_REG_GPAISR 0x14040 /* Port A Interrupt Status Register */ | ||
111 | #define HD64465_REG_GPBISR 0x14042 /* Port B Interrupt Status Register */ | ||
112 | #define HD64465_REG_GPCISR 0x14044 /* Port C Interrupt Status Register */ | ||
113 | #define HD64465_REG_GPDISR 0x14046 /* Port D Interrupt Status Register */ | ||
114 | #define HD64465_REG_GPEISR 0x14048 /* Port E Interrupt Status Register */ | ||
115 | |||
116 | /* PCMCIA bridge interface */ | ||
117 | #define HD64465_REG_PCC0ISR 0x12000 /* socket 0 interface status */ | ||
118 | #define HD64465_PCCISR_PREADY 0x80 /* mem card ready / io card IREQ */ | ||
119 | #define HD64465_PCCISR_PIREQ 0x80 | ||
120 | #define HD64465_PCCISR_PMWP 0x40 /* mem card write-protected */ | ||
121 | #define HD64465_PCCISR_PVS2 0x20 /* voltage select pin 2 */ | ||
122 | #define HD64465_PCCISR_PVS1 0x10 /* voltage select pin 1 */ | ||
123 | #define HD64465_PCCISR_PCD_MASK 0x0c /* card detect */ | ||
124 | #define HD64465_PCCISR_PBVD_MASK 0x03 /* battery voltage */ | ||
125 | #define HD64465_PCCISR_PBVD_BATGOOD 0x03 /* battery good */ | ||
126 | #define HD64465_PCCISR_PBVD_BATWARN 0x01 /* battery low warning */ | ||
127 | #define HD64465_PCCISR_PBVD_BATDEAD1 0x02 /* battery dead */ | ||
128 | #define HD64465_PCCISR_PBVD_BATDEAD2 0x00 /* battery dead */ | ||
129 | #define HD64465_REG_PCC0GCR 0x12002 /* socket 0 general control */ | ||
130 | #define HD64465_PCCGCR_PDRV 0x80 /* output drive */ | ||
131 | #define HD64465_PCCGCR_PCCR 0x40 /* PC card reset */ | ||
132 | #define HD64465_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */ | ||
133 | #define HD64465_PCCGCR_PVCC0 0x10 /* voltage control pin VCC0SEL0 */ | ||
134 | #define HD64465_PCCGCR_PMMOD 0x08 /* memory mode */ | ||
135 | #define HD64465_PCCGCR_PPA25 0x04 /* pin A25 */ | ||
136 | #define HD64465_PCCGCR_PPA24 0x02 /* pin A24 */ | ||
137 | #define HD64465_PCCGCR_PREG 0x01 /* ping PCC0REG# */ | ||
138 | #define HD64465_REG_PCC0CSCR 0x12004 /* socket 0 card status change */ | ||
139 | #define HD64465_PCCCSCR_PSCDI 0x80 /* sw card detect intr */ | ||
140 | #define HD64465_PCCCSCR_PSWSEL 0x40 /* power select */ | ||
141 | #define HD64465_PCCCSCR_PIREQ 0x20 /* IREQ intr req */ | ||
142 | #define HD64465_PCCCSCR_PSC 0x10 /* STSCHG (status change) pin */ | ||
143 | #define HD64465_PCCCSCR_PCDC 0x08 /* CD (card detect) change */ | ||
144 | #define HD64465_PCCCSCR_PRC 0x04 /* ready change */ | ||
145 | #define HD64465_PCCCSCR_PBW 0x02 /* battery warning change */ | ||
146 | #define HD64465_PCCCSCR_PBD 0x01 /* battery dead change */ | ||
147 | #define HD64465_REG_PCC0CSCIER 0x12006 /* socket 0 card status change interrupt enable */ | ||
148 | #define HD64465_PCCCSCIER_PCRE 0x80 /* change reset enable */ | ||
149 | #define HD64465_PCCCSCIER_PIREQE_MASK 0x60 /* IREQ enable */ | ||
150 | #define HD64465_PCCCSCIER_PIREQE_DISABLED 0x00 /* IREQ disabled */ | ||
151 | #define HD64465_PCCCSCIER_PIREQE_LEVEL 0x20 /* IREQ level-triggered */ | ||
152 | #define HD64465_PCCCSCIER_PIREQE_FALLING 0x40 /* IREQ falling-edge-trig */ | ||
153 | #define HD64465_PCCCSCIER_PIREQE_RISING 0x60 /* IREQ rising-edge-trig */ | ||
154 | #define HD64465_PCCCSCIER_PSCE 0x10 /* status change enable */ | ||
155 | #define HD64465_PCCCSCIER_PCDE 0x08 /* card detect change enable */ | ||
156 | #define HD64465_PCCCSCIER_PRE 0x04 /* ready change enable */ | ||
157 | #define HD64465_PCCCSCIER_PBWE 0x02 /* battery warn change enable */ | ||
158 | #define HD64465_PCCCSCIER_PBDE 0x01 /* battery dead change enable*/ | ||
159 | #define HD64465_REG_PCC0SCR 0x12008 /* socket 0 software control */ | ||
160 | #define HD64465_PCCSCR_SHDN 0x10 /* TPS2206 SHutDowN pin */ | ||
161 | #define HD64465_PCCSCR_SWP 0x01 /* write protect */ | ||
162 | #define HD64465_REG_PCCPSR 0x1200A /* serial power switch control */ | ||
163 | #define HD64465_REG_PCC1ISR 0x12010 /* socket 1 interface status */ | ||
164 | #define HD64465_REG_PCC1GCR 0x12012 /* socket 1 general control */ | ||
165 | #define HD64465_REG_PCC1CSCR 0x12014 /* socket 1 card status change */ | ||
166 | #define HD64465_REG_PCC1CSCIER 0x12016 /* socket 1 card status change interrupt enable */ | ||
167 | #define HD64465_REG_PCC1SCR 0x12018 /* socket 1 software control */ | ||
168 | |||
169 | |||
170 | /* PS/2 Keyboard and mouse controller -- *not* register compatible */ | ||
171 | #define HD64465_REG_KBCSR 0x1dc00 /* Keyboard Control/Status reg */ | ||
172 | #define HD64465_KBCSR_KBCIE 0x8000 /* KBCK Input Enable */ | ||
173 | #define HD64465_KBCSR_KBCOE 0x4000 /* KBCK Output Enable */ | ||
174 | #define HD64465_KBCSR_KBDOE 0x2000 /* KB DATA Output Enable */ | ||
175 | #define HD64465_KBCSR_KBCD 0x1000 /* KBCK Driven */ | ||
176 | #define HD64465_KBCSR_KBDD 0x0800 /* KB DATA Driven */ | ||
177 | #define HD64465_KBCSR_KBCS 0x0400 /* KBCK pin Status */ | ||
178 | #define HD64465_KBCSR_KBDS 0x0200 /* KB DATA pin Status */ | ||
179 | #define HD64465_KBCSR_KBDP 0x0100 /* KB DATA Parity bit */ | ||
180 | #define HD64465_KBCSR_KBD_MASK 0x00ff /* KD DATA shift reg */ | ||
181 | #define HD64465_REG_KBISR 0x1dc04 /* Keyboard Interrupt Status reg */ | ||
182 | #define HD64465_KBISR_KBRDF 0x0001 /* KB Received Data Full */ | ||
183 | #define HD64465_REG_MSCSR 0x1dc10 /* Mouse Control/Status reg */ | ||
184 | #define HD64465_REG_MSISR 0x1dc14 /* Mouse Interrupt Status reg */ | ||
185 | |||
186 | |||
187 | /* | ||
188 | * Logical address at which the HD64465 is mapped. Note that this | ||
189 | * should always be in the P2 segment (uncached and untranslated). | ||
190 | */ | ||
191 | #ifndef CONFIG_HD64465_IOBASE | ||
192 | #define CONFIG_HD64465_IOBASE 0xb0000000 | ||
193 | #endif | ||
194 | /* | ||
195 | * The HD64465 multiplexes all its modules' interrupts onto | ||
196 | * this single interrupt. | ||
197 | */ | ||
198 | #ifndef CONFIG_HD64465_IRQ | ||
199 | #define CONFIG_HD64465_IRQ 5 | ||
200 | #endif | ||
201 | |||
202 | |||
203 | #define _HD64465_IO_MASK 0xf8000000 | ||
204 | #define is_hd64465_addr(addr) \ | ||
205 | ((addr & _HD64465_IO_MASK) == (CONFIG_HD64465_IOBASE & _HD64465_IO_MASK)) | ||
206 | |||
207 | /* | ||
208 | * A range of 16 virtual interrupts generated by | ||
209 | * demuxing the HD64465 muxed interrupt. | ||
210 | */ | ||
211 | #define HD64465_IRQ_BASE OFFCHIP_IRQ_BASE | ||
212 | #define HD64465_IRQ_NUM 16 | ||
213 | #define HD64465_IRQ_ADC (HD64465_IRQ_BASE+0) | ||
214 | #define HD64465_IRQ_USB (HD64465_IRQ_BASE+1) | ||
215 | #define HD64465_IRQ_SCDI (HD64465_IRQ_BASE+2) | ||
216 | #define HD64465_IRQ_PARALLEL (HD64465_IRQ_BASE+3) | ||
217 | /* bit 4 is reserved */ | ||
218 | #define HD64465_IRQ_UART (HD64465_IRQ_BASE+5) | ||
219 | #define HD64465_IRQ_IRDA (HD64465_IRQ_BASE+6) | ||
220 | #define HD64465_IRQ_PS2MOUSE (HD64465_IRQ_BASE+7) | ||
221 | #define HD64465_IRQ_KBC (HD64465_IRQ_BASE+8) | ||
222 | #define HD64465_IRQ_TIMER1 (HD64465_IRQ_BASE+9) | ||
223 | #define HD64465_IRQ_TIMER0 (HD64465_IRQ_BASE+10) | ||
224 | #define HD64465_IRQ_GPIO (HD64465_IRQ_BASE+11) | ||
225 | #define HD64465_IRQ_AFE (HD64465_IRQ_BASE+12) | ||
226 | #define HD64465_IRQ_PCMCIA1 (HD64465_IRQ_BASE+13) | ||
227 | #define HD64465_IRQ_PCMCIA0 (HD64465_IRQ_BASE+14) | ||
228 | #define HD64465_IRQ_PS2KBD (HD64465_IRQ_BASE+15) | ||
229 | |||
230 | /* Constants for PCMCIA mappings */ | ||
231 | #define HD64465_PCC_WINDOW 0x01000000 | ||
232 | |||
233 | #define HD64465_PCC0_BASE 0xb8000000 /* area 6 */ | ||
234 | #define HD64465_PCC0_ATTR (HD64465_PCC0_BASE) | ||
235 | #define HD64465_PCC0_COMM (HD64465_PCC0_BASE+HD64465_PCC_WINDOW) | ||
236 | #define HD64465_PCC0_IO (HD64465_PCC0_BASE+2*HD64465_PCC_WINDOW) | ||
237 | |||
238 | #define HD64465_PCC1_BASE 0xb4000000 /* area 5 */ | ||
239 | #define HD64465_PCC1_ATTR (HD64465_PCC1_BASE) | ||
240 | #define HD64465_PCC1_COMM (HD64465_PCC1_BASE+HD64465_PCC_WINDOW) | ||
241 | #define HD64465_PCC1_IO (HD64465_PCC1_BASE+2*HD64465_PCC_WINDOW) | ||
242 | |||
243 | /* | ||
244 | * Base of USB controller interface (as memory) | ||
245 | */ | ||
246 | #define HD64465_USB_BASE (CONFIG_HD64465_IOBASE+0xb000) | ||
247 | #define HD64465_USB_LEN 0x1000 | ||
248 | /* | ||
249 | * Base of embedded SRAM, used for USB controller. | ||
250 | */ | ||
251 | #define HD64465_SRAM_BASE (CONFIG_HD64465_IOBASE+0x9000) | ||
252 | #define HD64465_SRAM_LEN 0x1000 | ||
253 | |||
254 | |||
255 | |||
256 | #endif /* _ASM_SH_HD64465_ */ | ||
diff --git a/include/asm-sh/hd64465/io.h b/include/asm-sh/hd64465/io.h deleted file mode 100644 index 139f1472e5bb..000000000000 --- a/include/asm-sh/hd64465/io.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/hd64465/io.h | ||
3 | * | ||
4 | * By Greg Banks <gbanks@pocketpenguins.com> | ||
5 | * (c) 2000 PocketPenguins Inc. | ||
6 | * | ||
7 | * Derived from io_hd64461.h, which bore the message: | ||
8 | * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) | ||
9 | * | ||
10 | * May be copied or modified under the terms of the GNU General Public | ||
11 | * License. See linux/COPYING for more information. | ||
12 | * | ||
13 | * IO functions for an HD64465 "Windows CE Intelligent Peripheral Controller". | ||
14 | */ | ||
15 | |||
16 | #ifndef _ASM_SH_IO_HD64465_H | ||
17 | #define _ASM_SH_IO_HD64465_H | ||
18 | |||
19 | extern unsigned char hd64465_inb(unsigned long port); | ||
20 | extern unsigned short hd64465_inw(unsigned long port); | ||
21 | extern unsigned int hd64465_inl(unsigned long port); | ||
22 | |||
23 | extern void hd64465_outb(unsigned char value, unsigned long port); | ||
24 | extern void hd64465_outw(unsigned short value, unsigned long port); | ||
25 | extern void hd64465_outl(unsigned int value, unsigned long port); | ||
26 | |||
27 | extern unsigned char hd64465_inb_p(unsigned long port); | ||
28 | extern void hd64465_outb_p(unsigned char value, unsigned long port); | ||
29 | |||
30 | extern unsigned long hd64465_isa_port2addr(unsigned long offset); | ||
31 | extern int hd64465_irq_demux(int irq); | ||
32 | /* Provision for generic secondary demux step -- used by PCMCIA code */ | ||
33 | extern void hd64465_register_irq_demux(int irq, | ||
34 | int (*demux)(int irq, void *dev), void *dev); | ||
35 | extern void hd64465_unregister_irq_demux(int irq); | ||
36 | /* Set this variable to 1 to see port traffic */ | ||
37 | extern int hd64465_io_debug; | ||
38 | /* Map a range of ports to a range of kernel virtual memory. | ||
39 | */ | ||
40 | extern void hd64465_port_map(unsigned short baseport, unsigned int nports, | ||
41 | unsigned long addr, unsigned char shift); | ||
42 | extern void hd64465_port_unmap(unsigned short baseport, unsigned int nports); | ||
43 | |||
44 | #endif /* _ASM_SH_IO_HD64465_H */ | ||
diff --git a/include/asm-sh/heartbeat.h b/include/asm-sh/heartbeat.h deleted file mode 100644 index 724a43ed245e..000000000000 --- a/include/asm-sh/heartbeat.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | #ifndef __ASM_SH_HEARTBEAT_H | ||
2 | #define __ASM_SH_HEARTBEAT_H | ||
3 | |||
4 | #include <linux/timer.h> | ||
5 | |||
6 | #define HEARTBEAT_INVERTED (1 << 0) | ||
7 | |||
8 | struct heartbeat_data { | ||
9 | void __iomem *base; | ||
10 | unsigned char *bit_pos; | ||
11 | unsigned int nr_bits; | ||
12 | struct timer_list timer; | ||
13 | unsigned int regsize; | ||
14 | unsigned long flags; | ||
15 | }; | ||
16 | |||
17 | #endif /* __ASM_SH_HEARTBEAT_H */ | ||
diff --git a/include/asm-sh/hp6xx.h b/include/asm-sh/hp6xx.h deleted file mode 100644 index 0d4165a32dcd..000000000000 --- a/include/asm-sh/hp6xx.h +++ /dev/null | |||
@@ -1,58 +0,0 @@ | |||
1 | #ifndef __ASM_SH_HP6XX_H | ||
2 | #define __ASM_SH_HP6XX_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 2003, 2004, 2005 Andriy Skulysh | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #define HP680_BTN_IRQ 32 /* IRQ0_IRQ */ | ||
14 | #define HP680_TS_IRQ 35 /* IRQ3_IRQ */ | ||
15 | #define HP680_HD64461_IRQ 36 /* IRQ4_IRQ */ | ||
16 | |||
17 | #define DAC_LCD_BRIGHTNESS 0 | ||
18 | #define DAC_SPEAKER_VOLUME 1 | ||
19 | |||
20 | #define PGDR_OPENED 0x01 | ||
21 | #define PGDR_MAIN_BATTERY_OUT 0x04 | ||
22 | #define PGDR_PLAY_BUTTON 0x08 | ||
23 | #define PGDR_REWIND_BUTTON 0x10 | ||
24 | #define PGDR_RECORD_BUTTON 0x20 | ||
25 | |||
26 | #define PHDR_TS_PEN_DOWN 0x08 | ||
27 | |||
28 | #define PJDR_LED_BLINK 0x02 | ||
29 | |||
30 | #define PKDR_LED_GREEN 0x10 | ||
31 | |||
32 | #define SCPDR_TS_SCAN_ENABLE 0x20 | ||
33 | #define SCPDR_TS_SCAN_Y 0x02 | ||
34 | #define SCPDR_TS_SCAN_X 0x01 | ||
35 | |||
36 | #define SCPCR_TS_ENABLE 0x405 | ||
37 | #define SCPCR_TS_MASK 0xc0f | ||
38 | |||
39 | #define ADC_CHANNEL_TS_Y 1 | ||
40 | #define ADC_CHANNEL_TS_X 2 | ||
41 | #define ADC_CHANNEL_BATTERY 3 | ||
42 | #define ADC_CHANNEL_BACKUP 4 | ||
43 | #define ADC_CHANNEL_CHARGE 5 | ||
44 | |||
45 | #define HD64461_GPADR_SPEAKER 0x01 | ||
46 | #define HD64461_GPADR_PCMCIA0 (0x02|0x08) | ||
47 | |||
48 | #define HD64461_GPBDR_LCDOFF 0x01 | ||
49 | #define HD64461_GPBDR_LCD_CONTRAST_MASK 0x78 | ||
50 | #define HD64461_GPBDR_LED_RED 0x80 | ||
51 | |||
52 | #include <asm/hd64461.h> | ||
53 | #include <asm/io.h> | ||
54 | |||
55 | #define PJDR 0xa4000130 | ||
56 | #define PKDR 0xa4000132 | ||
57 | |||
58 | #endif /* __ASM_SH_HP6XX_H */ | ||
diff --git a/include/asm-sh/hugetlb.h b/include/asm-sh/hugetlb.h deleted file mode 100644 index 967068fb79ac..000000000000 --- a/include/asm-sh/hugetlb.h +++ /dev/null | |||
@@ -1,92 +0,0 @@ | |||
1 | #ifndef _ASM_SH_HUGETLB_H | ||
2 | #define _ASM_SH_HUGETLB_H | ||
3 | |||
4 | #include <asm/page.h> | ||
5 | |||
6 | |||
7 | static inline int is_hugepage_only_range(struct mm_struct *mm, | ||
8 | unsigned long addr, | ||
9 | unsigned long len) { | ||
10 | return 0; | ||
11 | } | ||
12 | |||
13 | /* | ||
14 | * If the arch doesn't supply something else, assume that hugepage | ||
15 | * size aligned regions are ok without further preparation. | ||
16 | */ | ||
17 | static inline int prepare_hugepage_range(struct file *file, | ||
18 | unsigned long addr, unsigned long len) | ||
19 | { | ||
20 | if (len & ~HPAGE_MASK) | ||
21 | return -EINVAL; | ||
22 | if (addr & ~HPAGE_MASK) | ||
23 | return -EINVAL; | ||
24 | return 0; | ||
25 | } | ||
26 | |||
27 | static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm) { | ||
28 | } | ||
29 | |||
30 | static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb, | ||
31 | unsigned long addr, unsigned long end, | ||
32 | unsigned long floor, | ||
33 | unsigned long ceiling) | ||
34 | { | ||
35 | free_pgd_range(tlb, addr, end, floor, ceiling); | ||
36 | } | ||
37 | |||
38 | static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, | ||
39 | pte_t *ptep, pte_t pte) | ||
40 | { | ||
41 | set_pte_at(mm, addr, ptep, pte); | ||
42 | } | ||
43 | |||
44 | static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, | ||
45 | unsigned long addr, pte_t *ptep) | ||
46 | { | ||
47 | return ptep_get_and_clear(mm, addr, ptep); | ||
48 | } | ||
49 | |||
50 | static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, | ||
51 | unsigned long addr, pte_t *ptep) | ||
52 | { | ||
53 | } | ||
54 | |||
55 | static inline int huge_pte_none(pte_t pte) | ||
56 | { | ||
57 | return pte_none(pte); | ||
58 | } | ||
59 | |||
60 | static inline pte_t huge_pte_wrprotect(pte_t pte) | ||
61 | { | ||
62 | return pte_wrprotect(pte); | ||
63 | } | ||
64 | |||
65 | static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, | ||
66 | unsigned long addr, pte_t *ptep) | ||
67 | { | ||
68 | ptep_set_wrprotect(mm, addr, ptep); | ||
69 | } | ||
70 | |||
71 | static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma, | ||
72 | unsigned long addr, pte_t *ptep, | ||
73 | pte_t pte, int dirty) | ||
74 | { | ||
75 | return ptep_set_access_flags(vma, addr, ptep, pte, dirty); | ||
76 | } | ||
77 | |||
78 | static inline pte_t huge_ptep_get(pte_t *ptep) | ||
79 | { | ||
80 | return *ptep; | ||
81 | } | ||
82 | |||
83 | static inline int arch_prepare_hugepage(struct page *page) | ||
84 | { | ||
85 | return 0; | ||
86 | } | ||
87 | |||
88 | static inline void arch_release_hugepage(struct page *page) | ||
89 | { | ||
90 | } | ||
91 | |||
92 | #endif /* _ASM_SH_HUGETLB_H */ | ||
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h deleted file mode 100644 index d557b00111bf..000000000000 --- a/include/asm-sh/hw_irq.h +++ /dev/null | |||
@@ -1,123 +0,0 @@ | |||
1 | #ifndef __ASM_SH_HW_IRQ_H | ||
2 | #define __ASM_SH_HW_IRQ_H | ||
3 | |||
4 | #include <linux/init.h> | ||
5 | #include <asm/atomic.h> | ||
6 | |||
7 | extern atomic_t irq_err_count; | ||
8 | |||
9 | struct ipr_data { | ||
10 | unsigned char irq; | ||
11 | unsigned char ipr_idx; /* Index for the IPR registered */ | ||
12 | unsigned char shift; /* Number of bits to shift the data */ | ||
13 | unsigned char priority; /* The priority */ | ||
14 | }; | ||
15 | |||
16 | struct ipr_desc { | ||
17 | unsigned long *ipr_offsets; | ||
18 | unsigned int nr_offsets; | ||
19 | struct ipr_data *ipr_data; | ||
20 | unsigned int nr_irqs; | ||
21 | struct irq_chip chip; | ||
22 | }; | ||
23 | |||
24 | void register_ipr_controller(struct ipr_desc *); | ||
25 | |||
26 | typedef unsigned char intc_enum; | ||
27 | |||
28 | struct intc_vect { | ||
29 | intc_enum enum_id; | ||
30 | unsigned short vect; | ||
31 | }; | ||
32 | |||
33 | #define INTC_VECT(enum_id, vect) { enum_id, vect } | ||
34 | #define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq)) | ||
35 | |||
36 | struct intc_group { | ||
37 | intc_enum enum_id; | ||
38 | intc_enum enum_ids[32]; | ||
39 | }; | ||
40 | |||
41 | #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } } | ||
42 | |||
43 | struct intc_mask_reg { | ||
44 | unsigned long set_reg, clr_reg, reg_width; | ||
45 | intc_enum enum_ids[32]; | ||
46 | #ifdef CONFIG_SMP | ||
47 | unsigned long smp; | ||
48 | #endif | ||
49 | }; | ||
50 | |||
51 | struct intc_prio_reg { | ||
52 | unsigned long set_reg, clr_reg, reg_width, field_width; | ||
53 | intc_enum enum_ids[16]; | ||
54 | #ifdef CONFIG_SMP | ||
55 | unsigned long smp; | ||
56 | #endif | ||
57 | }; | ||
58 | |||
59 | struct intc_sense_reg { | ||
60 | unsigned long reg, reg_width, field_width; | ||
61 | intc_enum enum_ids[16]; | ||
62 | }; | ||
63 | |||
64 | #ifdef CONFIG_SMP | ||
65 | #define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8) | ||
66 | #else | ||
67 | #define INTC_SMP(stride, nr) | ||
68 | #endif | ||
69 | |||
70 | struct intc_desc { | ||
71 | struct intc_vect *vectors; | ||
72 | unsigned int nr_vectors; | ||
73 | struct intc_group *groups; | ||
74 | unsigned int nr_groups; | ||
75 | struct intc_mask_reg *mask_regs; | ||
76 | unsigned int nr_mask_regs; | ||
77 | struct intc_prio_reg *prio_regs; | ||
78 | unsigned int nr_prio_regs; | ||
79 | struct intc_sense_reg *sense_regs; | ||
80 | unsigned int nr_sense_regs; | ||
81 | char *name; | ||
82 | #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) | ||
83 | struct intc_mask_reg *ack_regs; | ||
84 | unsigned int nr_ack_regs; | ||
85 | #endif | ||
86 | }; | ||
87 | |||
88 | #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) | ||
89 | #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \ | ||
90 | mask_regs, prio_regs, sense_regs) \ | ||
91 | struct intc_desc symbol __initdata = { \ | ||
92 | _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ | ||
93 | _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ | ||
94 | _INTC_ARRAY(sense_regs), \ | ||
95 | chipname, \ | ||
96 | } | ||
97 | |||
98 | #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) | ||
99 | #define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \ | ||
100 | mask_regs, prio_regs, sense_regs, ack_regs) \ | ||
101 | struct intc_desc symbol __initdata = { \ | ||
102 | _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ | ||
103 | _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ | ||
104 | _INTC_ARRAY(sense_regs), \ | ||
105 | chipname, \ | ||
106 | _INTC_ARRAY(ack_regs), \ | ||
107 | } | ||
108 | #endif | ||
109 | |||
110 | void __init register_intc_controller(struct intc_desc *desc); | ||
111 | int intc_set_priority(unsigned int irq, unsigned int prio); | ||
112 | |||
113 | void __init plat_irq_setup(void); | ||
114 | #ifdef CONFIG_CPU_SH3 | ||
115 | void __init plat_irq_setup_sh3(void); | ||
116 | #endif | ||
117 | |||
118 | enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210, | ||
119 | IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK, | ||
120 | IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 }; | ||
121 | void __init plat_irq_setup_pins(int mode); | ||
122 | |||
123 | #endif /* __ASM_SH_HW_IRQ_H */ | ||
diff --git a/include/asm-sh/i2c-sh7760.h b/include/asm-sh/i2c-sh7760.h deleted file mode 100644 index 24182116711f..000000000000 --- a/include/asm-sh/i2c-sh7760.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* | ||
2 | * MMIO/IRQ and platform data for SH7760 I2C channels | ||
3 | */ | ||
4 | |||
5 | #ifndef _I2C_SH7760_H_ | ||
6 | #define _I2C_SH7760_H_ | ||
7 | |||
8 | #define SH7760_I2C_DEVNAME "sh7760-i2c" | ||
9 | |||
10 | #define SH7760_I2C0_MMIO 0xFE140000 | ||
11 | #define SH7760_I2C0_MMIOEND 0xFE14003B | ||
12 | #define SH7760_I2C0_IRQ 62 | ||
13 | |||
14 | #define SH7760_I2C1_MMIO 0xFE150000 | ||
15 | #define SH7760_I2C1_MMIOEND 0xFE15003B | ||
16 | #define SH7760_I2C1_IRQ 63 | ||
17 | |||
18 | struct sh7760_i2c_platdata { | ||
19 | unsigned int speed_khz; | ||
20 | }; | ||
21 | |||
22 | #endif | ||
diff --git a/include/asm-sh/ilsel.h b/include/asm-sh/ilsel.h deleted file mode 100644 index e3d304b280f6..000000000000 --- a/include/asm-sh/ilsel.h +++ /dev/null | |||
@@ -1,45 +0,0 @@ | |||
1 | #ifndef __ASM_SH_ILSEL_H | ||
2 | #define __ASM_SH_ILSEL_H | ||
3 | |||
4 | typedef enum { | ||
5 | ILSEL_NONE, | ||
6 | ILSEL_LAN, | ||
7 | ILSEL_USBH_I, | ||
8 | ILSEL_USBH_S, | ||
9 | ILSEL_USBH_V, | ||
10 | ILSEL_RTC, | ||
11 | ILSEL_USBP_I, | ||
12 | ILSEL_USBP_S, | ||
13 | ILSEL_USBP_V, | ||
14 | ILSEL_KEY, | ||
15 | |||
16 | /* | ||
17 | * ILSEL Aliases - corner cases for interleaved level tables. | ||
18 | * | ||
19 | * Someone thought this was a good idea and less hassle than | ||
20 | * demuxing a shared vector, really. | ||
21 | */ | ||
22 | |||
23 | /* ILSEL0 and 2 */ | ||
24 | ILSEL_FPGA0, | ||
25 | ILSEL_FPGA1, | ||
26 | ILSEL_EX1, | ||
27 | ILSEL_EX2, | ||
28 | ILSEL_EX3, | ||
29 | ILSEL_EX4, | ||
30 | |||
31 | /* ILSEL1 and 3 */ | ||
32 | ILSEL_FPGA2 = ILSEL_FPGA0, | ||
33 | ILSEL_FPGA3 = ILSEL_FPGA1, | ||
34 | ILSEL_EX5 = ILSEL_EX1, | ||
35 | ILSEL_EX6 = ILSEL_EX2, | ||
36 | ILSEL_EX7 = ILSEL_EX3, | ||
37 | ILSEL_EX8 = ILSEL_EX4, | ||
38 | } ilsel_source_t; | ||
39 | |||
40 | /* arch/sh/boards/renesas/x3proto/ilsel.c */ | ||
41 | int ilsel_enable(ilsel_source_t set); | ||
42 | int ilsel_enable_fixed(ilsel_source_t set, unsigned int level); | ||
43 | void ilsel_disable(unsigned int irq); | ||
44 | |||
45 | #endif /* __ASM_SH_ILSEL_H */ | ||
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h deleted file mode 100644 index a4fbf0c84fb1..000000000000 --- a/include/asm-sh/io.h +++ /dev/null | |||
@@ -1,366 +0,0 @@ | |||
1 | #ifndef __ASM_SH_IO_H | ||
2 | #define __ASM_SH_IO_H | ||
3 | |||
4 | /* | ||
5 | * Convention: | ||
6 | * read{b,w,l}/write{b,w,l} are for PCI, | ||
7 | * while in{b,w,l}/out{b,w,l} are for ISA | ||
8 | * These may (will) be platform specific function. | ||
9 | * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p | ||
10 | * and 'string' versions: ins{b,w,l}/outs{b,w,l} | ||
11 | * For read{b,w,l} and write{b,w,l} there are also __raw versions, which | ||
12 | * do not have a memory barrier after them. | ||
13 | * | ||
14 | * In addition, we have | ||
15 | * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O. | ||
16 | * which are processor specific. | ||
17 | */ | ||
18 | |||
19 | /* | ||
20 | * We follow the Alpha convention here: | ||
21 | * __inb expands to an inline function call (which calls via the mv) | ||
22 | * _inb is a real function call (note ___raw fns are _ version of __raw) | ||
23 | * inb by default expands to _inb, but the machine specific code may | ||
24 | * define it to __inb if it chooses. | ||
25 | */ | ||
26 | #include <asm/cache.h> | ||
27 | #include <asm/system.h> | ||
28 | #include <asm/addrspace.h> | ||
29 | #include <asm/machvec.h> | ||
30 | #include <asm/pgtable.h> | ||
31 | #include <asm-generic/iomap.h> | ||
32 | |||
33 | #ifdef __KERNEL__ | ||
34 | |||
35 | /* | ||
36 | * Depending on which platform we are running on, we need different | ||
37 | * I/O functions. | ||
38 | */ | ||
39 | #define __IO_PREFIX generic | ||
40 | #include <asm/io_generic.h> | ||
41 | #include <asm/io_trapped.h> | ||
42 | |||
43 | #define maybebadio(port) \ | ||
44 | printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ | ||
45 | __FUNCTION__, __LINE__, (port), (u32)__builtin_return_address(0)) | ||
46 | |||
47 | /* | ||
48 | * Since boards are able to define their own set of I/O routines through | ||
49 | * their respective machine vector, we always wrap through the mv. | ||
50 | * | ||
51 | * Also, in the event that a board hasn't provided its own definition for | ||
52 | * a given routine, it will be wrapped to generic code at run-time. | ||
53 | */ | ||
54 | |||
55 | #define __inb(p) sh_mv.mv_inb((p)) | ||
56 | #define __inw(p) sh_mv.mv_inw((p)) | ||
57 | #define __inl(p) sh_mv.mv_inl((p)) | ||
58 | #define __outb(x,p) sh_mv.mv_outb((x),(p)) | ||
59 | #define __outw(x,p) sh_mv.mv_outw((x),(p)) | ||
60 | #define __outl(x,p) sh_mv.mv_outl((x),(p)) | ||
61 | |||
62 | #define __inb_p(p) sh_mv.mv_inb_p((p)) | ||
63 | #define __inw_p(p) sh_mv.mv_inw_p((p)) | ||
64 | #define __inl_p(p) sh_mv.mv_inl_p((p)) | ||
65 | #define __outb_p(x,p) sh_mv.mv_outb_p((x),(p)) | ||
66 | #define __outw_p(x,p) sh_mv.mv_outw_p((x),(p)) | ||
67 | #define __outl_p(x,p) sh_mv.mv_outl_p((x),(p)) | ||
68 | |||
69 | #define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c)) | ||
70 | #define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c)) | ||
71 | #define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c)) | ||
72 | #define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c)) | ||
73 | #define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) | ||
74 | #define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) | ||
75 | |||
76 | #define __readb(a) sh_mv.mv_readb((a)) | ||
77 | #define __readw(a) sh_mv.mv_readw((a)) | ||
78 | #define __readl(a) sh_mv.mv_readl((a)) | ||
79 | #define __writeb(v,a) sh_mv.mv_writeb((v),(a)) | ||
80 | #define __writew(v,a) sh_mv.mv_writew((v),(a)) | ||
81 | #define __writel(v,a) sh_mv.mv_writel((v),(a)) | ||
82 | |||
83 | #define inb __inb | ||
84 | #define inw __inw | ||
85 | #define inl __inl | ||
86 | #define outb __outb | ||
87 | #define outw __outw | ||
88 | #define outl __outl | ||
89 | |||
90 | #define inb_p __inb_p | ||
91 | #define inw_p __inw_p | ||
92 | #define inl_p __inl_p | ||
93 | #define outb_p __outb_p | ||
94 | #define outw_p __outw_p | ||
95 | #define outl_p __outl_p | ||
96 | |||
97 | #define insb __insb | ||
98 | #define insw __insw | ||
99 | #define insl __insl | ||
100 | #define outsb __outsb | ||
101 | #define outsw __outsw | ||
102 | #define outsl __outsl | ||
103 | |||
104 | #define __raw_readb(a) __readb((void __iomem *)(a)) | ||
105 | #define __raw_readw(a) __readw((void __iomem *)(a)) | ||
106 | #define __raw_readl(a) __readl((void __iomem *)(a)) | ||
107 | #define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a)) | ||
108 | #define __raw_writew(v, a) __writew(v, (void __iomem *)(a)) | ||
109 | #define __raw_writel(v, a) __writel(v, (void __iomem *)(a)) | ||
110 | |||
111 | void __raw_writesl(unsigned long addr, const void *data, int longlen); | ||
112 | void __raw_readsl(unsigned long addr, void *data, int longlen); | ||
113 | |||
114 | /* | ||
115 | * The platform header files may define some of these macros to use | ||
116 | * the inlined versions where appropriate. These macros may also be | ||
117 | * redefined by userlevel programs. | ||
118 | */ | ||
119 | #ifdef __readb | ||
120 | # define readb(a) ({ unsigned int r_ = __raw_readb(a); mb(); r_; }) | ||
121 | #endif | ||
122 | #ifdef __raw_readw | ||
123 | # define readw(a) ({ unsigned int r_ = __raw_readw(a); mb(); r_; }) | ||
124 | #endif | ||
125 | #ifdef __raw_readl | ||
126 | # define readl(a) ({ unsigned int r_ = __raw_readl(a); mb(); r_; }) | ||
127 | #endif | ||
128 | |||
129 | #ifdef __raw_writeb | ||
130 | # define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); }) | ||
131 | #endif | ||
132 | #ifdef __raw_writew | ||
133 | # define writew(v,a) ({ __raw_writew((v),(a)); mb(); }) | ||
134 | #endif | ||
135 | #ifdef __raw_writel | ||
136 | # define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) | ||
137 | #endif | ||
138 | |||
139 | #define __BUILD_MEMORY_STRING(bwlq, type) \ | ||
140 | \ | ||
141 | static inline void writes##bwlq(volatile void __iomem *mem, \ | ||
142 | const void *addr, unsigned int count) \ | ||
143 | { \ | ||
144 | const volatile type *__addr = addr; \ | ||
145 | \ | ||
146 | while (count--) { \ | ||
147 | __raw_write##bwlq(*__addr, mem); \ | ||
148 | __addr++; \ | ||
149 | } \ | ||
150 | } \ | ||
151 | \ | ||
152 | static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ | ||
153 | unsigned int count) \ | ||
154 | { \ | ||
155 | volatile type *__addr = addr; \ | ||
156 | \ | ||
157 | while (count--) { \ | ||
158 | *__addr = __raw_read##bwlq(mem); \ | ||
159 | __addr++; \ | ||
160 | } \ | ||
161 | } | ||
162 | |||
163 | __BUILD_MEMORY_STRING(b, u8) | ||
164 | __BUILD_MEMORY_STRING(w, u16) | ||
165 | #define writesl __raw_writesl | ||
166 | #define readsl __raw_readsl | ||
167 | |||
168 | #define readb_relaxed(a) readb(a) | ||
169 | #define readw_relaxed(a) readw(a) | ||
170 | #define readl_relaxed(a) readl(a) | ||
171 | |||
172 | /* Simple MMIO */ | ||
173 | #define ioread8(a) readb(a) | ||
174 | #define ioread16(a) readw(a) | ||
175 | #define ioread16be(a) be16_to_cpu(__raw_readw((a))) | ||
176 | #define ioread32(a) readl(a) | ||
177 | #define ioread32be(a) be32_to_cpu(__raw_readl((a))) | ||
178 | |||
179 | #define iowrite8(v,a) writeb((v),(a)) | ||
180 | #define iowrite16(v,a) writew((v),(a)) | ||
181 | #define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a)) | ||
182 | #define iowrite32(v,a) writel((v),(a)) | ||
183 | #define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a)) | ||
184 | |||
185 | #define ioread8_rep(a, d, c) readsb((a), (d), (c)) | ||
186 | #define ioread16_rep(a, d, c) readsw((a), (d), (c)) | ||
187 | #define ioread32_rep(a, d, c) readsl((a), (d), (c)) | ||
188 | |||
189 | #define iowrite8_rep(a, s, c) writesb((a), (s), (c)) | ||
190 | #define iowrite16_rep(a, s, c) writesw((a), (s), (c)) | ||
191 | #define iowrite32_rep(a, s, c) writesl((a), (s), (c)) | ||
192 | |||
193 | #define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */ | ||
194 | |||
195 | #define IO_SPACE_LIMIT 0xffffffff | ||
196 | |||
197 | /* | ||
198 | * This function provides a method for the generic case where a board-specific | ||
199 | * ioport_map simply needs to return the port + some arbitrary port base. | ||
200 | * | ||
201 | * We use this at board setup time to implicitly set the port base, and | ||
202 | * as a result, we can use the generic ioport_map. | ||
203 | */ | ||
204 | static inline void __set_io_port_base(unsigned long pbase) | ||
205 | { | ||
206 | extern unsigned long generic_io_base; | ||
207 | |||
208 | generic_io_base = pbase; | ||
209 | } | ||
210 | |||
211 | #define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) | ||
212 | |||
213 | /* We really want to try and get these to memcpy etc */ | ||
214 | extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long); | ||
215 | extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long); | ||
216 | extern void memset_io(volatile void __iomem *, int, unsigned long); | ||
217 | |||
218 | /* SuperH on-chip I/O functions */ | ||
219 | static inline unsigned char ctrl_inb(unsigned long addr) | ||
220 | { | ||
221 | return *(volatile unsigned char*)addr; | ||
222 | } | ||
223 | |||
224 | static inline unsigned short ctrl_inw(unsigned long addr) | ||
225 | { | ||
226 | return *(volatile unsigned short*)addr; | ||
227 | } | ||
228 | |||
229 | static inline unsigned int ctrl_inl(unsigned long addr) | ||
230 | { | ||
231 | return *(volatile unsigned long*)addr; | ||
232 | } | ||
233 | |||
234 | static inline unsigned long long ctrl_inq(unsigned long addr) | ||
235 | { | ||
236 | return *(volatile unsigned long long*)addr; | ||
237 | } | ||
238 | |||
239 | static inline void ctrl_outb(unsigned char b, unsigned long addr) | ||
240 | { | ||
241 | *(volatile unsigned char*)addr = b; | ||
242 | } | ||
243 | |||
244 | static inline void ctrl_outw(unsigned short b, unsigned long addr) | ||
245 | { | ||
246 | *(volatile unsigned short*)addr = b; | ||
247 | } | ||
248 | |||
249 | static inline void ctrl_outl(unsigned int b, unsigned long addr) | ||
250 | { | ||
251 | *(volatile unsigned long*)addr = b; | ||
252 | } | ||
253 | |||
254 | static inline void ctrl_outq(unsigned long long b, unsigned long addr) | ||
255 | { | ||
256 | *(volatile unsigned long long*)addr = b; | ||
257 | } | ||
258 | |||
259 | static inline void ctrl_delay(void) | ||
260 | { | ||
261 | #ifdef P2SEG | ||
262 | ctrl_inw(P2SEG); | ||
263 | #endif | ||
264 | } | ||
265 | |||
266 | /* Quad-word real-mode I/O, don't ask.. */ | ||
267 | unsigned long long peek_real_address_q(unsigned long long addr); | ||
268 | unsigned long long poke_real_address_q(unsigned long long addr, | ||
269 | unsigned long long val); | ||
270 | |||
271 | #if !defined(CONFIG_MMU) | ||
272 | #define virt_to_phys(address) ((unsigned long)(address)) | ||
273 | #define phys_to_virt(address) ((void *)(address)) | ||
274 | #else | ||
275 | #define virt_to_phys(address) (__pa(address)) | ||
276 | #define phys_to_virt(address) (__va(address)) | ||
277 | #endif | ||
278 | |||
279 | /* | ||
280 | * On 32-bit SH, we traditionally have the whole physical address space | ||
281 | * mapped at all times (as MIPS does), so "ioremap()" and "iounmap()" do | ||
282 | * not need to do anything but place the address in the proper segment. | ||
283 | * This is true for P1 and P2 addresses, as well as some P3 ones. | ||
284 | * However, most of the P3 addresses and newer cores using extended | ||
285 | * addressing need to map through page tables, so the ioremap() | ||
286 | * implementation becomes a bit more complicated. | ||
287 | * | ||
288 | * See arch/sh/mm/ioremap.c for additional notes on this. | ||
289 | * | ||
290 | * We cheat a bit and always return uncachable areas until we've fixed | ||
291 | * the drivers to handle caching properly. | ||
292 | * | ||
293 | * On the SH-5 the concept of segmentation in the 1:1 PXSEG sense simply | ||
294 | * doesn't exist, so everything must go through page tables. | ||
295 | */ | ||
296 | #ifdef CONFIG_MMU | ||
297 | void __iomem *__ioremap(unsigned long offset, unsigned long size, | ||
298 | unsigned long flags); | ||
299 | void __iounmap(void __iomem *addr); | ||
300 | |||
301 | /* arch/sh/mm/ioremap_64.c */ | ||
302 | unsigned long onchip_remap(unsigned long addr, unsigned long size, | ||
303 | const char *name); | ||
304 | extern void onchip_unmap(unsigned long vaddr); | ||
305 | #else | ||
306 | #define __ioremap(offset, size, flags) ((void __iomem *)(offset)) | ||
307 | #define __iounmap(addr) do { } while (0) | ||
308 | #define onchip_remap(addr, size, name) (addr) | ||
309 | #define onchip_unmap(addr) do { } while (0) | ||
310 | #endif /* CONFIG_MMU */ | ||
311 | |||
312 | static inline void __iomem * | ||
313 | __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) | ||
314 | { | ||
315 | #ifdef CONFIG_SUPERH32 | ||
316 | unsigned long last_addr = offset + size - 1; | ||
317 | #endif | ||
318 | void __iomem *ret; | ||
319 | |||
320 | ret = __ioremap_trapped(offset, size); | ||
321 | if (ret) | ||
322 | return ret; | ||
323 | |||
324 | #ifdef CONFIG_SUPERH32 | ||
325 | /* | ||
326 | * For P1 and P2 space this is trivial, as everything is already | ||
327 | * mapped. Uncached access for P1 addresses are done through P2. | ||
328 | * In the P3 case or for addresses outside of the 29-bit space, | ||
329 | * mapping must be done by the PMB or by using page tables. | ||
330 | */ | ||
331 | if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { | ||
332 | if (unlikely(flags & _PAGE_CACHABLE)) | ||
333 | return (void __iomem *)P1SEGADDR(offset); | ||
334 | |||
335 | return (void __iomem *)P2SEGADDR(offset); | ||
336 | } | ||
337 | #endif | ||
338 | |||
339 | return __ioremap(offset, size, flags); | ||
340 | } | ||
341 | |||
342 | #define ioremap(offset, size) \ | ||
343 | __ioremap_mode((offset), (size), 0) | ||
344 | #define ioremap_nocache(offset, size) \ | ||
345 | __ioremap_mode((offset), (size), 0) | ||
346 | #define ioremap_cache(offset, size) \ | ||
347 | __ioremap_mode((offset), (size), _PAGE_CACHABLE) | ||
348 | #define p3_ioremap(offset, size, flags) \ | ||
349 | __ioremap((offset), (size), (flags)) | ||
350 | #define iounmap(addr) \ | ||
351 | __iounmap((addr)) | ||
352 | |||
353 | /* | ||
354 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | ||
355 | * access | ||
356 | */ | ||
357 | #define xlate_dev_mem_ptr(p) __va(p) | ||
358 | |||
359 | /* | ||
360 | * Convert a virtual cached pointer to an uncached pointer | ||
361 | */ | ||
362 | #define xlate_dev_kmem_ptr(p) p | ||
363 | |||
364 | #endif /* __KERNEL__ */ | ||
365 | |||
366 | #endif /* __ASM_SH_IO_H */ | ||
diff --git a/include/asm-sh/io_generic.h b/include/asm-sh/io_generic.h deleted file mode 100644 index 92fc6070d7b3..000000000000 --- a/include/asm-sh/io_generic.h +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* | ||
2 | * Trivial I/O routine definitions, intentionally meant to be included | ||
3 | * multiple times. Ugly I/O routine concatenation helpers taken from | ||
4 | * alpha. Must be included _before_ io.h to avoid preprocessor-induced | ||
5 | * routine mismatch. | ||
6 | */ | ||
7 | #define IO_CONCAT(a,b) _IO_CONCAT(a,b) | ||
8 | #define _IO_CONCAT(a,b) a ## _ ## b | ||
9 | |||
10 | #ifndef __IO_PREFIX | ||
11 | #error "Don't include this header without a valid system prefix" | ||
12 | #endif | ||
13 | |||
14 | u8 IO_CONCAT(__IO_PREFIX,inb)(unsigned long); | ||
15 | u16 IO_CONCAT(__IO_PREFIX,inw)(unsigned long); | ||
16 | u32 IO_CONCAT(__IO_PREFIX,inl)(unsigned long); | ||
17 | |||
18 | void IO_CONCAT(__IO_PREFIX,outb)(u8, unsigned long); | ||
19 | void IO_CONCAT(__IO_PREFIX,outw)(u16, unsigned long); | ||
20 | void IO_CONCAT(__IO_PREFIX,outl)(u32, unsigned long); | ||
21 | |||
22 | u8 IO_CONCAT(__IO_PREFIX,inb_p)(unsigned long); | ||
23 | u16 IO_CONCAT(__IO_PREFIX,inw_p)(unsigned long); | ||
24 | u32 IO_CONCAT(__IO_PREFIX,inl_p)(unsigned long); | ||
25 | void IO_CONCAT(__IO_PREFIX,outb_p)(u8, unsigned long); | ||
26 | void IO_CONCAT(__IO_PREFIX,outw_p)(u16, unsigned long); | ||
27 | void IO_CONCAT(__IO_PREFIX,outl_p)(u32, unsigned long); | ||
28 | |||
29 | void IO_CONCAT(__IO_PREFIX,insb)(unsigned long, void *dst, unsigned long count); | ||
30 | void IO_CONCAT(__IO_PREFIX,insw)(unsigned long, void *dst, unsigned long count); | ||
31 | void IO_CONCAT(__IO_PREFIX,insl)(unsigned long, void *dst, unsigned long count); | ||
32 | void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long count); | ||
33 | void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count); | ||
34 | void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count); | ||
35 | |||
36 | u8 IO_CONCAT(__IO_PREFIX,readb)(void __iomem *); | ||
37 | u16 IO_CONCAT(__IO_PREFIX,readw)(void __iomem *); | ||
38 | u32 IO_CONCAT(__IO_PREFIX,readl)(void __iomem *); | ||
39 | void IO_CONCAT(__IO_PREFIX,writeb)(u8, void __iomem *); | ||
40 | void IO_CONCAT(__IO_PREFIX,writew)(u16, void __iomem *); | ||
41 | void IO_CONCAT(__IO_PREFIX,writel)(u32, void __iomem *); | ||
42 | |||
43 | void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size); | ||
44 | void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr); | ||
45 | |||
46 | void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size); | ||
47 | void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr); | ||
48 | |||
49 | #undef __IO_PREFIX | ||
diff --git a/include/asm-sh/io_trapped.h b/include/asm-sh/io_trapped.h deleted file mode 100644 index f1251d4f0ba9..000000000000 --- a/include/asm-sh/io_trapped.h +++ /dev/null | |||
@@ -1,58 +0,0 @@ | |||
1 | #ifndef __ASM_SH_IO_TRAPPED_H | ||
2 | #define __ASM_SH_IO_TRAPPED_H | ||
3 | |||
4 | #include <linux/list.h> | ||
5 | #include <linux/ioport.h> | ||
6 | #include <asm/page.h> | ||
7 | |||
8 | #define IO_TRAPPED_MAGIC 0xfeedbeef | ||
9 | |||
10 | struct trapped_io { | ||
11 | unsigned int magic; | ||
12 | struct resource *resource; | ||
13 | unsigned int num_resources; | ||
14 | unsigned int minimum_bus_width; | ||
15 | struct list_head list; | ||
16 | void __iomem *virt_base; | ||
17 | } __aligned(PAGE_SIZE); | ||
18 | |||
19 | #ifdef CONFIG_IO_TRAPPED | ||
20 | int register_trapped_io(struct trapped_io *tiop); | ||
21 | int handle_trapped_io(struct pt_regs *regs, unsigned long address); | ||
22 | |||
23 | void __iomem *match_trapped_io_handler(struct list_head *list, | ||
24 | unsigned long offset, | ||
25 | unsigned long size); | ||
26 | |||
27 | #ifdef CONFIG_HAS_IOMEM | ||
28 | extern struct list_head trapped_mem; | ||
29 | |||
30 | static inline void __iomem * | ||
31 | __ioremap_trapped(unsigned long offset, unsigned long size) | ||
32 | { | ||
33 | return match_trapped_io_handler(&trapped_mem, offset, size); | ||
34 | } | ||
35 | #else | ||
36 | #define __ioremap_trapped(offset, size) NULL | ||
37 | #endif | ||
38 | |||
39 | #ifdef CONFIG_HAS_IOPORT | ||
40 | extern struct list_head trapped_io; | ||
41 | |||
42 | static inline void __iomem * | ||
43 | __ioport_map_trapped(unsigned long offset, unsigned long size) | ||
44 | { | ||
45 | return match_trapped_io_handler(&trapped_io, offset, size); | ||
46 | } | ||
47 | #else | ||
48 | #define __ioport_map_trapped(offset, size) NULL | ||
49 | #endif | ||
50 | |||
51 | #else | ||
52 | #define register_trapped_io(tiop) (-1) | ||
53 | #define handle_trapped_io(tiop, address) 0 | ||
54 | #define __ioremap_trapped(offset, size) NULL | ||
55 | #define __ioport_map_trapped(offset, size) NULL | ||
56 | #endif | ||
57 | |||
58 | #endif /* __ASM_SH_IO_TRAPPED_H */ | ||
diff --git a/include/asm-sh/ioctl.h b/include/asm-sh/ioctl.h deleted file mode 100644 index b279fe06dfe5..000000000000 --- a/include/asm-sh/ioctl.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/ioctl.h> | ||
diff --git a/include/asm-sh/ioctls.h b/include/asm-sh/ioctls.h deleted file mode 100644 index c212c371a4a5..000000000000 --- a/include/asm-sh/ioctls.h +++ /dev/null | |||
@@ -1,103 +0,0 @@ | |||
1 | #ifndef __ASM_SH_IOCTLS_H | ||
2 | #define __ASM_SH_IOCTLS_H | ||
3 | |||
4 | #include <asm/ioctl.h> | ||
5 | |||
6 | #define FIOCLEX _IO('f', 1) | ||
7 | #define FIONCLEX _IO('f', 2) | ||
8 | #define FIOASYNC _IOW('f', 125, int) | ||
9 | #define FIONBIO _IOW('f', 126, int) | ||
10 | #define FIONREAD _IOR('f', 127, int) | ||
11 | #define TIOCINQ FIONREAD | ||
12 | #define FIOQSIZE _IOR('f', 128, loff_t) | ||
13 | |||
14 | #define TCGETS 0x5401 | ||
15 | #define TCSETS 0x5402 | ||
16 | #define TCSETSW 0x5403 | ||
17 | #define TCSETSF 0x5404 | ||
18 | |||
19 | #define TCGETA 0x80127417 /* _IOR('t', 23, struct termio) */ | ||
20 | #define TCSETA 0x40127418 /* _IOW('t', 24, struct termio) */ | ||
21 | #define TCSETAW 0x40127419 /* _IOW('t', 25, struct termio) */ | ||
22 | #define TCSETAF 0x4012741C /* _IOW('t', 28, struct termio) */ | ||
23 | |||
24 | #define TCSBRK _IO('t', 29) | ||
25 | #define TCXONC _IO('t', 30) | ||
26 | #define TCFLSH _IO('t', 31) | ||
27 | |||
28 | #define TIOCSWINSZ 0x40087467 /* _IOW('t', 103, struct winsize) */ | ||
29 | #define TIOCGWINSZ 0x80087468 /* _IOR('t', 104, struct winsize) */ | ||
30 | #define TIOCSTART _IO('t', 110) /* start output, like ^Q */ | ||
31 | #define TIOCSTOP _IO('t', 111) /* stop output, like ^S */ | ||
32 | #define TIOCOUTQ _IOR('t', 115, int) /* output queue size */ | ||
33 | |||
34 | #define TIOCSPGRP _IOW('t', 118, int) | ||
35 | #define TIOCGPGRP _IOR('t', 119, int) | ||
36 | |||
37 | #define TIOCEXCL _IO('T', 12) /* 0x540C */ | ||
38 | #define TIOCNXCL _IO('T', 13) /* 0x540D */ | ||
39 | #define TIOCSCTTY _IO('T', 14) /* 0x540E */ | ||
40 | |||
41 | #define TIOCSTI _IOW('T', 18, char) /* 0x5412 */ | ||
42 | #define TIOCMGET _IOR('T', 21, unsigned int) /* 0x5415 */ | ||
43 | #define TIOCMBIS _IOW('T', 22, unsigned int) /* 0x5416 */ | ||
44 | #define TIOCMBIC _IOW('T', 23, unsigned int) /* 0x5417 */ | ||
45 | #define TIOCMSET _IOW('T', 24, unsigned int) /* 0x5418 */ | ||
46 | # define TIOCM_LE 0x001 | ||
47 | # define TIOCM_DTR 0x002 | ||
48 | # define TIOCM_RTS 0x004 | ||
49 | # define TIOCM_ST 0x008 | ||
50 | # define TIOCM_SR 0x010 | ||
51 | # define TIOCM_CTS 0x020 | ||
52 | # define TIOCM_CAR 0x040 | ||
53 | # define TIOCM_RNG 0x080 | ||
54 | # define TIOCM_DSR 0x100 | ||
55 | # define TIOCM_CD TIOCM_CAR | ||
56 | # define TIOCM_RI TIOCM_RNG | ||
57 | |||
58 | #define TIOCGSOFTCAR _IOR('T', 25, unsigned int) /* 0x5419 */ | ||
59 | #define TIOCSSOFTCAR _IOW('T', 26, unsigned int) /* 0x541A */ | ||
60 | #define TIOCLINUX _IOW('T', 28, char) /* 0x541C */ | ||
61 | #define TIOCCONS _IO('T', 29) /* 0x541D */ | ||
62 | #define TIOCGSERIAL 0x803C541E /* _IOR('T', 30, struct serial_struct) 0x541E */ | ||
63 | #define TIOCSSERIAL 0x403C541F /* _IOW('T', 31, struct serial_struct) 0x541F */ | ||
64 | #define TIOCPKT _IOW('T', 32, int) /* 0x5420 */ | ||
65 | # define TIOCPKT_DATA 0 | ||
66 | # define TIOCPKT_FLUSHREAD 1 | ||
67 | # define TIOCPKT_FLUSHWRITE 2 | ||
68 | # define TIOCPKT_STOP 4 | ||
69 | # define TIOCPKT_START 8 | ||
70 | # define TIOCPKT_NOSTOP 16 | ||
71 | # define TIOCPKT_DOSTOP 32 | ||
72 | |||
73 | |||
74 | #define TIOCNOTTY _IO('T', 34) /* 0x5422 */ | ||
75 | #define TIOCSETD _IOW('T', 35, int) /* 0x5423 */ | ||
76 | #define TIOCGETD _IOR('T', 36, int) /* 0x5424 */ | ||
77 | #define TCSBRKP _IOW('T', 37, int) /* 0x5425 */ /* Needed for POSIX tcsendbreak() */ | ||
78 | #define TIOCSBRK _IO('T', 39) /* 0x5427 */ /* BSD compatibility */ | ||
79 | #define TIOCCBRK _IO('T', 40) /* 0x5428 */ /* BSD compatibility */ | ||
80 | #define TIOCGSID _IOR('T', 41, pid_t) /* 0x5429 */ /* Return the session ID of FD */ | ||
81 | #define TCGETS2 _IOR('T', 42, struct termios2) | ||
82 | #define TCSETS2 _IOW('T', 43, struct termios2) | ||
83 | #define TCSETSW2 _IOW('T', 44, struct termios2) | ||
84 | #define TCSETSF2 _IOW('T', 45, struct termios2) | ||
85 | #define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ | ||
86 | #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ | ||
87 | |||
88 | #define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */ | ||
89 | #define TIOCSERGWILD _IOR('T', 84, int) /* 0x5454 */ | ||
90 | #define TIOCSERSWILD _IOW('T', 85, int) /* 0x5455 */ | ||
91 | #define TIOCGLCKTRMIOS 0x5456 | ||
92 | #define TIOCSLCKTRMIOS 0x5457 | ||
93 | #define TIOCSERGSTRUCT 0x80d85458 /* _IOR('T', 88, struct async_struct) 0x5458 */ /* For debugging only */ | ||
94 | #define TIOCSERGETLSR _IOR('T', 89, unsigned int) /* 0x5459 */ /* Get line status register */ | ||
95 | /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ | ||
96 | # define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ | ||
97 | #define TIOCSERGETMULTI 0x80A8545A /* _IOR('T', 90, struct serial_multiport_struct) 0x545A */ /* Get multiport config */ | ||
98 | #define TIOCSERSETMULTI 0x40A8545B /* _IOW('T', 91, struct serial_multiport_struct) 0x545B */ /* Set multiport config */ | ||
99 | |||
100 | #define TIOCMIWAIT _IO('T', 92) /* 0x545C */ /* wait for a change on serial input line(s) */ | ||
101 | #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ | ||
102 | |||
103 | #endif /* __ASM_SH_IOCTLS_H */ | ||
diff --git a/include/asm-sh/ipcbuf.h b/include/asm-sh/ipcbuf.h deleted file mode 100644 index 5ffc9972a7ea..000000000000 --- a/include/asm-sh/ipcbuf.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | #ifndef __ASM_SH_IPCBUF_H__ | ||
2 | #define __ASM_SH_IPCBUF_H__ | ||
3 | |||
4 | /* | ||
5 | * The ipc64_perm structure for i386 architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 32-bit mode_t and seq | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct ipc64_perm | ||
15 | { | ||
16 | __kernel_key_t key; | ||
17 | __kernel_uid32_t uid; | ||
18 | __kernel_gid32_t gid; | ||
19 | __kernel_uid32_t cuid; | ||
20 | __kernel_gid32_t cgid; | ||
21 | __kernel_mode_t mode; | ||
22 | unsigned short __pad1; | ||
23 | unsigned short seq; | ||
24 | unsigned short __pad2; | ||
25 | unsigned long __unused1; | ||
26 | unsigned long __unused2; | ||
27 | }; | ||
28 | |||
29 | #endif /* __ASM_SH_IPCBUF_H__ */ | ||
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h deleted file mode 100644 index ca66e5df69dc..000000000000 --- a/include/asm-sh/irq.h +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | #ifndef __ASM_SH_IRQ_H | ||
2 | #define __ASM_SH_IRQ_H | ||
3 | |||
4 | #include <asm/machvec.h> | ||
5 | |||
6 | /* | ||
7 | * A sane default based on a reasonable vector table size, platforms are | ||
8 | * advised to cap this at the hard limit that they're interested in | ||
9 | * through the machvec. | ||
10 | */ | ||
11 | #define NR_IRQS 256 | ||
12 | |||
13 | /* | ||
14 | * Convert back and forth between INTEVT and IRQ values. | ||
15 | */ | ||
16 | #ifdef CONFIG_CPU_HAS_INTEVT | ||
17 | #define evt2irq(evt) (((evt) >> 5) - 16) | ||
18 | #define irq2evt(irq) (((irq) + 16) << 5) | ||
19 | #else | ||
20 | #define evt2irq(evt) (evt) | ||
21 | #define irq2evt(irq) (irq) | ||
22 | #endif | ||
23 | |||
24 | /* | ||
25 | * Simple Mask Register Support | ||
26 | */ | ||
27 | extern void make_maskreg_irq(unsigned int irq); | ||
28 | extern unsigned short *irq_mask_register; | ||
29 | |||
30 | /* | ||
31 | * PINT IRQs | ||
32 | */ | ||
33 | void init_IRQ_pint(void); | ||
34 | void make_imask_irq(unsigned int irq); | ||
35 | |||
36 | static inline int generic_irq_demux(int irq) | ||
37 | { | ||
38 | return irq; | ||
39 | } | ||
40 | |||
41 | #define irq_canonicalize(irq) (irq) | ||
42 | #define irq_demux(irq) sh_mv.mv_irq_demux(irq) | ||
43 | |||
44 | #ifdef CONFIG_IRQSTACKS | ||
45 | extern void irq_ctx_init(int cpu); | ||
46 | extern void irq_ctx_exit(int cpu); | ||
47 | # define __ARCH_HAS_DO_SOFTIRQ | ||
48 | #else | ||
49 | # define irq_ctx_init(cpu) do { } while (0) | ||
50 | # define irq_ctx_exit(cpu) do { } while (0) | ||
51 | #endif | ||
52 | |||
53 | #ifdef CONFIG_CPU_SH5 | ||
54 | #include <asm/cpu/irq.h> | ||
55 | #endif | ||
56 | |||
57 | #endif /* __ASM_SH_IRQ_H */ | ||
diff --git a/include/asm-sh/irq_regs.h b/include/asm-sh/irq_regs.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/include/asm-sh/irq_regs.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/irq_regs.h> | ||
diff --git a/include/asm-sh/irqflags.h b/include/asm-sh/irqflags.h deleted file mode 100644 index 46e71da5be6b..000000000000 --- a/include/asm-sh/irqflags.h +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | #ifndef __ASM_SH_IRQFLAGS_H | ||
2 | #define __ASM_SH_IRQFLAGS_H | ||
3 | |||
4 | #ifdef CONFIG_SUPERH32 | ||
5 | #include "irqflags_32.h" | ||
6 | #else | ||
7 | #include "irqflags_64.h" | ||
8 | #endif | ||
9 | |||
10 | #define raw_local_save_flags(flags) \ | ||
11 | do { (flags) = __raw_local_save_flags(); } while (0) | ||
12 | |||
13 | static inline int raw_irqs_disabled_flags(unsigned long flags) | ||
14 | { | ||
15 | return (flags != 0); | ||
16 | } | ||
17 | |||
18 | static inline int raw_irqs_disabled(void) | ||
19 | { | ||
20 | unsigned long flags = __raw_local_save_flags(); | ||
21 | |||
22 | return raw_irqs_disabled_flags(flags); | ||
23 | } | ||
24 | |||
25 | #define raw_local_irq_save(flags) \ | ||
26 | do { (flags) = __raw_local_irq_save(); } while (0) | ||
27 | |||
28 | static inline void raw_local_irq_restore(unsigned long flags) | ||
29 | { | ||
30 | if ((flags & 0xf0) != 0xf0) | ||
31 | raw_local_irq_enable(); | ||
32 | } | ||
33 | |||
34 | #endif /* __ASM_SH_IRQFLAGS_H */ | ||
diff --git a/include/asm-sh/irqflags_32.h b/include/asm-sh/irqflags_32.h deleted file mode 100644 index 60218f541340..000000000000 --- a/include/asm-sh/irqflags_32.h +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | #ifndef __ASM_SH_IRQFLAGS_32_H | ||
2 | #define __ASM_SH_IRQFLAGS_32_H | ||
3 | |||
4 | static inline void raw_local_irq_enable(void) | ||
5 | { | ||
6 | unsigned long __dummy0, __dummy1; | ||
7 | |||
8 | __asm__ __volatile__ ( | ||
9 | "stc sr, %0\n\t" | ||
10 | "and %1, %0\n\t" | ||
11 | #ifdef CONFIG_CPU_HAS_SR_RB | ||
12 | "stc r6_bank, %1\n\t" | ||
13 | "or %1, %0\n\t" | ||
14 | #endif | ||
15 | "ldc %0, sr\n\t" | ||
16 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
17 | : "1" (~0x000000f0) | ||
18 | : "memory" | ||
19 | ); | ||
20 | } | ||
21 | |||
22 | static inline void raw_local_irq_disable(void) | ||
23 | { | ||
24 | unsigned long flags; | ||
25 | |||
26 | __asm__ __volatile__ ( | ||
27 | "stc sr, %0\n\t" | ||
28 | "or #0xf0, %0\n\t" | ||
29 | "ldc %0, sr\n\t" | ||
30 | : "=&z" (flags) | ||
31 | : /* no inputs */ | ||
32 | : "memory" | ||
33 | ); | ||
34 | } | ||
35 | |||
36 | static inline void set_bl_bit(void) | ||
37 | { | ||
38 | unsigned long __dummy0, __dummy1; | ||
39 | |||
40 | __asm__ __volatile__ ( | ||
41 | "stc sr, %0\n\t" | ||
42 | "or %2, %0\n\t" | ||
43 | "and %3, %0\n\t" | ||
44 | "ldc %0, sr\n\t" | ||
45 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
46 | : "r" (0x10000000), "r" (0xffffff0f) | ||
47 | : "memory" | ||
48 | ); | ||
49 | } | ||
50 | |||
51 | static inline void clear_bl_bit(void) | ||
52 | { | ||
53 | unsigned long __dummy0, __dummy1; | ||
54 | |||
55 | __asm__ __volatile__ ( | ||
56 | "stc sr, %0\n\t" | ||
57 | "and %2, %0\n\t" | ||
58 | "ldc %0, sr\n\t" | ||
59 | : "=&r" (__dummy0), "=r" (__dummy1) | ||
60 | : "1" (~0x10000000) | ||
61 | : "memory" | ||
62 | ); | ||
63 | } | ||
64 | |||
65 | static inline unsigned long __raw_local_save_flags(void) | ||
66 | { | ||
67 | unsigned long flags; | ||
68 | |||
69 | __asm__ __volatile__ ( | ||
70 | "stc sr, %0\n\t" | ||
71 | "and #0xf0, %0\n\t" | ||
72 | : "=&z" (flags) | ||
73 | : /* no inputs */ | ||
74 | : "memory" | ||
75 | ); | ||
76 | |||
77 | return flags; | ||
78 | } | ||
79 | |||
80 | static inline unsigned long __raw_local_irq_save(void) | ||
81 | { | ||
82 | unsigned long flags, __dummy; | ||
83 | |||
84 | __asm__ __volatile__ ( | ||
85 | "stc sr, %1\n\t" | ||
86 | "mov %1, %0\n\t" | ||
87 | "or #0xf0, %0\n\t" | ||
88 | "ldc %0, sr\n\t" | ||
89 | "mov %1, %0\n\t" | ||
90 | "and #0xf0, %0\n\t" | ||
91 | : "=&z" (flags), "=&r" (__dummy) | ||
92 | : /* no inputs */ | ||
93 | : "memory" | ||
94 | ); | ||
95 | |||
96 | return flags; | ||
97 | } | ||
98 | |||
99 | #endif /* __ASM_SH_IRQFLAGS_32_H */ | ||
diff --git a/include/asm-sh/irqflags_64.h b/include/asm-sh/irqflags_64.h deleted file mode 100644 index 4f6b8a56e7bd..000000000000 --- a/include/asm-sh/irqflags_64.h +++ /dev/null | |||
@@ -1,85 +0,0 @@ | |||
1 | #ifndef __ASM_SH_IRQFLAGS_64_H | ||
2 | #define __ASM_SH_IRQFLAGS_64_H | ||
3 | |||
4 | #include <asm/cpu/registers.h> | ||
5 | |||
6 | #define SR_MASK_LL 0x00000000000000f0LL | ||
7 | #define SR_BL_LL 0x0000000010000000LL | ||
8 | |||
9 | static inline void raw_local_irq_enable(void) | ||
10 | { | ||
11 | unsigned long long __dummy0, __dummy1 = ~SR_MASK_LL; | ||
12 | |||
13 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
14 | "and %0, %1, %0\n\t" | ||
15 | "putcon %0, " __SR "\n\t" | ||
16 | : "=&r" (__dummy0) | ||
17 | : "r" (__dummy1)); | ||
18 | } | ||
19 | |||
20 | static inline void raw_local_irq_disable(void) | ||
21 | { | ||
22 | unsigned long long __dummy0, __dummy1 = SR_MASK_LL; | ||
23 | |||
24 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
25 | "or %0, %1, %0\n\t" | ||
26 | "putcon %0, " __SR "\n\t" | ||
27 | : "=&r" (__dummy0) | ||
28 | : "r" (__dummy1)); | ||
29 | } | ||
30 | |||
31 | static inline void set_bl_bit(void) | ||
32 | { | ||
33 | unsigned long long __dummy0, __dummy1 = SR_BL_LL; | ||
34 | |||
35 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
36 | "or %0, %1, %0\n\t" | ||
37 | "putcon %0, " __SR "\n\t" | ||
38 | : "=&r" (__dummy0) | ||
39 | : "r" (__dummy1)); | ||
40 | |||
41 | } | ||
42 | |||
43 | static inline void clear_bl_bit(void) | ||
44 | { | ||
45 | unsigned long long __dummy0, __dummy1 = ~SR_BL_LL; | ||
46 | |||
47 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
48 | "and %0, %1, %0\n\t" | ||
49 | "putcon %0, " __SR "\n\t" | ||
50 | : "=&r" (__dummy0) | ||
51 | : "r" (__dummy1)); | ||
52 | } | ||
53 | |||
54 | static inline unsigned long __raw_local_save_flags(void) | ||
55 | { | ||
56 | unsigned long long __dummy = SR_MASK_LL; | ||
57 | unsigned long flags; | ||
58 | |||
59 | __asm__ __volatile__ ( | ||
60 | "getcon " __SR ", %0\n\t" | ||
61 | "and %0, %1, %0" | ||
62 | : "=&r" (flags) | ||
63 | : "r" (__dummy)); | ||
64 | |||
65 | return flags; | ||
66 | } | ||
67 | |||
68 | static inline unsigned long __raw_local_irq_save(void) | ||
69 | { | ||
70 | unsigned long long __dummy0, __dummy1 = SR_MASK_LL; | ||
71 | unsigned long flags; | ||
72 | |||
73 | __asm__ __volatile__ ( | ||
74 | "getcon " __SR ", %1\n\t" | ||
75 | "or %1, r63, %0\n\t" | ||
76 | "or %1, %2, %1\n\t" | ||
77 | "putcon %1, " __SR "\n\t" | ||
78 | "and %0, %2, %0" | ||
79 | : "=&r" (flags), "=&r" (__dummy0) | ||
80 | : "r" (__dummy1)); | ||
81 | |||
82 | return flags; | ||
83 | } | ||
84 | |||
85 | #endif /* __ASM_SH_IRQFLAGS_64_H */ | ||
diff --git a/include/asm-sh/kdebug.h b/include/asm-sh/kdebug.h deleted file mode 100644 index 49cd69051a88..000000000000 --- a/include/asm-sh/kdebug.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | #ifndef __ASM_SH_KDEBUG_H | ||
2 | #define __ASM_SH_KDEBUG_H | ||
3 | |||
4 | /* Grossly misnamed. */ | ||
5 | enum die_val { | ||
6 | DIE_TRAP, | ||
7 | }; | ||
8 | |||
9 | #endif /* __ASM_SH_KDEBUG_H */ | ||
diff --git a/include/asm-sh/kexec.h b/include/asm-sh/kexec.h deleted file mode 100644 index 00f4260ef09b..000000000000 --- a/include/asm-sh/kexec.h +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | #ifndef __ASM_SH_KEXEC_H | ||
2 | #define __ASM_SH_KEXEC_H | ||
3 | |||
4 | #include <asm/ptrace.h> | ||
5 | #include <asm/string.h> | ||
6 | |||
7 | /* | ||
8 | * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return. | ||
9 | * I.e. Maximum page that is mapped directly into kernel memory, | ||
10 | * and kmap is not required. | ||
11 | * | ||
12 | * Someone correct me if FIXADDR_START - PAGEOFFSET is not the correct | ||
13 | * calculation for the amount of memory directly mappable into the | ||
14 | * kernel memory space. | ||
15 | */ | ||
16 | |||
17 | /* Maximum physical address we can use pages from */ | ||
18 | #define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) | ||
19 | /* Maximum address we can reach in physical address mode */ | ||
20 | #define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) | ||
21 | /* Maximum address we can use for the control code buffer */ | ||
22 | #define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE | ||
23 | |||
24 | #define KEXEC_CONTROL_CODE_SIZE 4096 | ||
25 | |||
26 | /* The native architecture */ | ||
27 | #define KEXEC_ARCH KEXEC_ARCH_SH | ||
28 | |||
29 | static inline void crash_setup_regs(struct pt_regs *newregs, | ||
30 | struct pt_regs *oldregs) | ||
31 | { | ||
32 | if (oldregs) | ||
33 | memcpy(newregs, oldregs, sizeof(*newregs)); | ||
34 | else { | ||
35 | __asm__ __volatile__ ("mov r0, %0" : "=r" (newregs->regs[0])); | ||
36 | __asm__ __volatile__ ("mov r1, %0" : "=r" (newregs->regs[1])); | ||
37 | __asm__ __volatile__ ("mov r2, %0" : "=r" (newregs->regs[2])); | ||
38 | __asm__ __volatile__ ("mov r3, %0" : "=r" (newregs->regs[3])); | ||
39 | __asm__ __volatile__ ("mov r4, %0" : "=r" (newregs->regs[4])); | ||
40 | __asm__ __volatile__ ("mov r5, %0" : "=r" (newregs->regs[5])); | ||
41 | __asm__ __volatile__ ("mov r6, %0" : "=r" (newregs->regs[6])); | ||
42 | __asm__ __volatile__ ("mov r7, %0" : "=r" (newregs->regs[7])); | ||
43 | __asm__ __volatile__ ("mov r8, %0" : "=r" (newregs->regs[8])); | ||
44 | __asm__ __volatile__ ("mov r9, %0" : "=r" (newregs->regs[9])); | ||
45 | __asm__ __volatile__ ("mov r10, %0" : "=r" (newregs->regs[10])); | ||
46 | __asm__ __volatile__ ("mov r11, %0" : "=r" (newregs->regs[11])); | ||
47 | __asm__ __volatile__ ("mov r12, %0" : "=r" (newregs->regs[12])); | ||
48 | __asm__ __volatile__ ("mov r13, %0" : "=r" (newregs->regs[13])); | ||
49 | __asm__ __volatile__ ("mov r14, %0" : "=r" (newregs->regs[14])); | ||
50 | __asm__ __volatile__ ("mov r15, %0" : "=r" (newregs->regs[15])); | ||
51 | |||
52 | __asm__ __volatile__ ("sts pr, %0" : "=r" (newregs->pr)); | ||
53 | __asm__ __volatile__ ("sts macl, %0" : "=r" (newregs->macl)); | ||
54 | __asm__ __volatile__ ("sts mach, %0" : "=r" (newregs->mach)); | ||
55 | |||
56 | __asm__ __volatile__ ("stc gbr, %0" : "=r" (newregs->gbr)); | ||
57 | __asm__ __volatile__ ("stc sr, %0" : "=r" (newregs->sr)); | ||
58 | |||
59 | newregs->pc = (unsigned long)current_text_addr(); | ||
60 | } | ||
61 | } | ||
62 | #endif /* __ASM_SH_KEXEC_H */ | ||
diff --git a/include/asm-sh/kgdb.h b/include/asm-sh/kgdb.h deleted file mode 100644 index 24e42078f36f..000000000000 --- a/include/asm-sh/kgdb.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | /* | ||
2 | * May be copied or modified under the terms of the GNU General Public | ||
3 | * License. See linux/COPYING for more information. | ||
4 | * | ||
5 | * Based on original code by Glenn Engel, Jim Kingdon, | ||
6 | * David Grothe <dave@gcom.com>, Tigran Aivazian, <tigran@sco.com> and | ||
7 | * Amit S. Kale <akale@veritas.com> | ||
8 | * | ||
9 | * Super-H port based on sh-stub.c (Ben Lee and Steve Chamberlain) by | ||
10 | * Henry Bell <henry.bell@st.com> | ||
11 | * | ||
12 | * Header file for low-level support for remote debug using GDB. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #ifndef __KGDB_H | ||
17 | #define __KGDB_H | ||
18 | |||
19 | #include <asm/ptrace.h> | ||
20 | |||
21 | /* Same as pt_regs but has vbr in place of syscall_nr */ | ||
22 | struct kgdb_regs { | ||
23 | unsigned long regs[16]; | ||
24 | unsigned long pc; | ||
25 | unsigned long pr; | ||
26 | unsigned long sr; | ||
27 | unsigned long gbr; | ||
28 | unsigned long mach; | ||
29 | unsigned long macl; | ||
30 | unsigned long vbr; | ||
31 | }; | ||
32 | |||
33 | /* State info */ | ||
34 | extern char kgdb_in_gdb_mode; | ||
35 | extern int kgdb_nofault; /* Ignore bus errors (in gdb mem access) */ | ||
36 | extern char in_nmi; /* Debounce flag to prevent NMI reentry*/ | ||
37 | |||
38 | /* SCI */ | ||
39 | extern int kgdb_portnum; | ||
40 | extern int kgdb_baud; | ||
41 | extern char kgdb_parity; | ||
42 | extern char kgdb_bits; | ||
43 | |||
44 | /* Init and interface stuff */ | ||
45 | extern int kgdb_init(void); | ||
46 | extern int (*kgdb_getchar)(void); | ||
47 | extern void (*kgdb_putchar)(int); | ||
48 | |||
49 | /* Trap functions */ | ||
50 | typedef void (kgdb_debug_hook_t)(struct pt_regs *regs); | ||
51 | typedef void (kgdb_bus_error_hook_t)(void); | ||
52 | extern kgdb_debug_hook_t *kgdb_debug_hook; | ||
53 | extern kgdb_bus_error_hook_t *kgdb_bus_err_hook; | ||
54 | |||
55 | /* Console */ | ||
56 | struct console; | ||
57 | void kgdb_console_write(struct console *co, const char *s, unsigned count); | ||
58 | extern int kgdb_console_setup(struct console *, char *); | ||
59 | |||
60 | /* Prototypes for jmp fns */ | ||
61 | #define _JBLEN 9 | ||
62 | typedef int jmp_buf[_JBLEN]; | ||
63 | extern void longjmp(jmp_buf __jmpb, int __retval); | ||
64 | extern int setjmp(jmp_buf __jmpb); | ||
65 | |||
66 | /* Forced breakpoint */ | ||
67 | #define breakpoint() __asm__ __volatile__("trapa #0x3c") | ||
68 | |||
69 | #endif | ||
diff --git a/include/asm-sh/kmap_types.h b/include/asm-sh/kmap_types.h deleted file mode 100644 index 84d565c696be..000000000000 --- a/include/asm-sh/kmap_types.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | #ifndef __SH_KMAP_TYPES_H | ||
2 | #define __SH_KMAP_TYPES_H | ||
3 | |||
4 | /* Dummy header just to define km_type. */ | ||
5 | |||
6 | |||
7 | #ifdef CONFIG_DEBUG_HIGHMEM | ||
8 | # define D(n) __KM_FENCE_##n , | ||
9 | #else | ||
10 | # define D(n) | ||
11 | #endif | ||
12 | |||
13 | enum km_type { | ||
14 | D(0) KM_BOUNCE_READ, | ||
15 | D(1) KM_SKB_SUNRPC_DATA, | ||
16 | D(2) KM_SKB_DATA_SOFTIRQ, | ||
17 | D(3) KM_USER0, | ||
18 | D(4) KM_USER1, | ||
19 | D(5) KM_BIO_SRC_IRQ, | ||
20 | D(6) KM_BIO_DST_IRQ, | ||
21 | D(7) KM_PTE0, | ||
22 | D(8) KM_PTE1, | ||
23 | D(9) KM_IRQ0, | ||
24 | D(10) KM_IRQ1, | ||
25 | D(11) KM_SOFTIRQ0, | ||
26 | D(12) KM_SOFTIRQ1, | ||
27 | D(13) KM_TYPE_NR | ||
28 | }; | ||
29 | |||
30 | #undef D | ||
31 | |||
32 | #endif | ||
diff --git a/include/asm-sh/landisk/gio.h b/include/asm-sh/landisk/gio.h deleted file mode 100644 index 35d7368b718a..000000000000 --- a/include/asm-sh/landisk/gio.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | #ifndef __ASM_SH_LANDISK_GIO_H | ||
2 | #define __ASM_SH_LANDISK_GIO_H | ||
3 | |||
4 | #include <linux/ioctl.h> | ||
5 | |||
6 | /* version */ | ||
7 | #define VERSION_STR "1.00" | ||
8 | |||
9 | /* Driver name */ | ||
10 | #define GIO_DRIVER_NAME "/dev/giodrv" | ||
11 | |||
12 | /* Use 'k' as magic number */ | ||
13 | #define GIODRV_IOC_MAGIC 'k' | ||
14 | |||
15 | #define GIODRV_IOCRESET _IO(GIODRV_IOC_MAGIC, 0) | ||
16 | /* | ||
17 | * S means "Set" through a ptr, | ||
18 | * T means "Tell" directly | ||
19 | * G means "Get" (to a pointed var) | ||
20 | * Q means "Query", response is on the return value | ||
21 | * X means "eXchange": G and S atomically | ||
22 | * H means "sHift": T and Q atomically | ||
23 | */ | ||
24 | #define GIODRV_IOCSGIODATA1 _IOW(GIODRV_IOC_MAGIC, 1, unsigned char *) | ||
25 | #define GIODRV_IOCGGIODATA1 _IOR(GIODRV_IOC_MAGIC, 2, unsigned char *) | ||
26 | #define GIODRV_IOCSGIODATA2 _IOW(GIODRV_IOC_MAGIC, 3, unsigned short *) | ||
27 | #define GIODRV_IOCGGIODATA2 _IOR(GIODRV_IOC_MAGIC, 4, unsigned short *) | ||
28 | #define GIODRV_IOCSGIODATA4 _IOW(GIODRV_IOC_MAGIC, 5, unsigned long *) | ||
29 | #define GIODRV_IOCGGIODATA4 _IOR(GIODRV_IOC_MAGIC, 6, unsigned long *) | ||
30 | #define GIODRV_IOCSGIOSETADDR _IOW(GIODRV_IOC_MAGIC, 7, unsigned long *) | ||
31 | #define GIODRV_IOCHARDRESET _IO(GIODRV_IOC_MAGIC, 8) /* debugging tool */ | ||
32 | #define GIODRV_IOC_MAXNR 8 | ||
33 | |||
34 | #define GIO_READ 0x00000000 | ||
35 | #define GIO_WRITE 0x00000001 | ||
36 | |||
37 | #endif /* __ASM_SH_LANDISK_GIO_H */ | ||
diff --git a/include/asm-sh/landisk/iodata_landisk.h b/include/asm-sh/landisk/iodata_landisk.h deleted file mode 100644 index 6fb04ab38b9f..000000000000 --- a/include/asm-sh/landisk/iodata_landisk.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | #ifndef __ASM_SH_IODATA_LANDISK_H | ||
2 | #define __ASM_SH_IODATA_LANDISK_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/landisk/iodata_landisk.h | ||
6 | * | ||
7 | * Copyright (C) 2000 Atom Create Engineering Co., Ltd. | ||
8 | * | ||
9 | * IO-DATA LANDISK support | ||
10 | */ | ||
11 | |||
12 | /* Box specific addresses. */ | ||
13 | |||
14 | #define PA_USB 0xa4000000 /* USB Controller M66590 */ | ||
15 | |||
16 | #define PA_ATARST 0xb0000000 /* ATA/FATA Access Control Register */ | ||
17 | #define PA_LED 0xb0000001 /* LED Control Register */ | ||
18 | #define PA_STATUS 0xb0000002 /* Switch Status Register */ | ||
19 | #define PA_SHUTDOWN 0xb0000003 /* Shutdown Control Register */ | ||
20 | #define PA_PCIPME 0xb0000004 /* PCI PME Status Register */ | ||
21 | #define PA_IMASK 0xb0000005 /* Interrupt Mask Register */ | ||
22 | /* 2003.10.31 I-O DATA NSD NWG add. for shutdown port clear */ | ||
23 | #define PA_PWRINT_CLR 0xb0000006 /* Shutdown Interrupt clear Register */ | ||
24 | |||
25 | #define PA_PIDE_OFFSET 0x40 /* CF IDE Offset */ | ||
26 | #define PA_SIDE_OFFSET 0x40 /* HDD IDE Offset */ | ||
27 | |||
28 | #define IRQ_PCIINTA 5 /* PCI INTA IRQ */ | ||
29 | #define IRQ_PCIINTB 6 /* PCI INTB IRQ */ | ||
30 | #define IRQ_PCIINDC 7 /* PCI INTC IRQ */ | ||
31 | #define IRQ_PCIINTD 8 /* PCI INTD IRQ */ | ||
32 | #define IRQ_ATA 9 /* ATA IRQ */ | ||
33 | #define IRQ_FATA 10 /* FATA IRQ */ | ||
34 | #define IRQ_POWER 11 /* Power Switch IRQ */ | ||
35 | #define IRQ_BUTTON 12 /* USL-5P Button IRQ */ | ||
36 | #define IRQ_FAULT 13 /* USL-5P Fault IRQ */ | ||
37 | |||
38 | #define __IO_PREFIX landisk | ||
39 | #include <asm/io_generic.h> | ||
40 | |||
41 | #endif /* __ASM_SH_IODATA_LANDISK_H */ | ||
42 | |||
diff --git a/include/asm-sh/lboxre2.h b/include/asm-sh/lboxre2.h deleted file mode 100644 index e6d160504923..000000000000 --- a/include/asm-sh/lboxre2.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | #ifndef __ASM_SH_LBOXRE2_H | ||
2 | #define __ASM_SH_LBOXRE2_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 2007 Nobuhiro Iwamatsu | ||
6 | * | ||
7 | * NTT COMWARE L-BOX RE2 support | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General Public | ||
10 | * License. See the file "COPYING" in the main directory of this archive | ||
11 | * for more details. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #define IRQ_CF1 9 /* CF1 */ | ||
16 | #define IRQ_CF0 10 /* CF0 */ | ||
17 | #define IRQ_INTD 11 /* INTD */ | ||
18 | #define IRQ_ETH1 12 /* Ether1 */ | ||
19 | #define IRQ_ETH0 13 /* Ether0 */ | ||
20 | #define IRQ_INTA 14 /* INTA */ | ||
21 | |||
22 | void init_lboxre2_IRQ(void); | ||
23 | |||
24 | #define __IO_PREFIX lboxre2 | ||
25 | #include <asm/io_generic.h> | ||
26 | |||
27 | #endif /* __ASM_SH_LBOXRE2_H */ | ||
diff --git a/include/asm-sh/linkage.h b/include/asm-sh/linkage.h deleted file mode 100644 index 3565a4f4009f..000000000000 --- a/include/asm-sh/linkage.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __ASM_LINKAGE_H | ||
2 | #define __ASM_LINKAGE_H | ||
3 | |||
4 | #define __ALIGN .balign 4 | ||
5 | #define __ALIGN_STR ".balign 4" | ||
6 | |||
7 | #endif | ||
diff --git a/include/asm-sh/local.h b/include/asm-sh/local.h deleted file mode 100644 index 9ed9b9cb459a..000000000000 --- a/include/asm-sh/local.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __ASM_SH_LOCAL_H | ||
2 | #define __ASM_SH_LOCAL_H | ||
3 | |||
4 | #include <asm-generic/local.h> | ||
5 | |||
6 | #endif /* __ASM_SH_LOCAL_H */ | ||
7 | |||
diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h deleted file mode 100644 index b2e4124070ae..000000000000 --- a/include/asm-sh/machvec.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/machvec.h | ||
3 | * | ||
4 | * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) | ||
5 | * | ||
6 | * May be copied or modified under the terms of the GNU General Public | ||
7 | * License. See linux/COPYING for more information. | ||
8 | */ | ||
9 | |||
10 | #ifndef _ASM_SH_MACHVEC_H | ||
11 | #define _ASM_SH_MACHVEC_H | ||
12 | |||
13 | #include <linux/types.h> | ||
14 | #include <linux/time.h> | ||
15 | #include <asm/machtypes.h> | ||
16 | |||
17 | struct device; | ||
18 | |||
19 | struct sh_machine_vector { | ||
20 | void (*mv_setup)(char **cmdline_p); | ||
21 | const char *mv_name; | ||
22 | int mv_nr_irqs; | ||
23 | |||
24 | u8 (*mv_inb)(unsigned long); | ||
25 | u16 (*mv_inw)(unsigned long); | ||
26 | u32 (*mv_inl)(unsigned long); | ||
27 | void (*mv_outb)(u8, unsigned long); | ||
28 | void (*mv_outw)(u16, unsigned long); | ||
29 | void (*mv_outl)(u32, unsigned long); | ||
30 | |||
31 | u8 (*mv_inb_p)(unsigned long); | ||
32 | u16 (*mv_inw_p)(unsigned long); | ||
33 | u32 (*mv_inl_p)(unsigned long); | ||
34 | void (*mv_outb_p)(u8, unsigned long); | ||
35 | void (*mv_outw_p)(u16, unsigned long); | ||
36 | void (*mv_outl_p)(u32, unsigned long); | ||
37 | |||
38 | void (*mv_insb)(unsigned long, void *dst, unsigned long count); | ||
39 | void (*mv_insw)(unsigned long, void *dst, unsigned long count); | ||
40 | void (*mv_insl)(unsigned long, void *dst, unsigned long count); | ||
41 | void (*mv_outsb)(unsigned long, const void *src, unsigned long count); | ||
42 | void (*mv_outsw)(unsigned long, const void *src, unsigned long count); | ||
43 | void (*mv_outsl)(unsigned long, const void *src, unsigned long count); | ||
44 | |||
45 | u8 (*mv_readb)(void __iomem *); | ||
46 | u16 (*mv_readw)(void __iomem *); | ||
47 | u32 (*mv_readl)(void __iomem *); | ||
48 | void (*mv_writeb)(u8, void __iomem *); | ||
49 | void (*mv_writew)(u16, void __iomem *); | ||
50 | void (*mv_writel)(u32, void __iomem *); | ||
51 | |||
52 | int (*mv_irq_demux)(int irq); | ||
53 | |||
54 | void (*mv_init_irq)(void); | ||
55 | void (*mv_init_pci)(void); | ||
56 | |||
57 | void (*mv_heartbeat)(void); | ||
58 | |||
59 | void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); | ||
60 | void (*mv_ioport_unmap)(void __iomem *); | ||
61 | }; | ||
62 | |||
63 | extern struct sh_machine_vector sh_mv; | ||
64 | |||
65 | #define get_system_type() sh_mv.mv_name | ||
66 | |||
67 | #define __initmv \ | ||
68 | __used __section(.machvec.init) | ||
69 | |||
70 | #endif /* _ASM_SH_MACHVEC_H */ | ||
diff --git a/include/asm-sh/magicpanelr2.h b/include/asm-sh/magicpanelr2.h deleted file mode 100644 index c644a77ee357..000000000000 --- a/include/asm-sh/magicpanelr2.h +++ /dev/null | |||
@@ -1,67 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/magicpanelr2.h | ||
3 | * | ||
4 | * Copyright (C) 2007 Markus Brunner, Mark Jonas | ||
5 | * | ||
6 | * I/O addresses and bitmasks for Magic Panel Release 2 board | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_SH_MAGICPANELR2_H | ||
14 | #define __ASM_SH_MAGICPANELR2_H | ||
15 | |||
16 | #include <asm/gpio.h> | ||
17 | |||
18 | #define __IO_PREFIX mpr2 | ||
19 | #include <asm/io_generic.h> | ||
20 | |||
21 | |||
22 | #define SETBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) | mask, reg) | ||
23 | #define SETBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) | mask, reg) | ||
24 | #define SETBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) | mask, reg) | ||
25 | #define CLRBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) & ~mask, reg) | ||
26 | #define CLRBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) & ~mask, reg) | ||
27 | #define CLRBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) & ~mask, reg) | ||
28 | |||
29 | |||
30 | #define PA_LED PORT_PADR /* LED */ | ||
31 | |||
32 | |||
33 | /* BSC */ | ||
34 | #define CMNCR 0xA4FD0000UL | ||
35 | #define CS0BCR 0xA4FD0004UL | ||
36 | #define CS2BCR 0xA4FD0008UL | ||
37 | #define CS3BCR 0xA4FD000CUL | ||
38 | #define CS4BCR 0xA4FD0010UL | ||
39 | #define CS5ABCR 0xA4FD0014UL | ||
40 | #define CS5BBCR 0xA4FD0018UL | ||
41 | #define CS6ABCR 0xA4FD001CUL | ||
42 | #define CS6BBCR 0xA4FD0020UL | ||
43 | #define CS0WCR 0xA4FD0024UL | ||
44 | #define CS2WCR 0xA4FD0028UL | ||
45 | #define CS3WCR 0xA4FD002CUL | ||
46 | #define CS4WCR 0xA4FD0030UL | ||
47 | #define CS5AWCR 0xA4FD0034UL | ||
48 | #define CS5BWCR 0xA4FD0038UL | ||
49 | #define CS6AWCR 0xA4FD003CUL | ||
50 | #define CS6BWCR 0xA4FD0040UL | ||
51 | |||
52 | |||
53 | /* usb */ | ||
54 | |||
55 | #define PORT_UTRCTL 0xA405012CUL | ||
56 | #define PORT_UCLKCR_W 0xA40A0008UL | ||
57 | |||
58 | #define INTC_ICR0 0xA414FEE0UL | ||
59 | #define INTC_ICR1 0xA4140010UL | ||
60 | #define INTC_ICR2 0xA4140012UL | ||
61 | |||
62 | /* MTD */ | ||
63 | |||
64 | #define MPR2_MTD_BOOTLOADER_SIZE 0x00060000UL | ||
65 | #define MPR2_MTD_KERNEL_SIZE 0x00200000UL | ||
66 | |||
67 | #endif /* __ASM_SH_MAGICPANELR2_H */ | ||
diff --git a/include/asm-sh/mc146818rtc.h b/include/asm-sh/mc146818rtc.h deleted file mode 100644 index 0aee96a97330..000000000000 --- a/include/asm-sh/mc146818rtc.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* | ||
2 | * Machine dependent access functions for RTC registers. | ||
3 | */ | ||
4 | #ifndef _ASM_MC146818RTC_H | ||
5 | #define _ASM_MC146818RTC_H | ||
6 | |||
7 | #endif /* _ASM_MC146818RTC_H */ | ||
diff --git a/include/asm-sh/microdev.h b/include/asm-sh/microdev.h deleted file mode 100644 index 1aed15856e11..000000000000 --- a/include/asm-sh/microdev.h +++ /dev/null | |||
@@ -1,80 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm-sh/microdev.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) | ||
5 | * | ||
6 | * Definitions for the SuperH SH4-202 MicroDev board. | ||
7 | * | ||
8 | * May be copied or modified under the terms of the GNU General Public | ||
9 | * License. See linux/COPYING for more information. | ||
10 | */ | ||
11 | #ifndef __ASM_SH_MICRODEV_H | ||
12 | #define __ASM_SH_MICRODEV_H | ||
13 | |||
14 | extern void init_microdev_irq(void); | ||
15 | extern void microdev_print_fpga_intc_status(void); | ||
16 | |||
17 | /* | ||
18 | * The following are useful macros for manipulating the interrupt | ||
19 | * controller (INTC) on the CPU-board FPGA. should be noted that there | ||
20 | * is an INTC on the FPGA, and a separate INTC on the SH4-202 core - | ||
21 | * these are two different things, both of which need to be prorammed to | ||
22 | * correctly route - unfortunately, they have the same name and | ||
23 | * abbreviations! | ||
24 | */ | ||
25 | #define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */ | ||
26 | #define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */ | ||
27 | #define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */ | ||
28 | #define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */ | ||
29 | #define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */ | ||
30 | #define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */ | ||
31 | #define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */ | ||
32 | #define MICRODEV_FPGA_INTSRC_REG (MICRODEV_FPGA_INTC_BASE+0x30ul) /* Interrupt Source Register on INTC on CPU-board FPGA */ | ||
33 | #define MICRODEV_FPGA_INTREQ_REG (MICRODEV_FPGA_INTC_BASE+0x38ul) /* Interrupt Request Register on INTC on CPU-board FPGA */ | ||
34 | |||
35 | |||
36 | /* | ||
37 | * The following are the IRQ numbers for the Linux Kernel for external | ||
38 | * interrupts. i.e. the numbers seen by 'cat /proc/interrupt'. | ||
39 | */ | ||
40 | #define MICRODEV_LINUX_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ | ||
41 | #define MICRODEV_LINUX_IRQ_SERIAL1 2 /* SuperIO Serial #1 */ | ||
42 | #define MICRODEV_LINUX_IRQ_ETHERNET 3 /* on-board Ethnernet */ | ||
43 | #define MICRODEV_LINUX_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ | ||
44 | #define MICRODEV_LINUX_IRQ_USB_HC 7 /* on-board USB HC */ | ||
45 | #define MICRODEV_LINUX_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ | ||
46 | #define MICRODEV_LINUX_IRQ_IDE2 13 /* SuperIO IDE #2 */ | ||
47 | #define MICRODEV_LINUX_IRQ_IDE1 14 /* SuperIO IDE #1 */ | ||
48 | |||
49 | /* | ||
50 | * The following are the IRQ numbers for the INTC on the FPGA for | ||
51 | * external interrupts. i.e. the bits in the INTC registers in the | ||
52 | * FPGA. | ||
53 | */ | ||
54 | #define MICRODEV_FPGA_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ | ||
55 | #define MICRODEV_FPGA_IRQ_SERIAL1 3 /* SuperIO Serial #1 */ | ||
56 | #define MICRODEV_FPGA_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ | ||
57 | #define MICRODEV_FPGA_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ | ||
58 | #define MICRODEV_FPGA_IRQ_IDE1 14 /* SuperIO IDE #1 */ | ||
59 | #define MICRODEV_FPGA_IRQ_IDE2 15 /* SuperIO IDE #2 */ | ||
60 | #define MICRODEV_FPGA_IRQ_USB_HC 16 /* on-board USB HC */ | ||
61 | #define MICRODEV_FPGA_IRQ_ETHERNET 18 /* on-board Ethnernet */ | ||
62 | |||
63 | #define MICRODEV_IRQ_PCI_INTA 8 | ||
64 | #define MICRODEV_IRQ_PCI_INTB 9 | ||
65 | #define MICRODEV_IRQ_PCI_INTC 10 | ||
66 | #define MICRODEV_IRQ_PCI_INTD 11 | ||
67 | |||
68 | #define __IO_PREFIX microdev | ||
69 | #include <asm/io_generic.h> | ||
70 | |||
71 | #if defined(CONFIG_PCI) | ||
72 | unsigned char microdev_pci_inb(unsigned long port); | ||
73 | unsigned short microdev_pci_inw(unsigned long port); | ||
74 | unsigned long microdev_pci_inl(unsigned long port); | ||
75 | void microdev_pci_outb(unsigned char data, unsigned long port); | ||
76 | void microdev_pci_outw(unsigned short data, unsigned long port); | ||
77 | void microdev_pci_outl(unsigned long data, unsigned long port); | ||
78 | #endif | ||
79 | |||
80 | #endif /* __ASM_SH_MICRODEV_H */ | ||
diff --git a/include/asm-sh/migor.h b/include/asm-sh/migor.h deleted file mode 100644 index 10016e0f4a4e..000000000000 --- a/include/asm-sh/migor.h +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | #ifndef __ASM_SH_MIGOR_H | ||
2 | #define __ASM_SH_MIGOR_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/migor.h | ||
6 | * | ||
7 | * Copyright (C) 2008 Renesas Solutions | ||
8 | * | ||
9 | * Portions Copyright (C) 2007 Nobuhiro Iwamatsu | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General Public | ||
12 | * License. See the file "COPYING" in the main directory of this archive | ||
13 | * for more details. | ||
14 | * | ||
15 | */ | ||
16 | #include <asm/addrspace.h> | ||
17 | |||
18 | /* GPIO */ | ||
19 | #define PORT_PACR 0xa4050100 | ||
20 | #define PORT_PDCR 0xa4050106 | ||
21 | #define PORT_PECR 0xa4050108 | ||
22 | #define PORT_PHCR 0xa405010e | ||
23 | #define PORT_PJCR 0xa4050110 | ||
24 | #define PORT_PKCR 0xa4050112 | ||
25 | #define PORT_PLCR 0xa4050114 | ||
26 | #define PORT_PMCR 0xa4050116 | ||
27 | #define PORT_PRCR 0xa405011c | ||
28 | #define PORT_PTCR 0xa4050140 | ||
29 | #define PORT_PUCR 0xa4050142 | ||
30 | #define PORT_PVCR 0xa4050144 | ||
31 | #define PORT_PWCR 0xa4050146 | ||
32 | #define PORT_PXCR 0xa4050148 | ||
33 | #define PORT_PYCR 0xa405014a | ||
34 | #define PORT_PZCR 0xa405014c | ||
35 | #define PORT_PADR 0xa4050120 | ||
36 | #define PORT_PHDR 0xa405012e | ||
37 | #define PORT_PTDR 0xa4050160 | ||
38 | #define PORT_PWDR 0xa4050166 | ||
39 | |||
40 | #define PORT_HIZCRA 0xa4050158 | ||
41 | #define PORT_HIZCRC 0xa405015c | ||
42 | |||
43 | #define PORT_MSELCRB 0xa4050182 | ||
44 | |||
45 | #define MSTPCR1 0xa4150034 | ||
46 | #define MSTPCR2 0xa4150038 | ||
47 | |||
48 | #define PORT_PSELA 0xa405014e | ||
49 | #define PORT_PSELB 0xa4050150 | ||
50 | #define PORT_PSELC 0xa4050152 | ||
51 | #define PORT_PSELD 0xa4050154 | ||
52 | #define PORT_PSELE 0xa4050156 | ||
53 | |||
54 | #define PORT_HIZCRA 0xa4050158 | ||
55 | #define PORT_HIZCRB 0xa405015a | ||
56 | #define PORT_HIZCRC 0xa405015c | ||
57 | |||
58 | #define BSC_CS6ABCR 0xfec1001c | ||
59 | |||
60 | #include <asm/sh_mobile_lcdc.h> | ||
61 | |||
62 | int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle, | ||
63 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops); | ||
64 | |||
65 | #endif /* __ASM_SH_MIGOR_H */ | ||
diff --git a/include/asm-sh/mman.h b/include/asm-sh/mman.h deleted file mode 100644 index 156eb0225cf6..000000000000 --- a/include/asm-sh/mman.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | #ifndef __ASM_SH_MMAN_H | ||
2 | #define __ASM_SH_MMAN_H | ||
3 | |||
4 | #include <asm-generic/mman.h> | ||
5 | |||
6 | #define MAP_GROWSDOWN 0x0100 /* stack-like segment */ | ||
7 | #define MAP_DENYWRITE 0x0800 /* ETXTBSY */ | ||
8 | #define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ | ||
9 | #define MAP_LOCKED 0x2000 /* pages are locked */ | ||
10 | #define MAP_NORESERVE 0x4000 /* don't check for reservations */ | ||
11 | #define MAP_POPULATE 0x8000 /* populate (prefault) page tables */ | ||
12 | #define MAP_NONBLOCK 0x10000 /* do not block on IO */ | ||
13 | |||
14 | #define MCL_CURRENT 1 /* lock all current mappings */ | ||
15 | #define MCL_FUTURE 2 /* lock all future mappings */ | ||
16 | |||
17 | #endif /* __ASM_SH_MMAN_H */ | ||
diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h deleted file mode 100644 index fdcb93bc6d11..000000000000 --- a/include/asm-sh/mmu.h +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | #ifndef __MMU_H | ||
2 | #define __MMU_H | ||
3 | |||
4 | /* Default "unsigned long" context */ | ||
5 | typedef unsigned long mm_context_id_t[NR_CPUS]; | ||
6 | |||
7 | typedef struct { | ||
8 | #ifdef CONFIG_MMU | ||
9 | mm_context_id_t id; | ||
10 | void *vdso; | ||
11 | #else | ||
12 | struct vm_list_struct *vmlist; | ||
13 | unsigned long end_brk; | ||
14 | #endif | ||
15 | #ifdef CONFIG_BINFMT_ELF_FDPIC | ||
16 | unsigned long exec_fdpic_loadmap; | ||
17 | unsigned long interp_fdpic_loadmap; | ||
18 | #endif | ||
19 | } mm_context_t; | ||
20 | |||
21 | /* | ||
22 | * Privileged Space Mapping Buffer (PMB) definitions | ||
23 | */ | ||
24 | #define PMB_PASCR 0xff000070 | ||
25 | #define PMB_IRMCR 0xff000078 | ||
26 | |||
27 | #define PMB_ADDR 0xf6100000 | ||
28 | #define PMB_DATA 0xf7100000 | ||
29 | #define PMB_ENTRY_MAX 16 | ||
30 | #define PMB_E_MASK 0x0000000f | ||
31 | #define PMB_E_SHIFT 8 | ||
32 | |||
33 | #define PMB_SZ_16M 0x00000000 | ||
34 | #define PMB_SZ_64M 0x00000010 | ||
35 | #define PMB_SZ_128M 0x00000080 | ||
36 | #define PMB_SZ_512M 0x00000090 | ||
37 | #define PMB_SZ_MASK PMB_SZ_512M | ||
38 | #define PMB_C 0x00000008 | ||
39 | #define PMB_WT 0x00000001 | ||
40 | #define PMB_UB 0x00000200 | ||
41 | #define PMB_V 0x00000100 | ||
42 | |||
43 | #define PMB_NO_ENTRY (-1) | ||
44 | |||
45 | struct pmb_entry; | ||
46 | |||
47 | struct pmb_entry { | ||
48 | unsigned long vpn; | ||
49 | unsigned long ppn; | ||
50 | unsigned long flags; | ||
51 | |||
52 | /* | ||
53 | * 0 .. NR_PMB_ENTRIES for specific entry selection, or | ||
54 | * PMB_NO_ENTRY to search for a free one | ||
55 | */ | ||
56 | int entry; | ||
57 | |||
58 | struct pmb_entry *next; | ||
59 | /* Adjacent entry link for contiguous multi-entry mappings */ | ||
60 | struct pmb_entry *link; | ||
61 | }; | ||
62 | |||
63 | /* arch/sh/mm/pmb.c */ | ||
64 | int __set_pmb_entry(unsigned long vpn, unsigned long ppn, | ||
65 | unsigned long flags, int *entry); | ||
66 | int set_pmb_entry(struct pmb_entry *pmbe); | ||
67 | void clear_pmb_entry(struct pmb_entry *pmbe); | ||
68 | struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn, | ||
69 | unsigned long flags); | ||
70 | void pmb_free(struct pmb_entry *pmbe); | ||
71 | long pmb_remap(unsigned long virt, unsigned long phys, | ||
72 | unsigned long size, unsigned long flags); | ||
73 | void pmb_unmap(unsigned long addr); | ||
74 | |||
75 | #endif /* __MMU_H */ | ||
76 | |||
diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h deleted file mode 100644 index 8589a50febd0..000000000000 --- a/include/asm-sh/mmu_context.h +++ /dev/null | |||
@@ -1,185 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999 Niibe Yutaka | ||
3 | * Copyright (C) 2003 - 2007 Paul Mundt | ||
4 | * | ||
5 | * ASID handling idea taken from MIPS implementation. | ||
6 | */ | ||
7 | #ifndef __ASM_SH_MMU_CONTEXT_H | ||
8 | #define __ASM_SH_MMU_CONTEXT_H | ||
9 | |||
10 | #ifdef __KERNEL__ | ||
11 | #include <asm/cpu/mmu_context.h> | ||
12 | #include <asm/tlbflush.h> | ||
13 | #include <asm/uaccess.h> | ||
14 | #include <asm/io.h> | ||
15 | #include <asm-generic/mm_hooks.h> | ||
16 | |||
17 | /* | ||
18 | * The MMU "context" consists of two things: | ||
19 | * (a) TLB cache version (or round, cycle whatever expression you like) | ||
20 | * (b) ASID (Address Space IDentifier) | ||
21 | */ | ||
22 | #define MMU_CONTEXT_ASID_MASK 0x000000ff | ||
23 | #define MMU_CONTEXT_VERSION_MASK 0xffffff00 | ||
24 | #define MMU_CONTEXT_FIRST_VERSION 0x00000100 | ||
25 | #define NO_CONTEXT 0 | ||
26 | |||
27 | /* ASID is 8-bit value, so it can't be 0x100 */ | ||
28 | #define MMU_NO_ASID 0x100 | ||
29 | |||
30 | #define asid_cache(cpu) (cpu_data[cpu].asid_cache) | ||
31 | |||
32 | #ifdef CONFIG_MMU | ||
33 | #define cpu_context(cpu, mm) ((mm)->context.id[cpu]) | ||
34 | |||
35 | #define cpu_asid(cpu, mm) \ | ||
36 | (cpu_context((cpu), (mm)) & MMU_CONTEXT_ASID_MASK) | ||
37 | |||
38 | /* | ||
39 | * Virtual Page Number mask | ||
40 | */ | ||
41 | #define MMU_VPN_MASK 0xfffff000 | ||
42 | |||
43 | #if defined(CONFIG_SUPERH32) | ||
44 | #include "mmu_context_32.h" | ||
45 | #else | ||
46 | #include "mmu_context_64.h" | ||
47 | #endif | ||
48 | |||
49 | /* | ||
50 | * Get MMU context if needed. | ||
51 | */ | ||
52 | static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu) | ||
53 | { | ||
54 | unsigned long asid = asid_cache(cpu); | ||
55 | |||
56 | /* Check if we have old version of context. */ | ||
57 | if (((cpu_context(cpu, mm) ^ asid) & MMU_CONTEXT_VERSION_MASK) == 0) | ||
58 | /* It's up to date, do nothing */ | ||
59 | return; | ||
60 | |||
61 | /* It's old, we need to get new context with new version. */ | ||
62 | if (!(++asid & MMU_CONTEXT_ASID_MASK)) { | ||
63 | /* | ||
64 | * We exhaust ASID of this version. | ||
65 | * Flush all TLB and start new cycle. | ||
66 | */ | ||
67 | flush_tlb_all(); | ||
68 | |||
69 | #ifdef CONFIG_SUPERH64 | ||
70 | /* | ||
71 | * The SH-5 cache uses the ASIDs, requiring both the I and D | ||
72 | * cache to be flushed when the ASID is exhausted. Weak. | ||
73 | */ | ||
74 | flush_cache_all(); | ||
75 | #endif | ||
76 | |||
77 | /* | ||
78 | * Fix version; Note that we avoid version #0 | ||
79 | * to distingush NO_CONTEXT. | ||
80 | */ | ||
81 | if (!asid) | ||
82 | asid = MMU_CONTEXT_FIRST_VERSION; | ||
83 | } | ||
84 | |||
85 | cpu_context(cpu, mm) = asid_cache(cpu) = asid; | ||
86 | } | ||
87 | |||
88 | /* | ||
89 | * Initialize the context related info for a new mm_struct | ||
90 | * instance. | ||
91 | */ | ||
92 | static inline int init_new_context(struct task_struct *tsk, | ||
93 | struct mm_struct *mm) | ||
94 | { | ||
95 | int i; | ||
96 | |||
97 | for (i = 0; i < num_online_cpus(); i++) | ||
98 | cpu_context(i, mm) = NO_CONTEXT; | ||
99 | |||
100 | return 0; | ||
101 | } | ||
102 | |||
103 | /* | ||
104 | * After we have set current->mm to a new value, this activates | ||
105 | * the context for the new mm so we see the new mappings. | ||
106 | */ | ||
107 | static inline void activate_context(struct mm_struct *mm, unsigned int cpu) | ||
108 | { | ||
109 | get_mmu_context(mm, cpu); | ||
110 | set_asid(cpu_asid(cpu, mm)); | ||
111 | } | ||
112 | |||
113 | static inline void switch_mm(struct mm_struct *prev, | ||
114 | struct mm_struct *next, | ||
115 | struct task_struct *tsk) | ||
116 | { | ||
117 | unsigned int cpu = smp_processor_id(); | ||
118 | |||
119 | if (likely(prev != next)) { | ||
120 | cpu_set(cpu, next->cpu_vm_mask); | ||
121 | set_TTB(next->pgd); | ||
122 | activate_context(next, cpu); | ||
123 | } else | ||
124 | if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) | ||
125 | activate_context(next, cpu); | ||
126 | } | ||
127 | #else | ||
128 | #define get_mmu_context(mm) do { } while (0) | ||
129 | #define init_new_context(tsk,mm) (0) | ||
130 | #define destroy_context(mm) do { } while (0) | ||
131 | #define set_asid(asid) do { } while (0) | ||
132 | #define get_asid() (0) | ||
133 | #define cpu_asid(cpu, mm) ({ (void)cpu; 0; }) | ||
134 | #define switch_and_save_asid(asid) (0) | ||
135 | #define set_TTB(pgd) do { } while (0) | ||
136 | #define get_TTB() (0) | ||
137 | #define activate_context(mm,cpu) do { } while (0) | ||
138 | #define switch_mm(prev,next,tsk) do { } while (0) | ||
139 | #endif /* CONFIG_MMU */ | ||
140 | |||
141 | #define activate_mm(prev, next) switch_mm((prev),(next),NULL) | ||
142 | #define deactivate_mm(tsk,mm) do { } while (0) | ||
143 | #define enter_lazy_tlb(mm,tsk) do { } while (0) | ||
144 | |||
145 | #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4) | ||
146 | /* | ||
147 | * If this processor has an MMU, we need methods to turn it off/on .. | ||
148 | * paging_init() will also have to be updated for the processor in | ||
149 | * question. | ||
150 | */ | ||
151 | static inline void enable_mmu(void) | ||
152 | { | ||
153 | unsigned int cpu = smp_processor_id(); | ||
154 | |||
155 | /* Enable MMU */ | ||
156 | ctrl_outl(MMU_CONTROL_INIT, MMUCR); | ||
157 | ctrl_barrier(); | ||
158 | |||
159 | if (asid_cache(cpu) == NO_CONTEXT) | ||
160 | asid_cache(cpu) = MMU_CONTEXT_FIRST_VERSION; | ||
161 | |||
162 | set_asid(asid_cache(cpu) & MMU_CONTEXT_ASID_MASK); | ||
163 | } | ||
164 | |||
165 | static inline void disable_mmu(void) | ||
166 | { | ||
167 | unsigned long cr; | ||
168 | |||
169 | cr = ctrl_inl(MMUCR); | ||
170 | cr &= ~MMU_CONTROL_INIT; | ||
171 | ctrl_outl(cr, MMUCR); | ||
172 | |||
173 | ctrl_barrier(); | ||
174 | } | ||
175 | #else | ||
176 | /* | ||
177 | * MMU control handlers for processors lacking memory | ||
178 | * management hardware. | ||
179 | */ | ||
180 | #define enable_mmu() do { } while (0) | ||
181 | #define disable_mmu() do { } while (0) | ||
182 | #endif | ||
183 | |||
184 | #endif /* __KERNEL__ */ | ||
185 | #endif /* __ASM_SH_MMU_CONTEXT_H */ | ||
diff --git a/include/asm-sh/mmu_context_32.h b/include/asm-sh/mmu_context_32.h deleted file mode 100644 index f4f9aebd68b7..000000000000 --- a/include/asm-sh/mmu_context_32.h +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | #ifndef __ASM_SH_MMU_CONTEXT_32_H | ||
2 | #define __ASM_SH_MMU_CONTEXT_32_H | ||
3 | |||
4 | /* | ||
5 | * Destroy context related info for an mm_struct that is about | ||
6 | * to be put to rest. | ||
7 | */ | ||
8 | static inline void destroy_context(struct mm_struct *mm) | ||
9 | { | ||
10 | /* Do nothing */ | ||
11 | } | ||
12 | |||
13 | static inline void set_asid(unsigned long asid) | ||
14 | { | ||
15 | unsigned long __dummy; | ||
16 | |||
17 | __asm__ __volatile__ ("mov.l %2, %0\n\t" | ||
18 | "and %3, %0\n\t" | ||
19 | "or %1, %0\n\t" | ||
20 | "mov.l %0, %2" | ||
21 | : "=&r" (__dummy) | ||
22 | : "r" (asid), "m" (__m(MMU_PTEH)), | ||
23 | "r" (0xffffff00)); | ||
24 | } | ||
25 | |||
26 | static inline unsigned long get_asid(void) | ||
27 | { | ||
28 | unsigned long asid; | ||
29 | |||
30 | __asm__ __volatile__ ("mov.l %1, %0" | ||
31 | : "=r" (asid) | ||
32 | : "m" (__m(MMU_PTEH))); | ||
33 | asid &= MMU_CONTEXT_ASID_MASK; | ||
34 | return asid; | ||
35 | } | ||
36 | |||
37 | /* MMU_TTB is used for optimizing the fault handling. */ | ||
38 | static inline void set_TTB(pgd_t *pgd) | ||
39 | { | ||
40 | ctrl_outl((unsigned long)pgd, MMU_TTB); | ||
41 | } | ||
42 | |||
43 | static inline pgd_t *get_TTB(void) | ||
44 | { | ||
45 | return (pgd_t *)ctrl_inl(MMU_TTB); | ||
46 | } | ||
47 | #endif /* __ASM_SH_MMU_CONTEXT_32_H */ | ||
diff --git a/include/asm-sh/mmu_context_64.h b/include/asm-sh/mmu_context_64.h deleted file mode 100644 index 9649f1c07caf..000000000000 --- a/include/asm-sh/mmu_context_64.h +++ /dev/null | |||
@@ -1,78 +0,0 @@ | |||
1 | #ifndef __ASM_SH_MMU_CONTEXT_64_H | ||
2 | #define __ASM_SH_MMU_CONTEXT_64_H | ||
3 | |||
4 | /* | ||
5 | * sh64-specific mmu_context interface. | ||
6 | * | ||
7 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
8 | * Copyright (C) 2003 - 2007 Paul Mundt | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
13 | */ | ||
14 | #include <asm/cpu/registers.h> | ||
15 | #include <asm/cacheflush.h> | ||
16 | |||
17 | #define SR_ASID_MASK 0xffffffffff00ffffULL | ||
18 | #define SR_ASID_SHIFT 16 | ||
19 | |||
20 | /* | ||
21 | * Destroy context related info for an mm_struct that is about | ||
22 | * to be put to rest. | ||
23 | */ | ||
24 | static inline void destroy_context(struct mm_struct *mm) | ||
25 | { | ||
26 | /* Well, at least free TLB entries */ | ||
27 | flush_tlb_mm(mm); | ||
28 | } | ||
29 | |||
30 | static inline unsigned long get_asid(void) | ||
31 | { | ||
32 | unsigned long long sr; | ||
33 | |||
34 | asm volatile ("getcon " __SR ", %0\n\t" | ||
35 | : "=r" (sr)); | ||
36 | |||
37 | sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK; | ||
38 | return (unsigned long) sr; | ||
39 | } | ||
40 | |||
41 | /* Set ASID into SR */ | ||
42 | static inline void set_asid(unsigned long asid) | ||
43 | { | ||
44 | unsigned long long sr, pc; | ||
45 | |||
46 | asm volatile ("getcon " __SR ", %0" : "=r" (sr)); | ||
47 | |||
48 | sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT); | ||
49 | |||
50 | /* | ||
51 | * It is possible that this function may be inlined and so to avoid | ||
52 | * the assembler reporting duplicate symbols we make use of the | ||
53 | * gas trick of generating symbols using numerics and forward | ||
54 | * reference. | ||
55 | */ | ||
56 | asm volatile ("movi 1, %1\n\t" | ||
57 | "shlli %1, 28, %1\n\t" | ||
58 | "or %0, %1, %1\n\t" | ||
59 | "putcon %1, " __SR "\n\t" | ||
60 | "putcon %0, " __SSR "\n\t" | ||
61 | "movi 1f, %1\n\t" | ||
62 | "ori %1, 1 , %1\n\t" | ||
63 | "putcon %1, " __SPC "\n\t" | ||
64 | "rte\n" | ||
65 | "1:\n\t" | ||
66 | : "=r" (sr), "=r" (pc) : "0" (sr)); | ||
67 | } | ||
68 | |||
69 | /* arch/sh/kernel/cpu/sh5/entry.S */ | ||
70 | extern unsigned long switch_and_save_asid(unsigned long new_asid); | ||
71 | |||
72 | /* No spare register to twiddle, so use a software cache */ | ||
73 | extern pgd_t *mmu_pdtp_cache; | ||
74 | |||
75 | #define set_TTB(pgd) (mmu_pdtp_cache = (pgd)) | ||
76 | #define get_TTB() (mmu_pdtp_cache) | ||
77 | |||
78 | #endif /* __ASM_SH_MMU_CONTEXT_64_H */ | ||
diff --git a/include/asm-sh/mmzone.h b/include/asm-sh/mmzone.h deleted file mode 100644 index 2969253c4042..000000000000 --- a/include/asm-sh/mmzone.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | #ifndef __ASM_SH_MMZONE_H | ||
2 | #define __ASM_SH_MMZONE_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | #ifdef CONFIG_NEED_MULTIPLE_NODES | ||
7 | extern struct pglist_data *node_data[]; | ||
8 | #define NODE_DATA(nid) (node_data[nid]) | ||
9 | |||
10 | #define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) | ||
11 | #define node_end_pfn(nid) (NODE_DATA(nid)->node_start_pfn + \ | ||
12 | NODE_DATA(nid)->node_spanned_pages) | ||
13 | |||
14 | static inline int pfn_to_nid(unsigned long pfn) | ||
15 | { | ||
16 | int nid; | ||
17 | |||
18 | for (nid = 0; nid < MAX_NUMNODES; nid++) | ||
19 | if (pfn >= node_start_pfn(nid) && pfn <= node_end_pfn(nid)) | ||
20 | break; | ||
21 | |||
22 | return nid; | ||
23 | } | ||
24 | |||
25 | static inline struct pglist_data *pfn_to_pgdat(unsigned long pfn) | ||
26 | { | ||
27 | return NODE_DATA(pfn_to_nid(pfn)); | ||
28 | } | ||
29 | |||
30 | /* arch/sh/mm/numa.c */ | ||
31 | void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end); | ||
32 | #else | ||
33 | static inline void | ||
34 | setup_bootmem_node(int nid, unsigned long start, unsigned long end) | ||
35 | { | ||
36 | } | ||
37 | #endif /* CONFIG_NEED_MULTIPLE_NODES */ | ||
38 | |||
39 | /* Platform specific mem init */ | ||
40 | void __init plat_mem_setup(void); | ||
41 | |||
42 | /* arch/sh/kernel/setup.c */ | ||
43 | void __init setup_bootmem_allocator(unsigned long start_pfn); | ||
44 | void __init __add_active_range(unsigned int nid, unsigned long start_pfn, | ||
45 | unsigned long end_pfn); | ||
46 | |||
47 | #endif /* __KERNEL__ */ | ||
48 | #endif /* __ASM_SH_MMZONE_H */ | ||
diff --git a/include/asm-sh/module.h b/include/asm-sh/module.h deleted file mode 100644 index 46eccd331660..000000000000 --- a/include/asm-sh/module.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | #ifndef _ASM_SH_MODULE_H | ||
2 | #define _ASM_SH_MODULE_H | ||
3 | |||
4 | /* | ||
5 | * This file contains the SH architecture specific module code. | ||
6 | */ | ||
7 | |||
8 | struct mod_arch_specific { | ||
9 | /* Nothing to see here .. */ | ||
10 | }; | ||
11 | |||
12 | #define Elf_Shdr Elf32_Shdr | ||
13 | #define Elf_Sym Elf32_Sym | ||
14 | #define Elf_Ehdr Elf32_Ehdr | ||
15 | |||
16 | #ifdef CONFIG_CPU_LITTLE_ENDIAN | ||
17 | # ifdef CONFIG_CPU_SH2 | ||
18 | # define MODULE_PROC_FAMILY "SH2LE " | ||
19 | # elif defined CONFIG_CPU_SH3 | ||
20 | # define MODULE_PROC_FAMILY "SH3LE " | ||
21 | # elif defined CONFIG_CPU_SH4 | ||
22 | # define MODULE_PROC_FAMILY "SH4LE " | ||
23 | # elif defined CONFIG_CPU_SH5 | ||
24 | # define MODULE_PROC_FAMILY "SH5LE " | ||
25 | # else | ||
26 | # error unknown processor family | ||
27 | # endif | ||
28 | #else | ||
29 | # ifdef CONFIG_CPU_SH2 | ||
30 | # define MODULE_PROC_FAMILY "SH2BE " | ||
31 | # elif defined CONFIG_CPU_SH3 | ||
32 | # define MODULE_PROC_FAMILY "SH3BE " | ||
33 | # elif defined CONFIG_CPU_SH4 | ||
34 | # define MODULE_PROC_FAMILY "SH4BE " | ||
35 | # elif defined CONFIG_CPU_SH5 | ||
36 | # define MODULE_PROC_FAMILY "SH5BE " | ||
37 | # else | ||
38 | # error unknown processor family | ||
39 | # endif | ||
40 | #endif | ||
41 | |||
42 | #define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY | ||
43 | |||
44 | #endif /* _ASM_SH_MODULE_H */ | ||
diff --git a/include/asm-sh/msgbuf.h b/include/asm-sh/msgbuf.h deleted file mode 100644 index 517432343fb5..000000000000 --- a/include/asm-sh/msgbuf.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | #ifndef __ASM_SH_MSGBUF_H | ||
2 | #define __ASM_SH_MSGBUF_H | ||
3 | |||
4 | /* | ||
5 | * The msqid64_ds structure for i386 architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct msqid64_ds { | ||
15 | struct ipc64_perm msg_perm; | ||
16 | __kernel_time_t msg_stime; /* last msgsnd time */ | ||
17 | unsigned long __unused1; | ||
18 | __kernel_time_t msg_rtime; /* last msgrcv time */ | ||
19 | unsigned long __unused2; | ||
20 | __kernel_time_t msg_ctime; /* last change time */ | ||
21 | unsigned long __unused3; | ||
22 | unsigned long msg_cbytes; /* current number of bytes on queue */ | ||
23 | unsigned long msg_qnum; /* number of messages in queue */ | ||
24 | unsigned long msg_qbytes; /* max number of bytes on queue */ | ||
25 | __kernel_pid_t msg_lspid; /* pid of last msgsnd */ | ||
26 | __kernel_pid_t msg_lrpid; /* last receive pid */ | ||
27 | unsigned long __unused4; | ||
28 | unsigned long __unused5; | ||
29 | }; | ||
30 | |||
31 | #endif /* __ASM_SH_MSGBUF_H */ | ||
diff --git a/include/asm-sh/mutex.h b/include/asm-sh/mutex.h deleted file mode 100644 index 458c1f7fbc18..000000000000 --- a/include/asm-sh/mutex.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* | ||
2 | * Pull in the generic implementation for the mutex fastpath. | ||
3 | * | ||
4 | * TODO: implement optimized primitives instead, or leave the generic | ||
5 | * implementation in place, or pick the atomic_xchg() based generic | ||
6 | * implementation. (see asm-generic/mutex-xchg.h for details) | ||
7 | */ | ||
8 | |||
9 | #include <asm-generic/mutex-dec.h> | ||
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h deleted file mode 100644 index 77fb8bf02e4e..000000000000 --- a/include/asm-sh/page.h +++ /dev/null | |||
@@ -1,183 +0,0 @@ | |||
1 | #ifndef __ASM_SH_PAGE_H | ||
2 | #define __ASM_SH_PAGE_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 1999 Niibe Yutaka | ||
6 | */ | ||
7 | |||
8 | #include <linux/const.h> | ||
9 | |||
10 | /* PAGE_SHIFT determines the page size */ | ||
11 | #if defined(CONFIG_PAGE_SIZE_4KB) | ||
12 | # define PAGE_SHIFT 12 | ||
13 | #elif defined(CONFIG_PAGE_SIZE_8KB) | ||
14 | # define PAGE_SHIFT 13 | ||
15 | #elif defined(CONFIG_PAGE_SIZE_16KB) | ||
16 | # define PAGE_SHIFT 14 | ||
17 | #elif defined(CONFIG_PAGE_SIZE_64KB) | ||
18 | # define PAGE_SHIFT 16 | ||
19 | #else | ||
20 | # error "Bogus kernel page size?" | ||
21 | #endif | ||
22 | |||
23 | #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) | ||
24 | #define PAGE_MASK (~(PAGE_SIZE-1)) | ||
25 | #define PTE_MASK PAGE_MASK | ||
26 | |||
27 | #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) | ||
28 | #define HPAGE_SHIFT 16 | ||
29 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) | ||
30 | #define HPAGE_SHIFT 18 | ||
31 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) | ||
32 | #define HPAGE_SHIFT 20 | ||
33 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) | ||
34 | #define HPAGE_SHIFT 22 | ||
35 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) | ||
36 | #define HPAGE_SHIFT 26 | ||
37 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB) | ||
38 | #define HPAGE_SHIFT 29 | ||
39 | #endif | ||
40 | |||
41 | #ifdef CONFIG_HUGETLB_PAGE | ||
42 | #define HPAGE_SIZE (1UL << HPAGE_SHIFT) | ||
43 | #define HPAGE_MASK (~(HPAGE_SIZE-1)) | ||
44 | #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT) | ||
45 | #endif | ||
46 | |||
47 | #ifndef __ASSEMBLY__ | ||
48 | |||
49 | extern unsigned long shm_align_mask; | ||
50 | extern unsigned long max_low_pfn, min_low_pfn; | ||
51 | extern unsigned long memory_start, memory_end; | ||
52 | |||
53 | extern void clear_page(void *to); | ||
54 | extern void copy_page(void *to, void *from); | ||
55 | |||
56 | #if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \ | ||
57 | (defined(CONFIG_CPU_SH5) || defined(CONFIG_CPU_SH4) || \ | ||
58 | defined(CONFIG_SH7705_CACHE_32KB)) | ||
59 | struct page; | ||
60 | struct vm_area_struct; | ||
61 | extern void clear_user_page(void *to, unsigned long address, struct page *page); | ||
62 | extern void copy_user_page(void *to, void *from, unsigned long address, | ||
63 | struct page *page); | ||
64 | #if defined(CONFIG_CPU_SH4) | ||
65 | extern void copy_user_highpage(struct page *to, struct page *from, | ||
66 | unsigned long vaddr, struct vm_area_struct *vma); | ||
67 | #define __HAVE_ARCH_COPY_USER_HIGHPAGE | ||
68 | #endif | ||
69 | #else | ||
70 | #define clear_user_page(page, vaddr, pg) clear_page(page) | ||
71 | #define copy_user_page(to, from, vaddr, pg) copy_page(to, from) | ||
72 | #endif | ||
73 | |||
74 | /* | ||
75 | * These are used to make use of C type-checking.. | ||
76 | */ | ||
77 | #ifdef CONFIG_X2TLB | ||
78 | typedef struct { unsigned long pte_low, pte_high; } pte_t; | ||
79 | typedef struct { unsigned long long pgprot; } pgprot_t; | ||
80 | typedef struct { unsigned long long pgd; } pgd_t; | ||
81 | #define pte_val(x) \ | ||
82 | ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) | ||
83 | #define __pte(x) \ | ||
84 | ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) | ||
85 | #elif defined(CONFIG_SUPERH32) | ||
86 | typedef struct { unsigned long pte_low; } pte_t; | ||
87 | typedef struct { unsigned long pgprot; } pgprot_t; | ||
88 | typedef struct { unsigned long pgd; } pgd_t; | ||
89 | #define pte_val(x) ((x).pte_low) | ||
90 | #define __pte(x) ((pte_t) { (x) } ) | ||
91 | #else | ||
92 | typedef struct { unsigned long long pte_low; } pte_t; | ||
93 | typedef struct { unsigned long pgprot; } pgprot_t; | ||
94 | typedef struct { unsigned long pgd; } pgd_t; | ||
95 | #define pte_val(x) ((x).pte_low) | ||
96 | #define __pte(x) ((pte_t) { (x) } ) | ||
97 | #endif | ||
98 | |||
99 | #define pgd_val(x) ((x).pgd) | ||
100 | #define pgprot_val(x) ((x).pgprot) | ||
101 | |||
102 | #define __pgd(x) ((pgd_t) { (x) } ) | ||
103 | #define __pgprot(x) ((pgprot_t) { (x) } ) | ||
104 | |||
105 | typedef struct page *pgtable_t; | ||
106 | |||
107 | #endif /* !__ASSEMBLY__ */ | ||
108 | |||
109 | /* | ||
110 | * __MEMORY_START and SIZE are the physical addresses and size of RAM. | ||
111 | */ | ||
112 | #define __MEMORY_START CONFIG_MEMORY_START | ||
113 | #define __MEMORY_SIZE CONFIG_MEMORY_SIZE | ||
114 | |||
115 | /* | ||
116 | * PAGE_OFFSET is the virtual address of the start of kernel address | ||
117 | * space. | ||
118 | */ | ||
119 | #define PAGE_OFFSET CONFIG_PAGE_OFFSET | ||
120 | |||
121 | /* | ||
122 | * Virtual to physical RAM address translation. | ||
123 | * | ||
124 | * In 29 bit mode, the physical offset of RAM from address 0 is visible in | ||
125 | * the kernel virtual address space, and thus we don't have to take | ||
126 | * this into account when translating. However in 32 bit mode this offset | ||
127 | * is not visible (it is part of the PMB mapping) and so needs to be | ||
128 | * added or subtracted as required. | ||
129 | */ | ||
130 | #ifdef CONFIG_32BIT | ||
131 | #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START) | ||
132 | #define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START)) | ||
133 | #else | ||
134 | #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) | ||
135 | #define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) | ||
136 | #endif | ||
137 | |||
138 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) | ||
139 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) | ||
140 | |||
141 | /* | ||
142 | * PFN = physical frame number (ie PFN 0 == physical address 0) | ||
143 | * PFN_START is the PFN of the first page of RAM. By defining this we | ||
144 | * don't have struct page entries for the portion of address space | ||
145 | * between physical address 0 and the start of RAM. | ||
146 | */ | ||
147 | #define PFN_START (__MEMORY_START >> PAGE_SHIFT) | ||
148 | #define ARCH_PFN_OFFSET (PFN_START) | ||
149 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) | ||
150 | #ifdef CONFIG_FLATMEM | ||
151 | #define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn) | ||
152 | #endif | ||
153 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) | ||
154 | |||
155 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ | ||
156 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | ||
157 | |||
158 | #include <asm-generic/memory_model.h> | ||
159 | #include <asm-generic/page.h> | ||
160 | |||
161 | /* vDSO support */ | ||
162 | #ifdef CONFIG_VSYSCALL | ||
163 | #define __HAVE_ARCH_GATE_AREA | ||
164 | #endif | ||
165 | |||
166 | /* | ||
167 | * Some drivers need to perform DMA into kmalloc'ed buffers | ||
168 | * and so we have to increase the kmalloc minalign for this. | ||
169 | */ | ||
170 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | ||
171 | |||
172 | #ifdef CONFIG_SUPERH64 | ||
173 | /* | ||
174 | * While BYTES_PER_WORD == 4 on the current sh64 ABI, GCC will still | ||
175 | * happily generate {ld/st}.q pairs, requiring us to have 8-byte | ||
176 | * alignment to avoid traps. The kmalloc alignment is gauranteed by | ||
177 | * virtue of L1_CACHE_BYTES, requiring this to only be special cased | ||
178 | * for slab caches. | ||
179 | */ | ||
180 | #define ARCH_SLAB_MINALIGN 8 | ||
181 | #endif | ||
182 | |||
183 | #endif /* __ASM_SH_PAGE_H */ | ||
diff --git a/include/asm-sh/param.h b/include/asm-sh/param.h deleted file mode 100644 index ae245afdfd6a..000000000000 --- a/include/asm-sh/param.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | #ifndef __ASM_SH_PARAM_H | ||
2 | #define __ASM_SH_PARAM_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | # define HZ CONFIG_HZ | ||
6 | # define USER_HZ 100 /* User interfaces are in "ticks" */ | ||
7 | # define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ | ||
8 | #endif | ||
9 | |||
10 | #ifndef HZ | ||
11 | #define HZ 100 | ||
12 | #endif | ||
13 | |||
14 | #define EXEC_PAGESIZE 4096 | ||
15 | |||
16 | #ifndef NOGROUP | ||
17 | #define NOGROUP (-1) | ||
18 | #endif | ||
19 | |||
20 | #define MAXHOSTNAMELEN 64 /* max length of hostname */ | ||
21 | |||
22 | #endif /* __ASM_SH_PARAM_H */ | ||
diff --git a/include/asm-sh/parport.h b/include/asm-sh/parport.h deleted file mode 100644 index f67ba60a2acd..000000000000 --- a/include/asm-sh/parport.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999, 2000 Tim Waugh <tim@cyberelk.demon.co.uk> | ||
3 | * | ||
4 | * This file should only be included by drivers/parport/parport_pc.c. | ||
5 | */ | ||
6 | #ifndef __ASM_SH_PARPORT_H | ||
7 | #define __ASM_SH_PARPORT_H | ||
8 | |||
9 | static int __devinit parport_pc_find_isa_ports(int autoirq, int autodma); | ||
10 | |||
11 | static int __devinit parport_pc_find_nonpci_ports(int autoirq, int autodma) | ||
12 | { | ||
13 | return parport_pc_find_isa_ports(autoirq, autodma); | ||
14 | } | ||
15 | |||
16 | #endif /* __ASM_SH_PARPORT_H */ | ||
diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h deleted file mode 100644 index df1d383e18a5..000000000000 --- a/include/asm-sh/pci.h +++ /dev/null | |||
@@ -1,144 +0,0 @@ | |||
1 | #ifndef __ASM_SH_PCI_H | ||
2 | #define __ASM_SH_PCI_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | #include <linux/dma-mapping.h> | ||
7 | |||
8 | /* Can be used to override the logic in pci_scan_bus for skipping | ||
9 | already-configured bus numbers - to be used for buggy BIOSes | ||
10 | or architectures with incomplete PCI setup by the loader */ | ||
11 | |||
12 | #define pcibios_assign_all_busses() 1 | ||
13 | #define pcibios_scan_all_fns(a, b) 0 | ||
14 | |||
15 | /* | ||
16 | * A board can define one or more PCI channels that represent built-in (or | ||
17 | * external) PCI controllers. | ||
18 | */ | ||
19 | struct pci_channel { | ||
20 | struct pci_ops *pci_ops; | ||
21 | struct resource *io_resource; | ||
22 | struct resource *mem_resource; | ||
23 | int first_devfn; | ||
24 | int last_devfn; | ||
25 | }; | ||
26 | |||
27 | /* | ||
28 | * Each board initializes this array and terminates it with a NULL entry. | ||
29 | */ | ||
30 | extern struct pci_channel board_pci_channels[]; | ||
31 | |||
32 | #define PCIBIOS_MIN_IO board_pci_channels->io_resource->start | ||
33 | #define PCIBIOS_MIN_MEM board_pci_channels->mem_resource->start | ||
34 | |||
35 | /* | ||
36 | * I/O routine helpers | ||
37 | */ | ||
38 | #if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) | ||
39 | #define PCI_IO_AREA 0xFE400000 | ||
40 | #define PCI_IO_SIZE 0x00400000 | ||
41 | #elif defined(CONFIG_CPU_SH5) | ||
42 | extern unsigned long PCI_IO_AREA; | ||
43 | #define PCI_IO_SIZE 0x00010000 | ||
44 | #else | ||
45 | #define PCI_IO_AREA 0xFE240000 | ||
46 | #define PCI_IO_SIZE 0x00040000 | ||
47 | #endif | ||
48 | |||
49 | #define PCI_MEM_SIZE 0x01000000 | ||
50 | |||
51 | #define SH4_PCIIOBR_MASK 0xFFFC0000 | ||
52 | #define pci_ioaddr(addr) (PCI_IO_AREA + (addr & ~SH4_PCIIOBR_MASK)) | ||
53 | |||
54 | #if defined(CONFIG_PCI) | ||
55 | #define is_pci_ioaddr(port) \ | ||
56 | (((port) >= PCIBIOS_MIN_IO) && \ | ||
57 | ((port) < (PCIBIOS_MIN_IO + PCI_IO_SIZE))) | ||
58 | #define is_pci_memaddr(port) \ | ||
59 | (((port) >= PCIBIOS_MIN_MEM) && \ | ||
60 | ((port) < (PCIBIOS_MIN_MEM + PCI_MEM_SIZE))) | ||
61 | #else | ||
62 | #define is_pci_ioaddr(port) (0) | ||
63 | #define is_pci_memaddr(port) (0) | ||
64 | #endif | ||
65 | |||
66 | struct pci_dev; | ||
67 | |||
68 | extern void pcibios_set_master(struct pci_dev *dev); | ||
69 | |||
70 | static inline void pcibios_penalize_isa_irq(int irq, int active) | ||
71 | { | ||
72 | /* We don't do dynamic PCI IRQ allocation */ | ||
73 | } | ||
74 | |||
75 | /* Dynamic DMA mapping stuff. | ||
76 | * SuperH has everything mapped statically like x86. | ||
77 | */ | ||
78 | |||
79 | /* The PCI address space does equal the physical memory | ||
80 | * address space. The networking and block device layers use | ||
81 | * this boolean for bounce buffer decisions. | ||
82 | */ | ||
83 | #define PCI_DMA_BUS_IS_PHYS (1) | ||
84 | |||
85 | #include <linux/types.h> | ||
86 | #include <linux/slab.h> | ||
87 | #include <asm/scatterlist.h> | ||
88 | #include <linux/string.h> | ||
89 | #include <asm/io.h> | ||
90 | |||
91 | /* pci_unmap_{single,page} being a nop depends upon the | ||
92 | * configuration. | ||
93 | */ | ||
94 | #ifdef CONFIG_SH_PCIDMA_NONCOHERENT | ||
95 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | ||
96 | dma_addr_t ADDR_NAME; | ||
97 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ | ||
98 | __u32 LEN_NAME; | ||
99 | #define pci_unmap_addr(PTR, ADDR_NAME) \ | ||
100 | ((PTR)->ADDR_NAME) | ||
101 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ | ||
102 | (((PTR)->ADDR_NAME) = (VAL)) | ||
103 | #define pci_unmap_len(PTR, LEN_NAME) \ | ||
104 | ((PTR)->LEN_NAME) | ||
105 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | ||
106 | (((PTR)->LEN_NAME) = (VAL)) | ||
107 | #else | ||
108 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) | ||
109 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) | ||
110 | #define pci_unmap_addr(PTR, ADDR_NAME) (0) | ||
111 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) | ||
112 | #define pci_unmap_len(PTR, LEN_NAME) (0) | ||
113 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) | ||
114 | #endif | ||
115 | |||
116 | #ifdef CONFIG_PCI | ||
117 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, | ||
118 | enum pci_dma_burst_strategy *strat, | ||
119 | unsigned long *strategy_parameter) | ||
120 | { | ||
121 | *strat = PCI_DMA_BURST_INFINITY; | ||
122 | *strategy_parameter = ~0UL; | ||
123 | } | ||
124 | #endif | ||
125 | |||
126 | /* Board-specific fixup routines. */ | ||
127 | void pcibios_fixup(void); | ||
128 | int pcibios_init_platform(void); | ||
129 | int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); | ||
130 | |||
131 | #ifdef CONFIG_PCI_AUTO | ||
132 | int pciauto_assign_resources(int busno, struct pci_channel *hose); | ||
133 | #endif | ||
134 | |||
135 | #endif /* __KERNEL__ */ | ||
136 | |||
137 | /* generic pci stuff */ | ||
138 | #include <asm-generic/pci.h> | ||
139 | |||
140 | /* generic DMA-mapping stuff */ | ||
141 | #include <asm-generic/pci-dma-compat.h> | ||
142 | |||
143 | #endif /* __ASM_SH_PCI_H */ | ||
144 | |||
diff --git a/include/asm-sh/percpu.h b/include/asm-sh/percpu.h deleted file mode 100644 index 4db4b39a4399..000000000000 --- a/include/asm-sh/percpu.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ARCH_SH_PERCPU | ||
2 | #define __ARCH_SH_PERCPU | ||
3 | |||
4 | #include <asm-generic/percpu.h> | ||
5 | |||
6 | #endif /* __ARCH_SH_PERCPU */ | ||
diff --git a/include/asm-sh/pgalloc.h b/include/asm-sh/pgalloc.h deleted file mode 100644 index 84dd2db7104c..000000000000 --- a/include/asm-sh/pgalloc.h +++ /dev/null | |||
@@ -1,96 +0,0 @@ | |||
1 | #ifndef __ASM_SH_PGALLOC_H | ||
2 | #define __ASM_SH_PGALLOC_H | ||
3 | |||
4 | #include <linux/quicklist.h> | ||
5 | #include <asm/page.h> | ||
6 | |||
7 | #define QUICK_PGD 0 /* We preserve special mappings over free */ | ||
8 | #define QUICK_PT 1 /* Other page table pages that are zero on free */ | ||
9 | |||
10 | static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, | ||
11 | pte_t *pte) | ||
12 | { | ||
13 | set_pmd(pmd, __pmd((unsigned long)pte)); | ||
14 | } | ||
15 | |||
16 | static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, | ||
17 | pgtable_t pte) | ||
18 | { | ||
19 | set_pmd(pmd, __pmd((unsigned long)page_address(pte))); | ||
20 | } | ||
21 | #define pmd_pgtable(pmd) pmd_page(pmd) | ||
22 | |||
23 | static inline void pgd_ctor(void *x) | ||
24 | { | ||
25 | pgd_t *pgd = x; | ||
26 | |||
27 | memcpy(pgd + USER_PTRS_PER_PGD, | ||
28 | swapper_pg_dir + USER_PTRS_PER_PGD, | ||
29 | (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); | ||
30 | } | ||
31 | |||
32 | /* | ||
33 | * Allocate and free page tables. | ||
34 | */ | ||
35 | static inline pgd_t *pgd_alloc(struct mm_struct *mm) | ||
36 | { | ||
37 | return quicklist_alloc(QUICK_PGD, GFP_KERNEL | __GFP_REPEAT, pgd_ctor); | ||
38 | } | ||
39 | |||
40 | static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) | ||
41 | { | ||
42 | quicklist_free(QUICK_PGD, NULL, pgd); | ||
43 | } | ||
44 | |||
45 | static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, | ||
46 | unsigned long address) | ||
47 | { | ||
48 | return quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL); | ||
49 | } | ||
50 | |||
51 | static inline pgtable_t pte_alloc_one(struct mm_struct *mm, | ||
52 | unsigned long address) | ||
53 | { | ||
54 | struct page *page; | ||
55 | void *pg; | ||
56 | |||
57 | pg = quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL); | ||
58 | if (!pg) | ||
59 | return NULL; | ||
60 | page = virt_to_page(pg); | ||
61 | pgtable_page_ctor(page); | ||
62 | return page; | ||
63 | } | ||
64 | |||
65 | static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) | ||
66 | { | ||
67 | quicklist_free(QUICK_PT, NULL, pte); | ||
68 | } | ||
69 | |||
70 | static inline void pte_free(struct mm_struct *mm, pgtable_t pte) | ||
71 | { | ||
72 | pgtable_page_dtor(pte); | ||
73 | quicklist_free_page(QUICK_PT, NULL, pte); | ||
74 | } | ||
75 | |||
76 | #define __pte_free_tlb(tlb,pte) \ | ||
77 | do { \ | ||
78 | pgtable_page_dtor(pte); \ | ||
79 | tlb_remove_page((tlb), (pte)); \ | ||
80 | } while (0) | ||
81 | |||
82 | /* | ||
83 | * allocating and freeing a pmd is trivial: the 1-entry pmd is | ||
84 | * inside the pgd, so has no extra memory associated with it. | ||
85 | */ | ||
86 | |||
87 | #define pmd_free(mm, x) do { } while (0) | ||
88 | #define __pmd_free_tlb(tlb,x) do { } while (0) | ||
89 | |||
90 | static inline void check_pgt_cache(void) | ||
91 | { | ||
92 | quicklist_trim(QUICK_PGD, NULL, 25, 16); | ||
93 | quicklist_trim(QUICK_PT, NULL, 25, 16); | ||
94 | } | ||
95 | |||
96 | #endif /* __ASM_SH_PGALLOC_H */ | ||
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h deleted file mode 100644 index a4a8f8b93463..000000000000 --- a/include/asm-sh/pgtable.h +++ /dev/null | |||
@@ -1,152 +0,0 @@ | |||
1 | /* | ||
2 | * This file contains the functions and defines necessary to modify and | ||
3 | * use the SuperH page table tree. | ||
4 | * | ||
5 | * Copyright (C) 1999 Niibe Yutaka | ||
6 | * Copyright (C) 2002 - 2007 Paul Mundt | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file "COPYING" in the main directory of this | ||
10 | * archive for more details. | ||
11 | */ | ||
12 | #ifndef __ASM_SH_PGTABLE_H | ||
13 | #define __ASM_SH_PGTABLE_H | ||
14 | |||
15 | #include <asm-generic/pgtable-nopmd.h> | ||
16 | #include <asm/page.h> | ||
17 | |||
18 | #ifndef __ASSEMBLY__ | ||
19 | #include <asm/addrspace.h> | ||
20 | #include <asm/fixmap.h> | ||
21 | |||
22 | /* | ||
23 | * ZERO_PAGE is a global shared page that is always zero: used | ||
24 | * for zero-mapped memory areas etc.. | ||
25 | */ | ||
26 | extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; | ||
27 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) | ||
28 | |||
29 | #endif /* !__ASSEMBLY__ */ | ||
30 | |||
31 | /* | ||
32 | * Effective and physical address definitions, to aid with sign | ||
33 | * extension. | ||
34 | */ | ||
35 | #define NEFF 32 | ||
36 | #define NEFF_SIGN (1LL << (NEFF - 1)) | ||
37 | #define NEFF_MASK (-1LL << NEFF) | ||
38 | |||
39 | #ifdef CONFIG_29BIT | ||
40 | #define NPHYS 29 | ||
41 | #else | ||
42 | #define NPHYS 32 | ||
43 | #endif | ||
44 | |||
45 | #define NPHYS_SIGN (1LL << (NPHYS - 1)) | ||
46 | #define NPHYS_MASK (-1LL << NPHYS) | ||
47 | |||
48 | /* | ||
49 | * traditional two-level paging structure | ||
50 | */ | ||
51 | /* PTE bits */ | ||
52 | #if defined(CONFIG_X2TLB) || defined(CONFIG_SUPERH64) | ||
53 | # define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */ | ||
54 | #else | ||
55 | # define PTE_MAGNITUDE 2 /* 32-bit PTEs */ | ||
56 | #endif | ||
57 | #define PTE_SHIFT PAGE_SHIFT | ||
58 | #define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE) | ||
59 | |||
60 | /* PGD bits */ | ||
61 | #define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS) | ||
62 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | ||
63 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | ||
64 | |||
65 | /* Entries per level */ | ||
66 | #define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE)) | ||
67 | #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t)) | ||
68 | |||
69 | #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) | ||
70 | #define FIRST_USER_ADDRESS 0 | ||
71 | |||
72 | #ifdef CONFIG_32BIT | ||
73 | #define PHYS_ADDR_MASK 0xffffffff | ||
74 | #else | ||
75 | #define PHYS_ADDR_MASK 0x1fffffff | ||
76 | #endif | ||
77 | |||
78 | #define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK) | ||
79 | |||
80 | #ifdef CONFIG_SUPERH32 | ||
81 | #define VMALLOC_START (P3SEG) | ||
82 | #else | ||
83 | #define VMALLOC_START (0xf0000000) | ||
84 | #endif | ||
85 | #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) | ||
86 | |||
87 | #if defined(CONFIG_SUPERH32) | ||
88 | #include <asm/pgtable_32.h> | ||
89 | #else | ||
90 | #include <asm/pgtable_64.h> | ||
91 | #endif | ||
92 | |||
93 | /* | ||
94 | * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page | ||
95 | * protection for execute, and considers it the same as a read. Also, write | ||
96 | * permission implies read permission. This is the closest we can get.. | ||
97 | * | ||
98 | * SH-X2 (SH7785) and later parts take this to the opposite end of the extreme, | ||
99 | * not only supporting separate execute, read, and write bits, but having | ||
100 | * completely separate permission bits for user and kernel space. | ||
101 | */ | ||
102 | /*xwr*/ | ||
103 | #define __P000 PAGE_NONE | ||
104 | #define __P001 PAGE_READONLY | ||
105 | #define __P010 PAGE_COPY | ||
106 | #define __P011 PAGE_COPY | ||
107 | #define __P100 PAGE_EXECREAD | ||
108 | #define __P101 PAGE_EXECREAD | ||
109 | #define __P110 PAGE_COPY | ||
110 | #define __P111 PAGE_COPY | ||
111 | |||
112 | #define __S000 PAGE_NONE | ||
113 | #define __S001 PAGE_READONLY | ||
114 | #define __S010 PAGE_WRITEONLY | ||
115 | #define __S011 PAGE_SHARED | ||
116 | #define __S100 PAGE_EXECREAD | ||
117 | #define __S101 PAGE_EXECREAD | ||
118 | #define __S110 PAGE_RWX | ||
119 | #define __S111 PAGE_RWX | ||
120 | |||
121 | typedef pte_t *pte_addr_t; | ||
122 | |||
123 | #define kern_addr_valid(addr) (1) | ||
124 | |||
125 | #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ | ||
126 | remap_pfn_range(vma, vaddr, pfn, size, prot) | ||
127 | |||
128 | #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) | ||
129 | |||
130 | /* | ||
131 | * No page table caches to initialise | ||
132 | */ | ||
133 | #define pgtable_cache_init() do { } while (0) | ||
134 | |||
135 | #if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \ | ||
136 | defined(CONFIG_SH7705_CACHE_32KB)) | ||
137 | struct mm_struct; | ||
138 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | ||
139 | pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep); | ||
140 | #endif | ||
141 | |||
142 | struct vm_area_struct; | ||
143 | extern void update_mmu_cache(struct vm_area_struct * vma, | ||
144 | unsigned long address, pte_t pte); | ||
145 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; | ||
146 | extern void paging_init(void); | ||
147 | extern void page_table_range_init(unsigned long start, unsigned long end, | ||
148 | pgd_t *pgd); | ||
149 | |||
150 | #include <asm-generic/pgtable.h> | ||
151 | |||
152 | #endif /* __ASM_SH_PGTABLE_H */ | ||
diff --git a/include/asm-sh/pgtable_32.h b/include/asm-sh/pgtable_32.h deleted file mode 100644 index 72ea209195bd..000000000000 --- a/include/asm-sh/pgtable_32.h +++ /dev/null | |||
@@ -1,479 +0,0 @@ | |||
1 | #ifndef __ASM_SH_PGTABLE_32_H | ||
2 | #define __ASM_SH_PGTABLE_32_H | ||
3 | |||
4 | /* | ||
5 | * Linux PTEL encoding. | ||
6 | * | ||
7 | * Hardware and software bit definitions for the PTEL value (see below for | ||
8 | * notes on SH-X2 MMUs and 64-bit PTEs): | ||
9 | * | ||
10 | * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4). | ||
11 | * | ||
12 | * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the | ||
13 | * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set, | ||
14 | * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT). | ||
15 | * | ||
16 | * In order to keep this relatively clean, do not use these for defining | ||
17 | * SH-3 specific flags until all of the other unused bits have been | ||
18 | * exhausted. | ||
19 | * | ||
20 | * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE. | ||
21 | * | ||
22 | * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages. | ||
23 | * Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused. | ||
24 | * | ||
25 | * - On 29 bit platforms, bits 31 to 29 are used for the space attributes | ||
26 | * and timing control which (together with bit 0) are moved into the | ||
27 | * old-style PTEA on the parts that support it. | ||
28 | * | ||
29 | * XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day. | ||
30 | * | ||
31 | * SH-X2 MMUs and extended PTEs | ||
32 | * | ||
33 | * SH-X2 supports an extended mode TLB with split data arrays due to the | ||
34 | * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and | ||
35 | * SZ bit placeholders still exist in data array 1, but are implemented as | ||
36 | * reserved bits, with the real logic existing in data array 2. | ||
37 | * | ||
38 | * The downside to this is that we can no longer fit everything in to a 32-bit | ||
39 | * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus | ||
40 | * side, this gives us quite a few spare bits to play with for future usage. | ||
41 | */ | ||
42 | /* Legacy and compat mode bits */ | ||
43 | #define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */ | ||
44 | #define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */ | ||
45 | #define _PAGE_DIRTY 0x004 /* D-bit : page changed */ | ||
46 | #define _PAGE_CACHABLE 0x008 /* C-bit : cachable */ | ||
47 | #define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */ | ||
48 | #define _PAGE_RW 0x020 /* PR0-bit : write access allowed */ | ||
49 | #define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/ | ||
50 | #define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ | ||
51 | #define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ | ||
52 | #define _PAGE_PROTNONE 0x200 /* software: if not present */ | ||
53 | #define _PAGE_ACCESSED 0x400 /* software: page referenced */ | ||
54 | #define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ | ||
55 | |||
56 | #define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1) | ||
57 | #define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER) | ||
58 | |||
59 | /* Extended mode bits */ | ||
60 | #define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */ | ||
61 | #define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */ | ||
62 | #define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */ | ||
63 | #define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */ | ||
64 | |||
65 | #define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */ | ||
66 | #define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */ | ||
67 | #define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */ | ||
68 | |||
69 | #define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */ | ||
70 | #define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ | ||
71 | #define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ | ||
72 | |||
73 | /* Wrapper for extended mode pgprot twiddling */ | ||
74 | #define _PAGE_EXT(x) ((unsigned long long)(x) << 32) | ||
75 | |||
76 | /* software: moves to PTEA.TC (Timing Control) */ | ||
77 | #define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ | ||
78 | #define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ | ||
79 | |||
80 | /* software: moves to PTEA.SA[2:0] (Space Attributes) */ | ||
81 | #define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */ | ||
82 | #define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */ | ||
83 | #define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */ | ||
84 | #define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */ | ||
85 | #define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */ | ||
86 | #define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ | ||
87 | #define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ | ||
88 | |||
89 | /* Mask which drops unused bits from the PTEL value */ | ||
90 | #if defined(CONFIG_CPU_SH3) | ||
91 | #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \ | ||
92 | _PAGE_FILE | _PAGE_SZ1 | \ | ||
93 | _PAGE_HW_SHARED) | ||
94 | #elif defined(CONFIG_X2TLB) | ||
95 | /* Get rid of the legacy PR/SZ bits when using extended mode */ | ||
96 | #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \ | ||
97 | _PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK) | ||
98 | #else | ||
99 | #define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE) | ||
100 | #endif | ||
101 | |||
102 | #define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS)) | ||
103 | |||
104 | /* Hardware flags, page size encoding */ | ||
105 | #if !defined(CONFIG_MMU) | ||
106 | # define _PAGE_FLAGS_HARD 0ULL | ||
107 | #elif defined(CONFIG_X2TLB) | ||
108 | # if defined(CONFIG_PAGE_SIZE_4KB) | ||
109 | # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0) | ||
110 | # elif defined(CONFIG_PAGE_SIZE_8KB) | ||
111 | # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1) | ||
112 | # elif defined(CONFIG_PAGE_SIZE_64KB) | ||
113 | # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2) | ||
114 | # endif | ||
115 | #else | ||
116 | # if defined(CONFIG_PAGE_SIZE_4KB) | ||
117 | # define _PAGE_FLAGS_HARD _PAGE_SZ0 | ||
118 | # elif defined(CONFIG_PAGE_SIZE_64KB) | ||
119 | # define _PAGE_FLAGS_HARD _PAGE_SZ1 | ||
120 | # endif | ||
121 | #endif | ||
122 | |||
123 | #if defined(CONFIG_X2TLB) | ||
124 | # if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) | ||
125 | # define _PAGE_SZHUGE (_PAGE_EXT_ESZ2) | ||
126 | # elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) | ||
127 | # define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2) | ||
128 | # elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) | ||
129 | # define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2) | ||
130 | # elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) | ||
131 | # define _PAGE_SZHUGE (_PAGE_EXT_ESZ3) | ||
132 | # elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) | ||
133 | # define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3) | ||
134 | # endif | ||
135 | #else | ||
136 | # if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) | ||
137 | # define _PAGE_SZHUGE (_PAGE_SZ1) | ||
138 | # elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) | ||
139 | # define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) | ||
140 | # endif | ||
141 | #endif | ||
142 | |||
143 | /* | ||
144 | * Stub out _PAGE_SZHUGE if we don't have a good definition for it, | ||
145 | * to make pte_mkhuge() happy. | ||
146 | */ | ||
147 | #ifndef _PAGE_SZHUGE | ||
148 | # define _PAGE_SZHUGE (_PAGE_FLAGS_HARD) | ||
149 | #endif | ||
150 | |||
151 | #define _PAGE_CHG_MASK \ | ||
152 | (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY) | ||
153 | |||
154 | #ifndef __ASSEMBLY__ | ||
155 | |||
156 | #if defined(CONFIG_X2TLB) /* SH-X2 TLB */ | ||
157 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ | ||
158 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) | ||
159 | |||
160 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ | ||
161 | _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ | ||
162 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ | ||
163 | _PAGE_EXT_KERN_WRITE | \ | ||
164 | _PAGE_EXT_USER_READ | \ | ||
165 | _PAGE_EXT_USER_WRITE)) | ||
166 | |||
167 | #define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ | ||
168 | _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ | ||
169 | _PAGE_EXT(_PAGE_EXT_KERN_EXEC | \ | ||
170 | _PAGE_EXT_KERN_READ | \ | ||
171 | _PAGE_EXT_USER_EXEC | \ | ||
172 | _PAGE_EXT_USER_READ)) | ||
173 | |||
174 | #define PAGE_COPY PAGE_EXECREAD | ||
175 | |||
176 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ | ||
177 | _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ | ||
178 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ | ||
179 | _PAGE_EXT_USER_READ)) | ||
180 | |||
181 | #define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ | ||
182 | _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ | ||
183 | _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ | ||
184 | _PAGE_EXT_USER_WRITE)) | ||
185 | |||
186 | #define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ | ||
187 | _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ | ||
188 | _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ | ||
189 | _PAGE_EXT_KERN_READ | \ | ||
190 | _PAGE_EXT_KERN_EXEC | \ | ||
191 | _PAGE_EXT_USER_WRITE | \ | ||
192 | _PAGE_EXT_USER_READ | \ | ||
193 | _PAGE_EXT_USER_EXEC)) | ||
194 | |||
195 | #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ | ||
196 | _PAGE_DIRTY | _PAGE_ACCESSED | \ | ||
197 | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ | ||
198 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ | ||
199 | _PAGE_EXT_KERN_WRITE | \ | ||
200 | _PAGE_EXT_KERN_EXEC)) | ||
201 | |||
202 | #define PAGE_KERNEL_NOCACHE \ | ||
203 | __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ | ||
204 | _PAGE_ACCESSED | _PAGE_HW_SHARED | \ | ||
205 | _PAGE_FLAGS_HARD | \ | ||
206 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ | ||
207 | _PAGE_EXT_KERN_WRITE | \ | ||
208 | _PAGE_EXT_KERN_EXEC)) | ||
209 | |||
210 | #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ | ||
211 | _PAGE_DIRTY | _PAGE_ACCESSED | \ | ||
212 | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ | ||
213 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ | ||
214 | _PAGE_EXT_KERN_EXEC)) | ||
215 | |||
216 | #define PAGE_KERNEL_PCC(slot, type) \ | ||
217 | __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ | ||
218 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ | ||
219 | _PAGE_EXT(_PAGE_EXT_KERN_READ | \ | ||
220 | _PAGE_EXT_KERN_WRITE | \ | ||
221 | _PAGE_EXT_KERN_EXEC) \ | ||
222 | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ | ||
223 | (type)) | ||
224 | |||
225 | #elif defined(CONFIG_MMU) /* SH-X TLB */ | ||
226 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ | ||
227 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) | ||
228 | |||
229 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ | ||
230 | _PAGE_CACHABLE | _PAGE_ACCESSED | \ | ||
231 | _PAGE_FLAGS_HARD) | ||
232 | |||
233 | #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ | ||
234 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) | ||
235 | |||
236 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ | ||
237 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) | ||
238 | |||
239 | #define PAGE_EXECREAD PAGE_READONLY | ||
240 | #define PAGE_RWX PAGE_SHARED | ||
241 | #define PAGE_WRITEONLY PAGE_SHARED | ||
242 | |||
243 | #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \ | ||
244 | _PAGE_DIRTY | _PAGE_ACCESSED | \ | ||
245 | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) | ||
246 | |||
247 | #define PAGE_KERNEL_NOCACHE \ | ||
248 | __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ | ||
249 | _PAGE_ACCESSED | _PAGE_HW_SHARED | \ | ||
250 | _PAGE_FLAGS_HARD) | ||
251 | |||
252 | #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ | ||
253 | _PAGE_DIRTY | _PAGE_ACCESSED | \ | ||
254 | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) | ||
255 | |||
256 | #define PAGE_KERNEL_PCC(slot, type) \ | ||
257 | __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ | ||
258 | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ | ||
259 | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ | ||
260 | (type)) | ||
261 | #else /* no mmu */ | ||
262 | #define PAGE_NONE __pgprot(0) | ||
263 | #define PAGE_SHARED __pgprot(0) | ||
264 | #define PAGE_COPY __pgprot(0) | ||
265 | #define PAGE_EXECREAD __pgprot(0) | ||
266 | #define PAGE_RWX __pgprot(0) | ||
267 | #define PAGE_READONLY __pgprot(0) | ||
268 | #define PAGE_WRITEONLY __pgprot(0) | ||
269 | #define PAGE_KERNEL __pgprot(0) | ||
270 | #define PAGE_KERNEL_NOCACHE __pgprot(0) | ||
271 | #define PAGE_KERNEL_RO __pgprot(0) | ||
272 | |||
273 | #define PAGE_KERNEL_PCC(slot, type) \ | ||
274 | __pgprot(0) | ||
275 | #endif | ||
276 | |||
277 | #endif /* __ASSEMBLY__ */ | ||
278 | |||
279 | #ifndef __ASSEMBLY__ | ||
280 | |||
281 | /* | ||
282 | * Certain architectures need to do special things when PTEs | ||
283 | * within a page table are directly modified. Thus, the following | ||
284 | * hook is made available. | ||
285 | */ | ||
286 | #ifdef CONFIG_X2TLB | ||
287 | static inline void set_pte(pte_t *ptep, pte_t pte) | ||
288 | { | ||
289 | ptep->pte_high = pte.pte_high; | ||
290 | smp_wmb(); | ||
291 | ptep->pte_low = pte.pte_low; | ||
292 | } | ||
293 | #else | ||
294 | #define set_pte(pteptr, pteval) (*(pteptr) = pteval) | ||
295 | #endif | ||
296 | |||
297 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) | ||
298 | |||
299 | /* | ||
300 | * (pmds are folded into pgds so this doesn't get actually called, | ||
301 | * but the define is needed for a generic inline function.) | ||
302 | */ | ||
303 | #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) | ||
304 | |||
305 | #define pfn_pte(pfn, prot) \ | ||
306 | __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
307 | #define pfn_pmd(pfn, prot) \ | ||
308 | __pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
309 | |||
310 | #define pte_none(x) (!pte_val(x)) | ||
311 | #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE)) | ||
312 | |||
313 | #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) | ||
314 | |||
315 | #define pmd_none(x) (!pmd_val(x)) | ||
316 | #define pmd_present(x) (pmd_val(x)) | ||
317 | #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) | ||
318 | #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) | ||
319 | |||
320 | #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) | ||
321 | #define pte_page(x) pfn_to_page(pte_pfn(x)) | ||
322 | |||
323 | /* | ||
324 | * The following only work if pte_present() is true. | ||
325 | * Undefined behaviour if not.. | ||
326 | */ | ||
327 | #define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT)) | ||
328 | #define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY) | ||
329 | #define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED) | ||
330 | #define pte_file(pte) ((pte).pte_low & _PAGE_FILE) | ||
331 | #define pte_special(pte) (0) | ||
332 | |||
333 | #ifdef CONFIG_X2TLB | ||
334 | #define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE) | ||
335 | #else | ||
336 | #define pte_write(pte) ((pte).pte_low & _PAGE_RW) | ||
337 | #endif | ||
338 | |||
339 | #define PTE_BIT_FUNC(h,fn,op) \ | ||
340 | static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; } | ||
341 | |||
342 | #ifdef CONFIG_X2TLB | ||
343 | /* | ||
344 | * We cheat a bit in the SH-X2 TLB case. As the permission bits are | ||
345 | * individually toggled (and user permissions are entirely decoupled from | ||
346 | * kernel permissions), we attempt to couple them a bit more sanely here. | ||
347 | */ | ||
348 | PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE); | ||
349 | PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE); | ||
350 | PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE); | ||
351 | #else | ||
352 | PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW); | ||
353 | PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW); | ||
354 | PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE); | ||
355 | #endif | ||
356 | |||
357 | PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY); | ||
358 | PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY); | ||
359 | PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED); | ||
360 | PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); | ||
361 | |||
362 | static inline pte_t pte_mkspecial(pte_t pte) { return pte; } | ||
363 | |||
364 | /* | ||
365 | * Macro and implementation to make a page protection as uncachable. | ||
366 | */ | ||
367 | #define pgprot_writecombine(prot) \ | ||
368 | __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) | ||
369 | |||
370 | #define pgprot_noncached pgprot_writecombine | ||
371 | |||
372 | /* | ||
373 | * Conversion functions: convert a page and protection to a page entry, | ||
374 | * and a page entry and page directory to the page they refer to. | ||
375 | * | ||
376 | * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) | ||
377 | */ | ||
378 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | ||
379 | |||
380 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
381 | { | ||
382 | pte.pte_low &= _PAGE_CHG_MASK; | ||
383 | pte.pte_low |= pgprot_val(newprot); | ||
384 | |||
385 | #ifdef CONFIG_X2TLB | ||
386 | pte.pte_high |= pgprot_val(newprot) >> 32; | ||
387 | #endif | ||
388 | |||
389 | return pte; | ||
390 | } | ||
391 | |||
392 | #define pmd_page_vaddr(pmd) ((unsigned long)pmd_val(pmd)) | ||
393 | #define pmd_page(pmd) (virt_to_page(pmd_val(pmd))) | ||
394 | |||
395 | /* to find an entry in a page-table-directory. */ | ||
396 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) | ||
397 | #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) | ||
398 | |||
399 | /* to find an entry in a kernel page-table-directory */ | ||
400 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | ||
401 | |||
402 | /* Find an entry in the third-level page table.. */ | ||
403 | #define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
404 | #define pte_offset_kernel(dir, address) \ | ||
405 | ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) | ||
406 | #define pte_offset_map(dir, address) pte_offset_kernel(dir, address) | ||
407 | #define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address) | ||
408 | |||
409 | #define pte_unmap(pte) do { } while (0) | ||
410 | #define pte_unmap_nested(pte) do { } while (0) | ||
411 | |||
412 | #ifdef CONFIG_X2TLB | ||
413 | #define pte_ERROR(e) \ | ||
414 | printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \ | ||
415 | &(e), (e).pte_high, (e).pte_low) | ||
416 | #define pgd_ERROR(e) \ | ||
417 | printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e)) | ||
418 | #else | ||
419 | #define pte_ERROR(e) \ | ||
420 | printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) | ||
421 | #define pgd_ERROR(e) \ | ||
422 | printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) | ||
423 | #endif | ||
424 | |||
425 | /* | ||
426 | * Encode and de-code a swap entry | ||
427 | * | ||
428 | * Constraints: | ||
429 | * _PAGE_FILE at bit 0 | ||
430 | * _PAGE_PRESENT at bit 8 | ||
431 | * _PAGE_PROTNONE at bit 9 | ||
432 | * | ||
433 | * For the normal case, we encode the swap type into bits 0:7 and the | ||
434 | * swap offset into bits 10:30. For the 64-bit PTE case, we keep the | ||
435 | * preserved bits in the low 32-bits and use the upper 32 as the swap | ||
436 | * offset (along with a 5-bit type), following the same approach as x86 | ||
437 | * PAE. This keeps the logic quite simple, and allows for a full 32 | ||
438 | * PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with | ||
439 | * in the pte_low case. | ||
440 | * | ||
441 | * As is evident by the Alpha code, if we ever get a 64-bit unsigned | ||
442 | * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes | ||
443 | * much cleaner.. | ||
444 | * | ||
445 | * NOTE: We should set ZEROs at the position of _PAGE_PRESENT | ||
446 | * and _PAGE_PROTNONE bits | ||
447 | */ | ||
448 | #ifdef CONFIG_X2TLB | ||
449 | #define __swp_type(x) ((x).val & 0x1f) | ||
450 | #define __swp_offset(x) ((x).val >> 5) | ||
451 | #define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5}) | ||
452 | #define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high }) | ||
453 | #define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val }) | ||
454 | |||
455 | /* | ||
456 | * Encode and decode a nonlinear file mapping entry | ||
457 | */ | ||
458 | #define pte_to_pgoff(pte) ((pte).pte_high) | ||
459 | #define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) }) | ||
460 | |||
461 | #define PTE_FILE_MAX_BITS 32 | ||
462 | #else | ||
463 | #define __swp_type(x) ((x).val & 0xff) | ||
464 | #define __swp_offset(x) ((x).val >> 10) | ||
465 | #define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10}) | ||
466 | |||
467 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 }) | ||
468 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 }) | ||
469 | |||
470 | /* | ||
471 | * Encode and decode a nonlinear file mapping entry | ||
472 | */ | ||
473 | #define PTE_FILE_MAX_BITS 29 | ||
474 | #define pte_to_pgoff(pte) (pte_val(pte) >> 1) | ||
475 | #define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE }) | ||
476 | #endif | ||
477 | |||
478 | #endif /* __ASSEMBLY__ */ | ||
479 | #endif /* __ASM_SH_PGTABLE_32_H */ | ||
diff --git a/include/asm-sh/pgtable_64.h b/include/asm-sh/pgtable_64.h deleted file mode 100644 index c78990cda557..000000000000 --- a/include/asm-sh/pgtable_64.h +++ /dev/null | |||
@@ -1,314 +0,0 @@ | |||
1 | #ifndef __ASM_SH_PGTABLE_64_H | ||
2 | #define __ASM_SH_PGTABLE_64_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-sh/pgtable_64.h | ||
6 | * | ||
7 | * This file contains the functions and defines necessary to modify and use | ||
8 | * the SuperH page table tree. | ||
9 | * | ||
10 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
11 | * Copyright (C) 2003, 2004 Paul Mundt | ||
12 | * Copyright (C) 2003, 2004 Richard Curnow | ||
13 | * | ||
14 | * This file is subject to the terms and conditions of the GNU General Public | ||
15 | * License. See the file "COPYING" in the main directory of this archive | ||
16 | * for more details. | ||
17 | */ | ||
18 | #include <linux/threads.h> | ||
19 | #include <asm/processor.h> | ||
20 | #include <asm/page.h> | ||
21 | |||
22 | /* | ||
23 | * Error outputs. | ||
24 | */ | ||
25 | #define pte_ERROR(e) \ | ||
26 | printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e)) | ||
27 | #define pgd_ERROR(e) \ | ||
28 | printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) | ||
29 | |||
30 | /* | ||
31 | * Table setting routines. Used within arch/mm only. | ||
32 | */ | ||
33 | #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) | ||
34 | |||
35 | static __inline__ void set_pte(pte_t *pteptr, pte_t pteval) | ||
36 | { | ||
37 | unsigned long long x = ((unsigned long long) pteval.pte_low); | ||
38 | unsigned long long *xp = (unsigned long long *) pteptr; | ||
39 | /* | ||
40 | * Sign-extend based on NPHYS. | ||
41 | */ | ||
42 | *(xp) = (x & NPHYS_SIGN) ? (x | NPHYS_MASK) : x; | ||
43 | } | ||
44 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) | ||
45 | |||
46 | static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep) | ||
47 | { | ||
48 | pmd_val(*pmdp) = (unsigned long) ptep; | ||
49 | } | ||
50 | |||
51 | /* | ||
52 | * PGD defines. Top level. | ||
53 | */ | ||
54 | |||
55 | /* To find an entry in a generic PGD. */ | ||
56 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) | ||
57 | #define __pgd_offset(address) pgd_index(address) | ||
58 | #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) | ||
59 | |||
60 | /* To find an entry in a kernel PGD. */ | ||
61 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | ||
62 | |||
63 | /* | ||
64 | * PMD level access routines. Same notes as above. | ||
65 | */ | ||
66 | #define _PMD_EMPTY 0x0 | ||
67 | /* Either the PMD is empty or present, it's not paged out */ | ||
68 | #define pmd_present(pmd_entry) (pmd_val(pmd_entry) & _PAGE_PRESENT) | ||
69 | #define pmd_clear(pmd_entry_p) (set_pmd((pmd_entry_p), __pmd(_PMD_EMPTY))) | ||
70 | #define pmd_none(pmd_entry) (pmd_val((pmd_entry)) == _PMD_EMPTY) | ||
71 | #define pmd_bad(pmd_entry) ((pmd_val(pmd_entry) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) | ||
72 | |||
73 | #define pmd_page_vaddr(pmd_entry) \ | ||
74 | ((unsigned long) __va(pmd_val(pmd_entry) & PAGE_MASK)) | ||
75 | |||
76 | #define pmd_page(pmd) \ | ||
77 | (virt_to_page(pmd_val(pmd))) | ||
78 | |||
79 | /* PMD to PTE dereferencing */ | ||
80 | #define pte_index(address) \ | ||
81 | ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
82 | |||
83 | #define pte_offset_kernel(dir, addr) \ | ||
84 | ((pte_t *) ((pmd_val(*(dir))) & PAGE_MASK) + pte_index((addr))) | ||
85 | |||
86 | #define pte_offset_map(dir,addr) pte_offset_kernel(dir, addr) | ||
87 | #define pte_offset_map_nested(dir,addr) pte_offset_kernel(dir, addr) | ||
88 | #define pte_unmap(pte) do { } while (0) | ||
89 | #define pte_unmap_nested(pte) do { } while (0) | ||
90 | |||
91 | #ifndef __ASSEMBLY__ | ||
92 | #define IOBASE_VADDR 0xff000000 | ||
93 | #define IOBASE_END 0xffffffff | ||
94 | |||
95 | /* | ||
96 | * PTEL coherent flags. | ||
97 | * See Chapter 17 ST50 CPU Core Volume 1, Architecture. | ||
98 | */ | ||
99 | /* The bits that are required in the SH-5 TLB are placed in the h/w-defined | ||
100 | positions, to avoid expensive bit shuffling on every refill. The remaining | ||
101 | bits are used for s/w purposes and masked out on each refill. | ||
102 | |||
103 | Note, the PTE slots are used to hold data of type swp_entry_t when a page is | ||
104 | swapped out. Only the _PAGE_PRESENT flag is significant when the page is | ||
105 | swapped out, and it must be placed so that it doesn't overlap either the | ||
106 | type or offset fields of swp_entry_t. For x86, offset is at [31:8] and type | ||
107 | at [6:1], with _PAGE_PRESENT at bit 0 for both pte_t and swp_entry_t. This | ||
108 | scheme doesn't map to SH-5 because bit [0] controls cacheability. So bit | ||
109 | [2] is used for _PAGE_PRESENT and the type field of swp_entry_t is split | ||
110 | into 2 pieces. That is handled by SWP_ENTRY and SWP_TYPE below. */ | ||
111 | #define _PAGE_WT 0x001 /* CB0: if cacheable, 1->write-thru, 0->write-back */ | ||
112 | #define _PAGE_DEVICE 0x001 /* CB0: if uncacheable, 1->device (i.e. no write-combining or reordering at bus level) */ | ||
113 | #define _PAGE_CACHABLE 0x002 /* CB1: uncachable/cachable */ | ||
114 | #define _PAGE_PRESENT 0x004 /* software: page referenced */ | ||
115 | #define _PAGE_FILE 0x004 /* software: only when !present */ | ||
116 | #define _PAGE_SIZE0 0x008 /* SZ0-bit : size of page */ | ||
117 | #define _PAGE_SIZE1 0x010 /* SZ1-bit : size of page */ | ||
118 | #define _PAGE_SHARED 0x020 /* software: reflects PTEH's SH */ | ||
119 | #define _PAGE_READ 0x040 /* PR0-bit : read access allowed */ | ||
120 | #define _PAGE_EXECUTE 0x080 /* PR1-bit : execute access allowed */ | ||
121 | #define _PAGE_WRITE 0x100 /* PR2-bit : write access allowed */ | ||
122 | #define _PAGE_USER 0x200 /* PR3-bit : user space access allowed */ | ||
123 | #define _PAGE_DIRTY 0x400 /* software: page accessed in write */ | ||
124 | #define _PAGE_ACCESSED 0x800 /* software: page referenced */ | ||
125 | |||
126 | /* Mask which drops software flags */ | ||
127 | #define _PAGE_FLAGS_HARDWARE_MASK 0xfffffffffffff3dbLL | ||
128 | |||
129 | /* | ||
130 | * HugeTLB support | ||
131 | */ | ||
132 | #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) | ||
133 | #define _PAGE_SZHUGE (_PAGE_SIZE0) | ||
134 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) | ||
135 | #define _PAGE_SZHUGE (_PAGE_SIZE1) | ||
136 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB) | ||
137 | #define _PAGE_SZHUGE (_PAGE_SIZE0 | _PAGE_SIZE1) | ||
138 | #endif | ||
139 | |||
140 | /* | ||
141 | * Stub out _PAGE_SZHUGE if we don't have a good definition for it, | ||
142 | * to make pte_mkhuge() happy. | ||
143 | */ | ||
144 | #ifndef _PAGE_SZHUGE | ||
145 | # define _PAGE_SZHUGE (0) | ||
146 | #endif | ||
147 | |||
148 | /* | ||
149 | * Default flags for a Kernel page. | ||
150 | * This is fundametally also SHARED because the main use of this define | ||
151 | * (other than for PGD/PMD entries) is for the VMALLOC pool which is | ||
152 | * contextless. | ||
153 | * | ||
154 | * _PAGE_EXECUTE is required for modules | ||
155 | * | ||
156 | */ | ||
157 | #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ | ||
158 | _PAGE_EXECUTE | \ | ||
159 | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_DIRTY | \ | ||
160 | _PAGE_SHARED) | ||
161 | |||
162 | /* Default flags for a User page */ | ||
163 | #define _PAGE_TABLE (_KERNPG_TABLE | _PAGE_USER) | ||
164 | |||
165 | #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) | ||
166 | |||
167 | /* | ||
168 | * We have full permissions (Read/Write/Execute/Shared). | ||
169 | */ | ||
170 | #define _PAGE_COMMON (_PAGE_PRESENT | _PAGE_USER | \ | ||
171 | _PAGE_CACHABLE | _PAGE_ACCESSED) | ||
172 | |||
173 | #define PAGE_NONE __pgprot(_PAGE_CACHABLE | _PAGE_ACCESSED) | ||
174 | #define PAGE_SHARED __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_WRITE | \ | ||
175 | _PAGE_SHARED) | ||
176 | #define PAGE_EXECREAD __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_EXECUTE) | ||
177 | |||
178 | /* | ||
179 | * We need to include PAGE_EXECUTE in PAGE_COPY because it is the default | ||
180 | * protection mode for the stack. | ||
181 | */ | ||
182 | #define PAGE_COPY PAGE_EXECREAD | ||
183 | |||
184 | #define PAGE_READONLY __pgprot(_PAGE_COMMON | _PAGE_READ) | ||
185 | #define PAGE_WRITEONLY __pgprot(_PAGE_COMMON | _PAGE_WRITE) | ||
186 | #define PAGE_RWX __pgprot(_PAGE_COMMON | _PAGE_READ | \ | ||
187 | _PAGE_WRITE | _PAGE_EXECUTE) | ||
188 | #define PAGE_KERNEL __pgprot(_KERNPG_TABLE) | ||
189 | |||
190 | #define PAGE_KERNEL_NOCACHE \ | ||
191 | __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ | ||
192 | _PAGE_EXECUTE | _PAGE_ACCESSED | \ | ||
193 | _PAGE_DIRTY | _PAGE_SHARED) | ||
194 | |||
195 | /* Make it a device mapping for maximum safety (e.g. for mapping device | ||
196 | registers into user-space via /dev/map). */ | ||
197 | #define pgprot_noncached(x) __pgprot(((x).pgprot & ~(_PAGE_CACHABLE)) | _PAGE_DEVICE) | ||
198 | #define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) | ||
199 | |||
200 | /* | ||
201 | * Handling allocation failures during page table setup. | ||
202 | */ | ||
203 | extern void __handle_bad_pmd_kernel(pmd_t * pmd); | ||
204 | #define __handle_bad_pmd(x) __handle_bad_pmd_kernel(x) | ||
205 | |||
206 | /* | ||
207 | * PTE level access routines. | ||
208 | * | ||
209 | * Note1: | ||
210 | * It's the tree walk leaf. This is physical address to be stored. | ||
211 | * | ||
212 | * Note 2: | ||
213 | * Regarding the choice of _PTE_EMPTY: | ||
214 | |||
215 | We must choose a bit pattern that cannot be valid, whether or not the page | ||
216 | is present. bit[2]==1 => present, bit[2]==0 => swapped out. If swapped | ||
217 | out, bits [31:8], [6:3], [1:0] are under swapper control, so only bit[7] is | ||
218 | left for us to select. If we force bit[7]==0 when swapped out, we could use | ||
219 | the combination bit[7,2]=2'b10 to indicate an empty PTE. Alternatively, if | ||
220 | we force bit[7]==1 when swapped out, we can use all zeroes to indicate | ||
221 | empty. This is convenient, because the page tables get cleared to zero | ||
222 | when they are allocated. | ||
223 | |||
224 | */ | ||
225 | #define _PTE_EMPTY 0x0 | ||
226 | #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) | ||
227 | #define pte_clear(mm,addr,xp) (set_pte_at(mm, addr, xp, __pte(_PTE_EMPTY))) | ||
228 | #define pte_none(x) (pte_val(x) == _PTE_EMPTY) | ||
229 | |||
230 | /* | ||
231 | * Some definitions to translate between mem_map, PTEs, and page | ||
232 | * addresses: | ||
233 | */ | ||
234 | |||
235 | /* | ||
236 | * Given a PTE, return the index of the mem_map[] entry corresponding | ||
237 | * to the page frame the PTE. Get the absolute physical address, make | ||
238 | * a relative physical address and translate it to an index. | ||
239 | */ | ||
240 | #define pte_pagenr(x) (((unsigned long) (pte_val(x)) - \ | ||
241 | __MEMORY_START) >> PAGE_SHIFT) | ||
242 | |||
243 | /* | ||
244 | * Given a PTE, return the "struct page *". | ||
245 | */ | ||
246 | #define pte_page(x) (mem_map + pte_pagenr(x)) | ||
247 | |||
248 | /* | ||
249 | * Return number of (down rounded) MB corresponding to x pages. | ||
250 | */ | ||
251 | #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) | ||
252 | |||
253 | |||
254 | /* | ||
255 | * The following have defined behavior only work if pte_present() is true. | ||
256 | */ | ||
257 | static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } | ||
258 | static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } | ||
259 | static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } | ||
260 | static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } | ||
261 | static inline int pte_special(pte_t pte){ return 0; } | ||
262 | |||
263 | static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_WRITE)); return pte; } | ||
264 | static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } | ||
265 | static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; } | ||
266 | static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_WRITE)); return pte; } | ||
267 | static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } | ||
268 | static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } | ||
269 | static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; } | ||
270 | static inline pte_t pte_mkspecial(pte_t pte) { return pte; } | ||
271 | |||
272 | |||
273 | /* | ||
274 | * Conversion functions: convert a page and protection to a page entry. | ||
275 | * | ||
276 | * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) | ||
277 | */ | ||
278 | #define mk_pte(page,pgprot) \ | ||
279 | ({ \ | ||
280 | pte_t __pte; \ | ||
281 | \ | ||
282 | set_pte(&__pte, __pte((((page)-mem_map) << PAGE_SHIFT) | \ | ||
283 | __MEMORY_START | pgprot_val((pgprot)))); \ | ||
284 | __pte; \ | ||
285 | }) | ||
286 | |||
287 | /* | ||
288 | * This takes a (absolute) physical page address that is used | ||
289 | * by the remapping functions | ||
290 | */ | ||
291 | #define mk_pte_phys(physpage, pgprot) \ | ||
292 | ({ pte_t __pte; set_pte(&__pte, __pte(physpage | pgprot_val(pgprot))); __pte; }) | ||
293 | |||
294 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
295 | { set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } | ||
296 | |||
297 | /* Encode and decode a swap entry */ | ||
298 | #define __swp_type(x) (((x).val & 3) + (((x).val >> 1) & 0x3c)) | ||
299 | #define __swp_offset(x) ((x).val >> 8) | ||
300 | #define __swp_entry(type, offset) ((swp_entry_t) { ((offset << 8) + ((type & 0x3c) << 1) + (type & 3)) }) | ||
301 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | ||
302 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | ||
303 | |||
304 | /* Encode and decode a nonlinear file mapping entry */ | ||
305 | #define PTE_FILE_MAX_BITS 29 | ||
306 | #define pte_to_pgoff(pte) (pte_val(pte)) | ||
307 | #define pgoff_to_pte(off) ((pte_t) { (off) | _PAGE_FILE }) | ||
308 | |||
309 | #endif /* !__ASSEMBLY__ */ | ||
310 | |||
311 | #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
312 | #define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
313 | |||
314 | #endif /* __ASM_SH_PGTABLE_64_H */ | ||
diff --git a/include/asm-sh/pm.h b/include/asm-sh/pm.h deleted file mode 100644 index 56fdbd6b1c94..000000000000 --- a/include/asm-sh/pm.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright 2006 (c) Andriy Skulysh <askulysh@gmail.com> | ||
7 | * | ||
8 | */ | ||
9 | #ifndef __ASM_SH_PM_H | ||
10 | #define __ASM_SH_PM_H | ||
11 | |||
12 | extern u8 wakeup_start; | ||
13 | extern u8 wakeup_end; | ||
14 | |||
15 | void pm_enter(void); | ||
16 | |||
17 | #endif | ||
diff --git a/include/asm-sh/poll.h b/include/asm-sh/poll.h deleted file mode 100644 index c98509d3149e..000000000000 --- a/include/asm-sh/poll.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/poll.h> | ||
diff --git a/include/asm-sh/posix_types.h b/include/asm-sh/posix_types.h deleted file mode 100644 index 4eeb723aee7e..000000000000 --- a/include/asm-sh/posix_types.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifdef __KERNEL__ | ||
2 | # ifdef CONFIG_SUPERH32 | ||
3 | # include "posix_types_32.h" | ||
4 | # else | ||
5 | # include "posix_types_64.h" | ||
6 | # endif | ||
7 | #else | ||
8 | # ifdef __SH5__ | ||
9 | # include "posix_types_64.h" | ||
10 | # else | ||
11 | # include "posix_types_32.h" | ||
12 | # endif | ||
13 | #endif /* __KERNEL__ */ | ||
diff --git a/include/asm-sh/posix_types_32.h b/include/asm-sh/posix_types_32.h deleted file mode 100644 index 0a3d2f54ab27..000000000000 --- a/include/asm-sh/posix_types_32.h +++ /dev/null | |||
@@ -1,122 +0,0 @@ | |||
1 | #ifndef __ASM_SH_POSIX_TYPES_H | ||
2 | #define __ASM_SH_POSIX_TYPES_H | ||
3 | |||
4 | /* | ||
5 | * This file is generally used by user-level software, so you need to | ||
6 | * be a little careful about namespace pollution etc. Also, we cannot | ||
7 | * assume GCC is being used. | ||
8 | */ | ||
9 | |||
10 | typedef unsigned long __kernel_ino_t; | ||
11 | typedef unsigned short __kernel_mode_t; | ||
12 | typedef unsigned short __kernel_nlink_t; | ||
13 | typedef long __kernel_off_t; | ||
14 | typedef int __kernel_pid_t; | ||
15 | typedef unsigned short __kernel_ipc_pid_t; | ||
16 | typedef unsigned short __kernel_uid_t; | ||
17 | typedef unsigned short __kernel_gid_t; | ||
18 | typedef unsigned int __kernel_size_t; | ||
19 | typedef int __kernel_ssize_t; | ||
20 | typedef int __kernel_ptrdiff_t; | ||
21 | typedef long __kernel_time_t; | ||
22 | typedef long __kernel_suseconds_t; | ||
23 | typedef long __kernel_clock_t; | ||
24 | typedef int __kernel_timer_t; | ||
25 | typedef int __kernel_clockid_t; | ||
26 | typedef int __kernel_daddr_t; | ||
27 | typedef char * __kernel_caddr_t; | ||
28 | typedef unsigned short __kernel_uid16_t; | ||
29 | typedef unsigned short __kernel_gid16_t; | ||
30 | typedef unsigned int __kernel_uid32_t; | ||
31 | typedef unsigned int __kernel_gid32_t; | ||
32 | |||
33 | typedef unsigned short __kernel_old_uid_t; | ||
34 | typedef unsigned short __kernel_old_gid_t; | ||
35 | typedef unsigned short __kernel_old_dev_t; | ||
36 | |||
37 | #ifdef __GNUC__ | ||
38 | typedef long long __kernel_loff_t; | ||
39 | #endif | ||
40 | |||
41 | typedef struct { | ||
42 | #if defined(__KERNEL__) || defined(__USE_ALL) | ||
43 | int val[2]; | ||
44 | #else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ | ||
45 | int __val[2]; | ||
46 | #endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ | ||
47 | } __kernel_fsid_t; | ||
48 | |||
49 | #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) | ||
50 | |||
51 | #undef __FD_SET | ||
52 | static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) | ||
53 | { | ||
54 | unsigned long __tmp = __fd / __NFDBITS; | ||
55 | unsigned long __rem = __fd % __NFDBITS; | ||
56 | __fdsetp->fds_bits[__tmp] |= (1UL<<__rem); | ||
57 | } | ||
58 | |||
59 | #undef __FD_CLR | ||
60 | static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp) | ||
61 | { | ||
62 | unsigned long __tmp = __fd / __NFDBITS; | ||
63 | unsigned long __rem = __fd % __NFDBITS; | ||
64 | __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem); | ||
65 | } | ||
66 | |||
67 | |||
68 | #undef __FD_ISSET | ||
69 | static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) | ||
70 | { | ||
71 | unsigned long __tmp = __fd / __NFDBITS; | ||
72 | unsigned long __rem = __fd % __NFDBITS; | ||
73 | return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0; | ||
74 | } | ||
75 | |||
76 | /* | ||
77 | * This will unroll the loop for the normal constant case (8 ints, | ||
78 | * for a 256-bit fd_set) | ||
79 | */ | ||
80 | #undef __FD_ZERO | ||
81 | static __inline__ void __FD_ZERO(__kernel_fd_set *__p) | ||
82 | { | ||
83 | unsigned long *__tmp = __p->fds_bits; | ||
84 | int __i; | ||
85 | |||
86 | if (__builtin_constant_p(__FDSET_LONGS)) { | ||
87 | switch (__FDSET_LONGS) { | ||
88 | case 16: | ||
89 | __tmp[ 0] = 0; __tmp[ 1] = 0; | ||
90 | __tmp[ 2] = 0; __tmp[ 3] = 0; | ||
91 | __tmp[ 4] = 0; __tmp[ 5] = 0; | ||
92 | __tmp[ 6] = 0; __tmp[ 7] = 0; | ||
93 | __tmp[ 8] = 0; __tmp[ 9] = 0; | ||
94 | __tmp[10] = 0; __tmp[11] = 0; | ||
95 | __tmp[12] = 0; __tmp[13] = 0; | ||
96 | __tmp[14] = 0; __tmp[15] = 0; | ||
97 | return; | ||
98 | |||
99 | case 8: | ||
100 | __tmp[ 0] = 0; __tmp[ 1] = 0; | ||
101 | __tmp[ 2] = 0; __tmp[ 3] = 0; | ||
102 | __tmp[ 4] = 0; __tmp[ 5] = 0; | ||
103 | __tmp[ 6] = 0; __tmp[ 7] = 0; | ||
104 | return; | ||
105 | |||
106 | case 4: | ||
107 | __tmp[ 0] = 0; __tmp[ 1] = 0; | ||
108 | __tmp[ 2] = 0; __tmp[ 3] = 0; | ||
109 | return; | ||
110 | } | ||
111 | } | ||
112 | __i = __FDSET_LONGS; | ||
113 | while (__i) { | ||
114 | __i--; | ||
115 | *__tmp = 0; | ||
116 | __tmp++; | ||
117 | } | ||
118 | } | ||
119 | |||
120 | #endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ | ||
121 | |||
122 | #endif /* __ASM_SH_POSIX_TYPES_H */ | ||
diff --git a/include/asm-sh/posix_types_64.h b/include/asm-sh/posix_types_64.h deleted file mode 100644 index 0620317a6f0f..000000000000 --- a/include/asm-sh/posix_types_64.h +++ /dev/null | |||
@@ -1,131 +0,0 @@ | |||
1 | #ifndef __ASM_SH64_POSIX_TYPES_H | ||
2 | #define __ASM_SH64_POSIX_TYPES_H | ||
3 | |||
4 | /* | ||
5 | * This file is subject to the terms and conditions of the GNU General Public | ||
6 | * License. See the file "COPYING" in the main directory of this archive | ||
7 | * for more details. | ||
8 | * | ||
9 | * include/asm-sh64/posix_types.h | ||
10 | * | ||
11 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
12 | * Copyright (C) 2003 Paul Mundt | ||
13 | * | ||
14 | * This file is generally used by user-level software, so you need to | ||
15 | * be a little careful about namespace pollution etc. Also, we cannot | ||
16 | * assume GCC is being used. | ||
17 | */ | ||
18 | |||
19 | typedef unsigned long __kernel_ino_t; | ||
20 | typedef unsigned short __kernel_mode_t; | ||
21 | typedef unsigned short __kernel_nlink_t; | ||
22 | typedef long __kernel_off_t; | ||
23 | typedef int __kernel_pid_t; | ||
24 | typedef unsigned short __kernel_ipc_pid_t; | ||
25 | typedef unsigned short __kernel_uid_t; | ||
26 | typedef unsigned short __kernel_gid_t; | ||
27 | typedef long unsigned int __kernel_size_t; | ||
28 | typedef int __kernel_ssize_t; | ||
29 | typedef int __kernel_ptrdiff_t; | ||
30 | typedef long __kernel_time_t; | ||
31 | typedef long __kernel_suseconds_t; | ||
32 | typedef long __kernel_clock_t; | ||
33 | typedef int __kernel_timer_t; | ||
34 | typedef int __kernel_clockid_t; | ||
35 | typedef int __kernel_daddr_t; | ||
36 | typedef char * __kernel_caddr_t; | ||
37 | typedef unsigned short __kernel_uid16_t; | ||
38 | typedef unsigned short __kernel_gid16_t; | ||
39 | typedef unsigned int __kernel_uid32_t; | ||
40 | typedef unsigned int __kernel_gid32_t; | ||
41 | |||
42 | typedef unsigned short __kernel_old_uid_t; | ||
43 | typedef unsigned short __kernel_old_gid_t; | ||
44 | typedef unsigned short __kernel_old_dev_t; | ||
45 | |||
46 | #ifdef __GNUC__ | ||
47 | typedef long long __kernel_loff_t; | ||
48 | #endif | ||
49 | |||
50 | typedef struct { | ||
51 | #if defined(__KERNEL__) || defined(__USE_ALL) | ||
52 | int val[2]; | ||
53 | #else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ | ||
54 | int __val[2]; | ||
55 | #endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ | ||
56 | } __kernel_fsid_t; | ||
57 | |||
58 | #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) | ||
59 | |||
60 | #undef __FD_SET | ||
61 | static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) | ||
62 | { | ||
63 | unsigned long __tmp = __fd / __NFDBITS; | ||
64 | unsigned long __rem = __fd % __NFDBITS; | ||
65 | __fdsetp->fds_bits[__tmp] |= (1UL<<__rem); | ||
66 | } | ||
67 | |||
68 | #undef __FD_CLR | ||
69 | static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp) | ||
70 | { | ||
71 | unsigned long __tmp = __fd / __NFDBITS; | ||
72 | unsigned long __rem = __fd % __NFDBITS; | ||
73 | __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem); | ||
74 | } | ||
75 | |||
76 | |||
77 | #undef __FD_ISSET | ||
78 | static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) | ||
79 | { | ||
80 | unsigned long __tmp = __fd / __NFDBITS; | ||
81 | unsigned long __rem = __fd % __NFDBITS; | ||
82 | return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0; | ||
83 | } | ||
84 | |||
85 | /* | ||
86 | * This will unroll the loop for the normal constant case (8 ints, | ||
87 | * for a 256-bit fd_set) | ||
88 | */ | ||
89 | #undef __FD_ZERO | ||
90 | static __inline__ void __FD_ZERO(__kernel_fd_set *__p) | ||
91 | { | ||
92 | unsigned long *__tmp = __p->fds_bits; | ||
93 | int __i; | ||
94 | |||
95 | if (__builtin_constant_p(__FDSET_LONGS)) { | ||
96 | switch (__FDSET_LONGS) { | ||
97 | case 16: | ||
98 | __tmp[ 0] = 0; __tmp[ 1] = 0; | ||
99 | __tmp[ 2] = 0; __tmp[ 3] = 0; | ||
100 | __tmp[ 4] = 0; __tmp[ 5] = 0; | ||
101 | __tmp[ 6] = 0; __tmp[ 7] = 0; | ||
102 | __tmp[ 8] = 0; __tmp[ 9] = 0; | ||
103 | __tmp[10] = 0; __tmp[11] = 0; | ||
104 | __tmp[12] = 0; __tmp[13] = 0; | ||
105 | __tmp[14] = 0; __tmp[15] = 0; | ||
106 | return; | ||
107 | |||
108 | case 8: | ||
109 | __tmp[ 0] = 0; __tmp[ 1] = 0; | ||
110 | __tmp[ 2] = 0; __tmp[ 3] = 0; | ||
111 | __tmp[ 4] = 0; __tmp[ 5] = 0; | ||
112 | __tmp[ 6] = 0; __tmp[ 7] = 0; | ||
113 | return; | ||
114 | |||
115 | case 4: | ||
116 | __tmp[ 0] = 0; __tmp[ 1] = 0; | ||
117 | __tmp[ 2] = 0; __tmp[ 3] = 0; | ||
118 | return; | ||
119 | } | ||
120 | } | ||
121 | __i = __FDSET_LONGS; | ||
122 | while (__i) { | ||
123 | __i--; | ||
124 | *__tmp = 0; | ||
125 | __tmp++; | ||
126 | } | ||
127 | } | ||
128 | |||
129 | #endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ | ||
130 | |||
131 | #endif /* __ASM_SH64_POSIX_TYPES_H */ | ||
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h deleted file mode 100644 index 15d9f92ca383..000000000000 --- a/include/asm-sh/processor.h +++ /dev/null | |||
@@ -1,66 +0,0 @@ | |||
1 | #ifndef __ASM_SH_PROCESSOR_H | ||
2 | #define __ASM_SH_PROCESSOR_H | ||
3 | |||
4 | #include <asm/cpu-features.h> | ||
5 | #include <asm/segment.h> | ||
6 | |||
7 | #ifndef __ASSEMBLY__ | ||
8 | /* | ||
9 | * CPU type and hardware bug flags. Kept separately for each CPU. | ||
10 | * | ||
11 | * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry | ||
12 | * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c | ||
13 | * for parsing the subtype in get_cpu_subtype(). | ||
14 | */ | ||
15 | enum cpu_type { | ||
16 | /* SH-2 types */ | ||
17 | CPU_SH7619, | ||
18 | |||
19 | /* SH-2A types */ | ||
20 | CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG, | ||
21 | |||
22 | /* SH-3 types */ | ||
23 | CPU_SH7705, CPU_SH7706, CPU_SH7707, | ||
24 | CPU_SH7708, CPU_SH7708S, CPU_SH7708R, | ||
25 | CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712, | ||
26 | CPU_SH7720, CPU_SH7721, CPU_SH7729, | ||
27 | |||
28 | /* SH-4 types */ | ||
29 | CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, | ||
30 | CPU_SH7760, CPU_SH4_202, CPU_SH4_501, | ||
31 | |||
32 | /* SH-4A types */ | ||
33 | CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, | ||
34 | CPU_SH7723, CPU_SHX3, | ||
35 | |||
36 | /* SH4AL-DSP types */ | ||
37 | CPU_SH7343, CPU_SH7722, CPU_SH7366, | ||
38 | |||
39 | /* SH-5 types */ | ||
40 | CPU_SH5_101, CPU_SH5_103, | ||
41 | |||
42 | /* Unknown subtype */ | ||
43 | CPU_SH_NONE | ||
44 | }; | ||
45 | |||
46 | /* Forward decl */ | ||
47 | struct sh_cpuinfo; | ||
48 | |||
49 | /* arch/sh/kernel/setup.c */ | ||
50 | const char *get_cpu_subtype(struct sh_cpuinfo *c); | ||
51 | |||
52 | #ifdef CONFIG_VSYSCALL | ||
53 | int vsyscall_init(void); | ||
54 | #else | ||
55 | #define vsyscall_init() do { } while (0) | ||
56 | #endif | ||
57 | |||
58 | #endif /* __ASSEMBLY__ */ | ||
59 | |||
60 | #ifdef CONFIG_SUPERH32 | ||
61 | # include "processor_32.h" | ||
62 | #else | ||
63 | # include "processor_64.h" | ||
64 | #endif | ||
65 | |||
66 | #endif /* __ASM_SH_PROCESSOR_H */ | ||
diff --git a/include/asm-sh/processor_32.h b/include/asm-sh/processor_32.h deleted file mode 100644 index 0dadd75bd93c..000000000000 --- a/include/asm-sh/processor_32.h +++ /dev/null | |||
@@ -1,216 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/processor.h | ||
3 | * | ||
4 | * Copyright (C) 1999, 2000 Niibe Yutaka | ||
5 | * Copyright (C) 2002, 2003 Paul Mundt | ||
6 | */ | ||
7 | |||
8 | #ifndef __ASM_SH_PROCESSOR_32_H | ||
9 | #define __ASM_SH_PROCESSOR_32_H | ||
10 | #ifdef __KERNEL__ | ||
11 | |||
12 | #include <linux/compiler.h> | ||
13 | #include <asm/page.h> | ||
14 | #include <asm/types.h> | ||
15 | #include <asm/cache.h> | ||
16 | #include <asm/ptrace.h> | ||
17 | |||
18 | /* | ||
19 | * Default implementation of macro that returns current | ||
20 | * instruction pointer ("program counter"). | ||
21 | */ | ||
22 | #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n.align 2\n1:":"=z" (pc)); pc; }) | ||
23 | |||
24 | /* Core Processor Version Register */ | ||
25 | #define CCN_PVR 0xff000030 | ||
26 | #define CCN_CVR 0xff000040 | ||
27 | #define CCN_PRR 0xff000044 | ||
28 | |||
29 | struct sh_cpuinfo { | ||
30 | unsigned int type; | ||
31 | int cut_major, cut_minor; | ||
32 | unsigned long loops_per_jiffy; | ||
33 | unsigned long asid_cache; | ||
34 | |||
35 | struct cache_info icache; /* Primary I-cache */ | ||
36 | struct cache_info dcache; /* Primary D-cache */ | ||
37 | struct cache_info scache; /* Secondary cache */ | ||
38 | |||
39 | unsigned long flags; | ||
40 | } __attribute__ ((aligned(L1_CACHE_BYTES))); | ||
41 | |||
42 | extern struct sh_cpuinfo cpu_data[]; | ||
43 | #define boot_cpu_data cpu_data[0] | ||
44 | #define current_cpu_data cpu_data[smp_processor_id()] | ||
45 | #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] | ||
46 | |||
47 | /* | ||
48 | * User space process size: 2GB. | ||
49 | * | ||
50 | * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff | ||
51 | */ | ||
52 | #define TASK_SIZE 0x7c000000UL | ||
53 | |||
54 | #define STACK_TOP TASK_SIZE | ||
55 | #define STACK_TOP_MAX STACK_TOP | ||
56 | |||
57 | /* This decides where the kernel will search for a free chunk of vm | ||
58 | * space during mmap's. | ||
59 | */ | ||
60 | #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) | ||
61 | |||
62 | /* | ||
63 | * Bit of SR register | ||
64 | * | ||
65 | * FD-bit: | ||
66 | * When it's set, it means the processor doesn't have right to use FPU, | ||
67 | * and it results exception when the floating operation is executed. | ||
68 | * | ||
69 | * IMASK-bit: | ||
70 | * Interrupt level mask | ||
71 | */ | ||
72 | #define SR_DSP 0x00001000 | ||
73 | #define SR_IMASK 0x000000f0 | ||
74 | #define SR_FD 0x00008000 | ||
75 | |||
76 | /* | ||
77 | * FPU structure and data | ||
78 | */ | ||
79 | |||
80 | struct sh_fpu_hard_struct { | ||
81 | unsigned long fp_regs[16]; | ||
82 | unsigned long xfp_regs[16]; | ||
83 | unsigned long fpscr; | ||
84 | unsigned long fpul; | ||
85 | |||
86 | long status; /* software status information */ | ||
87 | }; | ||
88 | |||
89 | /* Dummy fpu emulator */ | ||
90 | struct sh_fpu_soft_struct { | ||
91 | unsigned long fp_regs[16]; | ||
92 | unsigned long xfp_regs[16]; | ||
93 | unsigned long fpscr; | ||
94 | unsigned long fpul; | ||
95 | |||
96 | unsigned char lookahead; | ||
97 | unsigned long entry_pc; | ||
98 | }; | ||
99 | |||
100 | union sh_fpu_union { | ||
101 | struct sh_fpu_hard_struct hard; | ||
102 | struct sh_fpu_soft_struct soft; | ||
103 | }; | ||
104 | |||
105 | struct thread_struct { | ||
106 | /* Saved registers when thread is descheduled */ | ||
107 | unsigned long sp; | ||
108 | unsigned long pc; | ||
109 | |||
110 | /* Hardware debugging registers */ | ||
111 | unsigned long ubc_pc; | ||
112 | |||
113 | /* floating point info */ | ||
114 | union sh_fpu_union fpu; | ||
115 | }; | ||
116 | |||
117 | /* Count of active tasks with UBC settings */ | ||
118 | extern int ubc_usercnt; | ||
119 | |||
120 | #define INIT_THREAD { \ | ||
121 | .sp = sizeof(init_stack) + (long) &init_stack, \ | ||
122 | } | ||
123 | |||
124 | /* | ||
125 | * Do necessary setup to start up a newly executed thread. | ||
126 | */ | ||
127 | #define start_thread(regs, new_pc, new_sp) \ | ||
128 | set_fs(USER_DS); \ | ||
129 | regs->pr = 0; \ | ||
130 | regs->sr = SR_FD; /* User mode. */ \ | ||
131 | regs->pc = new_pc; \ | ||
132 | regs->regs[15] = new_sp | ||
133 | |||
134 | /* Forward declaration, a strange C thing */ | ||
135 | struct task_struct; | ||
136 | struct mm_struct; | ||
137 | |||
138 | /* Free all resources held by a thread. */ | ||
139 | extern void release_thread(struct task_struct *); | ||
140 | |||
141 | /* Prepare to copy thread state - unlazy all lazy status */ | ||
142 | #define prepare_to_copy(tsk) do { } while (0) | ||
143 | |||
144 | /* | ||
145 | * create a kernel thread without removing it from tasklists | ||
146 | */ | ||
147 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | ||
148 | |||
149 | /* Copy and release all segment info associated with a VM */ | ||
150 | #define copy_segments(p, mm) do { } while(0) | ||
151 | #define release_segments(mm) do { } while(0) | ||
152 | |||
153 | /* | ||
154 | * FPU lazy state save handling. | ||
155 | */ | ||
156 | |||
157 | static __inline__ void disable_fpu(void) | ||
158 | { | ||
159 | unsigned long __dummy; | ||
160 | |||
161 | /* Set FD flag in SR */ | ||
162 | __asm__ __volatile__("stc sr, %0\n\t" | ||
163 | "or %1, %0\n\t" | ||
164 | "ldc %0, sr" | ||
165 | : "=&r" (__dummy) | ||
166 | : "r" (SR_FD)); | ||
167 | } | ||
168 | |||
169 | static __inline__ void enable_fpu(void) | ||
170 | { | ||
171 | unsigned long __dummy; | ||
172 | |||
173 | /* Clear out FD flag in SR */ | ||
174 | __asm__ __volatile__("stc sr, %0\n\t" | ||
175 | "and %1, %0\n\t" | ||
176 | "ldc %0, sr" | ||
177 | : "=&r" (__dummy) | ||
178 | : "r" (~SR_FD)); | ||
179 | } | ||
180 | |||
181 | /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ | ||
182 | #define FPSCR_INIT 0x00080000 | ||
183 | |||
184 | #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ | ||
185 | #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ | ||
186 | |||
187 | /* | ||
188 | * Return saved PC of a blocked thread. | ||
189 | */ | ||
190 | #define thread_saved_pc(tsk) (tsk->thread.pc) | ||
191 | |||
192 | void show_trace(struct task_struct *tsk, unsigned long *sp, | ||
193 | struct pt_regs *regs); | ||
194 | extern unsigned long get_wchan(struct task_struct *p); | ||
195 | |||
196 | #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) | ||
197 | #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) | ||
198 | |||
199 | #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") | ||
200 | #define cpu_relax() barrier() | ||
201 | |||
202 | #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ | ||
203 | defined(CONFIG_CPU_SH4) | ||
204 | #define PREFETCH_STRIDE L1_CACHE_BYTES | ||
205 | #define ARCH_HAS_PREFETCH | ||
206 | #define ARCH_HAS_PREFETCHW | ||
207 | static inline void prefetch(void *x) | ||
208 | { | ||
209 | __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); | ||
210 | } | ||
211 | |||
212 | #define prefetchw(x) prefetch(x) | ||
213 | #endif | ||
214 | |||
215 | #endif /* __KERNEL__ */ | ||
216 | #endif /* __ASM_SH_PROCESSOR_32_H */ | ||
diff --git a/include/asm-sh/processor_64.h b/include/asm-sh/processor_64.h deleted file mode 100644 index fc7fc685ba27..000000000000 --- a/include/asm-sh/processor_64.h +++ /dev/null | |||
@@ -1,275 +0,0 @@ | |||
1 | #ifndef __ASM_SH_PROCESSOR_64_H | ||
2 | #define __ASM_SH_PROCESSOR_64_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-sh/processor_64.h | ||
6 | * | ||
7 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
8 | * Copyright (C) 2003 Paul Mundt | ||
9 | * Copyright (C) 2004 Richard Curnow | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General Public | ||
12 | * License. See the file "COPYING" in the main directory of this archive | ||
13 | * for more details. | ||
14 | */ | ||
15 | #ifndef __ASSEMBLY__ | ||
16 | |||
17 | #include <linux/compiler.h> | ||
18 | #include <asm/page.h> | ||
19 | #include <asm/types.h> | ||
20 | #include <asm/cache.h> | ||
21 | #include <asm/ptrace.h> | ||
22 | #include <asm/cpu/registers.h> | ||
23 | |||
24 | /* | ||
25 | * Default implementation of macro that returns current | ||
26 | * instruction pointer ("program counter"). | ||
27 | */ | ||
28 | #define current_text_addr() ({ \ | ||
29 | void *pc; \ | ||
30 | unsigned long long __dummy = 0; \ | ||
31 | __asm__("gettr tr0, %1\n\t" \ | ||
32 | "pta 4, tr0\n\t" \ | ||
33 | "gettr tr0, %0\n\t" \ | ||
34 | "ptabs %1, tr0\n\t" \ | ||
35 | :"=r" (pc), "=r" (__dummy) \ | ||
36 | : "1" (__dummy)); \ | ||
37 | pc; }) | ||
38 | |||
39 | /* | ||
40 | * TLB information structure | ||
41 | * | ||
42 | * Defined for both I and D tlb, per-processor. | ||
43 | */ | ||
44 | struct tlb_info { | ||
45 | unsigned long long next; | ||
46 | unsigned long long first; | ||
47 | unsigned long long last; | ||
48 | |||
49 | unsigned int entries; | ||
50 | unsigned int step; | ||
51 | |||
52 | unsigned long flags; | ||
53 | }; | ||
54 | |||
55 | struct sh_cpuinfo { | ||
56 | enum cpu_type type; | ||
57 | unsigned long loops_per_jiffy; | ||
58 | unsigned long asid_cache; | ||
59 | |||
60 | unsigned int cpu_clock, master_clock, bus_clock, module_clock; | ||
61 | |||
62 | /* Cache info */ | ||
63 | struct cache_info icache; | ||
64 | struct cache_info dcache; | ||
65 | struct cache_info scache; | ||
66 | |||
67 | /* TLB info */ | ||
68 | struct tlb_info itlb; | ||
69 | struct tlb_info dtlb; | ||
70 | |||
71 | unsigned long flags; | ||
72 | }; | ||
73 | |||
74 | extern struct sh_cpuinfo cpu_data[]; | ||
75 | #define boot_cpu_data cpu_data[0] | ||
76 | #define current_cpu_data cpu_data[smp_processor_id()] | ||
77 | #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] | ||
78 | |||
79 | #endif | ||
80 | |||
81 | /* | ||
82 | * User space process size: 2GB - 4k. | ||
83 | */ | ||
84 | #define TASK_SIZE 0x7ffff000UL | ||
85 | |||
86 | #define STACK_TOP TASK_SIZE | ||
87 | #define STACK_TOP_MAX STACK_TOP | ||
88 | |||
89 | /* This decides where the kernel will search for a free chunk of vm | ||
90 | * space during mmap's. | ||
91 | */ | ||
92 | #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) | ||
93 | |||
94 | /* | ||
95 | * Bit of SR register | ||
96 | * | ||
97 | * FD-bit: | ||
98 | * When it's set, it means the processor doesn't have right to use FPU, | ||
99 | * and it results exception when the floating operation is executed. | ||
100 | * | ||
101 | * IMASK-bit: | ||
102 | * Interrupt level mask | ||
103 | * | ||
104 | * STEP-bit: | ||
105 | * Single step bit | ||
106 | * | ||
107 | */ | ||
108 | #if defined(CONFIG_SH64_SR_WATCH) | ||
109 | #define SR_MMU 0x84000000 | ||
110 | #else | ||
111 | #define SR_MMU 0x80000000 | ||
112 | #endif | ||
113 | |||
114 | #define SR_IMASK 0x000000f0 | ||
115 | #define SR_FD 0x00008000 | ||
116 | #define SR_SSTEP 0x08000000 | ||
117 | |||
118 | #ifndef __ASSEMBLY__ | ||
119 | |||
120 | /* | ||
121 | * FPU structure and data : require 8-byte alignment as we need to access it | ||
122 | with fld.p, fst.p | ||
123 | */ | ||
124 | |||
125 | struct sh_fpu_hard_struct { | ||
126 | unsigned long fp_regs[64]; | ||
127 | unsigned int fpscr; | ||
128 | /* long status; * software status information */ | ||
129 | }; | ||
130 | |||
131 | #if 0 | ||
132 | /* Dummy fpu emulator */ | ||
133 | struct sh_fpu_soft_struct { | ||
134 | unsigned long long fp_regs[32]; | ||
135 | unsigned int fpscr; | ||
136 | unsigned char lookahead; | ||
137 | unsigned long entry_pc; | ||
138 | }; | ||
139 | #endif | ||
140 | |||
141 | union sh_fpu_union { | ||
142 | struct sh_fpu_hard_struct hard; | ||
143 | /* 'hard' itself only produces 32 bit alignment, yet we need | ||
144 | to access it using 64 bit load/store as well. */ | ||
145 | unsigned long long alignment_dummy; | ||
146 | }; | ||
147 | |||
148 | struct thread_struct { | ||
149 | unsigned long sp; | ||
150 | unsigned long pc; | ||
151 | /* This stores the address of the pt_regs built during a context | ||
152 | switch, or of the register save area built for a kernel mode | ||
153 | exception. It is used for backtracing the stack of a sleeping task | ||
154 | or one that traps in kernel mode. */ | ||
155 | struct pt_regs *kregs; | ||
156 | /* This stores the address of the pt_regs constructed on entry from | ||
157 | user mode. It is a fixed value over the lifetime of a process, or | ||
158 | NULL for a kernel thread. */ | ||
159 | struct pt_regs *uregs; | ||
160 | |||
161 | unsigned long trap_no, error_code; | ||
162 | unsigned long address; | ||
163 | /* Hardware debugging registers may come here */ | ||
164 | |||
165 | /* floating point info */ | ||
166 | union sh_fpu_union fpu; | ||
167 | }; | ||
168 | |||
169 | #define INIT_MMAP \ | ||
170 | { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } | ||
171 | |||
172 | extern struct pt_regs fake_swapper_regs; | ||
173 | |||
174 | #define INIT_THREAD { \ | ||
175 | .sp = sizeof(init_stack) + \ | ||
176 | (long) &init_stack, \ | ||
177 | .pc = 0, \ | ||
178 | .kregs = &fake_swapper_regs, \ | ||
179 | .uregs = NULL, \ | ||
180 | .trap_no = 0, \ | ||
181 | .error_code = 0, \ | ||
182 | .address = 0, \ | ||
183 | .fpu = { { { 0, } }, } \ | ||
184 | } | ||
185 | |||
186 | /* | ||
187 | * Do necessary setup to start up a newly executed thread. | ||
188 | */ | ||
189 | #define SR_USER (SR_MMU | SR_FD) | ||
190 | |||
191 | #define start_thread(regs, new_pc, new_sp) \ | ||
192 | set_fs(USER_DS); \ | ||
193 | regs->sr = SR_USER; /* User mode. */ \ | ||
194 | regs->pc = new_pc - 4; /* Compensate syscall exit */ \ | ||
195 | regs->pc |= 1; /* Set SHmedia ! */ \ | ||
196 | regs->regs[18] = 0; \ | ||
197 | regs->regs[15] = new_sp | ||
198 | |||
199 | /* Forward declaration, a strange C thing */ | ||
200 | struct task_struct; | ||
201 | struct mm_struct; | ||
202 | |||
203 | /* Free all resources held by a thread. */ | ||
204 | extern void release_thread(struct task_struct *); | ||
205 | /* | ||
206 | * create a kernel thread without removing it from tasklists | ||
207 | */ | ||
208 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | ||
209 | |||
210 | |||
211 | /* Copy and release all segment info associated with a VM */ | ||
212 | #define copy_segments(p, mm) do { } while (0) | ||
213 | #define release_segments(mm) do { } while (0) | ||
214 | #define forget_segments() do { } while (0) | ||
215 | #define prepare_to_copy(tsk) do { } while (0) | ||
216 | /* | ||
217 | * FPU lazy state save handling. | ||
218 | */ | ||
219 | |||
220 | static inline void disable_fpu(void) | ||
221 | { | ||
222 | unsigned long long __dummy; | ||
223 | |||
224 | /* Set FD flag in SR */ | ||
225 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
226 | "or %0, %1, %0\n\t" | ||
227 | "putcon %0, " __SR "\n\t" | ||
228 | : "=&r" (__dummy) | ||
229 | : "r" (SR_FD)); | ||
230 | } | ||
231 | |||
232 | static inline void enable_fpu(void) | ||
233 | { | ||
234 | unsigned long long __dummy; | ||
235 | |||
236 | /* Clear out FD flag in SR */ | ||
237 | __asm__ __volatile__("getcon " __SR ", %0\n\t" | ||
238 | "and %0, %1, %0\n\t" | ||
239 | "putcon %0, " __SR "\n\t" | ||
240 | : "=&r" (__dummy) | ||
241 | : "r" (~SR_FD)); | ||
242 | } | ||
243 | |||
244 | /* Round to nearest, no exceptions on inexact, overflow, underflow, | ||
245 | zero-divide, invalid. Configure option for whether to flush denorms to | ||
246 | zero, or except if a denorm is encountered. */ | ||
247 | #if defined(CONFIG_SH64_FPU_DENORM_FLUSH) | ||
248 | #define FPSCR_INIT 0x00040000 | ||
249 | #else | ||
250 | #define FPSCR_INIT 0x00000000 | ||
251 | #endif | ||
252 | |||
253 | #ifdef CONFIG_SH_FPU | ||
254 | /* Initialise the FP state of a task */ | ||
255 | void fpinit(struct sh_fpu_hard_struct *fpregs); | ||
256 | #else | ||
257 | #define fpinit(fpregs) do { } while (0) | ||
258 | #endif | ||
259 | |||
260 | extern struct task_struct *last_task_used_math; | ||
261 | |||
262 | /* | ||
263 | * Return saved PC of a blocked thread. | ||
264 | */ | ||
265 | #define thread_saved_pc(tsk) (tsk->thread.pc) | ||
266 | |||
267 | extern unsigned long get_wchan(struct task_struct *p); | ||
268 | |||
269 | #define KSTK_EIP(tsk) ((tsk)->thread.pc) | ||
270 | #define KSTK_ESP(tsk) ((tsk)->thread.sp) | ||
271 | |||
272 | #define cpu_relax() barrier() | ||
273 | |||
274 | #endif /* __ASSEMBLY__ */ | ||
275 | #endif /* __ASM_SH_PROCESSOR_64_H */ | ||
diff --git a/include/asm-sh/ptrace.h b/include/asm-sh/ptrace.h deleted file mode 100644 index 643ab5a7cf3b..000000000000 --- a/include/asm-sh/ptrace.h +++ /dev/null | |||
@@ -1,130 +0,0 @@ | |||
1 | #ifndef __ASM_SH_PTRACE_H | ||
2 | #define __ASM_SH_PTRACE_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 1999, 2000 Niibe Yutaka | ||
6 | * | ||
7 | */ | ||
8 | #if defined(__SH5__) | ||
9 | struct pt_regs { | ||
10 | unsigned long long pc; | ||
11 | unsigned long long sr; | ||
12 | unsigned long long syscall_nr; | ||
13 | unsigned long long regs[63]; | ||
14 | unsigned long long tregs[8]; | ||
15 | unsigned long long pad[2]; | ||
16 | }; | ||
17 | #else | ||
18 | /* | ||
19 | * GCC defines register number like this: | ||
20 | * ----------------------------- | ||
21 | * 0 - 15 are integer registers | ||
22 | * 17 - 22 are control/special registers | ||
23 | * 24 - 39 fp registers | ||
24 | * 40 - 47 xd registers | ||
25 | * 48 - fpscr register | ||
26 | * ----------------------------- | ||
27 | * | ||
28 | * We follows above, except: | ||
29 | * 16 --- program counter (PC) | ||
30 | * 22 --- syscall # | ||
31 | * 23 --- floating point communication register | ||
32 | */ | ||
33 | #define REG_REG0 0 | ||
34 | #define REG_REG15 15 | ||
35 | |||
36 | #define REG_PC 16 | ||
37 | |||
38 | #define REG_PR 17 | ||
39 | #define REG_SR 18 | ||
40 | #define REG_GBR 19 | ||
41 | #define REG_MACH 20 | ||
42 | #define REG_MACL 21 | ||
43 | |||
44 | #define REG_SYSCALL 22 | ||
45 | |||
46 | #define REG_FPREG0 23 | ||
47 | #define REG_FPREG15 38 | ||
48 | #define REG_XFREG0 39 | ||
49 | #define REG_XFREG15 54 | ||
50 | |||
51 | #define REG_FPSCR 55 | ||
52 | #define REG_FPUL 56 | ||
53 | |||
54 | /* | ||
55 | * This struct defines the way the registers are stored on the | ||
56 | * kernel stack during a system call or other kernel entry. | ||
57 | */ | ||
58 | struct pt_regs { | ||
59 | unsigned long regs[16]; | ||
60 | unsigned long pc; | ||
61 | unsigned long pr; | ||
62 | unsigned long sr; | ||
63 | unsigned long gbr; | ||
64 | unsigned long mach; | ||
65 | unsigned long macl; | ||
66 | long tra; | ||
67 | }; | ||
68 | |||
69 | /* | ||
70 | * This struct defines the way the DSP registers are stored on the | ||
71 | * kernel stack during a system call or other kernel entry. | ||
72 | */ | ||
73 | struct pt_dspregs { | ||
74 | unsigned long a1; | ||
75 | unsigned long a0g; | ||
76 | unsigned long a1g; | ||
77 | unsigned long m0; | ||
78 | unsigned long m1; | ||
79 | unsigned long a0; | ||
80 | unsigned long x0; | ||
81 | unsigned long x1; | ||
82 | unsigned long y0; | ||
83 | unsigned long y1; | ||
84 | unsigned long dsr; | ||
85 | unsigned long rs; | ||
86 | unsigned long re; | ||
87 | unsigned long mod; | ||
88 | }; | ||
89 | |||
90 | #define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ | ||
91 | |||
92 | #define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ | ||
93 | #define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ | ||
94 | |||
95 | #define PTRACE_GETDSPREGS 55 | ||
96 | #define PTRACE_SETDSPREGS 56 | ||
97 | #endif | ||
98 | |||
99 | #ifdef __KERNEL__ | ||
100 | #include <asm/addrspace.h> | ||
101 | |||
102 | #define user_mode(regs) (((regs)->sr & 0x40000000)==0) | ||
103 | #define instruction_pointer(regs) ((unsigned long)(regs)->pc) | ||
104 | |||
105 | extern void show_regs(struct pt_regs *); | ||
106 | |||
107 | #ifdef CONFIG_SH_DSP | ||
108 | #define task_pt_regs(task) \ | ||
109 | ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \ | ||
110 | - sizeof(struct pt_dspregs) - sizeof(unsigned long)) - 1) | ||
111 | #else | ||
112 | #define task_pt_regs(task) \ | ||
113 | ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \ | ||
114 | - sizeof(unsigned long)) - 1) | ||
115 | #endif | ||
116 | |||
117 | static inline unsigned long profile_pc(struct pt_regs *regs) | ||
118 | { | ||
119 | unsigned long pc = instruction_pointer(regs); | ||
120 | |||
121 | #ifdef P2SEG | ||
122 | if (pc >= P2SEG && pc < P3SEG) | ||
123 | pc -= 0x20000000; | ||
124 | #endif | ||
125 | |||
126 | return pc; | ||
127 | } | ||
128 | #endif /* __KERNEL__ */ | ||
129 | |||
130 | #endif /* __ASM_SH_PTRACE_H */ | ||
diff --git a/include/asm-sh/push-switch.h b/include/asm-sh/push-switch.h deleted file mode 100644 index 4903f9e52dd8..000000000000 --- a/include/asm-sh/push-switch.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | #ifndef __ASM_SH_PUSH_SWITCH_H | ||
2 | #define __ASM_SH_PUSH_SWITCH_H | ||
3 | |||
4 | #include <linux/timer.h> | ||
5 | #include <linux/interrupt.h> | ||
6 | #include <linux/workqueue.h> | ||
7 | #include <linux/platform_device.h> | ||
8 | |||
9 | struct push_switch { | ||
10 | /* switch state */ | ||
11 | unsigned int state:1; | ||
12 | /* debounce timer */ | ||
13 | struct timer_list debounce; | ||
14 | /* workqueue */ | ||
15 | struct work_struct work; | ||
16 | /* platform device, for workqueue handler */ | ||
17 | struct platform_device *pdev; | ||
18 | }; | ||
19 | |||
20 | struct push_switch_platform_info { | ||
21 | /* IRQ handler */ | ||
22 | irqreturn_t (*irq_handler)(int irq, void *data); | ||
23 | /* Special IRQ flags */ | ||
24 | unsigned int irq_flags; | ||
25 | /* Bit location of switch */ | ||
26 | unsigned int bit; | ||
27 | /* Symbolic switch name */ | ||
28 | const char *name; | ||
29 | }; | ||
30 | |||
31 | #endif /* __ASM_SH_PUSH_SWITCH_H */ | ||
diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h deleted file mode 100644 index 306f7359f7d4..000000000000 --- a/include/asm-sh/r7780rp.h +++ /dev/null | |||
@@ -1,198 +0,0 @@ | |||
1 | #ifndef __ASM_SH_RENESAS_R7780RP_H | ||
2 | #define __ASM_SH_RENESAS_R7780RP_H | ||
3 | |||
4 | /* Box specific addresses. */ | ||
5 | #if defined(CONFIG_SH_R7780MP) | ||
6 | #define PA_BCR 0xa4000000 /* FPGA */ | ||
7 | #define PA_SDPOW (-1) | ||
8 | |||
9 | #define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ | ||
10 | #define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ | ||
11 | #define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */ | ||
12 | #define PA_IRLPRI2 (PA_BCR+0x0006) /* Interrupt Priorty 2 */ | ||
13 | #define PA_IRLPRI3 (PA_BCR+0x0008) /* Interrupt Priorty 3 */ | ||
14 | #define PA_IRLPRI4 (PA_BCR+0x000a) /* Interrupt Priorty 4 */ | ||
15 | #define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */ | ||
16 | #define PA_PCIBD (PA_BCR+0x000e) /* PCI Board detect control */ | ||
17 | #define PA_PCICD (PA_BCR+0x0010) /* PCI Conector detect control */ | ||
18 | #define PA_EXTGIO (PA_BCR+0x0016) /* Extension GPIO Control */ | ||
19 | #define PA_IVDRMON (PA_BCR+0x0018) /* iVDR Moniter control */ | ||
20 | #define PA_IVDRCTL (PA_BCR+0x001a) /* iVDR control */ | ||
21 | #define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */ | ||
22 | #define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */ | ||
23 | #define PA_AUDIOSEL (PA_BCR+0x0020) /* Sound Interface Select control */ | ||
24 | #define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ | ||
25 | #define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ | ||
26 | #define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ | ||
27 | #define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ | ||
28 | #define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */ | ||
29 | #define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */ | ||
30 | #define PA_DBSW (PA_BCR+0x0200) /* Debug Board Switch control */ | ||
31 | #define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */ | ||
32 | #define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */ | ||
33 | #define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */ | ||
34 | #define PA_SCSMR0 (PA_BCR+0x0400) /* SCIF0 Serial mode control */ | ||
35 | #define PA_SCBRR0 (PA_BCR+0x0404) /* SCIF0 Bit rate control */ | ||
36 | #define PA_SCSCR0 (PA_BCR+0x0408) /* SCIF0 Serial control */ | ||
37 | #define PA_SCFTDR0 (PA_BCR+0x040c) /* SCIF0 Send FIFO control */ | ||
38 | #define PA_SCFSR0 (PA_BCR+0x0410) /* SCIF0 Serial status control */ | ||
39 | #define PA_SCFRDR0 (PA_BCR+0x0414) /* SCIF0 Receive FIFO control */ | ||
40 | #define PA_SCFCR0 (PA_BCR+0x0418) /* SCIF0 FIFO control */ | ||
41 | #define PA_SCTFDR0 (PA_BCR+0x041c) /* SCIF0 Send FIFO data control */ | ||
42 | #define PA_SCRFDR0 (PA_BCR+0x0420) /* SCIF0 Receive FIFO data control */ | ||
43 | #define PA_SCSPTR0 (PA_BCR+0x0424) /* SCIF0 Serial Port control */ | ||
44 | #define PA_SCLSR0 (PA_BCR+0x0428) /* SCIF0 Line Status control */ | ||
45 | #define PA_SCRER0 (PA_BCR+0x042c) /* SCIF0 Serial Error control */ | ||
46 | #define PA_SCSMR1 (PA_BCR+0x0500) /* SCIF1 Serial mode control */ | ||
47 | #define PA_SCBRR1 (PA_BCR+0x0504) /* SCIF1 Bit rate control */ | ||
48 | #define PA_SCSCR1 (PA_BCR+0x0508) /* SCIF1 Serial control */ | ||
49 | #define PA_SCFTDR1 (PA_BCR+0x050c) /* SCIF1 Send FIFO control */ | ||
50 | #define PA_SCFSR1 (PA_BCR+0x0510) /* SCIF1 Serial status control */ | ||
51 | #define PA_SCFRDR1 (PA_BCR+0x0514) /* SCIF1 Receive FIFO control */ | ||
52 | #define PA_SCFCR1 (PA_BCR+0x0518) /* SCIF1 FIFO control */ | ||
53 | #define PA_SCTFDR1 (PA_BCR+0x051c) /* SCIF1 Send FIFO data control */ | ||
54 | #define PA_SCRFDR1 (PA_BCR+0x0520) /* SCIF1 Receive FIFO data control */ | ||
55 | #define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */ | ||
56 | #define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */ | ||
57 | #define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */ | ||
58 | #define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */ | ||
59 | #define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */ | ||
60 | #define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */ | ||
61 | #define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */ | ||
62 | #define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */ | ||
63 | #define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */ | ||
64 | #define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ | ||
65 | #define PA_PMR (PA_BCR+0x0900) /* */ | ||
66 | |||
67 | #define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ | ||
68 | #define IVDR_CK_ON 8 /* iVDR Clock ON */ | ||
69 | |||
70 | #elif defined(CONFIG_SH_R7780RP) | ||
71 | #define PA_POFF (-1) | ||
72 | |||
73 | #define PA_BCR 0xa5000000 /* FPGA */ | ||
74 | #define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ | ||
75 | #define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ | ||
76 | #define PA_SDPOW (PA_BCR+0x0004) /* SD Power control */ | ||
77 | #define PA_RSTCTL (PA_BCR+0x0006) /* Device Reset control */ | ||
78 | #define PA_PCIBD (PA_BCR+0x0008) /* PCI Board detect control */ | ||
79 | #define PA_PCICD (PA_BCR+0x000a) /* PCI Conector detect control */ | ||
80 | #define PA_ZIGIO1 (PA_BCR+0x000c) /* Zigbee IO control 1 */ | ||
81 | #define PA_ZIGIO2 (PA_BCR+0x000e) /* Zigbee IO control 2 */ | ||
82 | #define PA_ZIGIO3 (PA_BCR+0x0010) /* Zigbee IO control 3 */ | ||
83 | #define PA_ZIGIO4 (PA_BCR+0x0012) /* Zigbee IO control 4 */ | ||
84 | #define PA_IVDRMON (PA_BCR+0x0014) /* iVDR Moniter control */ | ||
85 | #define PA_IVDRCTL (PA_BCR+0x0016) /* iVDR control */ | ||
86 | #define PA_OBLED (PA_BCR+0x0018) /* On Board LED control */ | ||
87 | #define PA_OBSW (PA_BCR+0x001a) /* On Board Switch control */ | ||
88 | #define PA_AUDIOSEL (PA_BCR+0x001c) /* Sound Interface Select control */ | ||
89 | #define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ | ||
90 | #define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ | ||
91 | #define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ | ||
92 | #define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ | ||
93 | #define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */ | ||
94 | #define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */ | ||
95 | #define PA_DBDET (PA_BCR+0x0200) /* Debug Board detect control */ | ||
96 | #define PA_DBDISPCTL (PA_BCR+0x0202) /* Debug Board Dot timing control */ | ||
97 | #define PA_DBSW (PA_BCR+0x0204) /* Debug Board Switch control */ | ||
98 | #define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */ | ||
99 | #define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */ | ||
100 | #define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */ | ||
101 | #define PA_SCSMR (PA_BCR+0x0400) /* SCIF Serial mode control */ | ||
102 | #define PA_SCBRR (PA_BCR+0x0402) /* SCIF Bit rate control */ | ||
103 | #define PA_SCSCR (PA_BCR+0x0404) /* SCIF Serial control */ | ||
104 | #define PA_SCFDTR (PA_BCR+0x0406) /* SCIF Send FIFO control */ | ||
105 | #define PA_SCFSR (PA_BCR+0x0408) /* SCIF Serial status control */ | ||
106 | #define PA_SCFRDR (PA_BCR+0x040a) /* SCIF Receive FIFO control */ | ||
107 | #define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */ | ||
108 | #define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */ | ||
109 | #define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */ | ||
110 | #define PA_SMCR (PA_BCR+0x0500) /* 2-wire Serial control */ | ||
111 | #define PA_SMSMADR (PA_BCR+0x0502) /* 2-wire Serial Slave control */ | ||
112 | #define PA_SMMR (PA_BCR+0x0504) /* 2-wire Serial Mode control */ | ||
113 | #define PA_SMSADR1 (PA_BCR+0x0506) /* 2-wire Serial Address1 control */ | ||
114 | #define PA_SMTRDR1 (PA_BCR+0x0546) /* 2-wire Serial Data1 control */ | ||
115 | #define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */ | ||
116 | |||
117 | #define PA_AX88796L 0xa5800400 /* AX88796L Area */ | ||
118 | #define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */ | ||
119 | #define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ | ||
120 | #define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ | ||
121 | |||
122 | #define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ | ||
123 | |||
124 | #define IVDR_CK_ON 8 /* iVDR Clock ON */ | ||
125 | |||
126 | #elif defined(CONFIG_SH_R7785RP) | ||
127 | #define PA_BCR 0xa4000000 /* FPGA */ | ||
128 | #define PA_SDPOW (-1) | ||
129 | |||
130 | #define PA_PCISCR (PA_BCR+0x0000) | ||
131 | #define PA_IRLPRA (PA_BCR+0x0002) | ||
132 | #define PA_IRLPRB (PA_BCR+0x0004) | ||
133 | #define PA_IRLPRC (PA_BCR+0x0006) | ||
134 | #define PA_IRLPRD (PA_BCR+0x0008) | ||
135 | #define IRLCNTR1 (PA_BCR+0x0010) | ||
136 | #define PA_IRLPRE (PA_BCR+0x000a) | ||
137 | #define PA_IRLPRF (PA_BCR+0x000c) | ||
138 | #define PA_EXIRLCR (PA_BCR+0x000e) | ||
139 | #define PA_IRLMCR1 (PA_BCR+0x0010) | ||
140 | #define PA_IRLMCR2 (PA_BCR+0x0012) | ||
141 | #define PA_IRLSSR1 (PA_BCR+0x0014) | ||
142 | #define PA_IRLSSR2 (PA_BCR+0x0016) | ||
143 | #define PA_CFTCR (PA_BCR+0x0100) | ||
144 | #define PA_CFPCR (PA_BCR+0x0102) | ||
145 | #define PA_PCICR (PA_BCR+0x0110) | ||
146 | #define PA_IVDRCTL (PA_BCR+0x0112) | ||
147 | #define PA_IVDRSR (PA_BCR+0x0114) | ||
148 | #define PA_PDRSTCR (PA_BCR+0x0116) | ||
149 | #define PA_POFF (PA_BCR+0x0120) | ||
150 | #define PA_LCDCR (PA_BCR+0x0130) | ||
151 | #define PA_TPCR (PA_BCR+0x0140) | ||
152 | #define PA_TPCKCR (PA_BCR+0x0142) | ||
153 | #define PA_TPRSTR (PA_BCR+0x0144) | ||
154 | #define PA_TPXPDR (PA_BCR+0x0146) | ||
155 | #define PA_TPYPDR (PA_BCR+0x0148) | ||
156 | #define PA_GPIOPFR (PA_BCR+0x0150) | ||
157 | #define PA_GPIODR (PA_BCR+0x0152) | ||
158 | #define PA_OBLED (PA_BCR+0x0154) | ||
159 | #define PA_SWSR (PA_BCR+0x0156) | ||
160 | #define PA_VERREG (PA_BCR+0x0158) | ||
161 | #define PA_SMCR (PA_BCR+0x0200) | ||
162 | #define PA_SMSMADR (PA_BCR+0x0202) | ||
163 | #define PA_SMMR (PA_BCR+0x0204) | ||
164 | #define PA_SMSADR1 (PA_BCR+0x0206) | ||
165 | #define PA_SMSADR32 (PA_BCR+0x0244) | ||
166 | #define PA_SMTRDR1 (PA_BCR+0x0246) | ||
167 | #define PA_SMTRDR16 (PA_BCR+0x0264) | ||
168 | #define PA_CU3MDR (PA_BCR+0x0300) | ||
169 | #define PA_CU5MDR (PA_BCR+0x0302) | ||
170 | #define PA_MMSR (PA_BCR+0x0400) | ||
171 | |||
172 | #define IVDR_CK_ON 4 /* iVDR Clock ON */ | ||
173 | #endif | ||
174 | |||
175 | #define HL_FPGA_IRQ_BASE 200 | ||
176 | #define HL_NR_IRL 15 | ||
177 | |||
178 | #define IRQ_AX88796 (HL_FPGA_IRQ_BASE + 0) | ||
179 | #define IRQ_CF (HL_FPGA_IRQ_BASE + 1) | ||
180 | #define IRQ_PSW (HL_FPGA_IRQ_BASE + 2) | ||
181 | #define IRQ_EXT0 (HL_FPGA_IRQ_BASE + 3) | ||
182 | #define IRQ_EXT1 (HL_FPGA_IRQ_BASE + 4) | ||
183 | #define IRQ_EXT2 (HL_FPGA_IRQ_BASE + 5) | ||
184 | #define IRQ_EXT3 (HL_FPGA_IRQ_BASE + 6) | ||
185 | #define IRQ_EXT4 (HL_FPGA_IRQ_BASE + 7) | ||
186 | #define IRQ_EXT5 (HL_FPGA_IRQ_BASE + 8) | ||
187 | #define IRQ_EXT6 (HL_FPGA_IRQ_BASE + 9) | ||
188 | #define IRQ_EXT7 (HL_FPGA_IRQ_BASE + 10) | ||
189 | #define IRQ_SMBUS (HL_FPGA_IRQ_BASE + 11) | ||
190 | #define IRQ_TP (HL_FPGA_IRQ_BASE + 12) | ||
191 | #define IRQ_RTC (HL_FPGA_IRQ_BASE + 13) | ||
192 | #define IRQ_TH_ALERT (HL_FPGA_IRQ_BASE + 14) | ||
193 | #define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15) | ||
194 | #define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16) | ||
195 | |||
196 | unsigned char *highlander_plat_irq_setup(void); | ||
197 | |||
198 | #endif /* __ASM_SH_RENESAS_R7780RP */ | ||
diff --git a/include/asm-sh/resource.h b/include/asm-sh/resource.h deleted file mode 100644 index 9c2499a86ec0..000000000000 --- a/include/asm-sh/resource.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_SH_RESOURCE_H | ||
2 | #define __ASM_SH_RESOURCE_H | ||
3 | |||
4 | #include <asm-generic/resource.h> | ||
5 | |||
6 | #endif /* __ASM_SH_RESOURCE_H */ | ||
diff --git a/include/asm-sh/rtc.h b/include/asm-sh/rtc.h deleted file mode 100644 index ec45ba8e11d9..000000000000 --- a/include/asm-sh/rtc.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | #ifndef _ASM_RTC_H | ||
2 | #define _ASM_RTC_H | ||
3 | |||
4 | extern void (*board_time_init)(void); | ||
5 | extern void (*rtc_sh_get_time)(struct timespec *); | ||
6 | extern int (*rtc_sh_set_time)(const time_t); | ||
7 | |||
8 | #define RTC_CAP_4_DIGIT_YEAR (1 << 0) | ||
9 | |||
10 | struct sh_rtc_platform_info { | ||
11 | unsigned long capabilities; | ||
12 | }; | ||
13 | |||
14 | #include <asm/cpu/rtc.h> | ||
15 | |||
16 | #endif /* _ASM_RTC_H */ | ||
diff --git a/include/asm-sh/rts7751r2d.h b/include/asm-sh/rts7751r2d.h deleted file mode 100644 index 0a800157b826..000000000000 --- a/include/asm-sh/rts7751r2d.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | #ifndef __ASM_SH_RENESAS_RTS7751R2D_H | ||
2 | #define __ASM_SH_RENESAS_RTS7751R2D_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/renesas_rts7751r2d.h | ||
6 | * | ||
7 | * Copyright (C) 2000 Atom Create Engineering Co., Ltd. | ||
8 | * | ||
9 | * Renesas Technology Sales RTS7751R2D support | ||
10 | */ | ||
11 | |||
12 | /* Board specific addresses. */ | ||
13 | |||
14 | #define PA_BCR 0xa4000000 /* FPGA */ | ||
15 | #define PA_IRLMON 0xa4000002 /* Interrupt Status control */ | ||
16 | #define PA_CFCTL 0xa4000004 /* CF Timing control */ | ||
17 | #define PA_CFPOW 0xa4000006 /* CF Power control */ | ||
18 | #define PA_DISPCTL 0xa4000008 /* Display Timing control */ | ||
19 | #define PA_SDMPOW 0xa400000a /* SD Power control */ | ||
20 | #define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */ | ||
21 | #define PA_PCICD 0xa400000e /* PCI Extention detect control */ | ||
22 | #define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */ | ||
23 | |||
24 | #define PA_R2D1_AXRST 0xa4000022 /* AX_LAN Reset control */ | ||
25 | #define PA_R2D1_CFRST 0xa4000024 /* CF Reset control */ | ||
26 | #define PA_R2D1_ADMRTS 0xa4000026 /* SD Reset control */ | ||
27 | #define PA_R2D1_EXTRST 0xa4000028 /* Extention Reset control */ | ||
28 | #define PA_R2D1_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */ | ||
29 | |||
30 | #define PA_R2DPLUS_CFRST 0xa4000022 /* CF Reset control */ | ||
31 | #define PA_R2DPLUS_ADMRTS 0xa4000024 /* SD Reset control */ | ||
32 | #define PA_R2DPLUS_EXTRST 0xa4000026 /* Extention Reset control */ | ||
33 | #define PA_R2DPLUS_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */ | ||
34 | #define PA_R2DPLUS_KEYCTLCLR 0xa400002a /* Key Interrupt clear */ | ||
35 | |||
36 | #define PA_POWOFF 0xa4000030 /* Board Power OFF control */ | ||
37 | #define PA_VERREG 0xa4000032 /* FPGA Version Register */ | ||
38 | #define PA_INPORT 0xa4000034 /* KEY Input Port control */ | ||
39 | #define PA_OUTPORT 0xa4000036 /* LED control */ | ||
40 | #define PA_BVERREG 0xa4000038 /* Board Revision Register */ | ||
41 | |||
42 | #define PA_AX88796L 0xaa000400 /* AX88796L Area */ | ||
43 | #define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */ | ||
44 | #define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ | ||
45 | #define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ | ||
46 | |||
47 | #define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ | ||
48 | |||
49 | #define R2D_FPGA_IRQ_BASE 100 | ||
50 | |||
51 | #define IRQ_VOYAGER (R2D_FPGA_IRQ_BASE + 0) | ||
52 | #define IRQ_EXT (R2D_FPGA_IRQ_BASE + 1) | ||
53 | #define IRQ_TP (R2D_FPGA_IRQ_BASE + 2) | ||
54 | #define IRQ_RTC_T (R2D_FPGA_IRQ_BASE + 3) | ||
55 | #define IRQ_RTC_A (R2D_FPGA_IRQ_BASE + 4) | ||
56 | #define IRQ_SDCARD (R2D_FPGA_IRQ_BASE + 5) | ||
57 | #define IRQ_CF_CD (R2D_FPGA_IRQ_BASE + 6) | ||
58 | #define IRQ_CF_IDE (R2D_FPGA_IRQ_BASE + 7) | ||
59 | #define IRQ_AX88796 (R2D_FPGA_IRQ_BASE + 8) | ||
60 | #define IRQ_KEY (R2D_FPGA_IRQ_BASE + 9) | ||
61 | #define IRQ_PCI_INTA (R2D_FPGA_IRQ_BASE + 10) | ||
62 | #define IRQ_PCI_INTB (R2D_FPGA_IRQ_BASE + 11) | ||
63 | #define IRQ_PCI_INTC (R2D_FPGA_IRQ_BASE + 12) | ||
64 | #define IRQ_PCI_INTD (R2D_FPGA_IRQ_BASE + 13) | ||
65 | |||
66 | /* arch/sh/boards/renesas/rts7751r2d/irq.c */ | ||
67 | void init_rts7751r2d_IRQ(void); | ||
68 | int rts7751r2d_irq_demux(int); | ||
69 | |||
70 | #endif /* __ASM_SH_RENESAS_RTS7751R2D */ | ||
diff --git a/include/asm-sh/rwsem.h b/include/asm-sh/rwsem.h deleted file mode 100644 index 1987f3ea7f1b..000000000000 --- a/include/asm-sh/rwsem.h +++ /dev/null | |||
@@ -1,188 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/rwsem.h: R/W semaphores for SH using the stuff | ||
3 | * in lib/rwsem.c. | ||
4 | */ | ||
5 | |||
6 | #ifndef _ASM_SH_RWSEM_H | ||
7 | #define _ASM_SH_RWSEM_H | ||
8 | |||
9 | #ifndef _LINUX_RWSEM_H | ||
10 | #error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead" | ||
11 | #endif | ||
12 | |||
13 | #ifdef __KERNEL__ | ||
14 | #include <linux/list.h> | ||
15 | #include <linux/spinlock.h> | ||
16 | #include <asm/atomic.h> | ||
17 | #include <asm/system.h> | ||
18 | |||
19 | /* | ||
20 | * the semaphore definition | ||
21 | */ | ||
22 | struct rw_semaphore { | ||
23 | long count; | ||
24 | #define RWSEM_UNLOCKED_VALUE 0x00000000 | ||
25 | #define RWSEM_ACTIVE_BIAS 0x00000001 | ||
26 | #define RWSEM_ACTIVE_MASK 0x0000ffff | ||
27 | #define RWSEM_WAITING_BIAS (-0x00010000) | ||
28 | #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS | ||
29 | #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) | ||
30 | spinlock_t wait_lock; | ||
31 | struct list_head wait_list; | ||
32 | #ifdef CONFIG_DEBUG_LOCK_ALLOC | ||
33 | struct lockdep_map dep_map; | ||
34 | #endif | ||
35 | }; | ||
36 | |||
37 | #ifdef CONFIG_DEBUG_LOCK_ALLOC | ||
38 | # define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } | ||
39 | #else | ||
40 | # define __RWSEM_DEP_MAP_INIT(lockname) | ||
41 | #endif | ||
42 | |||
43 | #define __RWSEM_INITIALIZER(name) \ | ||
44 | { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \ | ||
45 | LIST_HEAD_INIT((name).wait_list) \ | ||
46 | __RWSEM_DEP_MAP_INIT(name) } | ||
47 | |||
48 | #define DECLARE_RWSEM(name) \ | ||
49 | struct rw_semaphore name = __RWSEM_INITIALIZER(name) | ||
50 | |||
51 | extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem); | ||
52 | extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); | ||
53 | extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); | ||
54 | extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); | ||
55 | |||
56 | extern void __init_rwsem(struct rw_semaphore *sem, const char *name, | ||
57 | struct lock_class_key *key); | ||
58 | |||
59 | #define init_rwsem(sem) \ | ||
60 | do { \ | ||
61 | static struct lock_class_key __key; \ | ||
62 | \ | ||
63 | __init_rwsem((sem), #sem, &__key); \ | ||
64 | } while (0) | ||
65 | |||
66 | static inline void init_rwsem(struct rw_semaphore *sem) | ||
67 | { | ||
68 | sem->count = RWSEM_UNLOCKED_VALUE; | ||
69 | spin_lock_init(&sem->wait_lock); | ||
70 | INIT_LIST_HEAD(&sem->wait_list); | ||
71 | } | ||
72 | |||
73 | /* | ||
74 | * lock for reading | ||
75 | */ | ||
76 | static inline void __down_read(struct rw_semaphore *sem) | ||
77 | { | ||
78 | if (atomic_inc_return((atomic_t *)(&sem->count)) > 0) | ||
79 | smp_wmb(); | ||
80 | else | ||
81 | rwsem_down_read_failed(sem); | ||
82 | } | ||
83 | |||
84 | static inline int __down_read_trylock(struct rw_semaphore *sem) | ||
85 | { | ||
86 | int tmp; | ||
87 | |||
88 | while ((tmp = sem->count) >= 0) { | ||
89 | if (tmp == cmpxchg(&sem->count, tmp, | ||
90 | tmp + RWSEM_ACTIVE_READ_BIAS)) { | ||
91 | smp_wmb(); | ||
92 | return 1; | ||
93 | } | ||
94 | } | ||
95 | return 0; | ||
96 | } | ||
97 | |||
98 | /* | ||
99 | * lock for writing | ||
100 | */ | ||
101 | static inline void __down_write(struct rw_semaphore *sem) | ||
102 | { | ||
103 | int tmp; | ||
104 | |||
105 | tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS, | ||
106 | (atomic_t *)(&sem->count)); | ||
107 | if (tmp == RWSEM_ACTIVE_WRITE_BIAS) | ||
108 | smp_wmb(); | ||
109 | else | ||
110 | rwsem_down_write_failed(sem); | ||
111 | } | ||
112 | |||
113 | static inline int __down_write_trylock(struct rw_semaphore *sem) | ||
114 | { | ||
115 | int tmp; | ||
116 | |||
117 | tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE, | ||
118 | RWSEM_ACTIVE_WRITE_BIAS); | ||
119 | smp_wmb(); | ||
120 | return tmp == RWSEM_UNLOCKED_VALUE; | ||
121 | } | ||
122 | |||
123 | /* | ||
124 | * unlock after reading | ||
125 | */ | ||
126 | static inline void __up_read(struct rw_semaphore *sem) | ||
127 | { | ||
128 | int tmp; | ||
129 | |||
130 | smp_wmb(); | ||
131 | tmp = atomic_dec_return((atomic_t *)(&sem->count)); | ||
132 | if (tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0) | ||
133 | rwsem_wake(sem); | ||
134 | } | ||
135 | |||
136 | /* | ||
137 | * unlock after writing | ||
138 | */ | ||
139 | static inline void __up_write(struct rw_semaphore *sem) | ||
140 | { | ||
141 | smp_wmb(); | ||
142 | if (atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS, | ||
143 | (atomic_t *)(&sem->count)) < 0) | ||
144 | rwsem_wake(sem); | ||
145 | } | ||
146 | |||
147 | /* | ||
148 | * implement atomic add functionality | ||
149 | */ | ||
150 | static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) | ||
151 | { | ||
152 | atomic_add(delta, (atomic_t *)(&sem->count)); | ||
153 | } | ||
154 | |||
155 | /* | ||
156 | * downgrade write lock to read lock | ||
157 | */ | ||
158 | static inline void __downgrade_write(struct rw_semaphore *sem) | ||
159 | { | ||
160 | int tmp; | ||
161 | |||
162 | smp_wmb(); | ||
163 | tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count)); | ||
164 | if (tmp < 0) | ||
165 | rwsem_downgrade_wake(sem); | ||
166 | } | ||
167 | |||
168 | static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) | ||
169 | { | ||
170 | __down_write(sem); | ||
171 | } | ||
172 | |||
173 | /* | ||
174 | * implement exchange and add functionality | ||
175 | */ | ||
176 | static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) | ||
177 | { | ||
178 | smp_mb(); | ||
179 | return atomic_add_return(delta, (atomic_t *)(&sem->count)); | ||
180 | } | ||
181 | |||
182 | static inline int rwsem_is_locked(struct rw_semaphore *sem) | ||
183 | { | ||
184 | return (sem->count != 0); | ||
185 | } | ||
186 | |||
187 | #endif /* __KERNEL__ */ | ||
188 | #endif /* _ASM_SH_RWSEM_H */ | ||
diff --git a/include/asm-sh/scatterlist.h b/include/asm-sh/scatterlist.h deleted file mode 100644 index 2084d0373693..000000000000 --- a/include/asm-sh/scatterlist.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SCATTERLIST_H | ||
2 | #define __ASM_SH_SCATTERLIST_H | ||
3 | |||
4 | #include <asm/types.h> | ||
5 | |||
6 | struct scatterlist { | ||
7 | #ifdef CONFIG_DEBUG_SG | ||
8 | unsigned long sg_magic; | ||
9 | #endif | ||
10 | unsigned long page_link; | ||
11 | unsigned int offset;/* for highmem, page offset */ | ||
12 | dma_addr_t dma_address; | ||
13 | unsigned int length; | ||
14 | }; | ||
15 | |||
16 | #define ISA_DMA_THRESHOLD PHYS_ADDR_MASK | ||
17 | |||
18 | /* These macros should be used after a pci_map_sg call has been done | ||
19 | * to get bus addresses of each of the SG entries and their lengths. | ||
20 | * You should only work with the number of sg entries pci_map_sg | ||
21 | * returns, or alternatively stop on the first sg_dma_len(sg) which | ||
22 | * is 0. | ||
23 | */ | ||
24 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
25 | #define sg_dma_len(sg) ((sg)->length) | ||
26 | |||
27 | #endif /* !(__ASM_SH_SCATTERLIST_H) */ | ||
diff --git a/include/asm-sh/sdk7780.h b/include/asm-sh/sdk7780.h deleted file mode 100644 index 697dc865f21b..000000000000 --- a/include/asm-sh/sdk7780.h +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | #ifndef __ASM_SH_RENESAS_SDK7780_H | ||
2 | #define __ASM_SH_RENESAS_SDK7780_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/sdk7780.h | ||
6 | * | ||
7 | * Renesas Solutions SH7780 SDK Support | ||
8 | * Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk> | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
13 | */ | ||
14 | #include <asm/addrspace.h> | ||
15 | |||
16 | /* Box specific addresses. */ | ||
17 | #define SE_AREA0_WIDTH 4 /* Area0: 32bit */ | ||
18 | #define PA_ROM 0xa0000000 /* EPROM */ | ||
19 | #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ | ||
20 | #define PA_FROM 0xa0800000 /* Flash-ROM */ | ||
21 | #define PA_FROM_SIZE 0x00400000 /* Flash-ROM size 4M byte */ | ||
22 | #define PA_EXT1 0xa4000000 | ||
23 | #define PA_EXT1_SIZE 0x04000000 | ||
24 | #define PA_SDRAM 0xa8000000 /* DDR-SDRAM(Area2/3) 128MB */ | ||
25 | #define PA_SDRAM_SIZE 0x08000000 | ||
26 | |||
27 | #define PA_EXT4 0xb0000000 | ||
28 | #define PA_EXT4_SIZE 0x04000000 | ||
29 | #define PA_EXT_USER PA_EXT4 /* User Expansion Space */ | ||
30 | |||
31 | #define PA_PERIPHERAL PA_AREA5_IO | ||
32 | |||
33 | /* SRAM/Reserved */ | ||
34 | #define PA_RESERVED (PA_PERIPHERAL + 0) | ||
35 | /* FPGA base address */ | ||
36 | #define PA_FPGA (PA_PERIPHERAL + 0x01000000) | ||
37 | /* SMC LAN91C111 */ | ||
38 | #define PA_LAN (PA_PERIPHERAL + 0x01800000) | ||
39 | |||
40 | |||
41 | #define FPGA_SRSTR (PA_FPGA + 0x000) /* System reset */ | ||
42 | #define FPGA_IRQ0SR (PA_FPGA + 0x010) /* IRQ0 status */ | ||
43 | #define FPGA_IRQ0MR (PA_FPGA + 0x020) /* IRQ0 mask */ | ||
44 | #define FPGA_BDMR (PA_FPGA + 0x030) /* Board operating mode */ | ||
45 | #define FPGA_INTT0PRTR (PA_FPGA + 0x040) /* Interrupt test mode0 port */ | ||
46 | #define FPGA_INTT0SELR (PA_FPGA + 0x050) /* Int. test mode0 select */ | ||
47 | #define FPGA_INTT1POLR (PA_FPGA + 0x060) /* Int. test mode0 polarity */ | ||
48 | #define FPGA_NMIR (PA_FPGA + 0x070) /* NMI source */ | ||
49 | #define FPGA_NMIMR (PA_FPGA + 0x080) /* NMI mask */ | ||
50 | #define FPGA_IRQR (PA_FPGA + 0x090) /* IRQX source */ | ||
51 | #define FPGA_IRQMR (PA_FPGA + 0x0A0) /* IRQX mask */ | ||
52 | #define FPGA_SLEDR (PA_FPGA + 0x0B0) /* LED control */ | ||
53 | #define PA_LED FPGA_SLEDR | ||
54 | #define FPGA_MAPSWR (PA_FPGA + 0x0C0) /* Map switch */ | ||
55 | #define FPGA_FPVERR (PA_FPGA + 0x0D0) /* FPGA version */ | ||
56 | #define FPGA_FPDATER (PA_FPGA + 0x0E0) /* FPGA date */ | ||
57 | #define FPGA_RSE (PA_FPGA + 0x100) /* Reset source */ | ||
58 | #define FPGA_EASR (PA_FPGA + 0x110) /* External area select */ | ||
59 | #define FPGA_SPER (PA_FPGA + 0x120) /* Serial port enable */ | ||
60 | #define FPGA_IMSR (PA_FPGA + 0x130) /* Interrupt mode select */ | ||
61 | #define FPGA_PCIMR (PA_FPGA + 0x140) /* PCI Mode */ | ||
62 | #define FPGA_DIPSWMR (PA_FPGA + 0x150) /* DIPSW monitor */ | ||
63 | #define FPGA_FPODR (PA_FPGA + 0x160) /* Output port data */ | ||
64 | #define FPGA_ATAESR (PA_FPGA + 0x170) /* ATA extended bus status */ | ||
65 | #define FPGA_IRQPOLR (PA_FPGA + 0x180) /* IRQx polarity */ | ||
66 | |||
67 | |||
68 | #define SDK7780_NR_IRL 15 | ||
69 | /* IDE/ATA interrupt */ | ||
70 | #define IRQ_CFCARD 14 | ||
71 | /* SMC interrupt */ | ||
72 | #define IRQ_ETHERNET 6 | ||
73 | |||
74 | |||
75 | /* arch/sh/boards/renesas/sdk7780/irq.c */ | ||
76 | void init_sdk7780_IRQ(void); | ||
77 | |||
78 | #define __IO_PREFIX sdk7780 | ||
79 | #include <asm/io_generic.h> | ||
80 | |||
81 | #endif /* __ASM_SH_RENESAS_SDK7780_H */ | ||
diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h deleted file mode 100644 index eb23000e1bbe..000000000000 --- a/include/asm-sh/se.h +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | #ifndef __ASM_SH_HITACHI_SE_H | ||
2 | #define __ASM_SH_HITACHI_SE_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/hitachi_se.h | ||
6 | * | ||
7 | * Copyright (C) 2000 Kazumoto Kojima | ||
8 | * | ||
9 | * Hitachi SolutionEngine support | ||
10 | */ | ||
11 | |||
12 | /* Box specific addresses. */ | ||
13 | |||
14 | #define PA_ROM 0x00000000 /* EPROM */ | ||
15 | #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ | ||
16 | #define PA_FROM 0x01000000 /* EPROM */ | ||
17 | #define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ | ||
18 | #define PA_EXT1 0x04000000 | ||
19 | #define PA_EXT1_SIZE 0x04000000 | ||
20 | #define PA_EXT2 0x08000000 | ||
21 | #define PA_EXT2_SIZE 0x04000000 | ||
22 | #define PA_SDRAM 0x0c000000 | ||
23 | #define PA_SDRAM_SIZE 0x04000000 | ||
24 | |||
25 | #define PA_EXT4 0x12000000 | ||
26 | #define PA_EXT4_SIZE 0x02000000 | ||
27 | #define PA_EXT5 0x14000000 | ||
28 | #define PA_EXT5_SIZE 0x04000000 | ||
29 | #define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ | ||
30 | |||
31 | #define PA_83902 0xb0000000 /* DP83902A */ | ||
32 | #define PA_83902_IF 0xb0040000 /* DP83902A remote io port */ | ||
33 | #define PA_83902_RST 0xb0080000 /* DP83902A reset port */ | ||
34 | |||
35 | #define PA_SUPERIO 0xb0400000 /* SMC37C935A super io chip */ | ||
36 | #define PA_DIPSW0 0xb0800000 /* Dip switch 5,6 */ | ||
37 | #define PA_DIPSW1 0xb0800002 /* Dip switch 7,8 */ | ||
38 | #define PA_LED 0xb0c00000 /* LED */ | ||
39 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) | ||
40 | #define PA_BCR 0xb0e00000 | ||
41 | #else | ||
42 | #define PA_BCR 0xb1400000 /* FPGA */ | ||
43 | #endif | ||
44 | |||
45 | #define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ | ||
46 | #define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ | ||
47 | #define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ | ||
48 | #define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ | ||
49 | #define MRSHPC_OPTION (PA_MRSHPC + 6) | ||
50 | #define MRSHPC_CSR (PA_MRSHPC + 8) | ||
51 | #define MRSHPC_ISR (PA_MRSHPC + 10) | ||
52 | #define MRSHPC_ICR (PA_MRSHPC + 12) | ||
53 | #define MRSHPC_CPWCR (PA_MRSHPC + 14) | ||
54 | #define MRSHPC_MW0CR1 (PA_MRSHPC + 16) | ||
55 | #define MRSHPC_MW1CR1 (PA_MRSHPC + 18) | ||
56 | #define MRSHPC_IOWCR1 (PA_MRSHPC + 20) | ||
57 | #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) | ||
58 | #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) | ||
59 | #define MRSHPC_IOWCR2 (PA_MRSHPC + 26) | ||
60 | #define MRSHPC_CDCR (PA_MRSHPC + 28) | ||
61 | #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) | ||
62 | |||
63 | #define BCR_ILCRA (PA_BCR + 0) | ||
64 | #define BCR_ILCRB (PA_BCR + 2) | ||
65 | #define BCR_ILCRC (PA_BCR + 4) | ||
66 | #define BCR_ILCRD (PA_BCR + 6) | ||
67 | #define BCR_ILCRE (PA_BCR + 8) | ||
68 | #define BCR_ILCRF (PA_BCR + 10) | ||
69 | #define BCR_ILCRG (PA_BCR + 12) | ||
70 | |||
71 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) | ||
72 | #define IRQ_STNIC 12 | ||
73 | #define IRQ_CFCARD 14 | ||
74 | #else | ||
75 | #define IRQ_STNIC 10 | ||
76 | #define IRQ_CFCARD 7 | ||
77 | #endif | ||
78 | |||
79 | /* SH Ether support (SH7710/SH7712) */ | ||
80 | /* Base address */ | ||
81 | #define SH_ETH0_BASE 0xA7000000 | ||
82 | #define SH_ETH1_BASE 0xA7000400 | ||
83 | /* PHY ID */ | ||
84 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) | ||
85 | # define PHY_ID 0x00 | ||
86 | #elif defined(CONFIG_CPU_SUBTYPE_SH7712) | ||
87 | # define PHY_ID 0x01 | ||
88 | #endif | ||
89 | /* Ether IRQ */ | ||
90 | #define SH_ETH0_IRQ 80 | ||
91 | #define SH_ETH1_IRQ 81 | ||
92 | #define SH_TSU_IRQ 82 | ||
93 | |||
94 | void init_se_IRQ(void); | ||
95 | |||
96 | #define __IO_PREFIX se | ||
97 | #include <asm/io_generic.h> | ||
98 | |||
99 | #endif /* __ASM_SH_HITACHI_SE_H */ | ||
diff --git a/include/asm-sh/se7206.h b/include/asm-sh/se7206.h deleted file mode 100644 index 698eb80389ab..000000000000 --- a/include/asm-sh/se7206.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SE7206_H | ||
2 | #define __ASM_SH_SE7206_H | ||
3 | |||
4 | #define PA_SMSC 0x30000000 | ||
5 | #define PA_MRSHPC 0x34000000 | ||
6 | #define PA_LED 0x31400000 | ||
7 | |||
8 | void init_se7206_IRQ(void); | ||
9 | |||
10 | #define __IO_PREFIX se7206 | ||
11 | #include <asm/io_generic.h> | ||
12 | |||
13 | #endif /* __ASM_SH_SE7206_H */ | ||
diff --git a/include/asm-sh/se7343.h b/include/asm-sh/se7343.h deleted file mode 100644 index 98458460e632..000000000000 --- a/include/asm-sh/se7343.h +++ /dev/null | |||
@@ -1,149 +0,0 @@ | |||
1 | #ifndef __ASM_SH_HITACHI_SE7343_H | ||
2 | #define __ASM_SH_HITACHI_SE7343_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-sh/se/se7343.h | ||
6 | * | ||
7 | * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp> | ||
8 | * | ||
9 | * SH-Mobile SolutionEngine 7343 support | ||
10 | */ | ||
11 | |||
12 | /* Box specific addresses. */ | ||
13 | |||
14 | /* Area 0 */ | ||
15 | #define PA_ROM 0x00000000 /* EPROM */ | ||
16 | #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ | ||
17 | #define PA_FROM 0x00400000 /* Flash ROM */ | ||
18 | #define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ | ||
19 | #define PA_SRAM 0x00800000 /* SRAM */ | ||
20 | #define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ | ||
21 | /* Area 1 */ | ||
22 | #define PA_EXT1 0x04000000 | ||
23 | #define PA_EXT1_SIZE 0x04000000 | ||
24 | /* Area 2 */ | ||
25 | #define PA_EXT2 0x08000000 | ||
26 | #define PA_EXT2_SIZE 0x04000000 | ||
27 | /* Area 3 */ | ||
28 | #define PA_SDRAM 0x0c000000 | ||
29 | #define PA_SDRAM_SIZE 0x04000000 | ||
30 | /* Area 4 */ | ||
31 | #define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ | ||
32 | #define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ | ||
33 | #define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ | ||
34 | #define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ | ||
35 | #define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ | ||
36 | #define MRSHPC_OPTION (PA_MRSHPC + 6) | ||
37 | #define MRSHPC_CSR (PA_MRSHPC + 8) | ||
38 | #define MRSHPC_ISR (PA_MRSHPC + 10) | ||
39 | #define MRSHPC_ICR (PA_MRSHPC + 12) | ||
40 | #define MRSHPC_CPWCR (PA_MRSHPC + 14) | ||
41 | #define MRSHPC_MW0CR1 (PA_MRSHPC + 16) | ||
42 | #define MRSHPC_MW1CR1 (PA_MRSHPC + 18) | ||
43 | #define MRSHPC_IOWCR1 (PA_MRSHPC + 20) | ||
44 | #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) | ||
45 | #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) | ||
46 | #define MRSHPC_IOWCR2 (PA_MRSHPC + 26) | ||
47 | #define MRSHPC_CDCR (PA_MRSHPC + 28) | ||
48 | #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) | ||
49 | #define PA_LED 0xb0C00000 /* LED */ | ||
50 | #define LED_SHIFT 0 | ||
51 | #define PA_DIPSW 0xb0900000 /* Dip switch 31 */ | ||
52 | #define PA_CPLD_MODESET 0xb1400004 /* CPLD Mode set register */ | ||
53 | #define PA_CPLD_ST 0xb1400008 /* CPLD Interrupt status register */ | ||
54 | #define PA_CPLD_IMSK 0xb140000a /* CPLD Interrupt mask register */ | ||
55 | /* Area 5 */ | ||
56 | #define PA_EXT5 0x14000000 | ||
57 | #define PA_EXT5_SIZE 0x04000000 | ||
58 | /* Area 6 */ | ||
59 | #define PA_LCD1 0xb8000000 | ||
60 | #define PA_LCD2 0xb8800000 | ||
61 | |||
62 | #define PORT_PACR 0xA4050100 | ||
63 | #define PORT_PBCR 0xA4050102 | ||
64 | #define PORT_PCCR 0xA4050104 | ||
65 | #define PORT_PDCR 0xA4050106 | ||
66 | #define PORT_PECR 0xA4050108 | ||
67 | #define PORT_PFCR 0xA405010A | ||
68 | #define PORT_PGCR 0xA405010C | ||
69 | #define PORT_PHCR 0xA405010E | ||
70 | #define PORT_PJCR 0xA4050110 | ||
71 | #define PORT_PKCR 0xA4050112 | ||
72 | #define PORT_PLCR 0xA4050114 | ||
73 | #define PORT_PMCR 0xA4050116 | ||
74 | #define PORT_PNCR 0xA4050118 | ||
75 | #define PORT_PQCR 0xA405011A | ||
76 | #define PORT_PRCR 0xA405011C | ||
77 | #define PORT_PSCR 0xA405011E | ||
78 | #define PORT_PTCR 0xA4050140 | ||
79 | #define PORT_PUCR 0xA4050142 | ||
80 | #define PORT_PVCR 0xA4050144 | ||
81 | #define PORT_PWCR 0xA4050146 | ||
82 | #define PORT_PYCR 0xA4050148 | ||
83 | #define PORT_PZCR 0xA405014A | ||
84 | |||
85 | #define PORT_PSELA 0xA405014C | ||
86 | #define PORT_PSELB 0xA405014E | ||
87 | #define PORT_PSELC 0xA4050150 | ||
88 | #define PORT_PSELD 0xA4050152 | ||
89 | #define PORT_PSELE 0xA4050154 | ||
90 | |||
91 | #define PORT_HIZCRA 0xA4050156 | ||
92 | #define PORT_HIZCRB 0xA4050158 | ||
93 | #define PORT_HIZCRC 0xA405015C | ||
94 | |||
95 | #define PORT_DRVCR 0xA4050180 | ||
96 | |||
97 | #define PORT_PADR 0xA4050120 | ||
98 | #define PORT_PBDR 0xA4050122 | ||
99 | #define PORT_PCDR 0xA4050124 | ||
100 | #define PORT_PDDR 0xA4050126 | ||
101 | #define PORT_PEDR 0xA4050128 | ||
102 | #define PORT_PFDR 0xA405012A | ||
103 | #define PORT_PGDR 0xA405012C | ||
104 | #define PORT_PHDR 0xA405012E | ||
105 | #define PORT_PJDR 0xA4050130 | ||
106 | #define PORT_PKDR 0xA4050132 | ||
107 | #define PORT_PLDR 0xA4050134 | ||
108 | #define PORT_PMDR 0xA4050136 | ||
109 | #define PORT_PNDR 0xA4050138 | ||
110 | #define PORT_PQDR 0xA405013A | ||
111 | #define PORT_PRDR 0xA405013C | ||
112 | #define PORT_PTDR 0xA4050160 | ||
113 | #define PORT_PUDR 0xA4050162 | ||
114 | #define PORT_PVDR 0xA4050164 | ||
115 | #define PORT_PWDR 0xA4050166 | ||
116 | #define PORT_PYDR 0xA4050168 | ||
117 | |||
118 | #define FPGA_IN 0xb1400000 | ||
119 | #define FPGA_OUT 0xb1400002 | ||
120 | |||
121 | #define __IO_PREFIX sh7343se | ||
122 | #include <asm/io_generic.h> | ||
123 | |||
124 | #define IRQ0_IRQ 32 | ||
125 | #define IRQ1_IRQ 33 | ||
126 | #define IRQ4_IRQ 36 | ||
127 | #define IRQ5_IRQ 37 | ||
128 | |||
129 | #define SE7343_FPGA_IRQ_MRSHPC0 0 | ||
130 | #define SE7343_FPGA_IRQ_MRSHPC1 1 | ||
131 | #define SE7343_FPGA_IRQ_MRSHPC2 2 | ||
132 | #define SE7343_FPGA_IRQ_MRSHPC3 3 | ||
133 | #define SE7343_FPGA_IRQ_SMC 6 /* EXT_IRQ2 */ | ||
134 | #define SE7343_FPGA_IRQ_USB 8 | ||
135 | |||
136 | #define SE7343_FPGA_IRQ_NR 11 | ||
137 | #define SE7343_FPGA_IRQ_BASE 120 | ||
138 | |||
139 | #define MRSHPC_IRQ3 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3) | ||
140 | #define MRSHPC_IRQ2 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC2) | ||
141 | #define MRSHPC_IRQ1 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC1) | ||
142 | #define MRSHPC_IRQ0 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0) | ||
143 | #define SMC_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC) | ||
144 | #define USB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB) | ||
145 | |||
146 | /* arch/sh/boards/se/7343/irq.c */ | ||
147 | void init_7343se_IRQ(void); | ||
148 | |||
149 | #endif /* __ASM_SH_HITACHI_SE7343_H */ | ||
diff --git a/include/asm-sh/se7721.h b/include/asm-sh/se7721.h deleted file mode 100644 index b957f6041193..000000000000 --- a/include/asm-sh/se7721.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Renesas Solutions Corp. | ||
3 | * | ||
4 | * Hitachi UL SolutionEngine 7721 Support. | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_SH_SE7721_H | ||
13 | #define __ASM_SH_SE7721_H | ||
14 | #include <asm/addrspace.h> | ||
15 | |||
16 | /* Box specific addresses. */ | ||
17 | #define SE_AREA0_WIDTH 2 /* Area0: 32bit */ | ||
18 | #define PA_ROM 0xa0000000 /* EPROM */ | ||
19 | #define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */ | ||
20 | #define PA_FROM 0xa1000000 /* Flash-ROM */ | ||
21 | #define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */ | ||
22 | #define PA_EXT1 0xa4000000 | ||
23 | #define PA_EXT1_SIZE 0x04000000 | ||
24 | #define PA_SDRAM 0xaC000000 /* SDRAM(Area3) 64MB */ | ||
25 | #define PA_SDRAM_SIZE 0x04000000 | ||
26 | |||
27 | #define PA_EXT4 0xb0000000 | ||
28 | #define PA_EXT4_SIZE 0x04000000 | ||
29 | |||
30 | #define PA_PERIPHERAL 0xB8000000 | ||
31 | |||
32 | #define PA_PCIC PA_PERIPHERAL | ||
33 | #define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) | ||
34 | #define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) | ||
35 | #define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) | ||
36 | #define PA_MRSHPC_IO (PA_PERIPHERAL + 0x00600000) | ||
37 | #define MRSHPC_OPTION (PA_MRSHPC + 6) | ||
38 | #define MRSHPC_CSR (PA_MRSHPC + 8) | ||
39 | #define MRSHPC_ISR (PA_MRSHPC + 10) | ||
40 | #define MRSHPC_ICR (PA_MRSHPC + 12) | ||
41 | #define MRSHPC_CPWCR (PA_MRSHPC + 14) | ||
42 | #define MRSHPC_MW0CR1 (PA_MRSHPC + 16) | ||
43 | #define MRSHPC_MW1CR1 (PA_MRSHPC + 18) | ||
44 | #define MRSHPC_IOWCR1 (PA_MRSHPC + 20) | ||
45 | #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) | ||
46 | #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) | ||
47 | #define MRSHPC_IOWCR2 (PA_MRSHPC + 26) | ||
48 | #define MRSHPC_CDCR (PA_MRSHPC + 28) | ||
49 | #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) | ||
50 | |||
51 | #define PA_LED 0xB6800000 /* 8bit LED */ | ||
52 | #define PA_FPGA 0xB7000000 /* FPGA base address */ | ||
53 | |||
54 | #define MRSHPC_IRQ0 10 | ||
55 | |||
56 | #define FPGA_ILSR1 (PA_FPGA + 0x02) | ||
57 | #define FPGA_ILSR2 (PA_FPGA + 0x03) | ||
58 | #define FPGA_ILSR3 (PA_FPGA + 0x04) | ||
59 | #define FPGA_ILSR4 (PA_FPGA + 0x05) | ||
60 | #define FPGA_ILSR5 (PA_FPGA + 0x06) | ||
61 | #define FPGA_ILSR6 (PA_FPGA + 0x07) | ||
62 | #define FPGA_ILSR7 (PA_FPGA + 0x08) | ||
63 | #define FPGA_ILSR8 (PA_FPGA + 0x09) | ||
64 | |||
65 | void init_se7721_IRQ(void); | ||
66 | |||
67 | #define __IO_PREFIX se7721 | ||
68 | #include <asm/io_generic.h> | ||
69 | |||
70 | #endif /* __ASM_SH_SE7721_H */ | ||
diff --git a/include/asm-sh/se7722.h b/include/asm-sh/se7722.h deleted file mode 100644 index e971d9a82f4a..000000000000 --- a/include/asm-sh/se7722.h +++ /dev/null | |||
@@ -1,112 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SE7722_H | ||
2 | #define __ASM_SH_SE7722_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/se7722.h | ||
6 | * | ||
7 | * Copyright (C) 2007 Nobuhiro Iwamatsu | ||
8 | * | ||
9 | * Hitachi UL SolutionEngine 7722 Support. | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General Public | ||
12 | * License. See the file "COPYING" in the main directory of this archive | ||
13 | * for more details. | ||
14 | * | ||
15 | */ | ||
16 | #include <asm/addrspace.h> | ||
17 | |||
18 | /* Box specific addresses. */ | ||
19 | #define SE_AREA0_WIDTH 4 /* Area0: 32bit */ | ||
20 | #define PA_ROM 0xa0000000 /* EPROM */ | ||
21 | #define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */ | ||
22 | #define PA_FROM 0xa1000000 /* Flash-ROM */ | ||
23 | #define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */ | ||
24 | #define PA_EXT1 0xa4000000 | ||
25 | #define PA_EXT1_SIZE 0x04000000 | ||
26 | #define PA_SDRAM 0xaC000000 /* DDR-SDRAM(Area3) 64MB */ | ||
27 | #define PA_SDRAM_SIZE 0x04000000 | ||
28 | |||
29 | #define PA_EXT4 0xb0000000 | ||
30 | #define PA_EXT4_SIZE 0x04000000 | ||
31 | |||
32 | #define PA_PERIPHERAL 0xB0000000 | ||
33 | |||
34 | #define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */ | ||
35 | #define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) /* MR-SHPC-01 PCMCIA controller */ | ||
36 | #define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) /* MR-SHPC-01 memory window base */ | ||
37 | #define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) /* MR-SHPC-01 attribute window base */ | ||
38 | #define PA_MRSHPC_IO (PA_PERIPHERAL + 0x00600000) /* MR-SHPC-01 I/O window base */ | ||
39 | #define MRSHPC_OPTION (PA_MRSHPC + 6) | ||
40 | #define MRSHPC_CSR (PA_MRSHPC + 8) | ||
41 | #define MRSHPC_ISR (PA_MRSHPC + 10) | ||
42 | #define MRSHPC_ICR (PA_MRSHPC + 12) | ||
43 | #define MRSHPC_CPWCR (PA_MRSHPC + 14) | ||
44 | #define MRSHPC_MW0CR1 (PA_MRSHPC + 16) | ||
45 | #define MRSHPC_MW1CR1 (PA_MRSHPC + 18) | ||
46 | #define MRSHPC_IOWCR1 (PA_MRSHPC + 20) | ||
47 | #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) | ||
48 | #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) | ||
49 | #define MRSHPC_IOWCR2 (PA_MRSHPC + 26) | ||
50 | #define MRSHPC_CDCR (PA_MRSHPC + 28) | ||
51 | #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) | ||
52 | |||
53 | #define PA_LED (PA_PERIPHERAL + 0x00800000) /* 8bit LED */ | ||
54 | #define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */ | ||
55 | |||
56 | #define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */ | ||
57 | /* GPIO */ | ||
58 | #define FPGA_IN 0xb1840000UL | ||
59 | #define FPGA_OUT 0xb1840004UL | ||
60 | |||
61 | #define PORT_PECR 0xA4050108UL | ||
62 | #define PORT_PJCR 0xA4050110UL | ||
63 | #define PORT_PSELD 0xA4050154UL | ||
64 | #define PORT_PSELB 0xA4050150UL | ||
65 | |||
66 | #define PORT_PSELC 0xA4050152UL | ||
67 | #define PORT_PKCR 0xA4050112UL | ||
68 | #define PORT_PHCR 0xA405010EUL | ||
69 | #define PORT_PLCR 0xA4050114UL | ||
70 | #define PORT_PMCR 0xA4050116UL | ||
71 | #define PORT_PRCR 0xA405011CUL | ||
72 | #define PORT_PXCR 0xA4050148UL | ||
73 | #define PORT_PSELA 0xA405014EUL | ||
74 | #define PORT_PYCR 0xA405014AUL | ||
75 | #define PORT_PZCR 0xA405014CUL | ||
76 | #define PORT_HIZCRA 0xA4050158UL | ||
77 | #define PORT_HIZCRC 0xA405015CUL | ||
78 | |||
79 | /* IRQ */ | ||
80 | #define IRQ0_IRQ 32 | ||
81 | #define IRQ1_IRQ 33 | ||
82 | |||
83 | #define IRQ01_MODE 0xb1800000 | ||
84 | #define IRQ01_STS 0xb1800004 | ||
85 | #define IRQ01_MASK 0xb1800008 | ||
86 | |||
87 | /* Bits in IRQ01_* registers */ | ||
88 | |||
89 | #define SE7722_FPGA_IRQ_USB 0 /* IRQ0 */ | ||
90 | #define SE7722_FPGA_IRQ_SMC 1 /* IRQ0 */ | ||
91 | #define SE7722_FPGA_IRQ_MRSHPC0 2 /* IRQ1 */ | ||
92 | #define SE7722_FPGA_IRQ_MRSHPC1 3 /* IRQ1 */ | ||
93 | #define SE7722_FPGA_IRQ_MRSHPC2 4 /* IRQ1 */ | ||
94 | #define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */ | ||
95 | |||
96 | #define SE7722_FPGA_IRQ_NR 6 | ||
97 | #define SE7722_FPGA_IRQ_BASE 110 | ||
98 | |||
99 | #define MRSHPC_IRQ3 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC3) | ||
100 | #define MRSHPC_IRQ2 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC2) | ||
101 | #define MRSHPC_IRQ1 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC1) | ||
102 | #define MRSHPC_IRQ0 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC0) | ||
103 | #define SMC_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_SMC) | ||
104 | #define USB_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_USB) | ||
105 | |||
106 | /* arch/sh/boards/se/7722/irq.c */ | ||
107 | void init_se7722_IRQ(void); | ||
108 | |||
109 | #define __IO_PREFIX se7722 | ||
110 | #include <asm/io_generic.h> | ||
111 | |||
112 | #endif /* __ASM_SH_SE7722_H */ | ||
diff --git a/include/asm-sh/se7751.h b/include/asm-sh/se7751.h deleted file mode 100644 index b36792ac5d66..000000000000 --- a/include/asm-sh/se7751.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | #ifndef __ASM_SH_HITACHI_7751SE_H | ||
2 | #define __ASM_SH_HITACHI_7751SE_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/hitachi_7751se.h | ||
6 | * | ||
7 | * Copyright (C) 2000 Kazumoto Kojima | ||
8 | * | ||
9 | * Hitachi SolutionEngine support | ||
10 | |||
11 | * Modified for 7751 Solution Engine by | ||
12 | * Ian da Silva and Jeremy Siegel, 2001. | ||
13 | */ | ||
14 | |||
15 | /* Box specific addresses. */ | ||
16 | |||
17 | #define PA_ROM 0x00000000 /* EPROM */ | ||
18 | #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ | ||
19 | #define PA_FROM 0x01000000 /* EPROM */ | ||
20 | #define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ | ||
21 | #define PA_EXT1 0x04000000 | ||
22 | #define PA_EXT1_SIZE 0x04000000 | ||
23 | #define PA_EXT2 0x08000000 | ||
24 | #define PA_EXT2_SIZE 0x04000000 | ||
25 | #define PA_SDRAM 0x0c000000 | ||
26 | #define PA_SDRAM_SIZE 0x04000000 | ||
27 | |||
28 | #define PA_EXT4 0x12000000 | ||
29 | #define PA_EXT4_SIZE 0x02000000 | ||
30 | #define PA_EXT5 0x14000000 | ||
31 | #define PA_EXT5_SIZE 0x04000000 | ||
32 | #define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ | ||
33 | |||
34 | #define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ | ||
35 | #define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ | ||
36 | #define PA_LED 0xba000000 /* LED */ | ||
37 | #define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ | ||
38 | |||
39 | #define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ | ||
40 | #define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ | ||
41 | #define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ | ||
42 | #define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ | ||
43 | #define MRSHPC_MODE (PA_MRSHPC + 4) | ||
44 | #define MRSHPC_OPTION (PA_MRSHPC + 6) | ||
45 | #define MRSHPC_CSR (PA_MRSHPC + 8) | ||
46 | #define MRSHPC_ISR (PA_MRSHPC + 10) | ||
47 | #define MRSHPC_ICR (PA_MRSHPC + 12) | ||
48 | #define MRSHPC_CPWCR (PA_MRSHPC + 14) | ||
49 | #define MRSHPC_MW0CR1 (PA_MRSHPC + 16) | ||
50 | #define MRSHPC_MW1CR1 (PA_MRSHPC + 18) | ||
51 | #define MRSHPC_IOWCR1 (PA_MRSHPC + 20) | ||
52 | #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) | ||
53 | #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) | ||
54 | #define MRSHPC_IOWCR2 (PA_MRSHPC + 26) | ||
55 | #define MRSHPC_CDCR (PA_MRSHPC + 28) | ||
56 | #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) | ||
57 | |||
58 | #define BCR_ILCRA (PA_BCR + 0) | ||
59 | #define BCR_ILCRB (PA_BCR + 2) | ||
60 | #define BCR_ILCRC (PA_BCR + 4) | ||
61 | #define BCR_ILCRD (PA_BCR + 6) | ||
62 | #define BCR_ILCRE (PA_BCR + 8) | ||
63 | #define BCR_ILCRF (PA_BCR + 10) | ||
64 | #define BCR_ILCRG (PA_BCR + 12) | ||
65 | |||
66 | #define IRQ_79C973 13 | ||
67 | |||
68 | void init_7751se_IRQ(void); | ||
69 | |||
70 | #define __IO_PREFIX sh7751se | ||
71 | #include <asm/io_generic.h> | ||
72 | |||
73 | #endif /* __ASM_SH_HITACHI_7751SE_H */ | ||
diff --git a/include/asm-sh/se7780.h b/include/asm-sh/se7780.h deleted file mode 100644 index 40e9b41458cd..000000000000 --- a/include/asm-sh/se7780.h +++ /dev/null | |||
@@ -1,108 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SE7780_H | ||
2 | #define __ASM_SH_SE7780_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/se7780.h | ||
6 | * | ||
7 | * Copyright (C) 2006,2007 Nobuhiro Iwamatsu | ||
8 | * | ||
9 | * Hitachi UL SolutionEngine 7780 Support. | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General Public | ||
12 | * License. See the file "COPYING" in the main directory of this archive | ||
13 | * for more details. | ||
14 | */ | ||
15 | #include <asm/addrspace.h> | ||
16 | |||
17 | /* Box specific addresses. */ | ||
18 | #define SE_AREA0_WIDTH 4 /* Area0: 32bit */ | ||
19 | #define PA_ROM 0xa0000000 /* EPROM */ | ||
20 | #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ | ||
21 | #define PA_FROM 0xa1000000 /* Flash-ROM */ | ||
22 | #define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */ | ||
23 | #define PA_EXT1 0xa4000000 | ||
24 | #define PA_EXT1_SIZE 0x04000000 | ||
25 | #define PA_SM501 PA_EXT1 /* Graphic IC (SM501) */ | ||
26 | #define PA_SM501_SIZE PA_EXT1_SIZE /* Graphic IC (SM501) */ | ||
27 | #define PA_SDRAM 0xa8000000 /* DDR-SDRAM(Area2/3) 128MB */ | ||
28 | #define PA_SDRAM_SIZE 0x08000000 | ||
29 | |||
30 | #define PA_EXT4 0xb0000000 | ||
31 | #define PA_EXT4_SIZE 0x04000000 | ||
32 | #define PA_EXT_FLASH PA_EXT4 /* Expansion Flash-ROM */ | ||
33 | |||
34 | #define PA_PERIPHERAL PA_AREA6_IO /* SW6-6=ON */ | ||
35 | |||
36 | #define PA_LAN (PA_PERIPHERAL + 0) /* SMC LAN91C111 */ | ||
37 | #define PA_LED_DISP (PA_PERIPHERAL + 0x02000000) /* 8words LED Display */ | ||
38 | #define DISP_CHAR_RAM (7 << 3) | ||
39 | #define DISP_SEL0_ADDR (DISP_CHAR_RAM + 0) | ||
40 | #define DISP_SEL1_ADDR (DISP_CHAR_RAM + 1) | ||
41 | #define DISP_SEL2_ADDR (DISP_CHAR_RAM + 2) | ||
42 | #define DISP_SEL3_ADDR (DISP_CHAR_RAM + 3) | ||
43 | #define DISP_SEL4_ADDR (DISP_CHAR_RAM + 4) | ||
44 | #define DISP_SEL5_ADDR (DISP_CHAR_RAM + 5) | ||
45 | #define DISP_SEL6_ADDR (DISP_CHAR_RAM + 6) | ||
46 | #define DISP_SEL7_ADDR (DISP_CHAR_RAM + 7) | ||
47 | |||
48 | #define DISP_UDC_RAM (5 << 3) | ||
49 | #define PA_FPGA (PA_PERIPHERAL + 0x03000000) /* FPGA base address */ | ||
50 | |||
51 | /* FPGA register address and bit */ | ||
52 | #define FPGA_SFTRST (PA_FPGA + 0) /* Soft reset register */ | ||
53 | #define FPGA_INTMSK1 (PA_FPGA + 2) /* Interrupt Mask register 1 */ | ||
54 | #define FPGA_INTMSK2 (PA_FPGA + 4) /* Interrupt Mask register 2 */ | ||
55 | #define FPGA_INTSEL1 (PA_FPGA + 6) /* Interrupt select register 1 */ | ||
56 | #define FPGA_INTSEL2 (PA_FPGA + 8) /* Interrupt select register 2 */ | ||
57 | #define FPGA_INTSEL3 (PA_FPGA + 10) /* Interrupt select register 3 */ | ||
58 | #define FPGA_PCI_INTSEL1 (PA_FPGA + 12) /* PCI Interrupt select register 1 */ | ||
59 | #define FPGA_PCI_INTSEL2 (PA_FPGA + 14) /* PCI Interrupt select register 2 */ | ||
60 | #define FPGA_INTSET (PA_FPGA + 16) /* IRQ/IRL select register */ | ||
61 | #define FPGA_INTSTS1 (PA_FPGA + 18) /* Interrupt status register 1 */ | ||
62 | #define FPGA_INTSTS2 (PA_FPGA + 20) /* Interrupt status register 2 */ | ||
63 | #define FPGA_REQSEL (PA_FPGA + 22) /* REQ/GNT select register */ | ||
64 | #define FPGA_DBG_LED (PA_FPGA + 32) /* Debug LED(D-LED[8:1] */ | ||
65 | #define PA_LED FPGA_DBG_LED | ||
66 | #define FPGA_IVDRID (PA_FPGA + 36) /* iVDR ID Register */ | ||
67 | #define FPGA_IVDRPW (PA_FPGA + 38) /* iVDR Power ON Register */ | ||
68 | #define FPGA_MMCID (PA_FPGA + 40) /* MMC ID Register */ | ||
69 | |||
70 | /* FPGA INTSEL position */ | ||
71 | /* INTSEL1 */ | ||
72 | #define IRQPOS_SMC91CX (0 * 4) | ||
73 | #define IRQPOS_SM501 (1 * 4) | ||
74 | /* INTSEL2 */ | ||
75 | #define IRQPOS_EXTINT1 (0 * 4) | ||
76 | #define IRQPOS_EXTINT2 (1 * 4) | ||
77 | #define IRQPOS_EXTINT3 (2 * 4) | ||
78 | #define IRQPOS_EXTINT4 (3 * 4) | ||
79 | /* INTSEL3 */ | ||
80 | #define IRQPOS_PCCPW (0 * 4) | ||
81 | |||
82 | /* IDE interrupt */ | ||
83 | #define IRQ_IDE0 67 /* iVDR */ | ||
84 | |||
85 | /* SMC interrupt */ | ||
86 | #define SMC_IRQ 8 | ||
87 | |||
88 | /* SM501 interrupt */ | ||
89 | #define SM501_IRQ 0 | ||
90 | |||
91 | /* interrupt pin */ | ||
92 | #define IRQPIN_EXTINT1 0 /* IRQ0 pin */ | ||
93 | #define IRQPIN_EXTINT2 1 /* IRQ1 pin */ | ||
94 | #define IRQPIN_EXTINT3 2 /* IRQ2 pin */ | ||
95 | #define IRQPIN_SMC91CX 3 /* IRQ3 pin */ | ||
96 | #define IRQPIN_EXTINT4 4 /* IRQ4 pin */ | ||
97 | #define IRQPIN_PCC0 5 /* IRQ5 pin */ | ||
98 | #define IRQPIN_PCC2 6 /* IRQ6 pin */ | ||
99 | #define IRQPIN_SM501 7 /* IRQ7 pin */ | ||
100 | #define IRQPIN_PCCPW 7 /* IRQ7 pin */ | ||
101 | |||
102 | /* arch/sh/boards/se/7780/irq.c */ | ||
103 | void init_se7780_IRQ(void); | ||
104 | |||
105 | #define __IO_PREFIX se7780 | ||
106 | #include <asm/io_generic.h> | ||
107 | |||
108 | #endif /* __ASM_SH_SE7780_H */ | ||
diff --git a/include/asm-sh/sections.h b/include/asm-sh/sections.h deleted file mode 100644 index 8f8f4ad400df..000000000000 --- a/include/asm-sh/sections.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SECTIONS_H | ||
2 | #define __ASM_SH_SECTIONS_H | ||
3 | |||
4 | #include <asm-generic/sections.h> | ||
5 | |||
6 | extern long __machvec_start, __machvec_end; | ||
7 | extern char __uncached_start, __uncached_end; | ||
8 | extern char _ebss[]; | ||
9 | |||
10 | #endif /* __ASM_SH_SECTIONS_H */ | ||
11 | |||
diff --git a/include/asm-sh/segment.h b/include/asm-sh/segment.h deleted file mode 100644 index 5e2725f4ac49..000000000000 --- a/include/asm-sh/segment.h +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SEGMENT_H | ||
2 | #define __ASM_SH_SEGMENT_H | ||
3 | |||
4 | #ifndef __ASSEMBLY__ | ||
5 | |||
6 | typedef struct { | ||
7 | unsigned long seg; | ||
8 | } mm_segment_t; | ||
9 | |||
10 | #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) | ||
11 | |||
12 | /* | ||
13 | * The fs value determines whether argument validity checking should be | ||
14 | * performed or not. If get_fs() == USER_DS, checking is performed, with | ||
15 | * get_fs() == KERNEL_DS, checking is bypassed. | ||
16 | * | ||
17 | * For historical reasons, these macros are grossly misnamed. | ||
18 | */ | ||
19 | #define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL) | ||
20 | #ifdef CONFIG_MMU | ||
21 | #define USER_DS MAKE_MM_SEG(PAGE_OFFSET) | ||
22 | #else | ||
23 | #define USER_DS KERNEL_DS | ||
24 | #endif | ||
25 | |||
26 | #define segment_eq(a,b) ((a).seg == (b).seg) | ||
27 | |||
28 | #define get_ds() (KERNEL_DS) | ||
29 | |||
30 | #define get_fs() (current_thread_info()->addr_limit) | ||
31 | #define set_fs(x) (current_thread_info()->addr_limit = (x)) | ||
32 | |||
33 | #endif /* __ASSEMBLY__ */ | ||
34 | #endif /* __ASM_SH_SEGMENT_H */ | ||
diff --git a/include/asm-sh/sembuf.h b/include/asm-sh/sembuf.h deleted file mode 100644 index d79f3bd570b2..000000000000 --- a/include/asm-sh/sembuf.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SEMBUF_H | ||
2 | #define __ASM_SH_SEMBUF_H | ||
3 | |||
4 | /* | ||
5 | * The semid64_ds structure for i386 architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct semid64_ds { | ||
15 | struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ | ||
16 | __kernel_time_t sem_otime; /* last semop time */ | ||
17 | unsigned long __unused1; | ||
18 | __kernel_time_t sem_ctime; /* last change time */ | ||
19 | unsigned long __unused2; | ||
20 | unsigned long sem_nsems; /* no. of semaphores in array */ | ||
21 | unsigned long __unused3; | ||
22 | unsigned long __unused4; | ||
23 | }; | ||
24 | |||
25 | #endif /* __ASM_SH_SEMBUF_H */ | ||
diff --git a/include/asm-sh/serial.h b/include/asm-sh/serial.h deleted file mode 100644 index 21f6d330f189..000000000000 --- a/include/asm-sh/serial.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/serial.h | ||
3 | * | ||
4 | * Configuration details for 8250, 16450, 16550, etc. serial ports | ||
5 | */ | ||
6 | |||
7 | #ifndef _ASM_SERIAL_H | ||
8 | #define _ASM_SERIAL_H | ||
9 | |||
10 | #include <linux/kernel.h> | ||
11 | |||
12 | /* | ||
13 | * This assumes you have a 1.8432 MHz clock for your UART. | ||
14 | * | ||
15 | * It'd be nice if someone built a serial card with a 24.576 MHz | ||
16 | * clock, since the 16550A is capable of handling a top speed of 1.5 | ||
17 | * megabits/second; but this requires the faster clock. | ||
18 | */ | ||
19 | #define BASE_BAUD ( 1843200 / 16 ) | ||
20 | |||
21 | #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) | ||
22 | |||
23 | #ifdef CONFIG_HD64465 | ||
24 | #include <asm/hd64465.h> | ||
25 | |||
26 | #define SERIAL_PORT_DFNS \ | ||
27 | /* UART CLK PORT IRQ FLAGS */ \ | ||
28 | { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */ | ||
29 | |||
30 | #else | ||
31 | |||
32 | #define SERIAL_PORT_DFNS | ||
33 | |||
34 | #endif | ||
35 | |||
36 | #endif /* _ASM_SERIAL_H */ | ||
diff --git a/include/asm-sh/setup.h b/include/asm-sh/setup.h deleted file mode 100644 index 55a2bd328d99..000000000000 --- a/include/asm-sh/setup.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | #ifndef _SH_SETUP_H | ||
2 | #define _SH_SETUP_H | ||
3 | |||
4 | #define COMMAND_LINE_SIZE 256 | ||
5 | |||
6 | #ifdef __KERNEL__ | ||
7 | |||
8 | /* | ||
9 | * This is set up by the setup-routine at boot-time | ||
10 | */ | ||
11 | #define PARAM ((unsigned char *)empty_zero_page) | ||
12 | |||
13 | #define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000)) | ||
14 | #define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004)) | ||
15 | #define ORIG_ROOT_DEV (*(unsigned long *) (PARAM+0x008)) | ||
16 | #define LOADER_TYPE (*(unsigned long *) (PARAM+0x00c)) | ||
17 | #define INITRD_START (*(unsigned long *) (PARAM+0x010)) | ||
18 | #define INITRD_SIZE (*(unsigned long *) (PARAM+0x014)) | ||
19 | /* ... */ | ||
20 | #define COMMAND_LINE ((char *) (PARAM+0x100)) | ||
21 | |||
22 | int setup_early_printk(char *); | ||
23 | void sh_mv_setup(void); | ||
24 | |||
25 | #endif /* __KERNEL__ */ | ||
26 | |||
27 | #endif /* _SH_SETUP_H */ | ||
diff --git a/include/asm-sh/sfp-machine.h b/include/asm-sh/sfp-machine.h deleted file mode 100644 index d3c548443f2a..000000000000 --- a/include/asm-sh/sfp-machine.h +++ /dev/null | |||
@@ -1,84 +0,0 @@ | |||
1 | /* Machine-dependent software floating-point definitions. | ||
2 | SuperH kernel version. | ||
3 | Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. | ||
4 | This file is part of the GNU C Library. | ||
5 | Contributed by Richard Henderson (rth@cygnus.com), | ||
6 | Jakub Jelinek (jj@ultra.linux.cz), | ||
7 | David S. Miller (davem@redhat.com) and | ||
8 | Peter Maydell (pmaydell@chiark.greenend.org.uk). | ||
9 | |||
10 | The GNU C Library is free software; you can redistribute it and/or | ||
11 | modify it under the terms of the GNU Library General Public License as | ||
12 | published by the Free Software Foundation; either version 2 of the | ||
13 | License, or (at your option) any later version. | ||
14 | |||
15 | The GNU C Library is distributed in the hope that it will be useful, | ||
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
18 | Library General Public License for more details. | ||
19 | |||
20 | You should have received a copy of the GNU Library General Public | ||
21 | License along with the GNU C Library; see the file COPYING.LIB. If | ||
22 | not, write to the Free Software Foundation, Inc., | ||
23 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | ||
24 | |||
25 | #ifndef _SFP_MACHINE_H | ||
26 | #define _SFP_MACHINE_H | ||
27 | |||
28 | #define _FP_W_TYPE_SIZE 32 | ||
29 | #define _FP_W_TYPE unsigned long | ||
30 | #define _FP_WS_TYPE signed long | ||
31 | #define _FP_I_TYPE long | ||
32 | |||
33 | #define _FP_MUL_MEAT_S(R,X,Y) \ | ||
34 | _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) | ||
35 | #define _FP_MUL_MEAT_D(R,X,Y) \ | ||
36 | _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) | ||
37 | #define _FP_MUL_MEAT_Q(R,X,Y) \ | ||
38 | _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) | ||
39 | |||
40 | #define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) | ||
41 | #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) | ||
42 | #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) | ||
43 | |||
44 | #define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) | ||
45 | #define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 | ||
46 | #define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 | ||
47 | #define _FP_NANSIGN_S 0 | ||
48 | #define _FP_NANSIGN_D 0 | ||
49 | #define _FP_NANSIGN_Q 0 | ||
50 | |||
51 | #define _FP_KEEPNANFRACP 1 | ||
52 | |||
53 | /* | ||
54 | * If one NaN is signaling and the other is not, | ||
55 | * we choose that one, otherwise we choose X. | ||
56 | */ | ||
57 | #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ | ||
58 | do { \ | ||
59 | if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \ | ||
60 | && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \ | ||
61 | { \ | ||
62 | R##_s = Y##_s; \ | ||
63 | _FP_FRAC_COPY_##wc(R,Y); \ | ||
64 | } \ | ||
65 | else \ | ||
66 | { \ | ||
67 | R##_s = X##_s; \ | ||
68 | _FP_FRAC_COPY_##wc(R,X); \ | ||
69 | } \ | ||
70 | R##_c = FP_CLS_NAN; \ | ||
71 | } while (0) | ||
72 | |||
73 | //#define FP_ROUNDMODE FPSCR_RM | ||
74 | #define FP_DENORM_ZERO 1/*FPSCR_DN*/ | ||
75 | |||
76 | /* Exception flags. */ | ||
77 | #define FP_EX_INVALID (1<<4) | ||
78 | #define FP_EX_DIVZERO (1<<3) | ||
79 | #define FP_EX_OVERFLOW (1<<2) | ||
80 | #define FP_EX_UNDERFLOW (1<<1) | ||
81 | #define FP_EX_INEXACT (1<<0) | ||
82 | |||
83 | #endif | ||
84 | |||
diff --git a/include/asm-sh/sh03/io.h b/include/asm-sh/sh03/io.h deleted file mode 100644 index c39c785bba94..000000000000 --- a/include/asm-sh/sh03/io.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/sh03/io.h | ||
3 | * | ||
4 | * Copyright 2004 Interface Co.,Ltd. Saito.K | ||
5 | * | ||
6 | * IO functions for an Interface CTP/PCI-SH03 | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_SH_IO_SH03_H | ||
10 | #define _ASM_SH_IO_SH03_H | ||
11 | |||
12 | #include <linux/time.h> | ||
13 | |||
14 | #define IRL0_IRQ 2 | ||
15 | #define IRL0_PRIORITY 13 | ||
16 | #define IRL1_IRQ 5 | ||
17 | #define IRL1_PRIORITY 10 | ||
18 | #define IRL2_IRQ 8 | ||
19 | #define IRL2_PRIORITY 7 | ||
20 | #define IRL3_IRQ 11 | ||
21 | #define IRL3_PRIORITY 4 | ||
22 | |||
23 | void heartbeat_sh03(void); | ||
24 | |||
25 | #endif /* _ASM_SH_IO_SH03_H */ | ||
diff --git a/include/asm-sh/sh03/sh03.h b/include/asm-sh/sh03/sh03.h deleted file mode 100644 index 19c40b80428d..000000000000 --- a/include/asm-sh/sh03/sh03.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SH03_H | ||
2 | #define __ASM_SH_SH03_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/sh03/sh03.h | ||
6 | * | ||
7 | * Copyright (C) 2004 Interface Co., Ltd. Saito.K | ||
8 | * | ||
9 | * Interface CTP/PCI-SH03 support | ||
10 | */ | ||
11 | |||
12 | #define PA_PCI_IO (0xbe240000) /* PCI I/O space */ | ||
13 | #define PA_PCI_MEM (0xbd000000) /* PCI MEM space */ | ||
14 | |||
15 | #define PCIPAR (0xa4000cf8) /* PCI Config address */ | ||
16 | #define PCIPDR (0xa4000cfc) /* PCI Config data */ | ||
17 | |||
18 | #endif /* __ASM_SH_SH03_H */ | ||
diff --git a/include/asm-sh/sh7760fb.h b/include/asm-sh/sh7760fb.h deleted file mode 100644 index 8767f61aceca..000000000000 --- a/include/asm-sh/sh7760fb.h +++ /dev/null | |||
@@ -1,197 +0,0 @@ | |||
1 | /* | ||
2 | * sh7760fb.h -- platform data for SH7760/SH7763 LCDC framebuffer driver. | ||
3 | * | ||
4 | * (c) 2006-2008 MSC Vertriebsges.m.b.H., | ||
5 | * Manuel Lauss <mano@roarinelk.homelinux.net> | ||
6 | * (c) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_SH_SH7760FB_H | ||
10 | #define _ASM_SH_SH7760FB_H | ||
11 | |||
12 | /* | ||
13 | * some bits of the colormap registers should be written as zero. | ||
14 | * create a mask for that. | ||
15 | */ | ||
16 | #define SH7760FB_PALETTE_MASK 0x00f8fcf8 | ||
17 | |||
18 | /* The LCDC dma engine always sets bits 27-26 to 1: this is Area3 */ | ||
19 | #define SH7760FB_DMA_MASK 0x0C000000 | ||
20 | |||
21 | /* palette */ | ||
22 | #define LDPR(x) (((x) << 2)) | ||
23 | |||
24 | /* framebuffer registers and bits */ | ||
25 | #define LDICKR 0x400 | ||
26 | #define LDMTR 0x402 | ||
27 | /* see sh7760fb.h for LDMTR bits */ | ||
28 | #define LDDFR 0x404 | ||
29 | #define LDDFR_PABD (1 << 8) | ||
30 | #define LDDFR_COLOR_MASK 0x7F | ||
31 | #define LDSMR 0x406 | ||
32 | #define LDSMR_ROT (1 << 13) | ||
33 | #define LDSARU 0x408 | ||
34 | #define LDSARL 0x40c | ||
35 | #define LDLAOR 0x410 | ||
36 | #define LDPALCR 0x412 | ||
37 | #define LDPALCR_PALS (1 << 4) | ||
38 | #define LDPALCR_PALEN (1 << 0) | ||
39 | #define LDHCNR 0x414 | ||
40 | #define LDHSYNR 0x416 | ||
41 | #define LDVDLNR 0x418 | ||
42 | #define LDVTLNR 0x41a | ||
43 | #define LDVSYNR 0x41c | ||
44 | #define LDACLNR 0x41e | ||
45 | #define LDINTR 0x420 | ||
46 | #define LDPMMR 0x424 | ||
47 | #define LDPSPR 0x426 | ||
48 | #define LDCNTR 0x428 | ||
49 | #define LDCNTR_DON (1 << 0) | ||
50 | #define LDCNTR_DON2 (1 << 4) | ||
51 | |||
52 | #ifdef CONFIG_CPU_SUBTYPE_SH7763 | ||
53 | # define LDLIRNR 0x440 | ||
54 | /* LDINTR bit */ | ||
55 | # define LDINTR_MINTEN (1 << 15) | ||
56 | # define LDINTR_FINTEN (1 << 14) | ||
57 | # define LDINTR_VSINTEN (1 << 13) | ||
58 | # define LDINTR_VEINTEN (1 << 12) | ||
59 | # define LDINTR_MINTS (1 << 11) | ||
60 | # define LDINTR_FINTS (1 << 10) | ||
61 | # define LDINTR_VSINTS (1 << 9) | ||
62 | # define LDINTR_VEINTS (1 << 8) | ||
63 | # define VINT_START (LDINTR_VSINTEN) | ||
64 | # define VINT_CHECK (LDINTR_VSINTS) | ||
65 | #else | ||
66 | /* LDINTR bit */ | ||
67 | # define LDINTR_VINTSEL (1 << 12) | ||
68 | # define LDINTR_VINTE (1 << 8) | ||
69 | # define LDINTR_VINTS (1 << 0) | ||
70 | # define VINT_START (LDINTR_VINTSEL) | ||
71 | # define VINT_CHECK (LDINTR_VINTS) | ||
72 | #endif | ||
73 | |||
74 | /* HSYNC polarity inversion */ | ||
75 | #define LDMTR_FLMPOL (1 << 15) | ||
76 | |||
77 | /* VSYNC polarity inversion */ | ||
78 | #define LDMTR_CL1POL (1 << 14) | ||
79 | |||
80 | /* DISPLAY-ENABLE polarity inversion */ | ||
81 | #define LDMTR_DISPEN_LOWACT (1 << 13) | ||
82 | |||
83 | /* DISPLAY DATA BUS polarity inversion */ | ||
84 | #define LDMTR_DPOL_LOWACT (1 << 12) | ||
85 | |||
86 | /* AC modulation signal enable */ | ||
87 | #define LDMTR_MCNT (1 << 10) | ||
88 | |||
89 | /* Disable output of HSYNC during VSYNC period */ | ||
90 | #define LDMTR_CL1CNT (1 << 9) | ||
91 | |||
92 | /* Disable output of VSYNC during VSYNC period */ | ||
93 | #define LDMTR_CL2CNT (1 << 8) | ||
94 | |||
95 | /* Display types supported by the LCDC */ | ||
96 | #define LDMTR_STN_MONO_4 0x00 | ||
97 | #define LDMTR_STN_MONO_8 0x01 | ||
98 | #define LDMTR_STN_COLOR_4 0x08 | ||
99 | #define LDMTR_STN_COLOR_8 0x09 | ||
100 | #define LDMTR_STN_COLOR_12 0x0A | ||
101 | #define LDMTR_STN_COLOR_16 0x0B | ||
102 | #define LDMTR_DSTN_MONO_8 0x11 | ||
103 | #define LDMTR_DSTN_MONO_16 0x13 | ||
104 | #define LDMTR_DSTN_COLOR_8 0x19 | ||
105 | #define LDMTR_DSTN_COLOR_12 0x1A | ||
106 | #define LDMTR_DSTN_COLOR_16 0x1B | ||
107 | #define LDMTR_TFT_COLOR_16 0x2B | ||
108 | |||
109 | /* framebuffer color layout */ | ||
110 | #define LDDFR_1BPP_MONO 0x00 | ||
111 | #define LDDFR_2BPP_MONO 0x01 | ||
112 | #define LDDFR_4BPP_MONO 0x02 | ||
113 | #define LDDFR_6BPP_MONO 0x04 | ||
114 | #define LDDFR_4BPP 0x0A | ||
115 | #define LDDFR_8BPP 0x0C | ||
116 | #define LDDFR_16BPP_RGB555 0x1D | ||
117 | #define LDDFR_16BPP_RGB565 0x2D | ||
118 | |||
119 | /* LCDC Pixclock sources */ | ||
120 | #define LCDC_CLKSRC_BUSCLOCK 0 | ||
121 | #define LCDC_CLKSRC_PERIPHERAL 1 | ||
122 | #define LCDC_CLKSRC_EXTERNAL 2 | ||
123 | |||
124 | #define LDICKR_CLKSRC(x) \ | ||
125 | (((x) & 3) << 12) | ||
126 | |||
127 | /* LCDC pixclock input divider. Set to 1 at a minimum! */ | ||
128 | #define LDICKR_CLKDIV(x) \ | ||
129 | ((x) & 0x1f) | ||
130 | |||
131 | struct sh7760fb_platdata { | ||
132 | |||
133 | /* Set this member to a valid fb_videmode for the display you | ||
134 | * wish to use. The following members must be initialized: | ||
135 | * xres, yres, hsync_len, vsync_len, sync, | ||
136 | * {left,right,upper,lower}_margin. | ||
137 | * The driver uses the above members to calculate register values | ||
138 | * and memory requirements. Other members are ignored but may | ||
139 | * be used by other framebuffer layer components. | ||
140 | */ | ||
141 | struct fb_videomode *def_mode; | ||
142 | |||
143 | /* LDMTR includes display type and signal polarity. The | ||
144 | * HSYNC/VSYNC polarities are derived from the fb_var_screeninfo | ||
145 | * data above; however the polarities of the following signals | ||
146 | * must be encoded in the ldmtr member: | ||
147 | * Display Enable signal (default high-active) DISPEN_LOWACT | ||
148 | * Display Data signals (default high-active) DPOL_LOWACT | ||
149 | * AC Modulation signal (default off) MCNT | ||
150 | * Hsync-During-Vsync suppression (default off) CL1CNT | ||
151 | * Vsync-during-vsync suppression (default off) CL2CNT | ||
152 | * NOTE: also set a display type! | ||
153 | * (one of LDMTR_{STN,DSTN,TFT}_{MONO,COLOR}_{4,8,12,16}) | ||
154 | */ | ||
155 | u16 ldmtr; | ||
156 | |||
157 | /* LDDFR controls framebuffer image format (depth, organization) | ||
158 | * Use ONE of the LDDFR_?BPP_* macros! | ||
159 | */ | ||
160 | u16 lddfr; | ||
161 | |||
162 | /* LDPMMR and LDPSPR control the timing of the power signals | ||
163 | * for the display. Please read the SH7760 Hardware Manual, | ||
164 | * Chapters 30.3.17, 30.3.18 and 30.4.6! | ||
165 | */ | ||
166 | u16 ldpmmr; | ||
167 | u16 ldpspr; | ||
168 | |||
169 | /* LDACLNR contains the line numbers after which the AC modulation | ||
170 | * signal is to toggle. Set to ZERO for TFTs or displays which | ||
171 | * do not need it. (Chapter 30.3.15 in SH7760 Hardware Manual). | ||
172 | */ | ||
173 | u16 ldaclnr; | ||
174 | |||
175 | /* LDICKR contains information on pixelclock source and config. | ||
176 | * Please use the LDICKR_CLKSRC() and LDICKR_CLKDIV() macros. | ||
177 | * minimal value for CLKDIV() must be 1!. | ||
178 | */ | ||
179 | u16 ldickr; | ||
180 | |||
181 | /* set this member to 1 if you wish to use the LCDC's hardware | ||
182 | * rotation function. This is limited to displays <= 320x200 | ||
183 | * pixels resolution! | ||
184 | */ | ||
185 | int rotate; /* set to 1 to rotate 90 CCW */ | ||
186 | |||
187 | /* set this to 1 to suppress vsync irq use. */ | ||
188 | int novsync; | ||
189 | |||
190 | /* blanking hook for platform. Set this if your platform can do | ||
191 | * more than the LCDC in terms of blanking (e.g. disable clock | ||
192 | * generator / backlight power supply / etc. | ||
193 | */ | ||
194 | void (*blank) (int); | ||
195 | }; | ||
196 | |||
197 | #endif /* _ASM_SH_SH7760FB_H */ | ||
diff --git a/include/asm-sh/sh7763rdp.h b/include/asm-sh/sh7763rdp.h deleted file mode 100644 index 8750cc852977..000000000000 --- a/include/asm-sh/sh7763rdp.h +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SH7763RDP_H | ||
2 | #define __ASM_SH_SH7763RDP_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/sh7763drp.h | ||
6 | * | ||
7 | * Copyright (C) 2008 Renesas Solutions | ||
8 | * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
13 | * | ||
14 | */ | ||
15 | #include <asm/addrspace.h> | ||
16 | |||
17 | /* clock control */ | ||
18 | #define MSTPCR1 0xFFC80038 | ||
19 | |||
20 | /* PORT */ | ||
21 | #define PORT_PSEL0 0xFFEF0070 | ||
22 | #define PORT_PSEL1 0xFFEF0072 | ||
23 | #define PORT_PSEL2 0xFFEF0074 | ||
24 | #define PORT_PSEL3 0xFFEF0076 | ||
25 | #define PORT_PSEL4 0xFFEF0078 | ||
26 | |||
27 | #define PORT_PACR 0xFFEF0000 | ||
28 | #define PORT_PCCR 0xFFEF0004 | ||
29 | #define PORT_PFCR 0xFFEF000A | ||
30 | #define PORT_PGCR 0xFFEF000C | ||
31 | #define PORT_PHCR 0xFFEF000E | ||
32 | #define PORT_PICR 0xFFEF0010 | ||
33 | #define PORT_PJCR 0xFFEF0012 | ||
34 | #define PORT_PKCR 0xFFEF0014 | ||
35 | #define PORT_PLCR 0xFFEF0016 | ||
36 | #define PORT_PMCR 0xFFEF0018 | ||
37 | #define PORT_PNCR 0xFFEF001A | ||
38 | |||
39 | /* FPGA */ | ||
40 | #define CPLD_BOARD_ID_ERV_REG 0xB1000000 | ||
41 | #define CPLD_CPLD_CMD_REG 0xB1000006 | ||
42 | |||
43 | /* | ||
44 | * USB SH7763RDP board can use Host only. | ||
45 | */ | ||
46 | #define USB_USBHSC 0xFFEC80f0 | ||
47 | |||
48 | /* arch/sh/boards/renesas/sh7763rdp/irq.c */ | ||
49 | void init_sh7763rdp_IRQ(void); | ||
50 | int sh7763rdp_irq_demux(int irq); | ||
51 | #define __IO_PREFIX sh7763rdp | ||
52 | #include <asm/io_generic.h> | ||
53 | |||
54 | #endif /* __ASM_SH_SH7763RDP_H */ | ||
diff --git a/include/asm-sh/sh7785lcr.h b/include/asm-sh/sh7785lcr.h deleted file mode 100644 index 1ce27d5c7491..000000000000 --- a/include/asm-sh/sh7785lcr.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | #ifndef __ASM_SH_RENESAS_SH7785LCR_H | ||
2 | #define __ASM_SH_RENESAS_SH7785LCR_H | ||
3 | |||
4 | /* | ||
5 | * This board has 2 physical memory maps. | ||
6 | * It can be changed with DIP switch(S2-5). | ||
7 | * | ||
8 | * phys address | S2-5 = OFF | S2-5 = ON | ||
9 | * -----------------------------+---------------+--------------- | ||
10 | * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash | ||
11 | * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD | ||
12 | * 0x06000000 - 0x07ffffff(CS1) | reserved | I2C | ||
13 | * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM | ||
14 | * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM | ||
15 | * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107 | ||
16 | * 0x14000000 - 0x17ffffff(CS5) | I2C | USB | ||
17 | * 0x18000000 - 0x1bffffff(CS6) | reserved | SD | ||
18 | * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use) | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | #define NOR_FLASH_ADDR 0x00000000 | ||
23 | #define NOR_FLASH_SIZE 0x04000000 | ||
24 | |||
25 | #define PLD_BASE_ADDR 0x04000000 | ||
26 | #define PLD_PCICR (PLD_BASE_ADDR + 0x00) | ||
27 | #define PLD_LCD_BK_CONTR (PLD_BASE_ADDR + 0x02) | ||
28 | #define PLD_LOCALCR (PLD_BASE_ADDR + 0x04) | ||
29 | #define PLD_POFCR (PLD_BASE_ADDR + 0x06) | ||
30 | #define PLD_LEDCR (PLD_BASE_ADDR + 0x08) | ||
31 | #define PLD_SWSR (PLD_BASE_ADDR + 0x0a) | ||
32 | #define PLD_VERSR (PLD_BASE_ADDR + 0x0c) | ||
33 | #define PLD_MMSR (PLD_BASE_ADDR + 0x0e) | ||
34 | |||
35 | #define SM107_MEM_ADDR 0x10000000 | ||
36 | #define SM107_MEM_SIZE 0x00e00000 | ||
37 | #define SM107_REG_ADDR 0x13e00000 | ||
38 | #define SM107_REG_SIZE 0x00200000 | ||
39 | |||
40 | #if defined(CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS) | ||
41 | #define R8A66597_ADDR 0x14000000 /* USB */ | ||
42 | #define CG200_ADDR 0x18000000 /* SD */ | ||
43 | #define PCA9564_ADDR 0x06000000 /* I2C */ | ||
44 | #else | ||
45 | #define R8A66597_ADDR 0x08000000 | ||
46 | #define CG200_ADDR 0x0c000000 | ||
47 | #define PCA9564_ADDR 0x14000000 | ||
48 | #endif | ||
49 | |||
50 | #define R8A66597_SIZE 0x00000100 | ||
51 | #define CG200_SIZE 0x00010000 | ||
52 | #define PCA9564_SIZE 0x00000100 | ||
53 | |||
54 | #endif /* __ASM_SH_RENESAS_SH7785LCR_H */ | ||
55 | |||
diff --git a/include/asm-sh/sh_bios.h b/include/asm-sh/sh_bios.h deleted file mode 100644 index 0ca261956e3d..000000000000 --- a/include/asm-sh/sh_bios.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | #ifndef __ASM_SH_BIOS_H | ||
2 | #define __ASM_SH_BIOS_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 2000 Greg Banks, Mitch Davis | ||
6 | * C API to interface to the standard LinuxSH BIOS | ||
7 | * usually from within the early stages of kernel boot. | ||
8 | */ | ||
9 | |||
10 | |||
11 | extern void sh_bios_console_write(const char *buf, unsigned int len); | ||
12 | extern void sh_bios_char_out(char ch); | ||
13 | extern int sh_bios_in_gdb_mode(void); | ||
14 | extern void sh_bios_gdb_detach(void); | ||
15 | |||
16 | extern void sh_bios_get_node_addr(unsigned char *node_addr); | ||
17 | extern void sh_bios_shutdown(unsigned int how); | ||
18 | |||
19 | #endif /* __ASM_SH_BIOS_H */ | ||
diff --git a/include/asm-sh/sh_keysc.h b/include/asm-sh/sh_keysc.h deleted file mode 100644 index b5a4dd5a9729..000000000000 --- a/include/asm-sh/sh_keysc.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef __ASM_KEYSC_H__ | ||
2 | #define __ASM_KEYSC_H__ | ||
3 | |||
4 | #define SH_KEYSC_MAXKEYS 30 | ||
5 | |||
6 | struct sh_keysc_info { | ||
7 | enum { SH_KEYSC_MODE_1, SH_KEYSC_MODE_2, SH_KEYSC_MODE_3 } mode; | ||
8 | int scan_timing; /* 0 -> 7, see KYCR1, SCN[2:0] */ | ||
9 | int delay; | ||
10 | int keycodes[SH_KEYSC_MAXKEYS]; | ||
11 | }; | ||
12 | |||
13 | #endif /* __ASM_KEYSC_H__ */ | ||
diff --git a/include/asm-sh/sh_mobile_lcdc.h b/include/asm-sh/sh_mobile_lcdc.h deleted file mode 100644 index 27677727df4d..000000000000 --- a/include/asm-sh/sh_mobile_lcdc.h +++ /dev/null | |||
@@ -1,66 +0,0 @@ | |||
1 | #ifndef __ASM_SH_MOBILE_LCDC_H__ | ||
2 | #define __ASM_SH_MOBILE_LCDC_H__ | ||
3 | |||
4 | #include <linux/fb.h> | ||
5 | |||
6 | enum { RGB8, /* 24bpp, 8:8:8 */ | ||
7 | RGB9, /* 18bpp, 9:9 */ | ||
8 | RGB12A, /* 24bpp, 12:12 */ | ||
9 | RGB12B, /* 12bpp */ | ||
10 | RGB16, /* 16bpp */ | ||
11 | RGB18, /* 18bpp */ | ||
12 | RGB24, /* 24bpp */ | ||
13 | SYS8A, /* 24bpp, 8:8:8 */ | ||
14 | SYS8B, /* 18bpp, 8:8:2 */ | ||
15 | SYS8C, /* 18bpp, 2:8:8 */ | ||
16 | SYS8D, /* 16bpp, 8:8 */ | ||
17 | SYS9, /* 18bpp, 9:9 */ | ||
18 | SYS12, /* 24bpp, 12:12 */ | ||
19 | SYS16A, /* 16bpp */ | ||
20 | SYS16B, /* 18bpp, 16:2 */ | ||
21 | SYS16C, /* 18bpp, 2:16 */ | ||
22 | SYS18, /* 18bpp */ | ||
23 | SYS24 };/* 24bpp */ | ||
24 | |||
25 | enum { LCDC_CHAN_DISABLED = 0, | ||
26 | LCDC_CHAN_MAINLCD, | ||
27 | LCDC_CHAN_SUBLCD }; | ||
28 | |||
29 | enum { LCDC_CLK_BUS, LCDC_CLK_PERIPHERAL, LCDC_CLK_EXTERNAL }; | ||
30 | |||
31 | struct sh_mobile_lcdc_sys_bus_cfg { | ||
32 | unsigned long ldmt2r; | ||
33 | unsigned long ldmt3r; | ||
34 | }; | ||
35 | |||
36 | struct sh_mobile_lcdc_sys_bus_ops { | ||
37 | void (*write_index)(void *handle, unsigned long data); | ||
38 | void (*write_data)(void *handle, unsigned long data); | ||
39 | unsigned long (*read_data)(void *handle); | ||
40 | }; | ||
41 | |||
42 | struct sh_mobile_lcdc_board_cfg { | ||
43 | void *board_data; | ||
44 | int (*setup_sys)(void *board_data, void *sys_ops_handle, | ||
45 | struct sh_mobile_lcdc_sys_bus_ops *sys_ops); | ||
46 | void (*display_on)(void *board_data); | ||
47 | void (*display_off)(void *board_data); | ||
48 | }; | ||
49 | |||
50 | struct sh_mobile_lcdc_chan_cfg { | ||
51 | int chan; | ||
52 | int bpp; | ||
53 | int interface_type; /* selects RGBn or SYSn I/F, see above */ | ||
54 | int clock_divider; | ||
55 | struct fb_videomode lcd_cfg; | ||
56 | struct sh_mobile_lcdc_board_cfg board_cfg; | ||
57 | struct sh_mobile_lcdc_sys_bus_cfg sys_bus_cfg; /* only for SYSn I/F */ | ||
58 | }; | ||
59 | |||
60 | struct sh_mobile_lcdc_info { | ||
61 | unsigned long lddckr; | ||
62 | int clock_source; | ||
63 | struct sh_mobile_lcdc_chan_cfg ch[2]; | ||
64 | }; | ||
65 | |||
66 | #endif /* __ASM_SH_MOBILE_LCDC_H__ */ | ||
diff --git a/include/asm-sh/shmbuf.h b/include/asm-sh/shmbuf.h deleted file mode 100644 index b2101f490521..000000000000 --- a/include/asm-sh/shmbuf.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SHMBUF_H | ||
2 | #define __ASM_SH_SHMBUF_H | ||
3 | |||
4 | /* | ||
5 | * The shmid64_ds structure for i386 architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct shmid64_ds { | ||
15 | struct ipc64_perm shm_perm; /* operation perms */ | ||
16 | size_t shm_segsz; /* size of segment (bytes) */ | ||
17 | __kernel_time_t shm_atime; /* last attach time */ | ||
18 | unsigned long __unused1; | ||
19 | __kernel_time_t shm_dtime; /* last detach time */ | ||
20 | unsigned long __unused2; | ||
21 | __kernel_time_t shm_ctime; /* last change time */ | ||
22 | unsigned long __unused3; | ||
23 | __kernel_pid_t shm_cpid; /* pid of creator */ | ||
24 | __kernel_pid_t shm_lpid; /* pid of last operator */ | ||
25 | unsigned long shm_nattch; /* no. of current attaches */ | ||
26 | unsigned long __unused4; | ||
27 | unsigned long __unused5; | ||
28 | }; | ||
29 | |||
30 | struct shminfo64 { | ||
31 | unsigned long shmmax; | ||
32 | unsigned long shmmin; | ||
33 | unsigned long shmmni; | ||
34 | unsigned long shmseg; | ||
35 | unsigned long shmall; | ||
36 | unsigned long __unused1; | ||
37 | unsigned long __unused2; | ||
38 | unsigned long __unused3; | ||
39 | unsigned long __unused4; | ||
40 | }; | ||
41 | |||
42 | #endif /* __ASM_SH_SHMBUF_H */ | ||
diff --git a/include/asm-sh/shmin.h b/include/asm-sh/shmin.h deleted file mode 100644 index 36ba138a81fb..000000000000 --- a/include/asm-sh/shmin.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SHMIN_H | ||
2 | #define __ASM_SH_SHMIN_H | ||
3 | |||
4 | #define SHMIN_IO_BASE 0xb0000000UL | ||
5 | |||
6 | #define SHMIN_NE_IRQ IRQ2_IRQ | ||
7 | #define SHMIN_NE_BASE 0x300 | ||
8 | |||
9 | #endif | ||
diff --git a/include/asm-sh/shmparam.h b/include/asm-sh/shmparam.h deleted file mode 100644 index ba1758d90106..000000000000 --- a/include/asm-sh/shmparam.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/shmparam.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * Copyright (C) 2006 Paul Mundt | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #ifndef __ASM_SH_SHMPARAM_H | ||
12 | #define __ASM_SH_SHMPARAM_H | ||
13 | |||
14 | /* | ||
15 | * SH-4 and SH-3 7705 have an aliasing dcache. Bump this up to a sensible value | ||
16 | * for everyone, and work out the specifics from the probed cache descriptor. | ||
17 | */ | ||
18 | #define SHMLBA 0x4000 /* attach addr a multiple of this */ | ||
19 | |||
20 | #define __ARCH_FORCE_SHMLBA | ||
21 | |||
22 | #endif /* __ASM_SH_SHMPARAM_H */ | ||
diff --git a/include/asm-sh/sigcontext.h b/include/asm-sh/sigcontext.h deleted file mode 100644 index 8ce1435bc0bf..000000000000 --- a/include/asm-sh/sigcontext.h +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SIGCONTEXT_H | ||
2 | #define __ASM_SH_SIGCONTEXT_H | ||
3 | |||
4 | struct sigcontext { | ||
5 | unsigned long oldmask; | ||
6 | |||
7 | #if defined(__SH5__) || defined(CONFIG_CPU_SH5) | ||
8 | /* CPU registers */ | ||
9 | unsigned long long sc_regs[63]; | ||
10 | unsigned long long sc_tregs[8]; | ||
11 | unsigned long long sc_pc; | ||
12 | unsigned long long sc_sr; | ||
13 | |||
14 | /* FPU registers */ | ||
15 | unsigned long long sc_fpregs[32]; | ||
16 | unsigned int sc_fpscr; | ||
17 | unsigned int sc_fpvalid; | ||
18 | #else | ||
19 | /* CPU registers */ | ||
20 | unsigned long sc_regs[16]; | ||
21 | unsigned long sc_pc; | ||
22 | unsigned long sc_pr; | ||
23 | unsigned long sc_sr; | ||
24 | unsigned long sc_gbr; | ||
25 | unsigned long sc_mach; | ||
26 | unsigned long sc_macl; | ||
27 | |||
28 | #if defined(__SH4__) || defined(CONFIG_CPU_SH4) || \ | ||
29 | defined(__SH2A__) || defined(CONFIG_CPU_SH2A) | ||
30 | /* FPU registers */ | ||
31 | unsigned long sc_fpregs[16]; | ||
32 | unsigned long sc_xfpregs[16]; | ||
33 | unsigned int sc_fpscr; | ||
34 | unsigned int sc_fpul; | ||
35 | unsigned int sc_ownedfp; | ||
36 | #endif | ||
37 | #endif | ||
38 | }; | ||
39 | |||
40 | #endif /* __ASM_SH_SIGCONTEXT_H */ | ||
diff --git a/include/asm-sh/siginfo.h b/include/asm-sh/siginfo.h deleted file mode 100644 index 813040ed68a9..000000000000 --- a/include/asm-sh/siginfo.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SIGINFO_H | ||
2 | #define __ASM_SH_SIGINFO_H | ||
3 | |||
4 | #include <asm-generic/siginfo.h> | ||
5 | |||
6 | #endif /* __ASM_SH_SIGINFO_H */ | ||
diff --git a/include/asm-sh/signal.h b/include/asm-sh/signal.h deleted file mode 100644 index 5c5c1e852089..000000000000 --- a/include/asm-sh/signal.h +++ /dev/null | |||
@@ -1,160 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SIGNAL_H | ||
2 | #define __ASM_SH_SIGNAL_H | ||
3 | |||
4 | #include <linux/types.h> | ||
5 | |||
6 | /* Avoid too many header ordering problems. */ | ||
7 | struct pt_regs; | ||
8 | struct siginfo; | ||
9 | |||
10 | #ifdef __KERNEL__ | ||
11 | /* Most things should be clean enough to redefine this at will, if care | ||
12 | is taken to make libc match. */ | ||
13 | |||
14 | #define _NSIG 64 | ||
15 | #define _NSIG_BPW 32 | ||
16 | #define _NSIG_WORDS (_NSIG / _NSIG_BPW) | ||
17 | |||
18 | typedef unsigned long old_sigset_t; /* at least 32 bits */ | ||
19 | |||
20 | typedef struct { | ||
21 | unsigned long sig[_NSIG_WORDS]; | ||
22 | } sigset_t; | ||
23 | |||
24 | #else | ||
25 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
26 | |||
27 | #define NSIG 32 | ||
28 | typedef unsigned long sigset_t; | ||
29 | |||
30 | #endif /* __KERNEL__ */ | ||
31 | |||
32 | #define SIGHUP 1 | ||
33 | #define SIGINT 2 | ||
34 | #define SIGQUIT 3 | ||
35 | #define SIGILL 4 | ||
36 | #define SIGTRAP 5 | ||
37 | #define SIGABRT 6 | ||
38 | #define SIGIOT 6 | ||
39 | #define SIGBUS 7 | ||
40 | #define SIGFPE 8 | ||
41 | #define SIGKILL 9 | ||
42 | #define SIGUSR1 10 | ||
43 | #define SIGSEGV 11 | ||
44 | #define SIGUSR2 12 | ||
45 | #define SIGPIPE 13 | ||
46 | #define SIGALRM 14 | ||
47 | #define SIGTERM 15 | ||
48 | #define SIGSTKFLT 16 | ||
49 | #define SIGCHLD 17 | ||
50 | #define SIGCONT 18 | ||
51 | #define SIGSTOP 19 | ||
52 | #define SIGTSTP 20 | ||
53 | #define SIGTTIN 21 | ||
54 | #define SIGTTOU 22 | ||
55 | #define SIGURG 23 | ||
56 | #define SIGXCPU 24 | ||
57 | #define SIGXFSZ 25 | ||
58 | #define SIGVTALRM 26 | ||
59 | #define SIGPROF 27 | ||
60 | #define SIGWINCH 28 | ||
61 | #define SIGIO 29 | ||
62 | #define SIGPOLL SIGIO | ||
63 | /* | ||
64 | #define SIGLOST 29 | ||
65 | */ | ||
66 | #define SIGPWR 30 | ||
67 | #define SIGSYS 31 | ||
68 | #define SIGUNUSED 31 | ||
69 | |||
70 | /* These should not be considered constants from userland. */ | ||
71 | #define SIGRTMIN 32 | ||
72 | #define SIGRTMAX _NSIG | ||
73 | |||
74 | /* | ||
75 | * SA_FLAGS values: | ||
76 | * | ||
77 | * SA_ONSTACK indicates that a registered stack_t will be used. | ||
78 | * SA_RESTART flag to get restarting signals (which were the default long ago) | ||
79 | * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. | ||
80 | * SA_RESETHAND clears the handler when the signal is delivered. | ||
81 | * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. | ||
82 | * SA_NODEFER prevents the current signal from being masked in the handler. | ||
83 | * | ||
84 | * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single | ||
85 | * Unix names RESETHAND and NODEFER respectively. | ||
86 | */ | ||
87 | #define SA_NOCLDSTOP 0x00000001 | ||
88 | #define SA_NOCLDWAIT 0x00000002 | ||
89 | #define SA_SIGINFO 0x00000004 | ||
90 | #define SA_ONSTACK 0x08000000 | ||
91 | #define SA_RESTART 0x10000000 | ||
92 | #define SA_NODEFER 0x40000000 | ||
93 | #define SA_RESETHAND 0x80000000 | ||
94 | |||
95 | #define SA_NOMASK SA_NODEFER | ||
96 | #define SA_ONESHOT SA_RESETHAND | ||
97 | |||
98 | #define SA_RESTORER 0x04000000 | ||
99 | |||
100 | /* | ||
101 | * sigaltstack controls | ||
102 | */ | ||
103 | #define SS_ONSTACK 1 | ||
104 | #define SS_DISABLE 2 | ||
105 | |||
106 | #define MINSIGSTKSZ 2048 | ||
107 | #define SIGSTKSZ 8192 | ||
108 | |||
109 | #include <asm-generic/signal.h> | ||
110 | |||
111 | #ifdef __KERNEL__ | ||
112 | struct old_sigaction { | ||
113 | __sighandler_t sa_handler; | ||
114 | old_sigset_t sa_mask; | ||
115 | unsigned long sa_flags; | ||
116 | void (*sa_restorer)(void); | ||
117 | }; | ||
118 | |||
119 | struct sigaction { | ||
120 | __sighandler_t sa_handler; | ||
121 | unsigned long sa_flags; | ||
122 | void (*sa_restorer)(void); | ||
123 | sigset_t sa_mask; /* mask last for extensibility */ | ||
124 | }; | ||
125 | |||
126 | struct k_sigaction { | ||
127 | struct sigaction sa; | ||
128 | }; | ||
129 | #else | ||
130 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
131 | |||
132 | struct sigaction { | ||
133 | union { | ||
134 | __sighandler_t _sa_handler; | ||
135 | void (*_sa_sigaction)(int, struct siginfo *, void *); | ||
136 | } _u; | ||
137 | sigset_t sa_mask; | ||
138 | unsigned long sa_flags; | ||
139 | void (*sa_restorer)(void); | ||
140 | }; | ||
141 | |||
142 | #define sa_handler _u._sa_handler | ||
143 | #define sa_sigaction _u._sa_sigaction | ||
144 | |||
145 | #endif /* __KERNEL__ */ | ||
146 | |||
147 | typedef struct sigaltstack { | ||
148 | void *ss_sp; | ||
149 | int ss_flags; | ||
150 | size_t ss_size; | ||
151 | } stack_t; | ||
152 | |||
153 | #ifdef __KERNEL__ | ||
154 | #include <asm/sigcontext.h> | ||
155 | |||
156 | #define ptrace_signal_deliver(regs, cookie) do { } while (0) | ||
157 | |||
158 | #endif /* __KERNEL__ */ | ||
159 | |||
160 | #endif /* __ASM_SH_SIGNAL_H */ | ||
diff --git a/include/asm-sh/smc37c93x.h b/include/asm-sh/smc37c93x.h deleted file mode 100644 index 585da2a8fc45..000000000000 --- a/include/asm-sh/smc37c93x.h +++ /dev/null | |||
@@ -1,190 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SMC37C93X_H | ||
2 | #define __ASM_SH_SMC37C93X_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/smc37c93x.h | ||
6 | * | ||
7 | * Copyright (C) 2000 Kazumoto Kojima | ||
8 | * | ||
9 | * SMSC 37C93x Super IO Chip support | ||
10 | */ | ||
11 | |||
12 | /* Default base I/O address */ | ||
13 | #define FDC_PRIMARY_BASE 0x3f0 | ||
14 | #define IDE1_PRIMARY_BASE 0x1f0 | ||
15 | #define IDE1_SECONDARY_BASE 0x170 | ||
16 | #define PARPORT_PRIMARY_BASE 0x378 | ||
17 | #define COM1_PRIMARY_BASE 0x2f8 | ||
18 | #define COM2_PRIMARY_BASE 0x3f8 | ||
19 | #define RTC_PRIMARY_BASE 0x070 | ||
20 | #define KBC_PRIMARY_BASE 0x060 | ||
21 | #define AUXIO_PRIMARY_BASE 0x000 /* XXX */ | ||
22 | |||
23 | /* Logical device number */ | ||
24 | #define LDN_FDC 0 | ||
25 | #define LDN_IDE1 1 | ||
26 | #define LDN_IDE2 2 | ||
27 | #define LDN_PARPORT 3 | ||
28 | #define LDN_COM1 4 | ||
29 | #define LDN_COM2 5 | ||
30 | #define LDN_RTC 6 | ||
31 | #define LDN_KBC 7 | ||
32 | #define LDN_AUXIO 8 | ||
33 | |||
34 | /* Configuration port and key */ | ||
35 | #define CONFIG_PORT 0x3f0 | ||
36 | #define INDEX_PORT CONFIG_PORT | ||
37 | #define DATA_PORT 0x3f1 | ||
38 | #define CONFIG_ENTER 0x55 | ||
39 | #define CONFIG_EXIT 0xaa | ||
40 | |||
41 | /* Configuration index */ | ||
42 | #define CURRENT_LDN_INDEX 0x07 | ||
43 | #define POWER_CONTROL_INDEX 0x22 | ||
44 | #define ACTIVATE_INDEX 0x30 | ||
45 | #define IO_BASE_HI_INDEX 0x60 | ||
46 | #define IO_BASE_LO_INDEX 0x61 | ||
47 | #define IRQ_SELECT_INDEX 0x70 | ||
48 | #define DMA_SELECT_INDEX 0x74 | ||
49 | |||
50 | #define GPIO46_INDEX 0xc6 | ||
51 | #define GPIO47_INDEX 0xc7 | ||
52 | |||
53 | /* UART stuff. Only for debugging. */ | ||
54 | /* UART Register */ | ||
55 | |||
56 | #define UART_RBR 0x0 /* Receiver Buffer Register (Read Only) */ | ||
57 | #define UART_THR 0x0 /* Transmitter Holding Register (Write Only) */ | ||
58 | #define UART_IER 0x2 /* Interrupt Enable Register */ | ||
59 | #define UART_IIR 0x4 /* Interrupt Ident Register (Read Only) */ | ||
60 | #define UART_FCR 0x4 /* FIFO Control Register (Write Only) */ | ||
61 | #define UART_LCR 0x6 /* Line Control Register */ | ||
62 | #define UART_MCR 0x8 /* MODEM Control Register */ | ||
63 | #define UART_LSR 0xa /* Line Status Register */ | ||
64 | #define UART_MSR 0xc /* MODEM Status Register */ | ||
65 | #define UART_SCR 0xe /* Scratch Register */ | ||
66 | #define UART_DLL 0x0 /* Divisor Latch (LS) */ | ||
67 | #define UART_DLM 0x2 /* Divisor Latch (MS) */ | ||
68 | |||
69 | #ifndef __ASSEMBLY__ | ||
70 | typedef struct uart_reg { | ||
71 | volatile __u16 rbr; | ||
72 | volatile __u16 ier; | ||
73 | volatile __u16 iir; | ||
74 | volatile __u16 lcr; | ||
75 | volatile __u16 mcr; | ||
76 | volatile __u16 lsr; | ||
77 | volatile __u16 msr; | ||
78 | volatile __u16 scr; | ||
79 | } uart_reg; | ||
80 | #endif /* ! __ASSEMBLY__ */ | ||
81 | |||
82 | /* Alias for Write Only Register */ | ||
83 | |||
84 | #define thr rbr | ||
85 | #define tcr iir | ||
86 | |||
87 | /* Alias for Divisor Latch Register */ | ||
88 | |||
89 | #define dll rbr | ||
90 | #define dlm ier | ||
91 | #define fcr iir | ||
92 | |||
93 | /* Interrupt Enable Register */ | ||
94 | |||
95 | #define IER_ERDAI 0x0100 /* Enable Received Data Available Interrupt */ | ||
96 | #define IER_ETHREI 0x0200 /* Enable Transmitter Holding Register Empty Interrupt */ | ||
97 | #define IER_ELSI 0x0400 /* Enable Receiver Line Status Interrupt */ | ||
98 | #define IER_EMSI 0x0800 /* Enable MODEM Status Interrupt */ | ||
99 | |||
100 | /* Interrupt Ident Register */ | ||
101 | |||
102 | #define IIR_IP 0x0100 /* "0" if Interrupt Pending */ | ||
103 | #define IIR_IIB0 0x0200 /* Interrupt ID Bit 0 */ | ||
104 | #define IIR_IIB1 0x0400 /* Interrupt ID Bit 1 */ | ||
105 | #define IIR_IIB2 0x0800 /* Interrupt ID Bit 2 */ | ||
106 | #define IIR_FIFO 0xc000 /* FIFOs enabled */ | ||
107 | |||
108 | /* FIFO Control Register */ | ||
109 | |||
110 | #define FCR_FEN 0x0100 /* FIFO enable */ | ||
111 | #define FCR_RFRES 0x0200 /* Receiver FIFO reset */ | ||
112 | #define FCR_TFRES 0x0400 /* Transmitter FIFO reset */ | ||
113 | #define FCR_DMA 0x0800 /* DMA mode select */ | ||
114 | #define FCR_RTL 0x4000 /* Receiver triger (LSB) */ | ||
115 | #define FCR_RTM 0x8000 /* Receiver triger (MSB) */ | ||
116 | |||
117 | /* Line Control Register */ | ||
118 | |||
119 | #define LCR_WLS0 0x0100 /* Word Length Select Bit 0 */ | ||
120 | #define LCR_WLS1 0x0200 /* Word Length Select Bit 1 */ | ||
121 | #define LCR_STB 0x0400 /* Number of Stop Bits */ | ||
122 | #define LCR_PEN 0x0800 /* Parity Enable */ | ||
123 | #define LCR_EPS 0x1000 /* Even Parity Select */ | ||
124 | #define LCR_SP 0x2000 /* Stick Parity */ | ||
125 | #define LCR_SB 0x4000 /* Set Break */ | ||
126 | #define LCR_DLAB 0x8000 /* Divisor Latch Access Bit */ | ||
127 | |||
128 | /* MODEM Control Register */ | ||
129 | |||
130 | #define MCR_DTR 0x0100 /* Data Terminal Ready */ | ||
131 | #define MCR_RTS 0x0200 /* Request to Send */ | ||
132 | #define MCR_OUT1 0x0400 /* Out 1 */ | ||
133 | #define MCR_IRQEN 0x0800 /* IRQ Enable */ | ||
134 | #define MCR_LOOP 0x1000 /* Loop */ | ||
135 | |||
136 | /* Line Status Register */ | ||
137 | |||
138 | #define LSR_DR 0x0100 /* Data Ready */ | ||
139 | #define LSR_OE 0x0200 /* Overrun Error */ | ||
140 | #define LSR_PE 0x0400 /* Parity Error */ | ||
141 | #define LSR_FE 0x0800 /* Framing Error */ | ||
142 | #define LSR_BI 0x1000 /* Break Interrupt */ | ||
143 | #define LSR_THRE 0x2000 /* Transmitter Holding Register Empty */ | ||
144 | #define LSR_TEMT 0x4000 /* Transmitter Empty */ | ||
145 | #define LSR_FIFOE 0x8000 /* Receiver FIFO error */ | ||
146 | |||
147 | /* MODEM Status Register */ | ||
148 | |||
149 | #define MSR_DCTS 0x0100 /* Delta Clear to Send */ | ||
150 | #define MSR_DDSR 0x0200 /* Delta Data Set Ready */ | ||
151 | #define MSR_TERI 0x0400 /* Trailing Edge Ring Indicator */ | ||
152 | #define MSR_DDCD 0x0800 /* Delta Data Carrier Detect */ | ||
153 | #define MSR_CTS 0x1000 /* Clear to Send */ | ||
154 | #define MSR_DSR 0x2000 /* Data Set Ready */ | ||
155 | #define MSR_RI 0x4000 /* Ring Indicator */ | ||
156 | #define MSR_DCD 0x8000 /* Data Carrier Detect */ | ||
157 | |||
158 | /* Baud Rate Divisor */ | ||
159 | |||
160 | #define UART_CLK (1843200) /* 1.8432 MHz */ | ||
161 | #define UART_BAUD(x) (UART_CLK / (16 * (x))) | ||
162 | |||
163 | /* RTC register definition */ | ||
164 | #define RTC_SECONDS 0 | ||
165 | #define RTC_SECONDS_ALARM 1 | ||
166 | #define RTC_MINUTES 2 | ||
167 | #define RTC_MINUTES_ALARM 3 | ||
168 | #define RTC_HOURS 4 | ||
169 | #define RTC_HOURS_ALARM 5 | ||
170 | #define RTC_DAY_OF_WEEK 6 | ||
171 | #define RTC_DAY_OF_MONTH 7 | ||
172 | #define RTC_MONTH 8 | ||
173 | #define RTC_YEAR 9 | ||
174 | #define RTC_FREQ_SELECT 10 | ||
175 | # define RTC_UIP 0x80 | ||
176 | # define RTC_DIV_CTL 0x70 | ||
177 | /* This RTC can work under 32.768KHz clock only. */ | ||
178 | # define RTC_OSC_ENABLE 0x20 | ||
179 | # define RTC_OSC_DISABLE 0x00 | ||
180 | #define RTC_CONTROL 11 | ||
181 | # define RTC_SET 0x80 | ||
182 | # define RTC_PIE 0x40 | ||
183 | # define RTC_AIE 0x20 | ||
184 | # define RTC_UIE 0x10 | ||
185 | # define RTC_SQWE 0x08 | ||
186 | # define RTC_DM_BINARY 0x04 | ||
187 | # define RTC_24H 0x02 | ||
188 | # define RTC_DST_EN 0x01 | ||
189 | |||
190 | #endif /* __ASM_SH_SMC37C93X_H */ | ||
diff --git a/include/asm-sh/smp.h b/include/asm-sh/smp.h deleted file mode 100644 index 593343cd26ee..000000000000 --- a/include/asm-sh/smp.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SMP_H | ||
2 | #define __ASM_SH_SMP_H | ||
3 | |||
4 | #include <linux/bitops.h> | ||
5 | #include <linux/cpumask.h> | ||
6 | |||
7 | #ifdef CONFIG_SMP | ||
8 | |||
9 | #include <linux/spinlock.h> | ||
10 | #include <asm/atomic.h> | ||
11 | #include <asm/current.h> | ||
12 | |||
13 | #define raw_smp_processor_id() (current_thread_info()->cpu) | ||
14 | #define hard_smp_processor_id() plat_smp_processor_id() | ||
15 | |||
16 | /* Map from cpu id to sequential logical cpu number. */ | ||
17 | extern int __cpu_number_map[NR_CPUS]; | ||
18 | #define cpu_number_map(cpu) __cpu_number_map[cpu] | ||
19 | |||
20 | /* The reverse map from sequential logical cpu number to cpu id. */ | ||
21 | extern int __cpu_logical_map[NR_CPUS]; | ||
22 | #define cpu_logical_map(cpu) __cpu_logical_map[cpu] | ||
23 | |||
24 | /* I've no idea what the real meaning of this is */ | ||
25 | #define PROC_CHANGE_PENALTY 20 | ||
26 | |||
27 | #define NO_PROC_ID (-1) | ||
28 | |||
29 | #define SMP_MSG_FUNCTION 0 | ||
30 | #define SMP_MSG_RESCHEDULE 1 | ||
31 | #define SMP_MSG_FUNCTION_SINGLE 2 | ||
32 | #define SMP_MSG_NR 3 | ||
33 | |||
34 | void plat_smp_setup(void); | ||
35 | void plat_prepare_cpus(unsigned int max_cpus); | ||
36 | int plat_smp_processor_id(void); | ||
37 | void plat_start_cpu(unsigned int cpu, unsigned long entry_point); | ||
38 | void plat_send_ipi(unsigned int cpu, unsigned int message); | ||
39 | int plat_register_ipi_handler(unsigned int message, | ||
40 | void (*handler)(void *), void *arg); | ||
41 | extern void arch_send_call_function_single_ipi(int cpu); | ||
42 | extern void arch_send_call_function_ipi(cpumask_t mask); | ||
43 | |||
44 | #else | ||
45 | |||
46 | #define hard_smp_processor_id() (0) | ||
47 | |||
48 | #endif /* CONFIG_SMP */ | ||
49 | |||
50 | #endif /* __ASM_SH_SMP_H */ | ||
diff --git a/include/asm-sh/snapgear.h b/include/asm-sh/snapgear.h deleted file mode 100644 index 042d95f51c4d..000000000000 --- a/include/asm-sh/snapgear.h +++ /dev/null | |||
@@ -1,71 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/snapgear.h | ||
3 | * | ||
4 | * Modified version of io_se.h for the snapgear-specific functions. | ||
5 | * | ||
6 | * May be copied or modified under the terms of the GNU General Public | ||
7 | * License. See linux/COPYING for more information. | ||
8 | * | ||
9 | * IO functions for a SnapGear | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_SH_IO_SNAPGEAR_H | ||
13 | #define _ASM_SH_IO_SNAPGEAR_H | ||
14 | |||
15 | #if defined(CONFIG_CPU_SH4) | ||
16 | /* | ||
17 | * The external interrupt lines, these take up ints 0 - 15 inclusive | ||
18 | * depending on the priority for the interrupt. In fact the priority | ||
19 | * is the interrupt :-) | ||
20 | */ | ||
21 | |||
22 | #define IRL0_IRQ 2 | ||
23 | #define IRL0_PRIORITY 13 | ||
24 | |||
25 | #define IRL1_IRQ 5 | ||
26 | #define IRL1_PRIORITY 10 | ||
27 | |||
28 | #define IRL2_IRQ 8 | ||
29 | #define IRL2_PRIORITY 7 | ||
30 | |||
31 | #define IRL3_IRQ 11 | ||
32 | #define IRL3_PRIORITY 4 | ||
33 | #endif | ||
34 | |||
35 | #define __IO_PREFIX snapgear | ||
36 | #include <asm/io_generic.h> | ||
37 | |||
38 | #ifdef CONFIG_SH_SECUREEDGE5410 | ||
39 | /* | ||
40 | * We need to remember what was written to the ioport as some bits | ||
41 | * are shared with other functions and you cannot read back what was | ||
42 | * written :-| | ||
43 | * | ||
44 | * Bit Read Write | ||
45 | * ----------------------------------------------- | ||
46 | * D0 DCD on ttySC1 power | ||
47 | * D1 Reset Switch heatbeat | ||
48 | * D2 ttySC0 CTS (7100) LAN | ||
49 | * D3 - WAN | ||
50 | * D4 ttySC0 DCD (7100) CONSOLE | ||
51 | * D5 - ONLINE | ||
52 | * D6 - VPN | ||
53 | * D7 - DTR on ttySC1 | ||
54 | * D8 - ttySC0 RTS (7100) | ||
55 | * D9 - ttySC0 DTR (7100) | ||
56 | * D10 - RTC SCLK | ||
57 | * D11 RTC DATA RTC DATA | ||
58 | * D12 - RTS RESET | ||
59 | */ | ||
60 | |||
61 | #define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000) | ||
62 | extern unsigned short secureedge5410_ioport; | ||
63 | |||
64 | #define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \ | ||
65 | (secureedge5410_ioport = \ | ||
66 | ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) | ||
67 | #define SECUREEDGE_READ_IOPORT() \ | ||
68 | ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) | ||
69 | #endif | ||
70 | |||
71 | #endif /* _ASM_SH_IO_SNAPGEAR_H */ | ||
diff --git a/include/asm-sh/socket.h b/include/asm-sh/socket.h deleted file mode 100644 index 6d4bf6512959..000000000000 --- a/include/asm-sh/socket.h +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SOCKET_H | ||
2 | #define __ASM_SH_SOCKET_H | ||
3 | |||
4 | #include <asm/sockios.h> | ||
5 | |||
6 | /* For setsockopt(2) */ | ||
7 | #define SOL_SOCKET 1 | ||
8 | |||
9 | #define SO_DEBUG 1 | ||
10 | #define SO_REUSEADDR 2 | ||
11 | #define SO_TYPE 3 | ||
12 | #define SO_ERROR 4 | ||
13 | #define SO_DONTROUTE 5 | ||
14 | #define SO_BROADCAST 6 | ||
15 | #define SO_SNDBUF 7 | ||
16 | #define SO_RCVBUF 8 | ||
17 | #define SO_RCVBUFFORCE 32 | ||
18 | #define SO_SNDBUFFORCE 33 | ||
19 | #define SO_KEEPALIVE 9 | ||
20 | #define SO_OOBINLINE 10 | ||
21 | #define SO_NO_CHECK 11 | ||
22 | #define SO_PRIORITY 12 | ||
23 | #define SO_LINGER 13 | ||
24 | #define SO_BSDCOMPAT 14 | ||
25 | /* To add :#define SO_REUSEPORT 15 */ | ||
26 | #define SO_PASSCRED 16 | ||
27 | #define SO_PEERCRED 17 | ||
28 | #define SO_RCVLOWAT 18 | ||
29 | #define SO_SNDLOWAT 19 | ||
30 | #define SO_RCVTIMEO 20 | ||
31 | #define SO_SNDTIMEO 21 | ||
32 | |||
33 | /* Security levels - as per NRL IPv6 - don't actually do anything */ | ||
34 | #define SO_SECURITY_AUTHENTICATION 22 | ||
35 | #define SO_SECURITY_ENCRYPTION_TRANSPORT 23 | ||
36 | #define SO_SECURITY_ENCRYPTION_NETWORK 24 | ||
37 | |||
38 | #define SO_BINDTODEVICE 25 | ||
39 | |||
40 | /* Socket filtering */ | ||
41 | #define SO_ATTACH_FILTER 26 | ||
42 | #define SO_DETACH_FILTER 27 | ||
43 | |||
44 | #define SO_PEERNAME 28 | ||
45 | #define SO_TIMESTAMP 29 | ||
46 | #define SCM_TIMESTAMP SO_TIMESTAMP | ||
47 | |||
48 | #define SO_ACCEPTCONN 30 | ||
49 | |||
50 | #define SO_PEERSEC 31 | ||
51 | #define SO_PASSSEC 34 | ||
52 | #define SO_TIMESTAMPNS 35 | ||
53 | #define SCM_TIMESTAMPNS SO_TIMESTAMPNS | ||
54 | |||
55 | #define SO_MARK 36 | ||
56 | |||
57 | #endif /* __ASM_SH_SOCKET_H */ | ||
diff --git a/include/asm-sh/sockios.h b/include/asm-sh/sockios.h deleted file mode 100644 index cf8b96b1f9ab..000000000000 --- a/include/asm-sh/sockios.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SOCKIOS_H | ||
2 | #define __ASM_SH_SOCKIOS_H | ||
3 | |||
4 | /* Socket-level I/O control calls. */ | ||
5 | #define FIOGETOWN _IOR('f', 123, int) | ||
6 | #define FIOSETOWN _IOW('f', 124, int) | ||
7 | |||
8 | #define SIOCATMARK _IOR('s', 7, int) | ||
9 | #define SIOCSPGRP _IOW('s', 8, pid_t) | ||
10 | #define SIOCGPGRP _IOR('s', 9, pid_t) | ||
11 | |||
12 | #define SIOCGSTAMP _IOR('s', 100, struct timeval) /* Get stamp (timeval) */ | ||
13 | #define SIOCGSTAMPNS _IOR('s', 101, struct timespec) /* Get stamp (timespec) */ | ||
14 | #endif /* __ASM_SH_SOCKIOS_H */ | ||
diff --git a/include/asm-sh/sparsemem.h b/include/asm-sh/sparsemem.h deleted file mode 100644 index 547a540b6667..000000000000 --- a/include/asm-sh/sparsemem.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SPARSEMEM_H | ||
2 | #define __ASM_SH_SPARSEMEM_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | /* | ||
6 | * SECTION_SIZE_BITS 2^N: how big each section will be | ||
7 | * MAX_PHYSADDR_BITS 2^N: how much physical address space we have | ||
8 | * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space | ||
9 | */ | ||
10 | #define SECTION_SIZE_BITS 26 | ||
11 | #define MAX_PHYSADDR_BITS 32 | ||
12 | #define MAX_PHYSMEM_BITS 32 | ||
13 | |||
14 | #endif | ||
15 | |||
16 | #endif /* __ASM_SH_SPARSEMEM_H */ | ||
diff --git a/include/asm-sh/spi.h b/include/asm-sh/spi.h deleted file mode 100644 index e96f5b0953c8..000000000000 --- a/include/asm-sh/spi.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef __ASM_SPI_H__ | ||
2 | #define __ASM_SPI_H__ | ||
3 | |||
4 | struct sh_spi_info; | ||
5 | |||
6 | struct sh_spi_info { | ||
7 | int bus_num; | ||
8 | int num_chipselect; | ||
9 | |||
10 | void (*chip_select)(struct sh_spi_info *spi, int cs, int state); | ||
11 | }; | ||
12 | |||
13 | #endif /* __ASM_SPI_H__ */ | ||
diff --git a/include/asm-sh/spinlock.h b/include/asm-sh/spinlock.h deleted file mode 100644 index e793181d64da..000000000000 --- a/include/asm-sh/spinlock.h +++ /dev/null | |||
@@ -1,223 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/spinlock.h | ||
3 | * | ||
4 | * Copyright (C) 2002, 2003 Paul Mundt | ||
5 | * Copyright (C) 2006, 2007 Akio Idehara | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #ifndef __ASM_SH_SPINLOCK_H | ||
12 | #define __ASM_SH_SPINLOCK_H | ||
13 | |||
14 | /* | ||
15 | * The only locking implemented here uses SH-4A opcodes. For others, | ||
16 | * split this out as per atomic-*.h. | ||
17 | */ | ||
18 | #ifndef CONFIG_CPU_SH4A | ||
19 | #error "Need movli.l/movco.l for spinlocks" | ||
20 | #endif | ||
21 | |||
22 | /* | ||
23 | * Your basic SMP spinlocks, allowing only a single CPU anywhere | ||
24 | */ | ||
25 | |||
26 | #define __raw_spin_is_locked(x) ((x)->lock <= 0) | ||
27 | #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) | ||
28 | #define __raw_spin_unlock_wait(x) \ | ||
29 | do { cpu_relax(); } while ((x)->lock) | ||
30 | |||
31 | /* | ||
32 | * Simple spin lock operations. There are two variants, one clears IRQ's | ||
33 | * on the local processor, one does not. | ||
34 | * | ||
35 | * We make no fairness assumptions. They have a cost. | ||
36 | */ | ||
37 | static inline void __raw_spin_lock(raw_spinlock_t *lock) | ||
38 | { | ||
39 | unsigned long tmp; | ||
40 | unsigned long oldval; | ||
41 | |||
42 | __asm__ __volatile__ ( | ||
43 | "1: \n\t" | ||
44 | "movli.l @%2, %0 ! __raw_spin_lock \n\t" | ||
45 | "mov %0, %1 \n\t" | ||
46 | "mov #0, %0 \n\t" | ||
47 | "movco.l %0, @%2 \n\t" | ||
48 | "bf 1b \n\t" | ||
49 | "cmp/pl %1 \n\t" | ||
50 | "bf 1b \n\t" | ||
51 | : "=&z" (tmp), "=&r" (oldval) | ||
52 | : "r" (&lock->lock) | ||
53 | : "t", "memory" | ||
54 | ); | ||
55 | } | ||
56 | |||
57 | static inline void __raw_spin_unlock(raw_spinlock_t *lock) | ||
58 | { | ||
59 | unsigned long tmp; | ||
60 | |||
61 | __asm__ __volatile__ ( | ||
62 | "mov #1, %0 ! __raw_spin_unlock \n\t" | ||
63 | "mov.l %0, @%1 \n\t" | ||
64 | : "=&z" (tmp) | ||
65 | : "r" (&lock->lock) | ||
66 | : "t", "memory" | ||
67 | ); | ||
68 | } | ||
69 | |||
70 | static inline int __raw_spin_trylock(raw_spinlock_t *lock) | ||
71 | { | ||
72 | unsigned long tmp, oldval; | ||
73 | |||
74 | __asm__ __volatile__ ( | ||
75 | "1: \n\t" | ||
76 | "movli.l @%2, %0 ! __raw_spin_trylock \n\t" | ||
77 | "mov %0, %1 \n\t" | ||
78 | "mov #0, %0 \n\t" | ||
79 | "movco.l %0, @%2 \n\t" | ||
80 | "bf 1b \n\t" | ||
81 | "synco \n\t" | ||
82 | : "=&z" (tmp), "=&r" (oldval) | ||
83 | : "r" (&lock->lock) | ||
84 | : "t", "memory" | ||
85 | ); | ||
86 | |||
87 | return oldval; | ||
88 | } | ||
89 | |||
90 | /* | ||
91 | * Read-write spinlocks, allowing multiple readers but only one writer. | ||
92 | * | ||
93 | * NOTE! it is quite common to have readers in interrupts but no interrupt | ||
94 | * writers. For those circumstances we can "mix" irq-safe locks - any writer | ||
95 | * needs to get a irq-safe write-lock, but readers can get non-irqsafe | ||
96 | * read-locks. | ||
97 | */ | ||
98 | |||
99 | /** | ||
100 | * read_can_lock - would read_trylock() succeed? | ||
101 | * @lock: the rwlock in question. | ||
102 | */ | ||
103 | #define __raw_read_can_lock(x) ((x)->lock > 0) | ||
104 | |||
105 | /** | ||
106 | * write_can_lock - would write_trylock() succeed? | ||
107 | * @lock: the rwlock in question. | ||
108 | */ | ||
109 | #define __raw_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS) | ||
110 | |||
111 | static inline void __raw_read_lock(raw_rwlock_t *rw) | ||
112 | { | ||
113 | unsigned long tmp; | ||
114 | |||
115 | __asm__ __volatile__ ( | ||
116 | "1: \n\t" | ||
117 | "movli.l @%1, %0 ! __raw_read_lock \n\t" | ||
118 | "cmp/pl %0 \n\t" | ||
119 | "bf 1b \n\t" | ||
120 | "add #-1, %0 \n\t" | ||
121 | "movco.l %0, @%1 \n\t" | ||
122 | "bf 1b \n\t" | ||
123 | : "=&z" (tmp) | ||
124 | : "r" (&rw->lock) | ||
125 | : "t", "memory" | ||
126 | ); | ||
127 | } | ||
128 | |||
129 | static inline void __raw_read_unlock(raw_rwlock_t *rw) | ||
130 | { | ||
131 | unsigned long tmp; | ||
132 | |||
133 | __asm__ __volatile__ ( | ||
134 | "1: \n\t" | ||
135 | "movli.l @%1, %0 ! __raw_read_unlock \n\t" | ||
136 | "add #1, %0 \n\t" | ||
137 | "movco.l %0, @%1 \n\t" | ||
138 | "bf 1b \n\t" | ||
139 | : "=&z" (tmp) | ||
140 | : "r" (&rw->lock) | ||
141 | : "t", "memory" | ||
142 | ); | ||
143 | } | ||
144 | |||
145 | static inline void __raw_write_lock(raw_rwlock_t *rw) | ||
146 | { | ||
147 | unsigned long tmp; | ||
148 | |||
149 | __asm__ __volatile__ ( | ||
150 | "1: \n\t" | ||
151 | "movli.l @%1, %0 ! __raw_write_lock \n\t" | ||
152 | "cmp/hs %2, %0 \n\t" | ||
153 | "bf 1b \n\t" | ||
154 | "sub %2, %0 \n\t" | ||
155 | "movco.l %0, @%1 \n\t" | ||
156 | "bf 1b \n\t" | ||
157 | : "=&z" (tmp) | ||
158 | : "r" (&rw->lock), "r" (RW_LOCK_BIAS) | ||
159 | : "t", "memory" | ||
160 | ); | ||
161 | } | ||
162 | |||
163 | static inline void __raw_write_unlock(raw_rwlock_t *rw) | ||
164 | { | ||
165 | __asm__ __volatile__ ( | ||
166 | "mov.l %1, @%0 ! __raw_write_unlock \n\t" | ||
167 | : | ||
168 | : "r" (&rw->lock), "r" (RW_LOCK_BIAS) | ||
169 | : "t", "memory" | ||
170 | ); | ||
171 | } | ||
172 | |||
173 | static inline int __raw_read_trylock(raw_rwlock_t *rw) | ||
174 | { | ||
175 | unsigned long tmp, oldval; | ||
176 | |||
177 | __asm__ __volatile__ ( | ||
178 | "1: \n\t" | ||
179 | "movli.l @%2, %0 ! __raw_read_trylock \n\t" | ||
180 | "mov %0, %1 \n\t" | ||
181 | "cmp/pl %0 \n\t" | ||
182 | "bf 2f \n\t" | ||
183 | "add #-1, %0 \n\t" | ||
184 | "movco.l %0, @%2 \n\t" | ||
185 | "bf 1b \n\t" | ||
186 | "2: \n\t" | ||
187 | "synco \n\t" | ||
188 | : "=&z" (tmp), "=&r" (oldval) | ||
189 | : "r" (&rw->lock) | ||
190 | : "t", "memory" | ||
191 | ); | ||
192 | |||
193 | return (oldval > 0); | ||
194 | } | ||
195 | |||
196 | static inline int __raw_write_trylock(raw_rwlock_t *rw) | ||
197 | { | ||
198 | unsigned long tmp, oldval; | ||
199 | |||
200 | __asm__ __volatile__ ( | ||
201 | "1: \n\t" | ||
202 | "movli.l @%2, %0 ! __raw_write_trylock \n\t" | ||
203 | "mov %0, %1 \n\t" | ||
204 | "cmp/hs %3, %0 \n\t" | ||
205 | "bf 2f \n\t" | ||
206 | "sub %3, %0 \n\t" | ||
207 | "2: \n\t" | ||
208 | "movco.l %0, @%2 \n\t" | ||
209 | "bf 1b \n\t" | ||
210 | "synco \n\t" | ||
211 | : "=&z" (tmp), "=&r" (oldval) | ||
212 | : "r" (&rw->lock), "r" (RW_LOCK_BIAS) | ||
213 | : "t", "memory" | ||
214 | ); | ||
215 | |||
216 | return (oldval > (RW_LOCK_BIAS - 1)); | ||
217 | } | ||
218 | |||
219 | #define _raw_spin_relax(lock) cpu_relax() | ||
220 | #define _raw_read_relax(lock) cpu_relax() | ||
221 | #define _raw_write_relax(lock) cpu_relax() | ||
222 | |||
223 | #endif /* __ASM_SH_SPINLOCK_H */ | ||
diff --git a/include/asm-sh/spinlock_types.h b/include/asm-sh/spinlock_types.h deleted file mode 100644 index b4d244e7b60c..000000000000 --- a/include/asm-sh/spinlock_types.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SPINLOCK_TYPES_H | ||
2 | #define __ASM_SH_SPINLOCK_TYPES_H | ||
3 | |||
4 | #ifndef __LINUX_SPINLOCK_TYPES_H | ||
5 | # error "please don't include this file directly" | ||
6 | #endif | ||
7 | |||
8 | typedef struct { | ||
9 | volatile unsigned int lock; | ||
10 | } raw_spinlock_t; | ||
11 | |||
12 | #define __RAW_SPIN_LOCK_UNLOCKED { 1 } | ||
13 | |||
14 | typedef struct { | ||
15 | volatile unsigned int lock; | ||
16 | } raw_rwlock_t; | ||
17 | |||
18 | #define RW_LOCK_BIAS 0x01000000 | ||
19 | #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS } | ||
20 | |||
21 | #endif | ||
diff --git a/include/asm-sh/stat.h b/include/asm-sh/stat.h deleted file mode 100644 index e1810cc6e3da..000000000000 --- a/include/asm-sh/stat.h +++ /dev/null | |||
@@ -1,138 +0,0 @@ | |||
1 | #ifndef __ASM_SH_STAT_H | ||
2 | #define __ASM_SH_STAT_H | ||
3 | |||
4 | struct __old_kernel_stat { | ||
5 | unsigned short st_dev; | ||
6 | unsigned short st_ino; | ||
7 | unsigned short st_mode; | ||
8 | unsigned short st_nlink; | ||
9 | unsigned short st_uid; | ||
10 | unsigned short st_gid; | ||
11 | unsigned short st_rdev; | ||
12 | unsigned long st_size; | ||
13 | unsigned long st_atime; | ||
14 | unsigned long st_mtime; | ||
15 | unsigned long st_ctime; | ||
16 | }; | ||
17 | |||
18 | #if defined(__SH5__) || defined(CONFIG_CPU_SH5) | ||
19 | struct stat { | ||
20 | unsigned short st_dev; | ||
21 | unsigned short __pad1; | ||
22 | unsigned long st_ino; | ||
23 | unsigned short st_mode; | ||
24 | unsigned short st_nlink; | ||
25 | unsigned short st_uid; | ||
26 | unsigned short st_gid; | ||
27 | unsigned short st_rdev; | ||
28 | unsigned short __pad2; | ||
29 | unsigned long st_size; | ||
30 | unsigned long st_blksize; | ||
31 | unsigned long st_blocks; | ||
32 | unsigned long st_atime; | ||
33 | unsigned long st_atime_nsec; | ||
34 | unsigned long st_mtime; | ||
35 | unsigned long st_mtime_nsec; | ||
36 | unsigned long st_ctime; | ||
37 | unsigned long st_ctime_nsec; | ||
38 | unsigned long __unused4; | ||
39 | unsigned long __unused5; | ||
40 | }; | ||
41 | |||
42 | /* This matches struct stat64 in glibc2.1, hence the absolutely | ||
43 | * insane amounts of padding around dev_t's. | ||
44 | */ | ||
45 | struct stat64 { | ||
46 | unsigned short st_dev; | ||
47 | unsigned char __pad0[10]; | ||
48 | |||
49 | unsigned long st_ino; | ||
50 | unsigned int st_mode; | ||
51 | unsigned int st_nlink; | ||
52 | |||
53 | unsigned long st_uid; | ||
54 | unsigned long st_gid; | ||
55 | |||
56 | unsigned short st_rdev; | ||
57 | unsigned char __pad3[10]; | ||
58 | |||
59 | long long st_size; | ||
60 | unsigned long st_blksize; | ||
61 | |||
62 | unsigned long st_blocks; /* Number 512-byte blocks allocated. */ | ||
63 | unsigned long __pad4; /* future possible st_blocks high bits */ | ||
64 | |||
65 | unsigned long st_atime; | ||
66 | unsigned long st_atime_nsec; | ||
67 | |||
68 | unsigned long st_mtime; | ||
69 | unsigned long st_mtime_nsec; | ||
70 | |||
71 | unsigned long st_ctime; | ||
72 | unsigned long st_ctime_nsec; /* will be high 32 bits of ctime someday */ | ||
73 | |||
74 | unsigned long __unused1; | ||
75 | unsigned long __unused2; | ||
76 | }; | ||
77 | #else | ||
78 | struct stat { | ||
79 | unsigned long st_dev; | ||
80 | unsigned long st_ino; | ||
81 | unsigned short st_mode; | ||
82 | unsigned short st_nlink; | ||
83 | unsigned short st_uid; | ||
84 | unsigned short st_gid; | ||
85 | unsigned long st_rdev; | ||
86 | unsigned long st_size; | ||
87 | unsigned long st_blksize; | ||
88 | unsigned long st_blocks; | ||
89 | unsigned long st_atime; | ||
90 | unsigned long st_atime_nsec; | ||
91 | unsigned long st_mtime; | ||
92 | unsigned long st_mtime_nsec; | ||
93 | unsigned long st_ctime; | ||
94 | unsigned long st_ctime_nsec; | ||
95 | unsigned long __unused4; | ||
96 | unsigned long __unused5; | ||
97 | }; | ||
98 | |||
99 | /* This matches struct stat64 in glibc2.1, hence the absolutely | ||
100 | * insane amounts of padding around dev_t's. | ||
101 | */ | ||
102 | struct stat64 { | ||
103 | unsigned long long st_dev; | ||
104 | unsigned char __pad0[4]; | ||
105 | |||
106 | #define STAT64_HAS_BROKEN_ST_INO 1 | ||
107 | unsigned long __st_ino; | ||
108 | |||
109 | unsigned int st_mode; | ||
110 | unsigned int st_nlink; | ||
111 | |||
112 | unsigned long st_uid; | ||
113 | unsigned long st_gid; | ||
114 | |||
115 | unsigned long long st_rdev; | ||
116 | unsigned char __pad3[4]; | ||
117 | |||
118 | long long st_size; | ||
119 | unsigned long st_blksize; | ||
120 | |||
121 | unsigned long long st_blocks; /* Number 512-byte blocks allocated. */ | ||
122 | |||
123 | unsigned long st_atime; | ||
124 | unsigned long st_atime_nsec; | ||
125 | |||
126 | unsigned long st_mtime; | ||
127 | unsigned long st_mtime_nsec; | ||
128 | |||
129 | unsigned long st_ctime; | ||
130 | unsigned long st_ctime_nsec; | ||
131 | |||
132 | unsigned long long st_ino; | ||
133 | }; | ||
134 | |||
135 | #define STAT_HAVE_NSEC 1 | ||
136 | #endif | ||
137 | |||
138 | #endif /* __ASM_SH_STAT_H */ | ||
diff --git a/include/asm-sh/statfs.h b/include/asm-sh/statfs.h deleted file mode 100644 index 9202a023328f..000000000000 --- a/include/asm-sh/statfs.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_SH_STATFS_H | ||
2 | #define __ASM_SH_STATFS_H | ||
3 | |||
4 | #include <asm-generic/statfs.h> | ||
5 | |||
6 | #endif /* __ASM_SH_STATFS_H */ | ||
diff --git a/include/asm-sh/string.h b/include/asm-sh/string.h deleted file mode 100644 index 8c1ea21dc0ae..000000000000 --- a/include/asm-sh/string.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | #ifdef CONFIG_SUPERH32 | ||
2 | # include "string_32.h" | ||
3 | #else | ||
4 | # include "string_64.h" | ||
5 | #endif | ||
diff --git a/include/asm-sh/string_32.h b/include/asm-sh/string_32.h deleted file mode 100644 index 55f8db6bc1d7..000000000000 --- a/include/asm-sh/string_32.h +++ /dev/null | |||
@@ -1,131 +0,0 @@ | |||
1 | #ifndef __ASM_SH_STRING_H | ||
2 | #define __ASM_SH_STRING_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | /* | ||
7 | * Copyright (C) 1999 Niibe Yutaka | ||
8 | * But consider these trivial functions to be public domain. | ||
9 | */ | ||
10 | |||
11 | #define __HAVE_ARCH_STRCPY | ||
12 | static inline char *strcpy(char *__dest, const char *__src) | ||
13 | { | ||
14 | register char *__xdest = __dest; | ||
15 | unsigned long __dummy; | ||
16 | |||
17 | __asm__ __volatile__("1:\n\t" | ||
18 | "mov.b @%1+, %2\n\t" | ||
19 | "mov.b %2, @%0\n\t" | ||
20 | "cmp/eq #0, %2\n\t" | ||
21 | "bf/s 1b\n\t" | ||
22 | " add #1, %0\n\t" | ||
23 | : "=r" (__dest), "=r" (__src), "=&z" (__dummy) | ||
24 | : "0" (__dest), "1" (__src) | ||
25 | : "memory", "t"); | ||
26 | |||
27 | return __xdest; | ||
28 | } | ||
29 | |||
30 | #define __HAVE_ARCH_STRNCPY | ||
31 | static inline char *strncpy(char *__dest, const char *__src, size_t __n) | ||
32 | { | ||
33 | register char *__xdest = __dest; | ||
34 | unsigned long __dummy; | ||
35 | |||
36 | if (__n == 0) | ||
37 | return __xdest; | ||
38 | |||
39 | __asm__ __volatile__( | ||
40 | "1:\n" | ||
41 | "mov.b @%1+, %2\n\t" | ||
42 | "mov.b %2, @%0\n\t" | ||
43 | "cmp/eq #0, %2\n\t" | ||
44 | "bt/s 2f\n\t" | ||
45 | " cmp/eq %5,%1\n\t" | ||
46 | "bf/s 1b\n\t" | ||
47 | " add #1, %0\n" | ||
48 | "2:" | ||
49 | : "=r" (__dest), "=r" (__src), "=&z" (__dummy) | ||
50 | : "0" (__dest), "1" (__src), "r" (__src+__n) | ||
51 | : "memory", "t"); | ||
52 | |||
53 | return __xdest; | ||
54 | } | ||
55 | |||
56 | #define __HAVE_ARCH_STRCMP | ||
57 | static inline int strcmp(const char *__cs, const char *__ct) | ||
58 | { | ||
59 | register int __res; | ||
60 | unsigned long __dummy; | ||
61 | |||
62 | __asm__ __volatile__( | ||
63 | "mov.b @%1+, %3\n" | ||
64 | "1:\n\t" | ||
65 | "mov.b @%0+, %2\n\t" | ||
66 | "cmp/eq #0, %3\n\t" | ||
67 | "bt 2f\n\t" | ||
68 | "cmp/eq %2, %3\n\t" | ||
69 | "bt/s 1b\n\t" | ||
70 | " mov.b @%1+, %3\n\t" | ||
71 | "add #-2, %1\n\t" | ||
72 | "mov.b @%1, %3\n\t" | ||
73 | "sub %3, %2\n" | ||
74 | "2:" | ||
75 | : "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy) | ||
76 | : "0" (__cs), "1" (__ct) | ||
77 | : "t"); | ||
78 | |||
79 | return __res; | ||
80 | } | ||
81 | |||
82 | #define __HAVE_ARCH_STRNCMP | ||
83 | static inline int strncmp(const char *__cs, const char *__ct, size_t __n) | ||
84 | { | ||
85 | register int __res; | ||
86 | unsigned long __dummy; | ||
87 | |||
88 | if (__n == 0) | ||
89 | return 0; | ||
90 | |||
91 | __asm__ __volatile__( | ||
92 | "mov.b @%1+, %3\n" | ||
93 | "1:\n\t" | ||
94 | "mov.b @%0+, %2\n\t" | ||
95 | "cmp/eq %6, %0\n\t" | ||
96 | "bt/s 2f\n\t" | ||
97 | " cmp/eq #0, %3\n\t" | ||
98 | "bt/s 3f\n\t" | ||
99 | " cmp/eq %3, %2\n\t" | ||
100 | "bt/s 1b\n\t" | ||
101 | " mov.b @%1+, %3\n\t" | ||
102 | "add #-2, %1\n\t" | ||
103 | "mov.b @%1, %3\n" | ||
104 | "2:\n\t" | ||
105 | "sub %3, %2\n" | ||
106 | "3:" | ||
107 | :"=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy) | ||
108 | : "0" (__cs), "1" (__ct), "r" (__cs+__n) | ||
109 | : "t"); | ||
110 | |||
111 | return __res; | ||
112 | } | ||
113 | |||
114 | #define __HAVE_ARCH_MEMSET | ||
115 | extern void *memset(void *__s, int __c, size_t __count); | ||
116 | |||
117 | #define __HAVE_ARCH_MEMCPY | ||
118 | extern void *memcpy(void *__to, __const__ void *__from, size_t __n); | ||
119 | |||
120 | #define __HAVE_ARCH_MEMMOVE | ||
121 | extern void *memmove(void *__dest, __const__ void *__src, size_t __n); | ||
122 | |||
123 | #define __HAVE_ARCH_MEMCHR | ||
124 | extern void *memchr(const void *__s, int __c, size_t __n); | ||
125 | |||
126 | #define __HAVE_ARCH_STRLEN | ||
127 | extern size_t strlen(const char *); | ||
128 | |||
129 | #endif /* __KERNEL__ */ | ||
130 | |||
131 | #endif /* __ASM_SH_STRING_H */ | ||
diff --git a/include/asm-sh/string_64.h b/include/asm-sh/string_64.h deleted file mode 100644 index aa1fef229c78..000000000000 --- a/include/asm-sh/string_64.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | #ifndef __ASM_SH_STRING_64_H | ||
2 | #define __ASM_SH_STRING_64_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-sh/string_64.h | ||
6 | * | ||
7 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General Public | ||
10 | * License. See the file "COPYING" in the main directory of this archive | ||
11 | * for more details. | ||
12 | */ | ||
13 | |||
14 | #define __HAVE_ARCH_MEMCPY | ||
15 | extern void *memcpy(void *dest, const void *src, size_t count); | ||
16 | |||
17 | #endif /* __ASM_SH_STRING_64_H */ | ||
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h deleted file mode 100644 index 056d68cd2108..000000000000 --- a/include/asm-sh/system.h +++ /dev/null | |||
@@ -1,190 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SYSTEM_H | ||
2 | #define __ASM_SH_SYSTEM_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima | ||
6 | * Copyright (C) 2002 Paul Mundt | ||
7 | */ | ||
8 | |||
9 | #include <linux/irqflags.h> | ||
10 | #include <linux/compiler.h> | ||
11 | #include <linux/linkage.h> | ||
12 | #include <asm/types.h> | ||
13 | #include <asm/ptrace.h> | ||
14 | |||
15 | #define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ | ||
16 | |||
17 | #if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) | ||
18 | #define __icbi() \ | ||
19 | { \ | ||
20 | unsigned long __addr; \ | ||
21 | __addr = 0xa8000000; \ | ||
22 | __asm__ __volatile__( \ | ||
23 | "icbi %0\n\t" \ | ||
24 | : /* no output */ \ | ||
25 | : "m" (__m(__addr))); \ | ||
26 | } | ||
27 | #endif | ||
28 | |||
29 | /* | ||
30 | * A brief note on ctrl_barrier(), the control register write barrier. | ||
31 | * | ||
32 | * Legacy SH cores typically require a sequence of 8 nops after | ||
33 | * modification of a control register in order for the changes to take | ||
34 | * effect. On newer cores (like the sh4a and sh5) this is accomplished | ||
35 | * with icbi. | ||
36 | * | ||
37 | * Also note that on sh4a in the icbi case we can forego a synco for the | ||
38 | * write barrier, as it's not necessary for control registers. | ||
39 | * | ||
40 | * Historically we have only done this type of barrier for the MMUCR, but | ||
41 | * it's also necessary for the CCR, so we make it generic here instead. | ||
42 | */ | ||
43 | #if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) | ||
44 | #define mb() __asm__ __volatile__ ("synco": : :"memory") | ||
45 | #define rmb() mb() | ||
46 | #define wmb() __asm__ __volatile__ ("synco": : :"memory") | ||
47 | #define ctrl_barrier() __icbi() | ||
48 | #define read_barrier_depends() do { } while(0) | ||
49 | #else | ||
50 | #define mb() __asm__ __volatile__ ("": : :"memory") | ||
51 | #define rmb() mb() | ||
52 | #define wmb() __asm__ __volatile__ ("": : :"memory") | ||
53 | #define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop") | ||
54 | #define read_barrier_depends() do { } while(0) | ||
55 | #endif | ||
56 | |||
57 | #ifdef CONFIG_SMP | ||
58 | #define smp_mb() mb() | ||
59 | #define smp_rmb() rmb() | ||
60 | #define smp_wmb() wmb() | ||
61 | #define smp_read_barrier_depends() read_barrier_depends() | ||
62 | #else | ||
63 | #define smp_mb() barrier() | ||
64 | #define smp_rmb() barrier() | ||
65 | #define smp_wmb() barrier() | ||
66 | #define smp_read_barrier_depends() do { } while(0) | ||
67 | #endif | ||
68 | |||
69 | #define set_mb(var, value) do { (void)xchg(&var, value); } while (0) | ||
70 | |||
71 | #ifdef CONFIG_GUSA_RB | ||
72 | #include <asm/cmpxchg-grb.h> | ||
73 | #else | ||
74 | #include <asm/cmpxchg-irq.h> | ||
75 | #endif | ||
76 | |||
77 | extern void __xchg_called_with_bad_pointer(void); | ||
78 | |||
79 | #define __xchg(ptr, x, size) \ | ||
80 | ({ \ | ||
81 | unsigned long __xchg__res; \ | ||
82 | volatile void *__xchg_ptr = (ptr); \ | ||
83 | switch (size) { \ | ||
84 | case 4: \ | ||
85 | __xchg__res = xchg_u32(__xchg_ptr, x); \ | ||
86 | break; \ | ||
87 | case 1: \ | ||
88 | __xchg__res = xchg_u8(__xchg_ptr, x); \ | ||
89 | break; \ | ||
90 | default: \ | ||
91 | __xchg_called_with_bad_pointer(); \ | ||
92 | __xchg__res = x; \ | ||
93 | break; \ | ||
94 | } \ | ||
95 | \ | ||
96 | __xchg__res; \ | ||
97 | }) | ||
98 | |||
99 | #define xchg(ptr,x) \ | ||
100 | ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr)))) | ||
101 | |||
102 | /* This function doesn't exist, so you'll get a linker error | ||
103 | * if something tries to do an invalid cmpxchg(). */ | ||
104 | extern void __cmpxchg_called_with_bad_pointer(void); | ||
105 | |||
106 | #define __HAVE_ARCH_CMPXCHG 1 | ||
107 | |||
108 | static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old, | ||
109 | unsigned long new, int size) | ||
110 | { | ||
111 | switch (size) { | ||
112 | case 4: | ||
113 | return __cmpxchg_u32(ptr, old, new); | ||
114 | } | ||
115 | __cmpxchg_called_with_bad_pointer(); | ||
116 | return old; | ||
117 | } | ||
118 | |||
119 | #define cmpxchg(ptr,o,n) \ | ||
120 | ({ \ | ||
121 | __typeof__(*(ptr)) _o_ = (o); \ | ||
122 | __typeof__(*(ptr)) _n_ = (n); \ | ||
123 | (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ | ||
124 | (unsigned long)_n_, sizeof(*(ptr))); \ | ||
125 | }) | ||
126 | |||
127 | extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); | ||
128 | |||
129 | extern void *set_exception_table_vec(unsigned int vec, void *handler); | ||
130 | |||
131 | static inline void *set_exception_table_evt(unsigned int evt, void *handler) | ||
132 | { | ||
133 | return set_exception_table_vec(evt >> 5, handler); | ||
134 | } | ||
135 | |||
136 | /* | ||
137 | * SH-2A has both 16 and 32-bit opcodes, do lame encoding checks. | ||
138 | */ | ||
139 | #ifdef CONFIG_CPU_SH2A | ||
140 | extern unsigned int instruction_size(unsigned int insn); | ||
141 | #elif defined(CONFIG_SUPERH32) | ||
142 | #define instruction_size(insn) (2) | ||
143 | #else | ||
144 | #define instruction_size(insn) (4) | ||
145 | #endif | ||
146 | |||
147 | extern unsigned long cached_to_uncached; | ||
148 | |||
149 | extern struct dentry *sh_debugfs_root; | ||
150 | |||
151 | void per_cpu_trap_init(void); | ||
152 | |||
153 | asmlinkage void break_point_trap(void); | ||
154 | |||
155 | #ifdef CONFIG_SUPERH32 | ||
156 | #define BUILD_TRAP_HANDLER(name) \ | ||
157 | asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \ | ||
158 | unsigned long r6, unsigned long r7, \ | ||
159 | struct pt_regs __regs) | ||
160 | |||
161 | #define TRAP_HANDLER_DECL \ | ||
162 | struct pt_regs *regs = RELOC_HIDE(&__regs, 0); \ | ||
163 | unsigned int vec = regs->tra; \ | ||
164 | (void)vec; | ||
165 | #else | ||
166 | #define BUILD_TRAP_HANDLER(name) \ | ||
167 | asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs) | ||
168 | #define TRAP_HANDLER_DECL | ||
169 | #endif | ||
170 | |||
171 | BUILD_TRAP_HANDLER(address_error); | ||
172 | BUILD_TRAP_HANDLER(debug); | ||
173 | BUILD_TRAP_HANDLER(bug); | ||
174 | BUILD_TRAP_HANDLER(fpu_error); | ||
175 | BUILD_TRAP_HANDLER(fpu_state_restore); | ||
176 | |||
177 | #define arch_align_stack(x) (x) | ||
178 | |||
179 | struct mem_access { | ||
180 | unsigned long (*from)(void *dst, const void *src, unsigned long cnt); | ||
181 | unsigned long (*to)(void *dst, const void *src, unsigned long cnt); | ||
182 | }; | ||
183 | |||
184 | #ifdef CONFIG_SUPERH32 | ||
185 | # include "system_32.h" | ||
186 | #else | ||
187 | # include "system_64.h" | ||
188 | #endif | ||
189 | |||
190 | #endif | ||
diff --git a/include/asm-sh/system_32.h b/include/asm-sh/system_32.h deleted file mode 100644 index f11bcf0855ed..000000000000 --- a/include/asm-sh/system_32.h +++ /dev/null | |||
@@ -1,102 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SYSTEM_32_H | ||
2 | #define __ASM_SH_SYSTEM_32_H | ||
3 | |||
4 | #include <linux/types.h> | ||
5 | |||
6 | struct task_struct *__switch_to(struct task_struct *prev, | ||
7 | struct task_struct *next); | ||
8 | |||
9 | /* | ||
10 | * switch_to() should switch tasks to task nr n, first | ||
11 | */ | ||
12 | #define switch_to(prev, next, last) \ | ||
13 | do { \ | ||
14 | register u32 *__ts1 __asm__ ("r1") = (u32 *)&prev->thread.sp; \ | ||
15 | register u32 *__ts2 __asm__ ("r2") = (u32 *)&prev->thread.pc; \ | ||
16 | register u32 *__ts4 __asm__ ("r4") = (u32 *)prev; \ | ||
17 | register u32 *__ts5 __asm__ ("r5") = (u32 *)next; \ | ||
18 | register u32 *__ts6 __asm__ ("r6") = (u32 *)&next->thread.sp; \ | ||
19 | register u32 __ts7 __asm__ ("r7") = next->thread.pc; \ | ||
20 | struct task_struct *__last; \ | ||
21 | \ | ||
22 | __asm__ __volatile__ ( \ | ||
23 | ".balign 4\n\t" \ | ||
24 | "stc.l gbr, @-r15\n\t" \ | ||
25 | "sts.l pr, @-r15\n\t" \ | ||
26 | "mov.l r8, @-r15\n\t" \ | ||
27 | "mov.l r9, @-r15\n\t" \ | ||
28 | "mov.l r10, @-r15\n\t" \ | ||
29 | "mov.l r11, @-r15\n\t" \ | ||
30 | "mov.l r12, @-r15\n\t" \ | ||
31 | "mov.l r13, @-r15\n\t" \ | ||
32 | "mov.l r14, @-r15\n\t" \ | ||
33 | "mov.l r15, @r1\t! save SP\n\t" \ | ||
34 | "mov.l @r6, r15\t! change to new stack\n\t" \ | ||
35 | "mova 1f, %0\n\t" \ | ||
36 | "mov.l %0, @r2\t! save PC\n\t" \ | ||
37 | "mov.l 2f, %0\n\t" \ | ||
38 | "jmp @%0\t! call __switch_to\n\t" \ | ||
39 | " lds r7, pr\t! with return to new PC\n\t" \ | ||
40 | ".balign 4\n" \ | ||
41 | "2:\n\t" \ | ||
42 | ".long __switch_to\n" \ | ||
43 | "1:\n\t" \ | ||
44 | "mov.l @r15+, r14\n\t" \ | ||
45 | "mov.l @r15+, r13\n\t" \ | ||
46 | "mov.l @r15+, r12\n\t" \ | ||
47 | "mov.l @r15+, r11\n\t" \ | ||
48 | "mov.l @r15+, r10\n\t" \ | ||
49 | "mov.l @r15+, r9\n\t" \ | ||
50 | "mov.l @r15+, r8\n\t" \ | ||
51 | "lds.l @r15+, pr\n\t" \ | ||
52 | "ldc.l @r15+, gbr\n\t" \ | ||
53 | : "=z" (__last) \ | ||
54 | : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ | ||
55 | "r" (__ts5), "r" (__ts6), "r" (__ts7) \ | ||
56 | : "r3", "t"); \ | ||
57 | \ | ||
58 | last = __last; \ | ||
59 | } while (0) | ||
60 | |||
61 | #define __uses_jump_to_uncached __attribute__ ((__section__ (".uncached.text"))) | ||
62 | |||
63 | /* | ||
64 | * Jump to uncached area. | ||
65 | * When handling TLB or caches, we need to do it from an uncached area. | ||
66 | */ | ||
67 | #define jump_to_uncached() \ | ||
68 | do { \ | ||
69 | unsigned long __dummy; \ | ||
70 | \ | ||
71 | __asm__ __volatile__( \ | ||
72 | "mova 1f, %0\n\t" \ | ||
73 | "add %1, %0\n\t" \ | ||
74 | "jmp @%0\n\t" \ | ||
75 | " nop\n\t" \ | ||
76 | ".balign 4\n" \ | ||
77 | "1:" \ | ||
78 | : "=&z" (__dummy) \ | ||
79 | : "r" (cached_to_uncached)); \ | ||
80 | } while (0) | ||
81 | |||
82 | /* | ||
83 | * Back to cached area. | ||
84 | */ | ||
85 | #define back_to_cached() \ | ||
86 | do { \ | ||
87 | unsigned long __dummy; \ | ||
88 | ctrl_barrier(); \ | ||
89 | __asm__ __volatile__( \ | ||
90 | "mov.l 1f, %0\n\t" \ | ||
91 | "jmp @%0\n\t" \ | ||
92 | " nop\n\t" \ | ||
93 | ".balign 4\n" \ | ||
94 | "1: .long 2f\n" \ | ||
95 | "2:" \ | ||
96 | : "=&r" (__dummy)); \ | ||
97 | } while (0) | ||
98 | |||
99 | int handle_unaligned_access(opcode_t instruction, struct pt_regs *regs, | ||
100 | struct mem_access *ma); | ||
101 | |||
102 | #endif /* __ASM_SH_SYSTEM_32_H */ | ||
diff --git a/include/asm-sh/system_64.h b/include/asm-sh/system_64.h deleted file mode 100644 index 943acf5ea07c..000000000000 --- a/include/asm-sh/system_64.h +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SYSTEM_64_H | ||
2 | #define __ASM_SH_SYSTEM_64_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-sh/system_64.h | ||
6 | * | ||
7 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
8 | * Copyright (C) 2003 Paul Mundt | ||
9 | * Copyright (C) 2004 Richard Curnow | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General Public | ||
12 | * License. See the file "COPYING" in the main directory of this archive | ||
13 | * for more details. | ||
14 | */ | ||
15 | #include <asm/processor.h> | ||
16 | |||
17 | /* | ||
18 | * switch_to() should switch tasks to task nr n, first | ||
19 | */ | ||
20 | struct task_struct *sh64_switch_to(struct task_struct *prev, | ||
21 | struct thread_struct *prev_thread, | ||
22 | struct task_struct *next, | ||
23 | struct thread_struct *next_thread); | ||
24 | |||
25 | #define switch_to(prev,next,last) \ | ||
26 | do { \ | ||
27 | if (last_task_used_math != next) { \ | ||
28 | struct pt_regs *regs = next->thread.uregs; \ | ||
29 | if (regs) regs->sr |= SR_FD; \ | ||
30 | } \ | ||
31 | last = sh64_switch_to(prev, &prev->thread, next, \ | ||
32 | &next->thread); \ | ||
33 | } while (0) | ||
34 | |||
35 | #define __uses_jump_to_uncached | ||
36 | |||
37 | #define jump_to_uncached() do { } while (0) | ||
38 | #define back_to_cached() do { } while (0) | ||
39 | |||
40 | #endif /* __ASM_SH_SYSTEM_64_H */ | ||
diff --git a/include/asm-sh/systemh7751.h b/include/asm-sh/systemh7751.h deleted file mode 100644 index 4161122c84ef..000000000000 --- a/include/asm-sh/systemh7751.h +++ /dev/null | |||
@@ -1,71 +0,0 @@ | |||
1 | #ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H | ||
2 | #define __ASM_SH_SYSTEMH_7751SYSTEMH_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm-sh/systemh/7751systemh.h | ||
6 | * | ||
7 | * Copyright (C) 2000 Kazumoto Kojima | ||
8 | * | ||
9 | * Hitachi SystemH support | ||
10 | |||
11 | * Modified for 7751 SystemH by | ||
12 | * Jonathan Short, 2002. | ||
13 | */ | ||
14 | |||
15 | /* Box specific addresses. */ | ||
16 | |||
17 | #define PA_ROM 0x00000000 /* EPROM */ | ||
18 | #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ | ||
19 | #define PA_FROM 0x01000000 /* EPROM */ | ||
20 | #define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ | ||
21 | #define PA_EXT1 0x04000000 | ||
22 | #define PA_EXT1_SIZE 0x04000000 | ||
23 | #define PA_EXT2 0x08000000 | ||
24 | #define PA_EXT2_SIZE 0x04000000 | ||
25 | #define PA_SDRAM 0x0c000000 | ||
26 | #define PA_SDRAM_SIZE 0x04000000 | ||
27 | |||
28 | #define PA_EXT4 0x12000000 | ||
29 | #define PA_EXT4_SIZE 0x02000000 | ||
30 | #define PA_EXT5 0x14000000 | ||
31 | #define PA_EXT5_SIZE 0x04000000 | ||
32 | #define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ | ||
33 | |||
34 | #define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ | ||
35 | #define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ | ||
36 | #define PA_LED 0xba000000 /* LED */ | ||
37 | #define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ | ||
38 | |||
39 | #define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ | ||
40 | #define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ | ||
41 | #define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ | ||
42 | #define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ | ||
43 | #define MRSHPC_MODE (PA_MRSHPC + 4) | ||
44 | #define MRSHPC_OPTION (PA_MRSHPC + 6) | ||
45 | #define MRSHPC_CSR (PA_MRSHPC + 8) | ||
46 | #define MRSHPC_ISR (PA_MRSHPC + 10) | ||
47 | #define MRSHPC_ICR (PA_MRSHPC + 12) | ||
48 | #define MRSHPC_CPWCR (PA_MRSHPC + 14) | ||
49 | #define MRSHPC_MW0CR1 (PA_MRSHPC + 16) | ||
50 | #define MRSHPC_MW1CR1 (PA_MRSHPC + 18) | ||
51 | #define MRSHPC_IOWCR1 (PA_MRSHPC + 20) | ||
52 | #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) | ||
53 | #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) | ||
54 | #define MRSHPC_IOWCR2 (PA_MRSHPC + 26) | ||
55 | #define MRSHPC_CDCR (PA_MRSHPC + 28) | ||
56 | #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) | ||
57 | |||
58 | #define BCR_ILCRA (PA_BCR + 0) | ||
59 | #define BCR_ILCRB (PA_BCR + 2) | ||
60 | #define BCR_ILCRC (PA_BCR + 4) | ||
61 | #define BCR_ILCRD (PA_BCR + 6) | ||
62 | #define BCR_ILCRE (PA_BCR + 8) | ||
63 | #define BCR_ILCRF (PA_BCR + 10) | ||
64 | #define BCR_ILCRG (PA_BCR + 12) | ||
65 | |||
66 | #define IRQ_79C973 13 | ||
67 | |||
68 | #define __IO_PREFIX sh7751systemh | ||
69 | #include <asm/io_generic.h> | ||
70 | |||
71 | #endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */ | ||
diff --git a/include/asm-sh/termbits.h b/include/asm-sh/termbits.h deleted file mode 100644 index 77db116948cf..000000000000 --- a/include/asm-sh/termbits.h +++ /dev/null | |||
@@ -1,198 +0,0 @@ | |||
1 | #ifndef __ASM_SH_TERMBITS_H | ||
2 | #define __ASM_SH_TERMBITS_H | ||
3 | |||
4 | #include <linux/posix_types.h> | ||
5 | |||
6 | typedef unsigned char cc_t; | ||
7 | typedef unsigned int speed_t; | ||
8 | typedef unsigned int tcflag_t; | ||
9 | |||
10 | #define NCCS 19 | ||
11 | struct termios { | ||
12 | tcflag_t c_iflag; /* input mode flags */ | ||
13 | tcflag_t c_oflag; /* output mode flags */ | ||
14 | tcflag_t c_cflag; /* control mode flags */ | ||
15 | tcflag_t c_lflag; /* local mode flags */ | ||
16 | cc_t c_line; /* line discipline */ | ||
17 | cc_t c_cc[NCCS]; /* control characters */ | ||
18 | }; | ||
19 | |||
20 | struct termios2 { | ||
21 | tcflag_t c_iflag; /* input mode flags */ | ||
22 | tcflag_t c_oflag; /* output mode flags */ | ||
23 | tcflag_t c_cflag; /* control mode flags */ | ||
24 | tcflag_t c_lflag; /* local mode flags */ | ||
25 | cc_t c_line; /* line discipline */ | ||
26 | cc_t c_cc[NCCS]; /* control characters */ | ||
27 | speed_t c_ispeed; /* input speed */ | ||
28 | speed_t c_ospeed; /* output speed */ | ||
29 | }; | ||
30 | |||
31 | struct ktermios { | ||
32 | tcflag_t c_iflag; /* input mode flags */ | ||
33 | tcflag_t c_oflag; /* output mode flags */ | ||
34 | tcflag_t c_cflag; /* control mode flags */ | ||
35 | tcflag_t c_lflag; /* local mode flags */ | ||
36 | cc_t c_line; /* line discipline */ | ||
37 | cc_t c_cc[NCCS]; /* control characters */ | ||
38 | speed_t c_ispeed; /* input speed */ | ||
39 | speed_t c_ospeed; /* output speed */ | ||
40 | }; | ||
41 | |||
42 | /* c_cc characters */ | ||
43 | #define VINTR 0 | ||
44 | #define VQUIT 1 | ||
45 | #define VERASE 2 | ||
46 | #define VKILL 3 | ||
47 | #define VEOF 4 | ||
48 | #define VTIME 5 | ||
49 | #define VMIN 6 | ||
50 | #define VSWTC 7 | ||
51 | #define VSTART 8 | ||
52 | #define VSTOP 9 | ||
53 | #define VSUSP 10 | ||
54 | #define VEOL 11 | ||
55 | #define VREPRINT 12 | ||
56 | #define VDISCARD 13 | ||
57 | #define VWERASE 14 | ||
58 | #define VLNEXT 15 | ||
59 | #define VEOL2 16 | ||
60 | |||
61 | /* c_iflag bits */ | ||
62 | #define IGNBRK 0000001 | ||
63 | #define BRKINT 0000002 | ||
64 | #define IGNPAR 0000004 | ||
65 | #define PARMRK 0000010 | ||
66 | #define INPCK 0000020 | ||
67 | #define ISTRIP 0000040 | ||
68 | #define INLCR 0000100 | ||
69 | #define IGNCR 0000200 | ||
70 | #define ICRNL 0000400 | ||
71 | #define IUCLC 0001000 | ||
72 | #define IXON 0002000 | ||
73 | #define IXANY 0004000 | ||
74 | #define IXOFF 0010000 | ||
75 | #define IMAXBEL 0020000 | ||
76 | #define IUTF8 0040000 | ||
77 | |||
78 | /* c_oflag bits */ | ||
79 | #define OPOST 0000001 | ||
80 | #define OLCUC 0000002 | ||
81 | #define ONLCR 0000004 | ||
82 | #define OCRNL 0000010 | ||
83 | #define ONOCR 0000020 | ||
84 | #define ONLRET 0000040 | ||
85 | #define OFILL 0000100 | ||
86 | #define OFDEL 0000200 | ||
87 | #define NLDLY 0000400 | ||
88 | #define NL0 0000000 | ||
89 | #define NL1 0000400 | ||
90 | #define CRDLY 0003000 | ||
91 | #define CR0 0000000 | ||
92 | #define CR1 0001000 | ||
93 | #define CR2 0002000 | ||
94 | #define CR3 0003000 | ||
95 | #define TABDLY 0014000 | ||
96 | #define TAB0 0000000 | ||
97 | #define TAB1 0004000 | ||
98 | #define TAB2 0010000 | ||
99 | #define TAB3 0014000 | ||
100 | #define XTABS 0014000 | ||
101 | #define BSDLY 0020000 | ||
102 | #define BS0 0000000 | ||
103 | #define BS1 0020000 | ||
104 | #define VTDLY 0040000 | ||
105 | #define VT0 0000000 | ||
106 | #define VT1 0040000 | ||
107 | #define FFDLY 0100000 | ||
108 | #define FF0 0000000 | ||
109 | #define FF1 0100000 | ||
110 | |||
111 | /* c_cflag bit meaning */ | ||
112 | #define CBAUD 0010017 | ||
113 | #define B0 0000000 /* hang up */ | ||
114 | #define B50 0000001 | ||
115 | #define B75 0000002 | ||
116 | #define B110 0000003 | ||
117 | #define B134 0000004 | ||
118 | #define B150 0000005 | ||
119 | #define B200 0000006 | ||
120 | #define B300 0000007 | ||
121 | #define B600 0000010 | ||
122 | #define B1200 0000011 | ||
123 | #define B1800 0000012 | ||
124 | #define B2400 0000013 | ||
125 | #define B4800 0000014 | ||
126 | #define B9600 0000015 | ||
127 | #define B19200 0000016 | ||
128 | #define B38400 0000017 | ||
129 | #define EXTA B19200 | ||
130 | #define EXTB B38400 | ||
131 | #define CSIZE 0000060 | ||
132 | #define CS5 0000000 | ||
133 | #define CS6 0000020 | ||
134 | #define CS7 0000040 | ||
135 | #define CS8 0000060 | ||
136 | #define CSTOPB 0000100 | ||
137 | #define CREAD 0000200 | ||
138 | #define PARENB 0000400 | ||
139 | #define PARODD 0001000 | ||
140 | #define HUPCL 0002000 | ||
141 | #define CLOCAL 0004000 | ||
142 | #define CBAUDEX 0010000 | ||
143 | #define BOTHER 0010000 | ||
144 | #define B57600 0010001 | ||
145 | #define B115200 0010002 | ||
146 | #define B230400 0010003 | ||
147 | #define B460800 0010004 | ||
148 | #define B500000 0010005 | ||
149 | #define B576000 0010006 | ||
150 | #define B921600 0010007 | ||
151 | #define B1000000 0010010 | ||
152 | #define B1152000 0010011 | ||
153 | #define B1500000 0010012 | ||
154 | #define B2000000 0010013 | ||
155 | #define B2500000 0010014 | ||
156 | #define B3000000 0010015 | ||
157 | #define B3500000 0010016 | ||
158 | #define B4000000 0010017 | ||
159 | #define CIBAUD 002003600000 /* input baud rate */ | ||
160 | #define CMSPAR 010000000000 /* mark or space (stick) parity */ | ||
161 | #define CRTSCTS 020000000000 /* flow control */ | ||
162 | |||
163 | #define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ | ||
164 | |||
165 | /* c_lflag bits */ | ||
166 | #define ISIG 0000001 | ||
167 | #define ICANON 0000002 | ||
168 | #define XCASE 0000004 | ||
169 | #define ECHO 0000010 | ||
170 | #define ECHOE 0000020 | ||
171 | #define ECHOK 0000040 | ||
172 | #define ECHONL 0000100 | ||
173 | #define NOFLSH 0000200 | ||
174 | #define TOSTOP 0000400 | ||
175 | #define ECHOCTL 0001000 | ||
176 | #define ECHOPRT 0002000 | ||
177 | #define ECHOKE 0004000 | ||
178 | #define FLUSHO 0010000 | ||
179 | #define PENDIN 0040000 | ||
180 | #define IEXTEN 0100000 | ||
181 | |||
182 | /* tcflow() and TCXONC use these */ | ||
183 | #define TCOOFF 0 | ||
184 | #define TCOON 1 | ||
185 | #define TCIOFF 2 | ||
186 | #define TCION 3 | ||
187 | |||
188 | /* tcflush() and TCFLSH use these */ | ||
189 | #define TCIFLUSH 0 | ||
190 | #define TCOFLUSH 1 | ||
191 | #define TCIOFLUSH 2 | ||
192 | |||
193 | /* tcsetattr uses these */ | ||
194 | #define TCSANOW 0 | ||
195 | #define TCSADRAIN 1 | ||
196 | #define TCSAFLUSH 2 | ||
197 | |||
198 | #endif /* __ASM_SH_TERMBITS_H */ | ||
diff --git a/include/asm-sh/termios.h b/include/asm-sh/termios.h deleted file mode 100644 index 0a8c793c76f2..000000000000 --- a/include/asm-sh/termios.h +++ /dev/null | |||
@@ -1,90 +0,0 @@ | |||
1 | #ifndef __ASM_SH_TERMIOS_H | ||
2 | #define __ASM_SH_TERMIOS_H | ||
3 | |||
4 | #include <asm/termbits.h> | ||
5 | #include <asm/ioctls.h> | ||
6 | |||
7 | struct winsize { | ||
8 | unsigned short ws_row; | ||
9 | unsigned short ws_col; | ||
10 | unsigned short ws_xpixel; | ||
11 | unsigned short ws_ypixel; | ||
12 | }; | ||
13 | |||
14 | #define NCC 8 | ||
15 | struct termio { | ||
16 | unsigned short c_iflag; /* input mode flags */ | ||
17 | unsigned short c_oflag; /* output mode flags */ | ||
18 | unsigned short c_cflag; /* control mode flags */ | ||
19 | unsigned short c_lflag; /* local mode flags */ | ||
20 | unsigned char c_line; /* line discipline */ | ||
21 | unsigned char c_cc[NCC]; /* control characters */ | ||
22 | }; | ||
23 | |||
24 | /* modem lines */ | ||
25 | #define TIOCM_LE 0x001 | ||
26 | #define TIOCM_DTR 0x002 | ||
27 | #define TIOCM_RTS 0x004 | ||
28 | #define TIOCM_ST 0x008 | ||
29 | #define TIOCM_SR 0x010 | ||
30 | #define TIOCM_CTS 0x020 | ||
31 | #define TIOCM_CAR 0x040 | ||
32 | #define TIOCM_RNG 0x080 | ||
33 | #define TIOCM_DSR 0x100 | ||
34 | #define TIOCM_CD TIOCM_CAR | ||
35 | #define TIOCM_RI TIOCM_RNG | ||
36 | #define TIOCM_OUT1 0x2000 | ||
37 | #define TIOCM_OUT2 0x4000 | ||
38 | #define TIOCM_LOOP 0x8000 | ||
39 | |||
40 | /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ | ||
41 | |||
42 | #ifdef __KERNEL__ | ||
43 | |||
44 | /* intr=^C quit=^\ erase=del kill=^U | ||
45 | eof=^D vtime=\0 vmin=\1 sxtc=\0 | ||
46 | start=^Q stop=^S susp=^Z eol=\0 | ||
47 | reprint=^R discard=^U werase=^W lnext=^V | ||
48 | eol2=\0 | ||
49 | */ | ||
50 | #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" | ||
51 | |||
52 | /* | ||
53 | * Translate a "termio" structure into a "termios". Ugh. | ||
54 | */ | ||
55 | #define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ | ||
56 | unsigned short __tmp; \ | ||
57 | get_user(__tmp,&(termio)->x); \ | ||
58 | *(unsigned short *) &(termios)->x = __tmp; \ | ||
59 | } | ||
60 | |||
61 | #define user_termio_to_kernel_termios(termios, termio) \ | ||
62 | ({ \ | ||
63 | SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ | ||
64 | SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ | ||
65 | SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ | ||
66 | SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ | ||
67 | copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ | ||
68 | }) | ||
69 | |||
70 | /* | ||
71 | * Translate a "termios" structure into a "termio". Ugh. | ||
72 | */ | ||
73 | #define kernel_termios_to_user_termio(termio, termios) \ | ||
74 | ({ \ | ||
75 | put_user((termios)->c_iflag, &(termio)->c_iflag); \ | ||
76 | put_user((termios)->c_oflag, &(termio)->c_oflag); \ | ||
77 | put_user((termios)->c_cflag, &(termio)->c_cflag); \ | ||
78 | put_user((termios)->c_lflag, &(termio)->c_lflag); \ | ||
79 | put_user((termios)->c_line, &(termio)->c_line); \ | ||
80 | copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ | ||
81 | }) | ||
82 | |||
83 | #define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) | ||
84 | #define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) | ||
85 | #define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) | ||
86 | #define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) | ||
87 | |||
88 | #endif /* __KERNEL__ */ | ||
89 | |||
90 | #endif /* __ASM_SH_TERMIOS_H */ | ||
diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h deleted file mode 100644 index eeb4c747119e..000000000000 --- a/include/asm-sh/thread_info.h +++ /dev/null | |||
@@ -1,141 +0,0 @@ | |||
1 | #ifndef __ASM_SH_THREAD_INFO_H | ||
2 | #define __ASM_SH_THREAD_INFO_H | ||
3 | |||
4 | /* SuperH version | ||
5 | * Copyright (C) 2002 Niibe Yutaka | ||
6 | * | ||
7 | * The copyright of original i386 version is: | ||
8 | * | ||
9 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) | ||
10 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller | ||
11 | */ | ||
12 | #ifdef __KERNEL__ | ||
13 | #include <asm/page.h> | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | #include <asm/processor.h> | ||
17 | |||
18 | struct thread_info { | ||
19 | struct task_struct *task; /* main task structure */ | ||
20 | struct exec_domain *exec_domain; /* execution domain */ | ||
21 | unsigned long flags; /* low level flags */ | ||
22 | __u32 cpu; | ||
23 | int preempt_count; /* 0 => preemptable, <0 => BUG */ | ||
24 | mm_segment_t addr_limit; /* thread address space */ | ||
25 | struct restart_block restart_block; | ||
26 | unsigned long previous_sp; /* sp of previous stack in case | ||
27 | of nested IRQ stacks */ | ||
28 | __u8 supervisor_stack[0]; | ||
29 | }; | ||
30 | |||
31 | #endif | ||
32 | |||
33 | #define PREEMPT_ACTIVE 0x10000000 | ||
34 | |||
35 | #if defined(CONFIG_4KSTACKS) | ||
36 | #define THREAD_SIZE_ORDER (0) | ||
37 | #elif defined(CONFIG_PAGE_SIZE_4KB) | ||
38 | #define THREAD_SIZE_ORDER (1) | ||
39 | #elif defined(CONFIG_PAGE_SIZE_8KB) | ||
40 | #define THREAD_SIZE_ORDER (1) | ||
41 | #elif defined(CONFIG_PAGE_SIZE_16KB) | ||
42 | #define THREAD_SIZE_ORDER (0) | ||
43 | #elif defined(CONFIG_PAGE_SIZE_64KB) | ||
44 | #define THREAD_SIZE_ORDER (0) | ||
45 | #else | ||
46 | #error "Unknown thread size" | ||
47 | #endif | ||
48 | |||
49 | #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) | ||
50 | #define STACK_WARN (THREAD_SIZE >> 3) | ||
51 | |||
52 | /* | ||
53 | * macros/functions for gaining access to the thread information structure | ||
54 | */ | ||
55 | #ifndef __ASSEMBLY__ | ||
56 | #define INIT_THREAD_INFO(tsk) \ | ||
57 | { \ | ||
58 | .task = &tsk, \ | ||
59 | .exec_domain = &default_exec_domain, \ | ||
60 | .flags = 0, \ | ||
61 | .cpu = 0, \ | ||
62 | .preempt_count = 1, \ | ||
63 | .addr_limit = KERNEL_DS, \ | ||
64 | .restart_block = { \ | ||
65 | .fn = do_no_restart_syscall, \ | ||
66 | }, \ | ||
67 | } | ||
68 | |||
69 | #define init_thread_info (init_thread_union.thread_info) | ||
70 | #define init_stack (init_thread_union.stack) | ||
71 | |||
72 | /* how to get the current stack pointer from C */ | ||
73 | register unsigned long current_stack_pointer asm("r15") __used; | ||
74 | |||
75 | /* how to get the thread information struct from C */ | ||
76 | static inline struct thread_info *current_thread_info(void) | ||
77 | { | ||
78 | struct thread_info *ti; | ||
79 | #if defined(CONFIG_SUPERH64) | ||
80 | __asm__ __volatile__ ("getcon cr17, %0" : "=r" (ti)); | ||
81 | #elif defined(CONFIG_CPU_HAS_SR_RB) | ||
82 | __asm__ __volatile__ ("stc r7_bank, %0" : "=r" (ti)); | ||
83 | #else | ||
84 | unsigned long __dummy; | ||
85 | |||
86 | __asm__ __volatile__ ( | ||
87 | "mov r15, %0\n\t" | ||
88 | "and %1, %0\n\t" | ||
89 | : "=&r" (ti), "=r" (__dummy) | ||
90 | : "1" (~(THREAD_SIZE - 1)) | ||
91 | : "memory"); | ||
92 | #endif | ||
93 | |||
94 | return ti; | ||
95 | } | ||
96 | |||
97 | #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR | ||
98 | |||
99 | /* thread information allocation */ | ||
100 | #ifdef CONFIG_DEBUG_STACK_USAGE | ||
101 | #define alloc_thread_info(ti) kzalloc(THREAD_SIZE, GFP_KERNEL) | ||
102 | #else | ||
103 | #define alloc_thread_info(ti) kmalloc(THREAD_SIZE, GFP_KERNEL) | ||
104 | #endif | ||
105 | #define free_thread_info(ti) kfree(ti) | ||
106 | |||
107 | #endif /* __ASSEMBLY__ */ | ||
108 | |||
109 | /* | ||
110 | * thread information flags | ||
111 | * - these are process state flags that various assembly files may need to access | ||
112 | * - pending work-to-be-done flags are in LSW | ||
113 | * - other flags in MSW | ||
114 | */ | ||
115 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
116 | #define TIF_SIGPENDING 1 /* signal pending */ | ||
117 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ | ||
118 | #define TIF_RESTORE_SIGMASK 3 /* restore signal mask in do_signal() */ | ||
119 | #define TIF_SINGLESTEP 4 /* singlestepping active */ | ||
120 | #define TIF_SYSCALL_AUDIT 5 | ||
121 | #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ | ||
122 | #define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ | ||
123 | #define TIF_MEMDIE 18 | ||
124 | #define TIF_FREEZE 19 | ||
125 | |||
126 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | ||
127 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) | ||
128 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) | ||
129 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) | ||
130 | #define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) | ||
131 | #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) | ||
132 | #define _TIF_USEDFPU (1<<TIF_USEDFPU) | ||
133 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) | ||
134 | #define _TIF_FREEZE (1<<TIF_FREEZE) | ||
135 | |||
136 | #define _TIF_WORK_MASK 0x000000FE /* work to do on interrupt/exception return */ | ||
137 | #define _TIF_ALLWORK_MASK 0x000000FF /* work to do on any return to u-space */ | ||
138 | |||
139 | #endif /* __KERNEL__ */ | ||
140 | |||
141 | #endif /* __ASM_SH_THREAD_INFO_H */ | ||
diff --git a/include/asm-sh/timer.h b/include/asm-sh/timer.h deleted file mode 100644 index 327f7eb8976a..000000000000 --- a/include/asm-sh/timer.h +++ /dev/null | |||
@@ -1,44 +0,0 @@ | |||
1 | #ifndef __ASM_SH_TIMER_H | ||
2 | #define __ASM_SH_TIMER_H | ||
3 | |||
4 | #include <linux/sysdev.h> | ||
5 | #include <linux/clocksource.h> | ||
6 | #include <asm/cpu/timer.h> | ||
7 | |||
8 | struct sys_timer_ops { | ||
9 | int (*init)(void); | ||
10 | int (*start)(void); | ||
11 | int (*stop)(void); | ||
12 | cycle_t (*read)(void); | ||
13 | #ifndef CONFIG_GENERIC_TIME | ||
14 | unsigned long (*get_offset)(void); | ||
15 | #endif | ||
16 | }; | ||
17 | |||
18 | struct sys_timer { | ||
19 | const char *name; | ||
20 | |||
21 | struct sys_device dev; | ||
22 | struct sys_timer_ops *ops; | ||
23 | }; | ||
24 | |||
25 | #define TICK_SIZE (tick_nsec / 1000) | ||
26 | |||
27 | extern struct sys_timer tmu_timer, cmt_timer, mtu2_timer; | ||
28 | extern struct sys_timer *sys_timer; | ||
29 | |||
30 | #ifndef CONFIG_GENERIC_TIME | ||
31 | static inline unsigned long get_timer_offset(void) | ||
32 | { | ||
33 | return sys_timer->ops->get_offset(); | ||
34 | } | ||
35 | #endif | ||
36 | |||
37 | /* arch/sh/kernel/timers/timer.c */ | ||
38 | struct sys_timer *get_sys_timer(void); | ||
39 | |||
40 | /* arch/sh/kernel/time.c */ | ||
41 | void handle_timer_tick(void); | ||
42 | extern unsigned long sh_hpt_frequency; | ||
43 | |||
44 | #endif /* __ASM_SH_TIMER_H */ | ||
diff --git a/include/asm-sh/timex.h b/include/asm-sh/timex.h deleted file mode 100644 index a873e24113cf..000000000000 --- a/include/asm-sh/timex.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm-sh/timex.h | ||
3 | * | ||
4 | * sh architecture timex specifications | ||
5 | */ | ||
6 | #ifndef __ASM_SH_TIMEX_H | ||
7 | #define __ASM_SH_TIMEX_H | ||
8 | |||
9 | #define CLOCK_TICK_RATE (CONFIG_SH_PCLK_FREQ / 4) /* Underlying HZ */ | ||
10 | |||
11 | typedef unsigned long long cycles_t; | ||
12 | |||
13 | static __inline__ cycles_t get_cycles (void) | ||
14 | { | ||
15 | return 0; | ||
16 | } | ||
17 | |||
18 | #endif /* __ASM_SH_TIMEX_H */ | ||
diff --git a/include/asm-sh/titan.h b/include/asm-sh/titan.h deleted file mode 100644 index 03f3583c8918..000000000000 --- a/include/asm-sh/titan.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * Platform defintions for Titan | ||
3 | */ | ||
4 | #ifndef _ASM_SH_TITAN_H | ||
5 | #define _ASM_SH_TITAN_H | ||
6 | |||
7 | #define __IO_PREFIX titan | ||
8 | #include <asm/io_generic.h> | ||
9 | |||
10 | /* IRQ assignments */ | ||
11 | #define TITAN_IRQ_WAN 2 /* eth0 (WAN) */ | ||
12 | #define TITAN_IRQ_LAN 5 /* eth1 (LAN) */ | ||
13 | #define TITAN_IRQ_MPCIA 8 /* mPCI A */ | ||
14 | #define TITAN_IRQ_MPCIB 11 /* mPCI B */ | ||
15 | #define TITAN_IRQ_USB 11 /* USB */ | ||
16 | |||
17 | #endif /* __ASM_SH_TITAN_H */ | ||
diff --git a/include/asm-sh/tlb.h b/include/asm-sh/tlb.h deleted file mode 100644 index 88ff1ae8a6b8..000000000000 --- a/include/asm-sh/tlb.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | #ifndef __ASM_SH_TLB_H | ||
2 | #define __ASM_SH_TLB_H | ||
3 | |||
4 | #ifdef CONFIG_SUPERH64 | ||
5 | # include "tlb_64.h" | ||
6 | #endif | ||
7 | |||
8 | #ifndef __ASSEMBLY__ | ||
9 | |||
10 | #define tlb_start_vma(tlb, vma) \ | ||
11 | flush_cache_range(vma, vma->vm_start, vma->vm_end) | ||
12 | |||
13 | #define tlb_end_vma(tlb, vma) \ | ||
14 | flush_tlb_range(vma, vma->vm_start, vma->vm_end) | ||
15 | |||
16 | #define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0) | ||
17 | |||
18 | /* | ||
19 | * Flush whole TLBs for MM | ||
20 | */ | ||
21 | #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) | ||
22 | |||
23 | #include <linux/pagemap.h> | ||
24 | #include <asm-generic/tlb.h> | ||
25 | |||
26 | #endif /* __ASSEMBLY__ */ | ||
27 | #endif /* __ASM_SH_TLB_H */ | ||
diff --git a/include/asm-sh/tlb_64.h b/include/asm-sh/tlb_64.h deleted file mode 100644 index 0a96f3af69e3..000000000000 --- a/include/asm-sh/tlb_64.h +++ /dev/null | |||
@@ -1,77 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/tlb_64.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Paul Mundt | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_SH_TLB_64_H | ||
11 | #define __ASM_SH_TLB_64_H | ||
12 | |||
13 | /* ITLB defines */ | ||
14 | #define ITLB_FIXED 0x00000000 /* First fixed ITLB, see head.S */ | ||
15 | #define ITLB_LAST_VAR_UNRESTRICTED 0x000003F0 /* Last ITLB */ | ||
16 | |||
17 | /* DTLB defines */ | ||
18 | #define DTLB_FIXED 0x00800000 /* First fixed DTLB, see head.S */ | ||
19 | #define DTLB_LAST_VAR_UNRESTRICTED 0x008003F0 /* Last DTLB */ | ||
20 | |||
21 | #ifndef __ASSEMBLY__ | ||
22 | |||
23 | /** | ||
24 | * for_each_dtlb_entry | ||
25 | * | ||
26 | * @tlb: TLB entry | ||
27 | * | ||
28 | * Iterate over free (non-wired) DTLB entries | ||
29 | */ | ||
30 | #define for_each_dtlb_entry(tlb) \ | ||
31 | for (tlb = cpu_data->dtlb.first; \ | ||
32 | tlb <= cpu_data->dtlb.last; \ | ||
33 | tlb += cpu_data->dtlb.step) | ||
34 | |||
35 | /** | ||
36 | * for_each_itlb_entry | ||
37 | * | ||
38 | * @tlb: TLB entry | ||
39 | * | ||
40 | * Iterate over free (non-wired) ITLB entries | ||
41 | */ | ||
42 | #define for_each_itlb_entry(tlb) \ | ||
43 | for (tlb = cpu_data->itlb.first; \ | ||
44 | tlb <= cpu_data->itlb.last; \ | ||
45 | tlb += cpu_data->itlb.step) | ||
46 | |||
47 | /** | ||
48 | * __flush_tlb_slot | ||
49 | * | ||
50 | * @slot: Address of TLB slot. | ||
51 | * | ||
52 | * Flushes TLB slot @slot. | ||
53 | */ | ||
54 | static inline void __flush_tlb_slot(unsigned long long slot) | ||
55 | { | ||
56 | __asm__ __volatile__ ("putcfg %0, 0, r63\n" : : "r" (slot)); | ||
57 | } | ||
58 | |||
59 | #ifdef CONFIG_MMU | ||
60 | /* arch/sh64/mm/tlb.c */ | ||
61 | int sh64_tlb_init(void); | ||
62 | unsigned long long sh64_next_free_dtlb_entry(void); | ||
63 | unsigned long long sh64_get_wired_dtlb_entry(void); | ||
64 | int sh64_put_wired_dtlb_entry(unsigned long long entry); | ||
65 | void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr, | ||
66 | unsigned long asid, unsigned long paddr); | ||
67 | void sh64_teardown_tlb_slot(unsigned long long config_addr); | ||
68 | #else | ||
69 | #define sh64_tlb_init() do { } while (0) | ||
70 | #define sh64_next_free_dtlb_entry() (0) | ||
71 | #define sh64_get_wired_dtlb_entry() (0) | ||
72 | #define sh64_put_wired_dtlb_entry(entry) do { } while (0) | ||
73 | #define sh64_setup_tlb_slot(conf, virt, asid, phys) do { } while (0) | ||
74 | #define sh64_teardown_tlb_slot(addr) do { } while (0) | ||
75 | #endif /* CONFIG_MMU */ | ||
76 | #endif /* __ASSEMBLY__ */ | ||
77 | #endif /* __ASM_SH_TLB_64_H */ | ||
diff --git a/include/asm-sh/tlbflush.h b/include/asm-sh/tlbflush.h deleted file mode 100644 index e0ac97221ae6..000000000000 --- a/include/asm-sh/tlbflush.h +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | #ifndef __ASM_SH_TLBFLUSH_H | ||
2 | #define __ASM_SH_TLBFLUSH_H | ||
3 | |||
4 | /* | ||
5 | * TLB flushing: | ||
6 | * | ||
7 | * - flush_tlb_all() flushes all processes TLBs | ||
8 | * - flush_tlb_mm(mm) flushes the specified mm context TLB's | ||
9 | * - flush_tlb_page(vma, vmaddr) flushes one page | ||
10 | * - flush_tlb_range(vma, start, end) flushes a range of pages | ||
11 | * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages | ||
12 | */ | ||
13 | extern void local_flush_tlb_all(void); | ||
14 | extern void local_flush_tlb_mm(struct mm_struct *mm); | ||
15 | extern void local_flush_tlb_range(struct vm_area_struct *vma, | ||
16 | unsigned long start, | ||
17 | unsigned long end); | ||
18 | extern void local_flush_tlb_page(struct vm_area_struct *vma, | ||
19 | unsigned long page); | ||
20 | extern void local_flush_tlb_kernel_range(unsigned long start, | ||
21 | unsigned long end); | ||
22 | extern void local_flush_tlb_one(unsigned long asid, unsigned long page); | ||
23 | |||
24 | #ifdef CONFIG_SMP | ||
25 | |||
26 | extern void flush_tlb_all(void); | ||
27 | extern void flush_tlb_mm(struct mm_struct *mm); | ||
28 | extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, | ||
29 | unsigned long end); | ||
30 | extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page); | ||
31 | extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); | ||
32 | extern void flush_tlb_one(unsigned long asid, unsigned long page); | ||
33 | |||
34 | #else | ||
35 | |||
36 | #define flush_tlb_all() local_flush_tlb_all() | ||
37 | #define flush_tlb_mm(mm) local_flush_tlb_mm(mm) | ||
38 | #define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page) | ||
39 | #define flush_tlb_one(asid, page) local_flush_tlb_one(asid, page) | ||
40 | |||
41 | #define flush_tlb_range(vma, start, end) \ | ||
42 | local_flush_tlb_range(vma, start, end) | ||
43 | |||
44 | #define flush_tlb_kernel_range(start, end) \ | ||
45 | local_flush_tlb_kernel_range(start, end) | ||
46 | |||
47 | #endif /* CONFIG_SMP */ | ||
48 | |||
49 | #endif /* __ASM_SH_TLBFLUSH_H */ | ||
diff --git a/include/asm-sh/topology.h b/include/asm-sh/topology.h deleted file mode 100644 index 95f0085e098a..000000000000 --- a/include/asm-sh/topology.h +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | #ifndef _ASM_SH_TOPOLOGY_H | ||
2 | #define _ASM_SH_TOPOLOGY_H | ||
3 | |||
4 | #ifdef CONFIG_NUMA | ||
5 | |||
6 | /* sched_domains SD_NODE_INIT for sh machines */ | ||
7 | #define SD_NODE_INIT (struct sched_domain) { \ | ||
8 | .span = CPU_MASK_NONE, \ | ||
9 | .parent = NULL, \ | ||
10 | .child = NULL, \ | ||
11 | .groups = NULL, \ | ||
12 | .min_interval = 8, \ | ||
13 | .max_interval = 32, \ | ||
14 | .busy_factor = 32, \ | ||
15 | .imbalance_pct = 125, \ | ||
16 | .cache_nice_tries = 2, \ | ||
17 | .busy_idx = 3, \ | ||
18 | .idle_idx = 2, \ | ||
19 | .newidle_idx = 2, \ | ||
20 | .wake_idx = 1, \ | ||
21 | .forkexec_idx = 1, \ | ||
22 | .flags = SD_LOAD_BALANCE \ | ||
23 | | SD_BALANCE_FORK \ | ||
24 | | SD_BALANCE_EXEC \ | ||
25 | | SD_SERIALIZE \ | ||
26 | | SD_WAKE_BALANCE, \ | ||
27 | .last_balance = jiffies, \ | ||
28 | .balance_interval = 1, \ | ||
29 | .nr_balance_failed = 0, \ | ||
30 | } | ||
31 | |||
32 | #define cpu_to_node(cpu) ((void)(cpu),0) | ||
33 | #define parent_node(node) ((void)(node),0) | ||
34 | |||
35 | #define node_to_cpumask(node) ((void)node, cpu_online_map) | ||
36 | #define node_to_first_cpu(node) ((void)(node),0) | ||
37 | |||
38 | #define pcibus_to_node(bus) ((void)(bus), -1) | ||
39 | #define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \ | ||
40 | CPU_MASK_ALL : \ | ||
41 | node_to_cpumask(pcibus_to_node(bus)) \ | ||
42 | ) | ||
43 | #endif | ||
44 | |||
45 | #include <asm-generic/topology.h> | ||
46 | |||
47 | #endif /* _ASM_SH_TOPOLOGY_H */ | ||
diff --git a/include/asm-sh/types.h b/include/asm-sh/types.h deleted file mode 100644 index beea4e6f8dfd..000000000000 --- a/include/asm-sh/types.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | #ifndef __ASM_SH_TYPES_H | ||
2 | #define __ASM_SH_TYPES_H | ||
3 | |||
4 | #include <asm-generic/int-ll64.h> | ||
5 | |||
6 | #ifndef __ASSEMBLY__ | ||
7 | |||
8 | typedef unsigned short umode_t; | ||
9 | |||
10 | #endif /* __ASSEMBLY__ */ | ||
11 | |||
12 | /* | ||
13 | * These aren't exported outside the kernel to avoid name space clashes | ||
14 | */ | ||
15 | #ifdef __KERNEL__ | ||
16 | |||
17 | #define BITS_PER_LONG 32 | ||
18 | |||
19 | #ifndef __ASSEMBLY__ | ||
20 | |||
21 | /* Dma addresses are 32-bits wide. */ | ||
22 | |||
23 | typedef u32 dma_addr_t; | ||
24 | |||
25 | #ifdef CONFIG_SUPERH32 | ||
26 | typedef u16 opcode_t; | ||
27 | #else | ||
28 | typedef u32 opcode_t; | ||
29 | #endif | ||
30 | |||
31 | #endif /* __ASSEMBLY__ */ | ||
32 | |||
33 | #endif /* __KERNEL__ */ | ||
34 | |||
35 | #endif /* __ASM_SH_TYPES_H */ | ||
diff --git a/include/asm-sh/uaccess.h b/include/asm-sh/uaccess.h deleted file mode 100644 index 45c2c9b2993d..000000000000 --- a/include/asm-sh/uaccess.h +++ /dev/null | |||
@@ -1,256 +0,0 @@ | |||
1 | #ifndef __ASM_SH_UACCESS_H | ||
2 | #define __ASM_SH_UACCESS_H | ||
3 | |||
4 | #include <linux/errno.h> | ||
5 | #include <linux/sched.h> | ||
6 | #include <asm/segment.h> | ||
7 | |||
8 | #define VERIFY_READ 0 | ||
9 | #define VERIFY_WRITE 1 | ||
10 | |||
11 | #define __addr_ok(addr) \ | ||
12 | ((unsigned long __force)(addr) < current_thread_info()->addr_limit.seg) | ||
13 | |||
14 | /* | ||
15 | * __access_ok: Check if address with size is OK or not. | ||
16 | * | ||
17 | * Uhhuh, this needs 33-bit arithmetic. We have a carry.. | ||
18 | * | ||
19 | * sum := addr + size; carry? --> flag = true; | ||
20 | * if (sum >= addr_limit) flag = true; | ||
21 | */ | ||
22 | #define __access_ok(addr, size) \ | ||
23 | (__addr_ok((addr) + (size))) | ||
24 | #define access_ok(type, addr, size) \ | ||
25 | (__chk_user_ptr(addr), \ | ||
26 | __access_ok((unsigned long __force)(addr), (size))) | ||
27 | |||
28 | /* | ||
29 | * Uh, these should become the main single-value transfer routines ... | ||
30 | * They automatically use the right size if we just have the right | ||
31 | * pointer type ... | ||
32 | * | ||
33 | * As SuperH uses the same address space for kernel and user data, we | ||
34 | * can just do these as direct assignments. | ||
35 | * | ||
36 | * Careful to not | ||
37 | * (a) re-use the arguments for side effects (sizeof is ok) | ||
38 | * (b) require any knowledge of processes at this stage | ||
39 | */ | ||
40 | #define put_user(x,ptr) __put_user_check((x), (ptr), sizeof(*(ptr))) | ||
41 | #define get_user(x,ptr) __get_user_check((x), (ptr), sizeof(*(ptr))) | ||
42 | |||
43 | /* | ||
44 | * The "__xxx" versions do not do address space checking, useful when | ||
45 | * doing multiple accesses to the same area (the user has to do the | ||
46 | * checks by hand with "access_ok()") | ||
47 | */ | ||
48 | #define __put_user(x,ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr))) | ||
49 | #define __get_user(x,ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) | ||
50 | |||
51 | struct __large_struct { unsigned long buf[100]; }; | ||
52 | #define __m(x) (*(struct __large_struct __user *)(x)) | ||
53 | |||
54 | #define __get_user_nocheck(x,ptr,size) \ | ||
55 | ({ \ | ||
56 | long __gu_err; \ | ||
57 | unsigned long __gu_val; \ | ||
58 | const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ | ||
59 | __chk_user_ptr(ptr); \ | ||
60 | __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ | ||
61 | (x) = (__typeof__(*(ptr)))__gu_val; \ | ||
62 | __gu_err; \ | ||
63 | }) | ||
64 | |||
65 | #define __get_user_check(x,ptr,size) \ | ||
66 | ({ \ | ||
67 | long __gu_err = -EFAULT; \ | ||
68 | unsigned long __gu_val = 0; \ | ||
69 | const __typeof__(*(ptr)) *__gu_addr = (ptr); \ | ||
70 | if (likely(access_ok(VERIFY_READ, __gu_addr, (size)))) \ | ||
71 | __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ | ||
72 | (x) = (__typeof__(*(ptr)))__gu_val; \ | ||
73 | __gu_err; \ | ||
74 | }) | ||
75 | |||
76 | #define __put_user_nocheck(x,ptr,size) \ | ||
77 | ({ \ | ||
78 | long __pu_err; \ | ||
79 | __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ | ||
80 | __chk_user_ptr(ptr); \ | ||
81 | __put_user_size((x), __pu_addr, (size), __pu_err); \ | ||
82 | __pu_err; \ | ||
83 | }) | ||
84 | |||
85 | #define __put_user_check(x,ptr,size) \ | ||
86 | ({ \ | ||
87 | long __pu_err = -EFAULT; \ | ||
88 | __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ | ||
89 | if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) \ | ||
90 | __put_user_size((x), __pu_addr, (size), \ | ||
91 | __pu_err); \ | ||
92 | __pu_err; \ | ||
93 | }) | ||
94 | |||
95 | #ifdef CONFIG_SUPERH32 | ||
96 | # include "uaccess_32.h" | ||
97 | #else | ||
98 | # include "uaccess_64.h" | ||
99 | #endif | ||
100 | |||
101 | /* Generic arbitrary sized copy. */ | ||
102 | /* Return the number of bytes NOT copied */ | ||
103 | __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); | ||
104 | |||
105 | static __always_inline unsigned long | ||
106 | __copy_from_user(void *to, const void __user *from, unsigned long n) | ||
107 | { | ||
108 | return __copy_user(to, (__force void *)from, n); | ||
109 | } | ||
110 | |||
111 | static __always_inline unsigned long __must_check | ||
112 | __copy_to_user(void __user *to, const void *from, unsigned long n) | ||
113 | { | ||
114 | return __copy_user((__force void *)to, from, n); | ||
115 | } | ||
116 | |||
117 | #define __copy_to_user_inatomic __copy_to_user | ||
118 | #define __copy_from_user_inatomic __copy_from_user | ||
119 | |||
120 | /* | ||
121 | * Clear the area and return remaining number of bytes | ||
122 | * (on failure. Usually it's 0.) | ||
123 | */ | ||
124 | __kernel_size_t __clear_user(void *addr, __kernel_size_t size); | ||
125 | |||
126 | #define clear_user(addr,n) \ | ||
127 | ({ \ | ||
128 | void __user * __cl_addr = (addr); \ | ||
129 | unsigned long __cl_size = (n); \ | ||
130 | \ | ||
131 | if (__cl_size && access_ok(VERIFY_WRITE, \ | ||
132 | ((unsigned long)(__cl_addr)), __cl_size)) \ | ||
133 | __cl_size = __clear_user(__cl_addr, __cl_size); \ | ||
134 | \ | ||
135 | __cl_size; \ | ||
136 | }) | ||
137 | |||
138 | /** | ||
139 | * strncpy_from_user: - Copy a NUL terminated string from userspace. | ||
140 | * @dst: Destination address, in kernel space. This buffer must be at | ||
141 | * least @count bytes long. | ||
142 | * @src: Source address, in user space. | ||
143 | * @count: Maximum number of bytes to copy, including the trailing NUL. | ||
144 | * | ||
145 | * Copies a NUL-terminated string from userspace to kernel space. | ||
146 | * | ||
147 | * On success, returns the length of the string (not including the trailing | ||
148 | * NUL). | ||
149 | * | ||
150 | * If access to userspace fails, returns -EFAULT (some data may have been | ||
151 | * copied). | ||
152 | * | ||
153 | * If @count is smaller than the length of the string, copies @count bytes | ||
154 | * and returns @count. | ||
155 | */ | ||
156 | #define strncpy_from_user(dest,src,count) \ | ||
157 | ({ \ | ||
158 | unsigned long __sfu_src = (unsigned long)(src); \ | ||
159 | int __sfu_count = (int)(count); \ | ||
160 | long __sfu_res = -EFAULT; \ | ||
161 | \ | ||
162 | if (__access_ok(__sfu_src, __sfu_count)) \ | ||
163 | __sfu_res = __strncpy_from_user((unsigned long)(dest), \ | ||
164 | __sfu_src, __sfu_count); \ | ||
165 | \ | ||
166 | __sfu_res; \ | ||
167 | }) | ||
168 | |||
169 | static inline unsigned long | ||
170 | copy_from_user(void *to, const void __user *from, unsigned long n) | ||
171 | { | ||
172 | unsigned long __copy_from = (unsigned long) from; | ||
173 | __kernel_size_t __copy_size = (__kernel_size_t) n; | ||
174 | |||
175 | if (__copy_size && __access_ok(__copy_from, __copy_size)) | ||
176 | return __copy_user(to, from, __copy_size); | ||
177 | |||
178 | return __copy_size; | ||
179 | } | ||
180 | |||
181 | static inline unsigned long | ||
182 | copy_to_user(void __user *to, const void *from, unsigned long n) | ||
183 | { | ||
184 | unsigned long __copy_to = (unsigned long) to; | ||
185 | __kernel_size_t __copy_size = (__kernel_size_t) n; | ||
186 | |||
187 | if (__copy_size && __access_ok(__copy_to, __copy_size)) | ||
188 | return __copy_user(to, from, __copy_size); | ||
189 | |||
190 | return __copy_size; | ||
191 | } | ||
192 | |||
193 | /** | ||
194 | * strnlen_user: - Get the size of a string in user space. | ||
195 | * @s: The string to measure. | ||
196 | * @n: The maximum valid length | ||
197 | * | ||
198 | * Context: User context only. This function may sleep. | ||
199 | * | ||
200 | * Get the size of a NUL-terminated string in user space. | ||
201 | * | ||
202 | * Returns the size of the string INCLUDING the terminating NUL. | ||
203 | * On exception, returns 0. | ||
204 | * If the string is too long, returns a value greater than @n. | ||
205 | */ | ||
206 | static inline long strnlen_user(const char __user *s, long n) | ||
207 | { | ||
208 | if (!__addr_ok(s)) | ||
209 | return 0; | ||
210 | else | ||
211 | return __strnlen_user(s, n); | ||
212 | } | ||
213 | |||
214 | /** | ||
215 | * strlen_user: - Get the size of a string in user space. | ||
216 | * @str: The string to measure. | ||
217 | * | ||
218 | * Context: User context only. This function may sleep. | ||
219 | * | ||
220 | * Get the size of a NUL-terminated string in user space. | ||
221 | * | ||
222 | * Returns the size of the string INCLUDING the terminating NUL. | ||
223 | * On exception, returns 0. | ||
224 | * | ||
225 | * If there is a limit on the length of a valid string, you may wish to | ||
226 | * consider using strnlen_user() instead. | ||
227 | */ | ||
228 | #define strlen_user(str) strnlen_user(str, ~0UL >> 1) | ||
229 | |||
230 | /* | ||
231 | * The exception table consists of pairs of addresses: the first is the | ||
232 | * address of an instruction that is allowed to fault, and the second is | ||
233 | * the address at which the program should continue. No registers are | ||
234 | * modified, so it is entirely up to the continuation code to figure out | ||
235 | * what to do. | ||
236 | * | ||
237 | * All the routines below use bits of fixup code that are out of line | ||
238 | * with the main instruction path. This means when everything is well, | ||
239 | * we don't even have to jump over them. Further, they do not intrude | ||
240 | * on our cache or tlb entries. | ||
241 | */ | ||
242 | struct exception_table_entry { | ||
243 | unsigned long insn, fixup; | ||
244 | }; | ||
245 | |||
246 | #if defined(CONFIG_SUPERH64) && defined(CONFIG_MMU) | ||
247 | #define ARCH_HAS_SEARCH_EXTABLE | ||
248 | #endif | ||
249 | |||
250 | int fixup_exception(struct pt_regs *regs); | ||
251 | /* Returns 0 if exception not found and fixup.unit otherwise. */ | ||
252 | unsigned long search_exception_table(unsigned long addr); | ||
253 | const struct exception_table_entry *search_exception_tables(unsigned long addr); | ||
254 | |||
255 | |||
256 | #endif /* __ASM_SH_UACCESS_H */ | ||
diff --git a/include/asm-sh/uaccess_32.h b/include/asm-sh/uaccess_32.h deleted file mode 100644 index 892fd6dea9db..000000000000 --- a/include/asm-sh/uaccess_32.h +++ /dev/null | |||
@@ -1,249 +0,0 @@ | |||
1 | /* | ||
2 | * User space memory access functions | ||
3 | * | ||
4 | * Copyright (C) 1999, 2002 Niibe Yutaka | ||
5 | * Copyright (C) 2003 - 2008 Paul Mundt | ||
6 | * | ||
7 | * Based on: | ||
8 | * MIPS implementation version 1.15 by | ||
9 | * Copyright (C) 1996, 1997, 1998 by Ralf Baechle | ||
10 | * and i386 version. | ||
11 | */ | ||
12 | #ifndef __ASM_SH_UACCESS_32_H | ||
13 | #define __ASM_SH_UACCESS_32_H | ||
14 | |||
15 | #define __get_user_size(x,ptr,size,retval) \ | ||
16 | do { \ | ||
17 | retval = 0; \ | ||
18 | switch (size) { \ | ||
19 | case 1: \ | ||
20 | __get_user_asm(x, ptr, retval, "b"); \ | ||
21 | break; \ | ||
22 | case 2: \ | ||
23 | __get_user_asm(x, ptr, retval, "w"); \ | ||
24 | break; \ | ||
25 | case 4: \ | ||
26 | __get_user_asm(x, ptr, retval, "l"); \ | ||
27 | break; \ | ||
28 | default: \ | ||
29 | __get_user_unknown(); \ | ||
30 | break; \ | ||
31 | } \ | ||
32 | } while (0) | ||
33 | |||
34 | #ifdef CONFIG_MMU | ||
35 | #define __get_user_asm(x, addr, err, insn) \ | ||
36 | ({ \ | ||
37 | __asm__ __volatile__( \ | ||
38 | "1:\n\t" \ | ||
39 | "mov." insn " %2, %1\n\t" \ | ||
40 | "2:\n" \ | ||
41 | ".section .fixup,\"ax\"\n" \ | ||
42 | "3:\n\t" \ | ||
43 | "mov #0, %1\n\t" \ | ||
44 | "mov.l 4f, %0\n\t" \ | ||
45 | "jmp @%0\n\t" \ | ||
46 | " mov %3, %0\n\t" \ | ||
47 | ".balign 4\n" \ | ||
48 | "4: .long 2b\n\t" \ | ||
49 | ".previous\n" \ | ||
50 | ".section __ex_table,\"a\"\n\t" \ | ||
51 | ".long 1b, 3b\n\t" \ | ||
52 | ".previous" \ | ||
53 | :"=&r" (err), "=&r" (x) \ | ||
54 | :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); }) | ||
55 | #else | ||
56 | #define __get_user_asm(x, addr, err, insn) \ | ||
57 | do { \ | ||
58 | __asm__ __volatile__ ( \ | ||
59 | "mov." insn " %1, %0\n\t" \ | ||
60 | : "=&r" (x) \ | ||
61 | : "m" (__m(addr)) \ | ||
62 | ); \ | ||
63 | } while (0) | ||
64 | #endif /* CONFIG_MMU */ | ||
65 | |||
66 | extern void __get_user_unknown(void); | ||
67 | |||
68 | #define __put_user_size(x,ptr,size,retval) \ | ||
69 | do { \ | ||
70 | retval = 0; \ | ||
71 | switch (size) { \ | ||
72 | case 1: \ | ||
73 | __put_user_asm(x, ptr, retval, "b"); \ | ||
74 | break; \ | ||
75 | case 2: \ | ||
76 | __put_user_asm(x, ptr, retval, "w"); \ | ||
77 | break; \ | ||
78 | case 4: \ | ||
79 | __put_user_asm((u32)x, ptr, \ | ||
80 | retval, "l"); \ | ||
81 | break; \ | ||
82 | case 8: \ | ||
83 | __put_user_u64(x, ptr, retval); \ | ||
84 | break; \ | ||
85 | default: \ | ||
86 | __put_user_unknown(); \ | ||
87 | } \ | ||
88 | } while (0) | ||
89 | |||
90 | #ifdef CONFIG_MMU | ||
91 | #define __put_user_asm(x, addr, err, insn) \ | ||
92 | do { \ | ||
93 | __asm__ __volatile__ ( \ | ||
94 | "1:\n\t" \ | ||
95 | "mov." insn " %1, %2\n\t" \ | ||
96 | "2:\n" \ | ||
97 | ".section .fixup,\"ax\"\n" \ | ||
98 | "3:\n\t" \ | ||
99 | "mov.l 4f, %0\n\t" \ | ||
100 | "jmp @%0\n\t" \ | ||
101 | " mov %3, %0\n\t" \ | ||
102 | ".balign 4\n" \ | ||
103 | "4: .long 2b\n\t" \ | ||
104 | ".previous\n" \ | ||
105 | ".section __ex_table,\"a\"\n\t" \ | ||
106 | ".long 1b, 3b\n\t" \ | ||
107 | ".previous" \ | ||
108 | : "=&r" (err) \ | ||
109 | : "r" (x), "m" (__m(addr)), "i" (-EFAULT), \ | ||
110 | "0" (err) \ | ||
111 | : "memory" \ | ||
112 | ); \ | ||
113 | } while (0) | ||
114 | #else | ||
115 | #define __put_user_asm(x, addr, err, insn) \ | ||
116 | do { \ | ||
117 | __asm__ __volatile__ ( \ | ||
118 | "mov." insn " %0, %1\n\t" \ | ||
119 | : /* no outputs */ \ | ||
120 | : "r" (x), "m" (__m(addr)) \ | ||
121 | : "memory" \ | ||
122 | ); \ | ||
123 | } while (0) | ||
124 | #endif /* CONFIG_MMU */ | ||
125 | |||
126 | #if defined(CONFIG_CPU_LITTLE_ENDIAN) | ||
127 | #define __put_user_u64(val,addr,retval) \ | ||
128 | ({ \ | ||
129 | __asm__ __volatile__( \ | ||
130 | "1:\n\t" \ | ||
131 | "mov.l %R1,%2\n\t" \ | ||
132 | "mov.l %S1,%T2\n\t" \ | ||
133 | "2:\n" \ | ||
134 | ".section .fixup,\"ax\"\n" \ | ||
135 | "3:\n\t" \ | ||
136 | "mov.l 4f,%0\n\t" \ | ||
137 | "jmp @%0\n\t" \ | ||
138 | " mov %3,%0\n\t" \ | ||
139 | ".balign 4\n" \ | ||
140 | "4: .long 2b\n\t" \ | ||
141 | ".previous\n" \ | ||
142 | ".section __ex_table,\"a\"\n\t" \ | ||
143 | ".long 1b, 3b\n\t" \ | ||
144 | ".previous" \ | ||
145 | : "=r" (retval) \ | ||
146 | : "r" (val), "m" (__m(addr)), "i" (-EFAULT), "0" (retval) \ | ||
147 | : "memory"); }) | ||
148 | #else | ||
149 | #define __put_user_u64(val,addr,retval) \ | ||
150 | ({ \ | ||
151 | __asm__ __volatile__( \ | ||
152 | "1:\n\t" \ | ||
153 | "mov.l %S1,%2\n\t" \ | ||
154 | "mov.l %R1,%T2\n\t" \ | ||
155 | "2:\n" \ | ||
156 | ".section .fixup,\"ax\"\n" \ | ||
157 | "3:\n\t" \ | ||
158 | "mov.l 4f,%0\n\t" \ | ||
159 | "jmp @%0\n\t" \ | ||
160 | " mov %3,%0\n\t" \ | ||
161 | ".balign 4\n" \ | ||
162 | "4: .long 2b\n\t" \ | ||
163 | ".previous\n" \ | ||
164 | ".section __ex_table,\"a\"\n\t" \ | ||
165 | ".long 1b, 3b\n\t" \ | ||
166 | ".previous" \ | ||
167 | : "=r" (retval) \ | ||
168 | : "r" (val), "m" (__m(addr)), "i" (-EFAULT), "0" (retval) \ | ||
169 | : "memory"); }) | ||
170 | #endif | ||
171 | |||
172 | extern void __put_user_unknown(void); | ||
173 | |||
174 | static inline int | ||
175 | __strncpy_from_user(unsigned long __dest, unsigned long __user __src, int __count) | ||
176 | { | ||
177 | __kernel_size_t res; | ||
178 | unsigned long __dummy, _d, _s, _c; | ||
179 | |||
180 | __asm__ __volatile__( | ||
181 | "9:\n" | ||
182 | "mov.b @%2+, %1\n\t" | ||
183 | "cmp/eq #0, %1\n\t" | ||
184 | "bt/s 2f\n" | ||
185 | "1:\n" | ||
186 | "mov.b %1, @%3\n\t" | ||
187 | "dt %4\n\t" | ||
188 | "bf/s 9b\n\t" | ||
189 | " add #1, %3\n\t" | ||
190 | "2:\n\t" | ||
191 | "sub %4, %0\n" | ||
192 | "3:\n" | ||
193 | ".section .fixup,\"ax\"\n" | ||
194 | "4:\n\t" | ||
195 | "mov.l 5f, %1\n\t" | ||
196 | "jmp @%1\n\t" | ||
197 | " mov %9, %0\n\t" | ||
198 | ".balign 4\n" | ||
199 | "5: .long 3b\n" | ||
200 | ".previous\n" | ||
201 | ".section __ex_table,\"a\"\n" | ||
202 | " .balign 4\n" | ||
203 | " .long 9b,4b\n" | ||
204 | ".previous" | ||
205 | : "=r" (res), "=&z" (__dummy), "=r" (_s), "=r" (_d), "=r"(_c) | ||
206 | : "0" (__count), "2" (__src), "3" (__dest), "4" (__count), | ||
207 | "i" (-EFAULT) | ||
208 | : "memory", "t"); | ||
209 | |||
210 | return res; | ||
211 | } | ||
212 | |||
213 | /* | ||
214 | * Return the size of a string (including the ending 0 even when we have | ||
215 | * exceeded the maximum string length). | ||
216 | */ | ||
217 | static inline long __strnlen_user(const char __user *__s, long __n) | ||
218 | { | ||
219 | unsigned long res; | ||
220 | unsigned long __dummy; | ||
221 | |||
222 | __asm__ __volatile__( | ||
223 | "1:\t" | ||
224 | "mov.b @(%0,%3), %1\n\t" | ||
225 | "cmp/eq %4, %0\n\t" | ||
226 | "bt/s 2f\n\t" | ||
227 | " add #1, %0\n\t" | ||
228 | "tst %1, %1\n\t" | ||
229 | "bf 1b\n\t" | ||
230 | "2:\n" | ||
231 | ".section .fixup,\"ax\"\n" | ||
232 | "3:\n\t" | ||
233 | "mov.l 4f, %1\n\t" | ||
234 | "jmp @%1\n\t" | ||
235 | " mov #0, %0\n" | ||
236 | ".balign 4\n" | ||
237 | "4: .long 2b\n" | ||
238 | ".previous\n" | ||
239 | ".section __ex_table,\"a\"\n" | ||
240 | " .balign 4\n" | ||
241 | " .long 1b,3b\n" | ||
242 | ".previous" | ||
243 | : "=z" (res), "=&r" (__dummy) | ||
244 | : "0" (0), "r" (__s), "r" (__n) | ||
245 | : "t"); | ||
246 | return res; | ||
247 | } | ||
248 | |||
249 | #endif /* __ASM_SH_UACCESS_32_H */ | ||
diff --git a/include/asm-sh/uaccess_64.h b/include/asm-sh/uaccess_64.h deleted file mode 100644 index 81b3d515fcb3..000000000000 --- a/include/asm-sh/uaccess_64.h +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | #ifndef __ASM_SH_UACCESS_64_H | ||
2 | #define __ASM_SH_UACCESS_64_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-sh/uaccess_64.h | ||
6 | * | ||
7 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
8 | * Copyright (C) 2003, 2004 Paul Mundt | ||
9 | * | ||
10 | * User space memory access functions | ||
11 | * | ||
12 | * Copyright (C) 1999 Niibe Yutaka | ||
13 | * | ||
14 | * Based on: | ||
15 | * MIPS implementation version 1.15 by | ||
16 | * Copyright (C) 1996, 1997, 1998 by Ralf Baechle | ||
17 | * and i386 version. | ||
18 | * | ||
19 | * This file is subject to the terms and conditions of the GNU General Public | ||
20 | * License. See the file "COPYING" in the main directory of this archive | ||
21 | * for more details. | ||
22 | */ | ||
23 | |||
24 | #define __get_user_size(x,ptr,size,retval) \ | ||
25 | do { \ | ||
26 | retval = 0; \ | ||
27 | switch (size) { \ | ||
28 | case 1: \ | ||
29 | retval = __get_user_asm_b(x, ptr); \ | ||
30 | break; \ | ||
31 | case 2: \ | ||
32 | retval = __get_user_asm_w(x, ptr); \ | ||
33 | break; \ | ||
34 | case 4: \ | ||
35 | retval = __get_user_asm_l(x, ptr); \ | ||
36 | break; \ | ||
37 | case 8: \ | ||
38 | retval = __get_user_asm_q(x, ptr); \ | ||
39 | break; \ | ||
40 | default: \ | ||
41 | __get_user_unknown(); \ | ||
42 | break; \ | ||
43 | } \ | ||
44 | } while (0) | ||
45 | |||
46 | extern long __get_user_asm_b(void *, long); | ||
47 | extern long __get_user_asm_w(void *, long); | ||
48 | extern long __get_user_asm_l(void *, long); | ||
49 | extern long __get_user_asm_q(void *, long); | ||
50 | extern void __get_user_unknown(void); | ||
51 | |||
52 | #define __put_user_size(x,ptr,size,retval) \ | ||
53 | do { \ | ||
54 | retval = 0; \ | ||
55 | switch (size) { \ | ||
56 | case 1: \ | ||
57 | retval = __put_user_asm_b(x, ptr); \ | ||
58 | break; \ | ||
59 | case 2: \ | ||
60 | retval = __put_user_asm_w(x, ptr); \ | ||
61 | break; \ | ||
62 | case 4: \ | ||
63 | retval = __put_user_asm_l(x, ptr); \ | ||
64 | break; \ | ||
65 | case 8: \ | ||
66 | retval = __put_user_asm_q(x, ptr); \ | ||
67 | break; \ | ||
68 | default: \ | ||
69 | __put_user_unknown(); \ | ||
70 | } \ | ||
71 | } while (0) | ||
72 | |||
73 | extern long __put_user_asm_b(void *, long); | ||
74 | extern long __put_user_asm_w(void *, long); | ||
75 | extern long __put_user_asm_l(void *, long); | ||
76 | extern long __put_user_asm_q(void *, long); | ||
77 | extern void __put_user_unknown(void); | ||
78 | |||
79 | #endif /* __ASM_SH_UACCESS_64_H */ | ||
diff --git a/include/asm-sh/ubc.h b/include/asm-sh/ubc.h deleted file mode 100644 index 56f4e30dc49c..000000000000 --- a/include/asm-sh/ubc.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/ubc.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * Copyright (C) 2002, 2003 Paul Mundt | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General Public | ||
8 | * License. See the file "COPYING" in the main directory of this archive | ||
9 | * for more details. | ||
10 | */ | ||
11 | #ifndef __ASM_SH_UBC_H | ||
12 | #define __ASM_SH_UBC_H | ||
13 | #ifdef __KERNEL__ | ||
14 | |||
15 | #include <asm/cpu/ubc.h> | ||
16 | |||
17 | /* User Break Controller */ | ||
18 | #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) | ||
19 | #define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729) | ||
20 | #else | ||
21 | #define UBC_TYPE_SH7729 0 | ||
22 | #endif | ||
23 | |||
24 | #define BAMR_ASID (1 << 2) | ||
25 | #define BAMR_NONE 0 | ||
26 | #define BAMR_10 0x1 | ||
27 | #define BAMR_12 0x2 | ||
28 | #define BAMR_ALL 0x3 | ||
29 | #define BAMR_16 0x8 | ||
30 | #define BAMR_20 0x9 | ||
31 | |||
32 | #define BBR_INST (1 << 4) | ||
33 | #define BBR_DATA (2 << 4) | ||
34 | #define BBR_READ (1 << 2) | ||
35 | #define BBR_WRITE (2 << 2) | ||
36 | #define BBR_BYTE 0x1 | ||
37 | #define BBR_HALF 0x2 | ||
38 | #define BBR_LONG 0x3 | ||
39 | #define BBR_QUAD (1 << 6) /* SH7750 */ | ||
40 | #define BBR_CPU (1 << 6) /* SH7709A,SH7729 */ | ||
41 | #define BBR_DMA (2 << 6) /* SH7709A,SH7729 */ | ||
42 | |||
43 | #define BRCR_CMFA (1 << 15) | ||
44 | #define BRCR_CMFB (1 << 14) | ||
45 | #define BRCR_PCTE (1 << 11) | ||
46 | #define BRCR_PCBA (1 << 10) /* 1: after execution */ | ||
47 | #define BRCR_DBEB (1 << 7) | ||
48 | #define BRCR_PCBB (1 << 6) | ||
49 | #define BRCR_SEQ (1 << 3) | ||
50 | #define BRCR_UBDE (1 << 0) | ||
51 | |||
52 | #ifndef __ASSEMBLY__ | ||
53 | /* arch/sh/kernel/cpu/ubc.S */ | ||
54 | extern void ubc_sleep(void); | ||
55 | |||
56 | #ifdef CONFIG_UBC_WAKEUP | ||
57 | extern void ubc_wakeup(void); | ||
58 | #else | ||
59 | #define ubc_wakeup() do { } while (0) | ||
60 | #endif | ||
61 | #endif | ||
62 | |||
63 | #endif /* __KERNEL__ */ | ||
64 | #endif /* __ASM_SH_UBC_H */ | ||
diff --git a/include/asm-sh/ucontext.h b/include/asm-sh/ucontext.h deleted file mode 100644 index 202ef1d5a3c4..000000000000 --- a/include/asm-sh/ucontext.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef __ASM_SH_UCONTEXT_H | ||
2 | #define __ASM_SH_UCONTEXT_H | ||
3 | |||
4 | struct ucontext { | ||
5 | unsigned long uc_flags; | ||
6 | struct ucontext *uc_link; | ||
7 | stack_t uc_stack; | ||
8 | struct sigcontext uc_mcontext; | ||
9 | sigset_t uc_sigmask; /* mask last for extensibility */ | ||
10 | }; | ||
11 | |||
12 | #endif /* __ASM_SH_UCONTEXT_H */ | ||
diff --git a/include/asm-sh/unaligned.h b/include/asm-sh/unaligned.h deleted file mode 100644 index c1641a01d50f..000000000000 --- a/include/asm-sh/unaligned.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | #ifndef _ASM_SH_UNALIGNED_H | ||
2 | #define _ASM_SH_UNALIGNED_H | ||
3 | |||
4 | /* SH can't handle unaligned accesses. */ | ||
5 | #ifdef __LITTLE_ENDIAN__ | ||
6 | # include <linux/unaligned/le_struct.h> | ||
7 | # include <linux/unaligned/be_byteshift.h> | ||
8 | # include <linux/unaligned/generic.h> | ||
9 | # define get_unaligned __get_unaligned_le | ||
10 | # define put_unaligned __put_unaligned_le | ||
11 | #else | ||
12 | # include <linux/unaligned/be_struct.h> | ||
13 | # include <linux/unaligned/le_byteshift.h> | ||
14 | # include <linux/unaligned/generic.h> | ||
15 | # define get_unaligned __get_unaligned_be | ||
16 | # define put_unaligned __put_unaligned_be | ||
17 | #endif | ||
18 | |||
19 | #endif /* _ASM_SH_UNALIGNED_H */ | ||
diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h deleted file mode 100644 index 65be656ead7d..000000000000 --- a/include/asm-sh/unistd.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifdef __KERNEL__ | ||
2 | # ifdef CONFIG_SUPERH32 | ||
3 | # include "unistd_32.h" | ||
4 | # else | ||
5 | # include "unistd_64.h" | ||
6 | # endif | ||
7 | #else | ||
8 | # ifdef __SH5__ | ||
9 | # include "unistd_64.h" | ||
10 | # else | ||
11 | # include "unistd_32.h" | ||
12 | # endif | ||
13 | #endif | ||
diff --git a/include/asm-sh/unistd_32.h b/include/asm-sh/unistd_32.h deleted file mode 100644 index d52c000cf924..000000000000 --- a/include/asm-sh/unistd_32.h +++ /dev/null | |||
@@ -1,384 +0,0 @@ | |||
1 | #ifndef __ASM_SH_UNISTD_H | ||
2 | #define __ASM_SH_UNISTD_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 1999 Niibe Yutaka | ||
6 | */ | ||
7 | |||
8 | /* | ||
9 | * This file contains the system call numbers. | ||
10 | */ | ||
11 | |||
12 | #define __NR_restart_syscall 0 | ||
13 | #define __NR_exit 1 | ||
14 | #define __NR_fork 2 | ||
15 | #define __NR_read 3 | ||
16 | #define __NR_write 4 | ||
17 | #define __NR_open 5 | ||
18 | #define __NR_close 6 | ||
19 | #define __NR_waitpid 7 | ||
20 | #define __NR_creat 8 | ||
21 | #define __NR_link 9 | ||
22 | #define __NR_unlink 10 | ||
23 | #define __NR_execve 11 | ||
24 | #define __NR_chdir 12 | ||
25 | #define __NR_time 13 | ||
26 | #define __NR_mknod 14 | ||
27 | #define __NR_chmod 15 | ||
28 | #define __NR_lchown 16 | ||
29 | #define __NR_break 17 | ||
30 | #define __NR_oldstat 18 | ||
31 | #define __NR_lseek 19 | ||
32 | #define __NR_getpid 20 | ||
33 | #define __NR_mount 21 | ||
34 | #define __NR_umount 22 | ||
35 | #define __NR_setuid 23 | ||
36 | #define __NR_getuid 24 | ||
37 | #define __NR_stime 25 | ||
38 | #define __NR_ptrace 26 | ||
39 | #define __NR_alarm 27 | ||
40 | #define __NR_oldfstat 28 | ||
41 | #define __NR_pause 29 | ||
42 | #define __NR_utime 30 | ||
43 | #define __NR_stty 31 | ||
44 | #define __NR_gtty 32 | ||
45 | #define __NR_access 33 | ||
46 | #define __NR_nice 34 | ||
47 | #define __NR_ftime 35 | ||
48 | #define __NR_sync 36 | ||
49 | #define __NR_kill 37 | ||
50 | #define __NR_rename 38 | ||
51 | #define __NR_mkdir 39 | ||
52 | #define __NR_rmdir 40 | ||
53 | #define __NR_dup 41 | ||
54 | #define __NR_pipe 42 | ||
55 | #define __NR_times 43 | ||
56 | #define __NR_prof 44 | ||
57 | #define __NR_brk 45 | ||
58 | #define __NR_setgid 46 | ||
59 | #define __NR_getgid 47 | ||
60 | #define __NR_signal 48 | ||
61 | #define __NR_geteuid 49 | ||
62 | #define __NR_getegid 50 | ||
63 | #define __NR_acct 51 | ||
64 | #define __NR_umount2 52 | ||
65 | #define __NR_lock 53 | ||
66 | #define __NR_ioctl 54 | ||
67 | #define __NR_fcntl 55 | ||
68 | #define __NR_mpx 56 | ||
69 | #define __NR_setpgid 57 | ||
70 | #define __NR_ulimit 58 | ||
71 | #define __NR_oldolduname 59 | ||
72 | #define __NR_umask 60 | ||
73 | #define __NR_chroot 61 | ||
74 | #define __NR_ustat 62 | ||
75 | #define __NR_dup2 63 | ||
76 | #define __NR_getppid 64 | ||
77 | #define __NR_getpgrp 65 | ||
78 | #define __NR_setsid 66 | ||
79 | #define __NR_sigaction 67 | ||
80 | #define __NR_sgetmask 68 | ||
81 | #define __NR_ssetmask 69 | ||
82 | #define __NR_setreuid 70 | ||
83 | #define __NR_setregid 71 | ||
84 | #define __NR_sigsuspend 72 | ||
85 | #define __NR_sigpending 73 | ||
86 | #define __NR_sethostname 74 | ||
87 | #define __NR_setrlimit 75 | ||
88 | #define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */ | ||
89 | #define __NR_getrusage 77 | ||
90 | #define __NR_gettimeofday 78 | ||
91 | #define __NR_settimeofday 79 | ||
92 | #define __NR_getgroups 80 | ||
93 | #define __NR_setgroups 81 | ||
94 | #define __NR_select 82 | ||
95 | #define __NR_symlink 83 | ||
96 | #define __NR_oldlstat 84 | ||
97 | #define __NR_readlink 85 | ||
98 | #define __NR_uselib 86 | ||
99 | #define __NR_swapon 87 | ||
100 | #define __NR_reboot 88 | ||
101 | #define __NR_readdir 89 | ||
102 | #define __NR_mmap 90 | ||
103 | #define __NR_munmap 91 | ||
104 | #define __NR_truncate 92 | ||
105 | #define __NR_ftruncate 93 | ||
106 | #define __NR_fchmod 94 | ||
107 | #define __NR_fchown 95 | ||
108 | #define __NR_getpriority 96 | ||
109 | #define __NR_setpriority 97 | ||
110 | #define __NR_profil 98 | ||
111 | #define __NR_statfs 99 | ||
112 | #define __NR_fstatfs 100 | ||
113 | #define __NR_ioperm 101 | ||
114 | #define __NR_socketcall 102 | ||
115 | #define __NR_syslog 103 | ||
116 | #define __NR_setitimer 104 | ||
117 | #define __NR_getitimer 105 | ||
118 | #define __NR_stat 106 | ||
119 | #define __NR_lstat 107 | ||
120 | #define __NR_fstat 108 | ||
121 | #define __NR_olduname 109 | ||
122 | #define __NR_iopl 110 | ||
123 | #define __NR_vhangup 111 | ||
124 | #define __NR_idle 112 | ||
125 | #define __NR_vm86old 113 | ||
126 | #define __NR_wait4 114 | ||
127 | #define __NR_swapoff 115 | ||
128 | #define __NR_sysinfo 116 | ||
129 | #define __NR_ipc 117 | ||
130 | #define __NR_fsync 118 | ||
131 | #define __NR_sigreturn 119 | ||
132 | #define __NR_clone 120 | ||
133 | #define __NR_setdomainname 121 | ||
134 | #define __NR_uname 122 | ||
135 | #define __NR_modify_ldt 123 | ||
136 | #define __NR_adjtimex 124 | ||
137 | #define __NR_mprotect 125 | ||
138 | #define __NR_sigprocmask 126 | ||
139 | #define __NR_create_module 127 | ||
140 | #define __NR_init_module 128 | ||
141 | #define __NR_delete_module 129 | ||
142 | #define __NR_get_kernel_syms 130 | ||
143 | #define __NR_quotactl 131 | ||
144 | #define __NR_getpgid 132 | ||
145 | #define __NR_fchdir 133 | ||
146 | #define __NR_bdflush 134 | ||
147 | #define __NR_sysfs 135 | ||
148 | #define __NR_personality 136 | ||
149 | #define __NR_afs_syscall 137 /* Syscall for Andrew File System */ | ||
150 | #define __NR_setfsuid 138 | ||
151 | #define __NR_setfsgid 139 | ||
152 | #define __NR__llseek 140 | ||
153 | #define __NR_getdents 141 | ||
154 | #define __NR__newselect 142 | ||
155 | #define __NR_flock 143 | ||
156 | #define __NR_msync 144 | ||
157 | #define __NR_readv 145 | ||
158 | #define __NR_writev 146 | ||
159 | #define __NR_getsid 147 | ||
160 | #define __NR_fdatasync 148 | ||
161 | #define __NR__sysctl 149 | ||
162 | #define __NR_mlock 150 | ||
163 | #define __NR_munlock 151 | ||
164 | #define __NR_mlockall 152 | ||
165 | #define __NR_munlockall 153 | ||
166 | #define __NR_sched_setparam 154 | ||
167 | #define __NR_sched_getparam 155 | ||
168 | #define __NR_sched_setscheduler 156 | ||
169 | #define __NR_sched_getscheduler 157 | ||
170 | #define __NR_sched_yield 158 | ||
171 | #define __NR_sched_get_priority_max 159 | ||
172 | #define __NR_sched_get_priority_min 160 | ||
173 | #define __NR_sched_rr_get_interval 161 | ||
174 | #define __NR_nanosleep 162 | ||
175 | #define __NR_mremap 163 | ||
176 | #define __NR_setresuid 164 | ||
177 | #define __NR_getresuid 165 | ||
178 | #define __NR_vm86 166 | ||
179 | #define __NR_query_module 167 | ||
180 | #define __NR_poll 168 | ||
181 | #define __NR_nfsservctl 169 | ||
182 | #define __NR_setresgid 170 | ||
183 | #define __NR_getresgid 171 | ||
184 | #define __NR_prctl 172 | ||
185 | #define __NR_rt_sigreturn 173 | ||
186 | #define __NR_rt_sigaction 174 | ||
187 | #define __NR_rt_sigprocmask 175 | ||
188 | #define __NR_rt_sigpending 176 | ||
189 | #define __NR_rt_sigtimedwait 177 | ||
190 | #define __NR_rt_sigqueueinfo 178 | ||
191 | #define __NR_rt_sigsuspend 179 | ||
192 | #define __NR_pread64 180 | ||
193 | #define __NR_pwrite64 181 | ||
194 | #define __NR_chown 182 | ||
195 | #define __NR_getcwd 183 | ||
196 | #define __NR_capget 184 | ||
197 | #define __NR_capset 185 | ||
198 | #define __NR_sigaltstack 186 | ||
199 | #define __NR_sendfile 187 | ||
200 | #define __NR_streams1 188 /* some people actually want it */ | ||
201 | #define __NR_streams2 189 /* some people actually want it */ | ||
202 | #define __NR_vfork 190 | ||
203 | #define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ | ||
204 | #define __NR_mmap2 192 | ||
205 | #define __NR_truncate64 193 | ||
206 | #define __NR_ftruncate64 194 | ||
207 | #define __NR_stat64 195 | ||
208 | #define __NR_lstat64 196 | ||
209 | #define __NR_fstat64 197 | ||
210 | #define __NR_lchown32 198 | ||
211 | #define __NR_getuid32 199 | ||
212 | #define __NR_getgid32 200 | ||
213 | #define __NR_geteuid32 201 | ||
214 | #define __NR_getegid32 202 | ||
215 | #define __NR_setreuid32 203 | ||
216 | #define __NR_setregid32 204 | ||
217 | #define __NR_getgroups32 205 | ||
218 | #define __NR_setgroups32 206 | ||
219 | #define __NR_fchown32 207 | ||
220 | #define __NR_setresuid32 208 | ||
221 | #define __NR_getresuid32 209 | ||
222 | #define __NR_setresgid32 210 | ||
223 | #define __NR_getresgid32 211 | ||
224 | #define __NR_chown32 212 | ||
225 | #define __NR_setuid32 213 | ||
226 | #define __NR_setgid32 214 | ||
227 | #define __NR_setfsuid32 215 | ||
228 | #define __NR_setfsgid32 216 | ||
229 | #define __NR_pivot_root 217 | ||
230 | #define __NR_mincore 218 | ||
231 | #define __NR_madvise 219 | ||
232 | #define __NR_getdents64 220 | ||
233 | #define __NR_fcntl64 221 | ||
234 | /* 223 is unused */ | ||
235 | #define __NR_gettid 224 | ||
236 | #define __NR_readahead 225 | ||
237 | #define __NR_setxattr 226 | ||
238 | #define __NR_lsetxattr 227 | ||
239 | #define __NR_fsetxattr 228 | ||
240 | #define __NR_getxattr 229 | ||
241 | #define __NR_lgetxattr 230 | ||
242 | #define __NR_fgetxattr 231 | ||
243 | #define __NR_listxattr 232 | ||
244 | #define __NR_llistxattr 233 | ||
245 | #define __NR_flistxattr 234 | ||
246 | #define __NR_removexattr 235 | ||
247 | #define __NR_lremovexattr 236 | ||
248 | #define __NR_fremovexattr 237 | ||
249 | #define __NR_tkill 238 | ||
250 | #define __NR_sendfile64 239 | ||
251 | #define __NR_futex 240 | ||
252 | #define __NR_sched_setaffinity 241 | ||
253 | #define __NR_sched_getaffinity 242 | ||
254 | #define __NR_set_thread_area 243 | ||
255 | #define __NR_get_thread_area 244 | ||
256 | #define __NR_io_setup 245 | ||
257 | #define __NR_io_destroy 246 | ||
258 | #define __NR_io_getevents 247 | ||
259 | #define __NR_io_submit 248 | ||
260 | #define __NR_io_cancel 249 | ||
261 | #define __NR_fadvise64 250 | ||
262 | |||
263 | #define __NR_exit_group 252 | ||
264 | #define __NR_lookup_dcookie 253 | ||
265 | #define __NR_epoll_create 254 | ||
266 | #define __NR_epoll_ctl 255 | ||
267 | #define __NR_epoll_wait 256 | ||
268 | #define __NR_remap_file_pages 257 | ||
269 | #define __NR_set_tid_address 258 | ||
270 | #define __NR_timer_create 259 | ||
271 | #define __NR_timer_settime (__NR_timer_create+1) | ||
272 | #define __NR_timer_gettime (__NR_timer_create+2) | ||
273 | #define __NR_timer_getoverrun (__NR_timer_create+3) | ||
274 | #define __NR_timer_delete (__NR_timer_create+4) | ||
275 | #define __NR_clock_settime (__NR_timer_create+5) | ||
276 | #define __NR_clock_gettime (__NR_timer_create+6) | ||
277 | #define __NR_clock_getres (__NR_timer_create+7) | ||
278 | #define __NR_clock_nanosleep (__NR_timer_create+8) | ||
279 | #define __NR_statfs64 268 | ||
280 | #define __NR_fstatfs64 269 | ||
281 | #define __NR_tgkill 270 | ||
282 | #define __NR_utimes 271 | ||
283 | #define __NR_fadvise64_64 272 | ||
284 | #define __NR_vserver 273 | ||
285 | #define __NR_mbind 274 | ||
286 | #define __NR_get_mempolicy 275 | ||
287 | #define __NR_set_mempolicy 276 | ||
288 | #define __NR_mq_open 277 | ||
289 | #define __NR_mq_unlink (__NR_mq_open+1) | ||
290 | #define __NR_mq_timedsend (__NR_mq_open+2) | ||
291 | #define __NR_mq_timedreceive (__NR_mq_open+3) | ||
292 | #define __NR_mq_notify (__NR_mq_open+4) | ||
293 | #define __NR_mq_getsetattr (__NR_mq_open+5) | ||
294 | #define __NR_kexec_load 283 | ||
295 | #define __NR_waitid 284 | ||
296 | #define __NR_add_key 285 | ||
297 | #define __NR_request_key 286 | ||
298 | #define __NR_keyctl 287 | ||
299 | #define __NR_ioprio_set 288 | ||
300 | #define __NR_ioprio_get 289 | ||
301 | #define __NR_inotify_init 290 | ||
302 | #define __NR_inotify_add_watch 291 | ||
303 | #define __NR_inotify_rm_watch 292 | ||
304 | /* 293 is unused */ | ||
305 | #define __NR_migrate_pages 294 | ||
306 | #define __NR_openat 295 | ||
307 | #define __NR_mkdirat 296 | ||
308 | #define __NR_mknodat 297 | ||
309 | #define __NR_fchownat 298 | ||
310 | #define __NR_futimesat 299 | ||
311 | #define __NR_fstatat64 300 | ||
312 | #define __NR_unlinkat 301 | ||
313 | #define __NR_renameat 302 | ||
314 | #define __NR_linkat 303 | ||
315 | #define __NR_symlinkat 304 | ||
316 | #define __NR_readlinkat 305 | ||
317 | #define __NR_fchmodat 306 | ||
318 | #define __NR_faccessat 307 | ||
319 | #define __NR_pselect6 308 | ||
320 | #define __NR_ppoll 309 | ||
321 | #define __NR_unshare 310 | ||
322 | #define __NR_set_robust_list 311 | ||
323 | #define __NR_get_robust_list 312 | ||
324 | #define __NR_splice 313 | ||
325 | #define __NR_sync_file_range 314 | ||
326 | #define __NR_tee 315 | ||
327 | #define __NR_vmsplice 316 | ||
328 | #define __NR_move_pages 317 | ||
329 | #define __NR_getcpu 318 | ||
330 | #define __NR_epoll_pwait 319 | ||
331 | #define __NR_utimensat 320 | ||
332 | #define __NR_signalfd 321 | ||
333 | #define __NR_timerfd_create 322 | ||
334 | #define __NR_eventfd 323 | ||
335 | #define __NR_fallocate 324 | ||
336 | #define __NR_timerfd_settime 325 | ||
337 | #define __NR_timerfd_gettime 326 | ||
338 | #define __NR_signalfd4 327 | ||
339 | #define __NR_eventfd2 328 | ||
340 | #define __NR_epoll_create1 329 | ||
341 | #define __NR_dup3 330 | ||
342 | #define __NR_pipe2 331 | ||
343 | #define __NR_inotify_init1 332 | ||
344 | |||
345 | #define NR_syscalls 333 | ||
346 | |||
347 | #ifdef __KERNEL__ | ||
348 | |||
349 | #define __ARCH_WANT_IPC_PARSE_VERSION | ||
350 | #define __ARCH_WANT_OLD_READDIR | ||
351 | #define __ARCH_WANT_OLD_STAT | ||
352 | #define __ARCH_WANT_STAT64 | ||
353 | #define __ARCH_WANT_SYS_ALARM | ||
354 | #define __ARCH_WANT_SYS_GETHOSTNAME | ||
355 | #define __ARCH_WANT_SYS_PAUSE | ||
356 | #define __ARCH_WANT_SYS_SGETMASK | ||
357 | #define __ARCH_WANT_SYS_SIGNAL | ||
358 | #define __ARCH_WANT_SYS_TIME | ||
359 | #define __ARCH_WANT_SYS_UTIME | ||
360 | #define __ARCH_WANT_SYS_WAITPID | ||
361 | #define __ARCH_WANT_SYS_SOCKETCALL | ||
362 | #define __ARCH_WANT_SYS_FADVISE64 | ||
363 | #define __ARCH_WANT_SYS_GETPGRP | ||
364 | #define __ARCH_WANT_SYS_LLSEEK | ||
365 | #define __ARCH_WANT_SYS_NICE | ||
366 | #define __ARCH_WANT_SYS_OLD_GETRLIMIT | ||
367 | #define __ARCH_WANT_SYS_OLDUMOUNT | ||
368 | #define __ARCH_WANT_SYS_SIGPENDING | ||
369 | #define __ARCH_WANT_SYS_SIGPROCMASK | ||
370 | #define __ARCH_WANT_SYS_RT_SIGACTION | ||
371 | #define __ARCH_WANT_SYS_RT_SIGSUSPEND | ||
372 | |||
373 | /* | ||
374 | * "Conditional" syscalls | ||
375 | * | ||
376 | * What we want is __attribute__((weak,alias("sys_ni_syscall"))), | ||
377 | * but it doesn't work on all toolchains, so we just do it by hand | ||
378 | */ | ||
379 | #ifndef cond_syscall | ||
380 | #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") | ||
381 | #endif | ||
382 | |||
383 | #endif /* __KERNEL__ */ | ||
384 | #endif /* __ASM_SH_UNISTD_H */ | ||
diff --git a/include/asm-sh/unistd_64.h b/include/asm-sh/unistd_64.h deleted file mode 100644 index 7c54e91753c1..000000000000 --- a/include/asm-sh/unistd_64.h +++ /dev/null | |||
@@ -1,423 +0,0 @@ | |||
1 | #ifndef __ASM_SH_UNISTD_64_H | ||
2 | #define __ASM_SH_UNISTD_64_H | ||
3 | |||
4 | /* | ||
5 | * include/asm-sh/unistd_64.h | ||
6 | * | ||
7 | * This file contains the system call numbers. | ||
8 | * | ||
9 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
10 | * Copyright (C) 2003 - 2007 Paul Mundt | ||
11 | * Copyright (C) 2004 Sean McGoogan | ||
12 | * | ||
13 | * This file is subject to the terms and conditions of the GNU General Public | ||
14 | * License. See the file "COPYING" in the main directory of this archive | ||
15 | * for more details. | ||
16 | */ | ||
17 | #define __NR_restart_syscall 0 | ||
18 | #define __NR_exit 1 | ||
19 | #define __NR_fork 2 | ||
20 | #define __NR_read 3 | ||
21 | #define __NR_write 4 | ||
22 | #define __NR_open 5 | ||
23 | #define __NR_close 6 | ||
24 | #define __NR_waitpid 7 | ||
25 | #define __NR_creat 8 | ||
26 | #define __NR_link 9 | ||
27 | #define __NR_unlink 10 | ||
28 | #define __NR_execve 11 | ||
29 | #define __NR_chdir 12 | ||
30 | #define __NR_time 13 | ||
31 | #define __NR_mknod 14 | ||
32 | #define __NR_chmod 15 | ||
33 | #define __NR_lchown 16 | ||
34 | #define __NR_break 17 | ||
35 | #define __NR_oldstat 18 | ||
36 | #define __NR_lseek 19 | ||
37 | #define __NR_getpid 20 | ||
38 | #define __NR_mount 21 | ||
39 | #define __NR_umount 22 | ||
40 | #define __NR_setuid 23 | ||
41 | #define __NR_getuid 24 | ||
42 | #define __NR_stime 25 | ||
43 | #define __NR_ptrace 26 | ||
44 | #define __NR_alarm 27 | ||
45 | #define __NR_oldfstat 28 | ||
46 | #define __NR_pause 29 | ||
47 | #define __NR_utime 30 | ||
48 | #define __NR_stty 31 | ||
49 | #define __NR_gtty 32 | ||
50 | #define __NR_access 33 | ||
51 | #define __NR_nice 34 | ||
52 | #define __NR_ftime 35 | ||
53 | #define __NR_sync 36 | ||
54 | #define __NR_kill 37 | ||
55 | #define __NR_rename 38 | ||
56 | #define __NR_mkdir 39 | ||
57 | #define __NR_rmdir 40 | ||
58 | #define __NR_dup 41 | ||
59 | #define __NR_pipe 42 | ||
60 | #define __NR_times 43 | ||
61 | #define __NR_prof 44 | ||
62 | #define __NR_brk 45 | ||
63 | #define __NR_setgid 46 | ||
64 | #define __NR_getgid 47 | ||
65 | #define __NR_signal 48 | ||
66 | #define __NR_geteuid 49 | ||
67 | #define __NR_getegid 50 | ||
68 | #define __NR_acct 51 | ||
69 | #define __NR_umount2 52 | ||
70 | #define __NR_lock 53 | ||
71 | #define __NR_ioctl 54 | ||
72 | #define __NR_fcntl 55 | ||
73 | #define __NR_mpx 56 | ||
74 | #define __NR_setpgid 57 | ||
75 | #define __NR_ulimit 58 | ||
76 | #define __NR_oldolduname 59 | ||
77 | #define __NR_umask 60 | ||
78 | #define __NR_chroot 61 | ||
79 | #define __NR_ustat 62 | ||
80 | #define __NR_dup2 63 | ||
81 | #define __NR_getppid 64 | ||
82 | #define __NR_getpgrp 65 | ||
83 | #define __NR_setsid 66 | ||
84 | #define __NR_sigaction 67 | ||
85 | #define __NR_sgetmask 68 | ||
86 | #define __NR_ssetmask 69 | ||
87 | #define __NR_setreuid 70 | ||
88 | #define __NR_setregid 71 | ||
89 | #define __NR_sigsuspend 72 | ||
90 | #define __NR_sigpending 73 | ||
91 | #define __NR_sethostname 74 | ||
92 | #define __NR_setrlimit 75 | ||
93 | #define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */ | ||
94 | #define __NR_getrusage 77 | ||
95 | #define __NR_gettimeofday 78 | ||
96 | #define __NR_settimeofday 79 | ||
97 | #define __NR_getgroups 80 | ||
98 | #define __NR_setgroups 81 | ||
99 | #define __NR_select 82 | ||
100 | #define __NR_symlink 83 | ||
101 | #define __NR_oldlstat 84 | ||
102 | #define __NR_readlink 85 | ||
103 | #define __NR_uselib 86 | ||
104 | #define __NR_swapon 87 | ||
105 | #define __NR_reboot 88 | ||
106 | #define __NR_readdir 89 | ||
107 | #define __NR_mmap 90 | ||
108 | #define __NR_munmap 91 | ||
109 | #define __NR_truncate 92 | ||
110 | #define __NR_ftruncate 93 | ||
111 | #define __NR_fchmod 94 | ||
112 | #define __NR_fchown 95 | ||
113 | #define __NR_getpriority 96 | ||
114 | #define __NR_setpriority 97 | ||
115 | #define __NR_profil 98 | ||
116 | #define __NR_statfs 99 | ||
117 | #define __NR_fstatfs 100 | ||
118 | #define __NR_ioperm 101 | ||
119 | #define __NR_socketcall 102 /* old implementation of socket systemcall */ | ||
120 | #define __NR_syslog 103 | ||
121 | #define __NR_setitimer 104 | ||
122 | #define __NR_getitimer 105 | ||
123 | #define __NR_stat 106 | ||
124 | #define __NR_lstat 107 | ||
125 | #define __NR_fstat 108 | ||
126 | #define __NR_olduname 109 | ||
127 | #define __NR_iopl 110 | ||
128 | #define __NR_vhangup 111 | ||
129 | #define __NR_idle 112 | ||
130 | #define __NR_vm86old 113 | ||
131 | #define __NR_wait4 114 | ||
132 | #define __NR_swapoff 115 | ||
133 | #define __NR_sysinfo 116 | ||
134 | #define __NR_ipc 117 | ||
135 | #define __NR_fsync 118 | ||
136 | #define __NR_sigreturn 119 | ||
137 | #define __NR_clone 120 | ||
138 | #define __NR_setdomainname 121 | ||
139 | #define __NR_uname 122 | ||
140 | #define __NR_modify_ldt 123 | ||
141 | #define __NR_adjtimex 124 | ||
142 | #define __NR_mprotect 125 | ||
143 | #define __NR_sigprocmask 126 | ||
144 | #define __NR_create_module 127 | ||
145 | #define __NR_init_module 128 | ||
146 | #define __NR_delete_module 129 | ||
147 | #define __NR_get_kernel_syms 130 | ||
148 | #define __NR_quotactl 131 | ||
149 | #define __NR_getpgid 132 | ||
150 | #define __NR_fchdir 133 | ||
151 | #define __NR_bdflush 134 | ||
152 | #define __NR_sysfs 135 | ||
153 | #define __NR_personality 136 | ||
154 | #define __NR_afs_syscall 137 /* Syscall for Andrew File System */ | ||
155 | #define __NR_setfsuid 138 | ||
156 | #define __NR_setfsgid 139 | ||
157 | #define __NR__llseek 140 | ||
158 | #define __NR_getdents 141 | ||
159 | #define __NR__newselect 142 | ||
160 | #define __NR_flock 143 | ||
161 | #define __NR_msync 144 | ||
162 | #define __NR_readv 145 | ||
163 | #define __NR_writev 146 | ||
164 | #define __NR_getsid 147 | ||
165 | #define __NR_fdatasync 148 | ||
166 | #define __NR__sysctl 149 | ||
167 | #define __NR_mlock 150 | ||
168 | #define __NR_munlock 151 | ||
169 | #define __NR_mlockall 152 | ||
170 | #define __NR_munlockall 153 | ||
171 | #define __NR_sched_setparam 154 | ||
172 | #define __NR_sched_getparam 155 | ||
173 | #define __NR_sched_setscheduler 156 | ||
174 | #define __NR_sched_getscheduler 157 | ||
175 | #define __NR_sched_yield 158 | ||
176 | #define __NR_sched_get_priority_max 159 | ||
177 | #define __NR_sched_get_priority_min 160 | ||
178 | #define __NR_sched_rr_get_interval 161 | ||
179 | #define __NR_nanosleep 162 | ||
180 | #define __NR_mremap 163 | ||
181 | #define __NR_setresuid 164 | ||
182 | #define __NR_getresuid 165 | ||
183 | #define __NR_vm86 166 | ||
184 | #define __NR_query_module 167 | ||
185 | #define __NR_poll 168 | ||
186 | #define __NR_nfsservctl 169 | ||
187 | #define __NR_setresgid 170 | ||
188 | #define __NR_getresgid 171 | ||
189 | #define __NR_prctl 172 | ||
190 | #define __NR_rt_sigreturn 173 | ||
191 | #define __NR_rt_sigaction 174 | ||
192 | #define __NR_rt_sigprocmask 175 | ||
193 | #define __NR_rt_sigpending 176 | ||
194 | #define __NR_rt_sigtimedwait 177 | ||
195 | #define __NR_rt_sigqueueinfo 178 | ||
196 | #define __NR_rt_sigsuspend 179 | ||
197 | #define __NR_pread64 180 | ||
198 | #define __NR_pwrite64 181 | ||
199 | #define __NR_chown 182 | ||
200 | #define __NR_getcwd 183 | ||
201 | #define __NR_capget 184 | ||
202 | #define __NR_capset 185 | ||
203 | #define __NR_sigaltstack 186 | ||
204 | #define __NR_sendfile 187 | ||
205 | #define __NR_streams1 188 /* some people actually want it */ | ||
206 | #define __NR_streams2 189 /* some people actually want it */ | ||
207 | #define __NR_vfork 190 | ||
208 | #define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ | ||
209 | #define __NR_mmap2 192 | ||
210 | #define __NR_truncate64 193 | ||
211 | #define __NR_ftruncate64 194 | ||
212 | #define __NR_stat64 195 | ||
213 | #define __NR_lstat64 196 | ||
214 | #define __NR_fstat64 197 | ||
215 | #define __NR_lchown32 198 | ||
216 | #define __NR_getuid32 199 | ||
217 | #define __NR_getgid32 200 | ||
218 | #define __NR_geteuid32 201 | ||
219 | #define __NR_getegid32 202 | ||
220 | #define __NR_setreuid32 203 | ||
221 | #define __NR_setregid32 204 | ||
222 | #define __NR_getgroups32 205 | ||
223 | #define __NR_setgroups32 206 | ||
224 | #define __NR_fchown32 207 | ||
225 | #define __NR_setresuid32 208 | ||
226 | #define __NR_getresuid32 209 | ||
227 | #define __NR_setresgid32 210 | ||
228 | #define __NR_getresgid32 211 | ||
229 | #define __NR_chown32 212 | ||
230 | #define __NR_setuid32 213 | ||
231 | #define __NR_setgid32 214 | ||
232 | #define __NR_setfsuid32 215 | ||
233 | #define __NR_setfsgid32 216 | ||
234 | #define __NR_pivot_root 217 | ||
235 | #define __NR_mincore 218 | ||
236 | #define __NR_madvise 219 | ||
237 | |||
238 | /* Non-multiplexed socket family */ | ||
239 | #define __NR_socket 220 | ||
240 | #define __NR_bind 221 | ||
241 | #define __NR_connect 222 | ||
242 | #define __NR_listen 223 | ||
243 | #define __NR_accept 224 | ||
244 | #define __NR_getsockname 225 | ||
245 | #define __NR_getpeername 226 | ||
246 | #define __NR_socketpair 227 | ||
247 | #define __NR_send 228 | ||
248 | #define __NR_sendto 229 | ||
249 | #define __NR_recv 230 | ||
250 | #define __NR_recvfrom 231 | ||
251 | #define __NR_shutdown 232 | ||
252 | #define __NR_setsockopt 233 | ||
253 | #define __NR_getsockopt 234 | ||
254 | #define __NR_sendmsg 235 | ||
255 | #define __NR_recvmsg 236 | ||
256 | |||
257 | /* Non-multiplexed IPC family */ | ||
258 | #define __NR_semop 237 | ||
259 | #define __NR_semget 238 | ||
260 | #define __NR_semctl 239 | ||
261 | #define __NR_msgsnd 240 | ||
262 | #define __NR_msgrcv 241 | ||
263 | #define __NR_msgget 242 | ||
264 | #define __NR_msgctl 243 | ||
265 | #if 0 | ||
266 | #define __NR_shmatcall 244 | ||
267 | #endif | ||
268 | #define __NR_shmdt 245 | ||
269 | #define __NR_shmget 246 | ||
270 | #define __NR_shmctl 247 | ||
271 | |||
272 | #define __NR_getdents64 248 | ||
273 | #define __NR_fcntl64 249 | ||
274 | /* 223 is unused */ | ||
275 | #define __NR_gettid 252 | ||
276 | #define __NR_readahead 253 | ||
277 | #define __NR_setxattr 254 | ||
278 | #define __NR_lsetxattr 255 | ||
279 | #define __NR_fsetxattr 256 | ||
280 | #define __NR_getxattr 257 | ||
281 | #define __NR_lgetxattr 258 | ||
282 | #define __NR_fgetxattr 269 | ||
283 | #define __NR_listxattr 260 | ||
284 | #define __NR_llistxattr 261 | ||
285 | #define __NR_flistxattr 262 | ||
286 | #define __NR_removexattr 263 | ||
287 | #define __NR_lremovexattr 264 | ||
288 | #define __NR_fremovexattr 265 | ||
289 | #define __NR_tkill 266 | ||
290 | #define __NR_sendfile64 267 | ||
291 | #define __NR_futex 268 | ||
292 | #define __NR_sched_setaffinity 269 | ||
293 | #define __NR_sched_getaffinity 270 | ||
294 | #define __NR_set_thread_area 271 | ||
295 | #define __NR_get_thread_area 272 | ||
296 | #define __NR_io_setup 273 | ||
297 | #define __NR_io_destroy 274 | ||
298 | #define __NR_io_getevents 275 | ||
299 | #define __NR_io_submit 276 | ||
300 | #define __NR_io_cancel 277 | ||
301 | #define __NR_fadvise64 278 | ||
302 | #define __NR_exit_group 280 | ||
303 | |||
304 | #define __NR_lookup_dcookie 281 | ||
305 | #define __NR_epoll_create 282 | ||
306 | #define __NR_epoll_ctl 283 | ||
307 | #define __NR_epoll_wait 284 | ||
308 | #define __NR_remap_file_pages 285 | ||
309 | #define __NR_set_tid_address 286 | ||
310 | #define __NR_timer_create 287 | ||
311 | #define __NR_timer_settime (__NR_timer_create+1) | ||
312 | #define __NR_timer_gettime (__NR_timer_create+2) | ||
313 | #define __NR_timer_getoverrun (__NR_timer_create+3) | ||
314 | #define __NR_timer_delete (__NR_timer_create+4) | ||
315 | #define __NR_clock_settime (__NR_timer_create+5) | ||
316 | #define __NR_clock_gettime (__NR_timer_create+6) | ||
317 | #define __NR_clock_getres (__NR_timer_create+7) | ||
318 | #define __NR_clock_nanosleep (__NR_timer_create+8) | ||
319 | #define __NR_statfs64 296 | ||
320 | #define __NR_fstatfs64 297 | ||
321 | #define __NR_tgkill 298 | ||
322 | #define __NR_utimes 299 | ||
323 | #define __NR_fadvise64_64 300 | ||
324 | #define __NR_vserver 301 | ||
325 | #define __NR_mbind 302 | ||
326 | #define __NR_get_mempolicy 303 | ||
327 | #define __NR_set_mempolicy 304 | ||
328 | #define __NR_mq_open 305 | ||
329 | #define __NR_mq_unlink (__NR_mq_open+1) | ||
330 | #define __NR_mq_timedsend (__NR_mq_open+2) | ||
331 | #define __NR_mq_timedreceive (__NR_mq_open+3) | ||
332 | #define __NR_mq_notify (__NR_mq_open+4) | ||
333 | #define __NR_mq_getsetattr (__NR_mq_open+5) | ||
334 | #define __NR_kexec_load 311 | ||
335 | #define __NR_waitid 312 | ||
336 | #define __NR_add_key 313 | ||
337 | #define __NR_request_key 314 | ||
338 | #define __NR_keyctl 315 | ||
339 | #define __NR_ioprio_set 316 | ||
340 | #define __NR_ioprio_get 317 | ||
341 | #define __NR_inotify_init 318 | ||
342 | #define __NR_inotify_add_watch 319 | ||
343 | #define __NR_inotify_rm_watch 320 | ||
344 | /* 321 is unused */ | ||
345 | #define __NR_migrate_pages 322 | ||
346 | #define __NR_openat 323 | ||
347 | #define __NR_mkdirat 324 | ||
348 | #define __NR_mknodat 325 | ||
349 | #define __NR_fchownat 326 | ||
350 | #define __NR_futimesat 327 | ||
351 | #define __NR_fstatat64 328 | ||
352 | #define __NR_unlinkat 329 | ||
353 | #define __NR_renameat 330 | ||
354 | #define __NR_linkat 331 | ||
355 | #define __NR_symlinkat 332 | ||
356 | #define __NR_readlinkat 333 | ||
357 | #define __NR_fchmodat 334 | ||
358 | #define __NR_faccessat 335 | ||
359 | #define __NR_pselect6 336 | ||
360 | #define __NR_ppoll 337 | ||
361 | #define __NR_unshare 338 | ||
362 | #define __NR_set_robust_list 339 | ||
363 | #define __NR_get_robust_list 340 | ||
364 | #define __NR_splice 341 | ||
365 | #define __NR_sync_file_range 342 | ||
366 | #define __NR_tee 343 | ||
367 | #define __NR_vmsplice 344 | ||
368 | #define __NR_move_pages 345 | ||
369 | #define __NR_getcpu 346 | ||
370 | #define __NR_epoll_pwait 347 | ||
371 | #define __NR_utimensat 348 | ||
372 | #define __NR_signalfd 349 | ||
373 | #define __NR_timerfd_create 350 | ||
374 | #define __NR_eventfd 351 | ||
375 | #define __NR_fallocate 352 | ||
376 | #define __NR_timerfd_settime 353 | ||
377 | #define __NR_timerfd_gettime 354 | ||
378 | #define __NR_signalfd4 355 | ||
379 | #define __NR_eventfd2 356 | ||
380 | #define __NR_epoll_create1 357 | ||
381 | #define __NR_dup3 358 | ||
382 | #define __NR_pipe2 359 | ||
383 | #define __NR_inotify_init1 360 | ||
384 | |||
385 | #ifdef __KERNEL__ | ||
386 | |||
387 | #define NR_syscalls 361 | ||
388 | |||
389 | #define __ARCH_WANT_IPC_PARSE_VERSION | ||
390 | #define __ARCH_WANT_OLD_READDIR | ||
391 | #define __ARCH_WANT_OLD_STAT | ||
392 | #define __ARCH_WANT_STAT64 | ||
393 | #define __ARCH_WANT_SYS_ALARM | ||
394 | #define __ARCH_WANT_SYS_GETHOSTNAME | ||
395 | #define __ARCH_WANT_SYS_PAUSE | ||
396 | #define __ARCH_WANT_SYS_SGETMASK | ||
397 | #define __ARCH_WANT_SYS_SIGNAL | ||
398 | #define __ARCH_WANT_SYS_TIME | ||
399 | #define __ARCH_WANT_SYS_UTIME | ||
400 | #define __ARCH_WANT_SYS_WAITPID | ||
401 | #define __ARCH_WANT_SYS_SOCKETCALL | ||
402 | #define __ARCH_WANT_SYS_FADVISE64 | ||
403 | #define __ARCH_WANT_SYS_GETPGRP | ||
404 | #define __ARCH_WANT_SYS_LLSEEK | ||
405 | #define __ARCH_WANT_SYS_NICE | ||
406 | #define __ARCH_WANT_SYS_OLD_GETRLIMIT | ||
407 | #define __ARCH_WANT_SYS_OLDUMOUNT | ||
408 | #define __ARCH_WANT_SYS_SIGPENDING | ||
409 | #define __ARCH_WANT_SYS_SIGPROCMASK | ||
410 | #define __ARCH_WANT_SYS_RT_SIGACTION | ||
411 | |||
412 | /* | ||
413 | * "Conditional" syscalls | ||
414 | * | ||
415 | * What we want is __attribute__((weak,alias("sys_ni_syscall"))), | ||
416 | * but it doesn't work on all toolchains, so we just do it by hand | ||
417 | */ | ||
418 | #ifndef cond_syscall | ||
419 | #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") | ||
420 | #endif | ||
421 | |||
422 | #endif /* __KERNEL__ */ | ||
423 | #endif /* __ASM_SH_UNISTD_64_H */ | ||
diff --git a/include/asm-sh/user.h b/include/asm-sh/user.h deleted file mode 100644 index 8fd3cf6c58d4..000000000000 --- a/include/asm-sh/user.h +++ /dev/null | |||
@@ -1,67 +0,0 @@ | |||
1 | #ifndef __ASM_SH_USER_H | ||
2 | #define __ASM_SH_USER_H | ||
3 | |||
4 | #include <asm/ptrace.h> | ||
5 | #include <asm/page.h> | ||
6 | |||
7 | /* | ||
8 | * Core file format: The core file is written in such a way that gdb | ||
9 | * can understand it and provide useful information to the user (under | ||
10 | * linux we use the `trad-core' bfd). The file contents are as follows: | ||
11 | * | ||
12 | * upage: 1 page consisting of a user struct that tells gdb | ||
13 | * what is present in the file. Directly after this is a | ||
14 | * copy of the task_struct, which is currently not used by gdb, | ||
15 | * but it may come in handy at some point. All of the registers | ||
16 | * are stored as part of the upage. The upage should always be | ||
17 | * only one page long. | ||
18 | * data: The data segment follows next. We use current->end_text to | ||
19 | * current->brk to pick up all of the user variables, plus any memory | ||
20 | * that may have been sbrk'ed. No attempt is made to determine if a | ||
21 | * page is demand-zero or if a page is totally unused, we just cover | ||
22 | * the entire range. All of the addresses are rounded in such a way | ||
23 | * that an integral number of pages is written. | ||
24 | * stack: We need the stack information in order to get a meaningful | ||
25 | * backtrace. We need to write the data from usp to | ||
26 | * current->start_stack, so we round each of these in order to be able | ||
27 | * to write an integer number of pages. | ||
28 | */ | ||
29 | |||
30 | #if defined(__SH5__) || defined(CONFIG_CPU_SH5) | ||
31 | struct user_fpu_struct { | ||
32 | unsigned long fp_regs[32]; | ||
33 | unsigned int fpscr; | ||
34 | }; | ||
35 | #else | ||
36 | struct user_fpu_struct { | ||
37 | unsigned long fp_regs[16]; | ||
38 | unsigned long xfp_regs[16]; | ||
39 | unsigned long fpscr; | ||
40 | unsigned long fpul; | ||
41 | }; | ||
42 | #endif | ||
43 | |||
44 | struct user { | ||
45 | struct pt_regs regs; /* entire machine state */ | ||
46 | struct user_fpu_struct fpu; /* Math Co-processor registers */ | ||
47 | int u_fpvalid; /* True if math co-processor being used */ | ||
48 | size_t u_tsize; /* text size (pages) */ | ||
49 | size_t u_dsize; /* data size (pages) */ | ||
50 | size_t u_ssize; /* stack size (pages) */ | ||
51 | unsigned long start_code; /* text starting address */ | ||
52 | unsigned long start_data; /* data starting address */ | ||
53 | unsigned long start_stack; /* stack starting address */ | ||
54 | long int signal; /* signal causing core dump */ | ||
55 | unsigned long u_ar0; /* help gdb find registers */ | ||
56 | struct user_fpu_struct* u_fpstate; /* Math Co-processor pointer */ | ||
57 | unsigned long magic; /* identifies a core file */ | ||
58 | char u_comm[32]; /* user command name */ | ||
59 | }; | ||
60 | |||
61 | #define NBPG PAGE_SIZE | ||
62 | #define UPAGES 1 | ||
63 | #define HOST_TEXT_START_ADDR (u.start_code) | ||
64 | #define HOST_DATA_START_ADDR (u.start_data) | ||
65 | #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) | ||
66 | |||
67 | #endif /* __ASM_SH_USER_H */ | ||
diff --git a/include/asm-sh/vga.h b/include/asm-sh/vga.h deleted file mode 100644 index 06a5de8ace1a..000000000000 --- a/include/asm-sh/vga.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_SH_VGA_H | ||
2 | #define __ASM_SH_VGA_H | ||
3 | |||
4 | /* Stupid drivers. */ | ||
5 | |||
6 | #endif /* __ASM_SH_VGA_H */ | ||
diff --git a/include/asm-sh/watchdog.h b/include/asm-sh/watchdog.h deleted file mode 100644 index d19ea62ef8c6..000000000000 --- a/include/asm-sh/watchdog.h +++ /dev/null | |||
@@ -1,107 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sh/watchdog.h | ||
3 | * | ||
4 | * Copyright (C) 2002, 2003 Paul Mundt | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | #ifndef __ASM_SH_WATCHDOG_H | ||
12 | #define __ASM_SH_WATCHDOG_H | ||
13 | #ifdef __KERNEL__ | ||
14 | |||
15 | #include <linux/types.h> | ||
16 | #include <asm/cpu/watchdog.h> | ||
17 | #include <asm/io.h> | ||
18 | |||
19 | /* | ||
20 | * See asm/cpu-sh2/watchdog.h for explanation of this stupidity.. | ||
21 | */ | ||
22 | #ifndef WTCNT_R | ||
23 | # define WTCNT_R WTCNT | ||
24 | #endif | ||
25 | |||
26 | #ifndef WTCSR_R | ||
27 | # define WTCSR_R WTCSR | ||
28 | #endif | ||
29 | |||
30 | #define WTCNT_HIGH 0x5a | ||
31 | #define WTCSR_HIGH 0xa5 | ||
32 | |||
33 | #define WTCSR_CKS2 0x04 | ||
34 | #define WTCSR_CKS1 0x02 | ||
35 | #define WTCSR_CKS0 0x01 | ||
36 | |||
37 | /* | ||
38 | * CKS0-2 supports a number of clock division ratios. At the time the watchdog | ||
39 | * is enabled, it defaults to a 41 usec overflow period .. we overload this to | ||
40 | * something a little more reasonable, and really can't deal with anything | ||
41 | * lower than WTCSR_CKS_1024, else we drop back into the usec range. | ||
42 | * | ||
43 | * Clock Division Ratio Overflow Period | ||
44 | * -------------------------------------------- | ||
45 | * 1/32 (initial value) 41 usecs | ||
46 | * 1/64 82 usecs | ||
47 | * 1/128 164 usecs | ||
48 | * 1/256 328 usecs | ||
49 | * 1/512 656 usecs | ||
50 | * 1/1024 1.31 msecs | ||
51 | * 1/2048 2.62 msecs | ||
52 | * 1/4096 5.25 msecs | ||
53 | */ | ||
54 | #define WTCSR_CKS_32 0x00 | ||
55 | #define WTCSR_CKS_64 0x01 | ||
56 | #define WTCSR_CKS_128 0x02 | ||
57 | #define WTCSR_CKS_256 0x03 | ||
58 | #define WTCSR_CKS_512 0x04 | ||
59 | #define WTCSR_CKS_1024 0x05 | ||
60 | #define WTCSR_CKS_2048 0x06 | ||
61 | #define WTCSR_CKS_4096 0x07 | ||
62 | |||
63 | /** | ||
64 | * sh_wdt_read_cnt - Read from Counter | ||
65 | * Reads back the WTCNT value. | ||
66 | */ | ||
67 | static inline __u8 sh_wdt_read_cnt(void) | ||
68 | { | ||
69 | return ctrl_inb(WTCNT_R); | ||
70 | } | ||
71 | |||
72 | /** | ||
73 | * sh_wdt_write_cnt - Write to Counter | ||
74 | * @val: Value to write | ||
75 | * | ||
76 | * Writes the given value @val to the lower byte of the timer counter. | ||
77 | * The upper byte is set manually on each write. | ||
78 | */ | ||
79 | static inline void sh_wdt_write_cnt(__u8 val) | ||
80 | { | ||
81 | ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, WTCNT); | ||
82 | } | ||
83 | |||
84 | /** | ||
85 | * sh_wdt_read_csr - Read from Control/Status Register | ||
86 | * | ||
87 | * Reads back the WTCSR value. | ||
88 | */ | ||
89 | static inline __u8 sh_wdt_read_csr(void) | ||
90 | { | ||
91 | return ctrl_inb(WTCSR_R); | ||
92 | } | ||
93 | |||
94 | /** | ||
95 | * sh_wdt_write_csr - Write to Control/Status Register | ||
96 | * @val: Value to write | ||
97 | * | ||
98 | * Writes the given value @val to the lower byte of the control/status | ||
99 | * register. The upper byte is set manually on each write. | ||
100 | */ | ||
101 | static inline void sh_wdt_write_csr(__u8 val) | ||
102 | { | ||
103 | ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR); | ||
104 | } | ||
105 | |||
106 | #endif /* __KERNEL__ */ | ||
107 | #endif /* __ASM_SH_WATCHDOG_H */ | ||
diff --git a/include/asm-sh/xor.h b/include/asm-sh/xor.h deleted file mode 100644 index c82eb12a5b18..000000000000 --- a/include/asm-sh/xor.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/xor.h> | ||