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authorPaul Mundt <lethal@linux-sh.org>2007-11-09 03:08:54 -0500
committerPaul Mundt <lethal@linux-sh.org>2008-01-27 23:18:42 -0500
commitaf3c7dfe822b598a2f977098101ed8b63cf0fdd1 (patch)
tree6c7c496559a2dbcdacdbfb147a95ab6546aac462 /include/asm-sh64/processor.h
parent33f242ed11ce6b5fbe73fe4ece7ef4bc2f4e2851 (diff)
sh: Split out processor.h in to _32 and _64 variants.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh64/processor.h')
-rw-r--r--include/asm-sh64/processor.h287
1 files changed, 0 insertions, 287 deletions
diff --git a/include/asm-sh64/processor.h b/include/asm-sh64/processor.h
deleted file mode 100644
index eb2bee4b47b9..000000000000
--- a/include/asm-sh64/processor.h
+++ /dev/null
@@ -1,287 +0,0 @@
1#ifndef __ASM_SH64_PROCESSOR_H
2#define __ASM_SH64_PROCESSOR_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/processor.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 * Copyright (C) 2004 Richard Curnow
14 *
15 */
16
17#include <asm/page.h>
18
19#ifndef __ASSEMBLY__
20
21#include <asm/types.h>
22#include <asm/cache.h>
23#include <asm/registers.h>
24#include <linux/threads.h>
25#include <linux/compiler.h>
26
27/*
28 * Default implementation of macro that returns current
29 * instruction pointer ("program counter").
30 */
31#define current_text_addr() ({ \
32void *pc; \
33unsigned long long __dummy = 0; \
34__asm__("gettr tr0, %1\n\t" \
35 "pta 4, tr0\n\t" \
36 "gettr tr0, %0\n\t" \
37 "ptabs %1, tr0\n\t" \
38 :"=r" (pc), "=r" (__dummy) \
39 : "1" (__dummy)); \
40pc; })
41
42/*
43 * CPU type and hardware bug flags. Kept separately for each CPU.
44 */
45enum cpu_type {
46 CPU_SH5_101,
47 CPU_SH5_103,
48 CPU_SH_NONE
49};
50
51/*
52 * TLB information structure
53 *
54 * Defined for both I and D tlb, per-processor.
55 */
56struct tlb_info {
57 unsigned long long next;
58 unsigned long long first;
59 unsigned long long last;
60
61 unsigned int entries;
62 unsigned int step;
63
64 unsigned long flags;
65};
66
67struct sh_cpuinfo {
68 enum cpu_type type;
69 unsigned long loops_per_jiffy;
70
71 char hard_math;
72
73 unsigned long *pgd_quick;
74 unsigned long *pmd_quick;
75 unsigned long *pte_quick;
76 unsigned long pgtable_cache_sz;
77 unsigned int cpu_clock, master_clock, bus_clock, module_clock;
78
79 /* Cache info */
80 struct cache_info icache;
81 struct cache_info dcache;
82
83 /* TLB info */
84 struct tlb_info itlb;
85 struct tlb_info dtlb;
86};
87
88extern struct sh_cpuinfo boot_cpu_data;
89
90#define cpu_data (&boot_cpu_data)
91#define current_cpu_data boot_cpu_data
92
93#endif
94
95/*
96 * User space process size: 2GB - 4k.
97 */
98#define TASK_SIZE 0x7ffff000UL
99
100/* This decides where the kernel will search for a free chunk of vm
101 * space during mmap's.
102 */
103#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
104
105/*
106 * Bit of SR register
107 *
108 * FD-bit:
109 * When it's set, it means the processor doesn't have right to use FPU,
110 * and it results exception when the floating operation is executed.
111 *
112 * IMASK-bit:
113 * Interrupt level mask
114 *
115 * STEP-bit:
116 * Single step bit
117 *
118 */
119#define SR_FD 0x00008000
120
121#if defined(CONFIG_SH64_SR_WATCH)
122#define SR_MMU 0x84000000
123#else
124#define SR_MMU 0x80000000
125#endif
126
127#define SR_IMASK 0x000000f0
128#define SR_SSTEP 0x08000000
129
130#ifndef __ASSEMBLY__
131
132/*
133 * FPU structure and data : require 8-byte alignment as we need to access it
134 with fld.p, fst.p
135 */
136
137struct sh_fpu_hard_struct {
138 unsigned long fp_regs[64];
139 unsigned int fpscr;
140 /* long status; * software status information */
141};
142
143#if 0
144/* Dummy fpu emulator */
145struct sh_fpu_soft_struct {
146 unsigned long long fp_regs[32];
147 unsigned int fpscr;
148 unsigned char lookahead;
149 unsigned long entry_pc;
150};
151#endif
152
153union sh_fpu_union {
154 struct sh_fpu_hard_struct hard;
155 /* 'hard' itself only produces 32 bit alignment, yet we need
156 to access it using 64 bit load/store as well. */
157 unsigned long long alignment_dummy;
158};
159
160struct thread_struct {
161 unsigned long sp;
162 unsigned long pc;
163 /* This stores the address of the pt_regs built during a context
164 switch, or of the register save area built for a kernel mode
165 exception. It is used for backtracing the stack of a sleeping task
166 or one that traps in kernel mode. */
167 struct pt_regs *kregs;
168 /* This stores the address of the pt_regs constructed on entry from
169 user mode. It is a fixed value over the lifetime of a process, or
170 NULL for a kernel thread. */
171 struct pt_regs *uregs;
172
173 unsigned long trap_no, error_code;
174 unsigned long address;
175 /* Hardware debugging registers may come here */
176
177 /* floating point info */
178 union sh_fpu_union fpu;
179};
180
181#define INIT_MMAP \
182{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
183
184extern struct pt_regs fake_swapper_regs;
185
186#define INIT_THREAD { \
187 .sp = sizeof(init_stack) + \
188 (long) &init_stack, \
189 .pc = 0, \
190 .kregs = &fake_swapper_regs, \
191 .uregs = NULL, \
192 .trap_no = 0, \
193 .error_code = 0, \
194 .address = 0, \
195 .fpu = { { { 0, } }, } \
196}
197
198/*
199 * Do necessary setup to start up a newly executed thread.
200 */
201#define SR_USER (SR_MMU | SR_FD)
202
203#define start_thread(regs, new_pc, new_sp) \
204 set_fs(USER_DS); \
205 regs->sr = SR_USER; /* User mode. */ \
206 regs->pc = new_pc - 4; /* Compensate syscall exit */ \
207 regs->pc |= 1; /* Set SHmedia ! */ \
208 regs->regs[18] = 0; \
209 regs->regs[15] = new_sp
210
211/* Forward declaration, a strange C thing */
212struct task_struct;
213struct mm_struct;
214
215/* Free all resources held by a thread. */
216extern void release_thread(struct task_struct *);
217/*
218 * create a kernel thread without removing it from tasklists
219 */
220extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
221
222
223/* Copy and release all segment info associated with a VM */
224#define copy_segments(p, mm) do { } while (0)
225#define release_segments(mm) do { } while (0)
226#define forget_segments() do { } while (0)
227#define prepare_to_copy(tsk) do { } while (0)
228/*
229 * FPU lazy state save handling.
230 */
231
232static inline void release_fpu(void)
233{
234 unsigned long long __dummy;
235
236 /* Set FD flag in SR */
237 __asm__ __volatile__("getcon " __SR ", %0\n\t"
238 "or %0, %1, %0\n\t"
239 "putcon %0, " __SR "\n\t"
240 : "=&r" (__dummy)
241 : "r" (SR_FD));
242}
243
244static inline void grab_fpu(void)
245{
246 unsigned long long __dummy;
247
248 /* Clear out FD flag in SR */
249 __asm__ __volatile__("getcon " __SR ", %0\n\t"
250 "and %0, %1, %0\n\t"
251 "putcon %0, " __SR "\n\t"
252 : "=&r" (__dummy)
253 : "r" (~SR_FD));
254}
255
256/* Round to nearest, no exceptions on inexact, overflow, underflow,
257 zero-divide, invalid. Configure option for whether to flush denorms to
258 zero, or except if a denorm is encountered. */
259#if defined(CONFIG_SH64_FPU_DENORM_FLUSH)
260#define FPSCR_INIT 0x00040000
261#else
262#define FPSCR_INIT 0x00000000
263#endif
264
265/* Save the current FP regs */
266void fpsave(struct sh_fpu_hard_struct *fpregs);
267
268/* Initialise the FP state of a task */
269void fpinit(struct sh_fpu_hard_struct *fpregs);
270
271extern struct task_struct *last_task_used_math;
272
273/*
274 * Return saved PC of a blocked thread.
275 */
276#define thread_saved_pc(tsk) (tsk->thread.pc)
277
278extern unsigned long get_wchan(struct task_struct *p);
279
280#define KSTK_EIP(tsk) ((tsk)->thread.pc)
281#define KSTK_ESP(tsk) ((tsk)->thread.sp)
282
283#define cpu_relax() barrier()
284
285#endif /* __ASSEMBLY__ */
286#endif /* __ASM_SH64_PROCESSOR_H */
287
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