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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-sh64/processor.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-sh64/processor.h')
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diff --git a/include/asm-sh64/processor.h b/include/asm-sh64/processor.h
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1#ifndef __ASM_SH64_PROCESSOR_H
2#define __ASM_SH64_PROCESSOR_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/processor.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 * Copyright (C) 2004 Richard Curnow
14 *
15 */
16
17#include <asm/page.h>
18
19#ifndef __ASSEMBLY__
20
21#include <asm/types.h>
22#include <asm/cache.h>
23#include <asm/registers.h>
24#include <linux/threads.h>
25
26/*
27 * Default implementation of macro that returns current
28 * instruction pointer ("program counter").
29 */
30#define current_text_addr() ({ \
31void *pc; \
32unsigned long long __dummy = 0; \
33__asm__("gettr tr0, %1\n\t" \
34 "pta 4, tr0\n\t" \
35 "gettr tr0, %0\n\t" \
36 "ptabs %1, tr0\n\t" \
37 :"=r" (pc), "=r" (__dummy) \
38 : "1" (__dummy)); \
39pc; })
40
41/*
42 * CPU type and hardware bug flags. Kept separately for each CPU.
43 */
44enum cpu_type {
45 CPU_SH5_101,
46 CPU_SH5_103,
47 CPU_SH_NONE
48};
49
50/*
51 * TLB information structure
52 *
53 * Defined for both I and D tlb, per-processor.
54 */
55struct tlb_info {
56 unsigned long long next;
57 unsigned long long first;
58 unsigned long long last;
59
60 unsigned int entries;
61 unsigned int step;
62
63 unsigned long flags;
64};
65
66struct sh_cpuinfo {
67 enum cpu_type type;
68 unsigned long loops_per_jiffy;
69
70 char hard_math;
71
72 unsigned long *pgd_quick;
73 unsigned long *pmd_quick;
74 unsigned long *pte_quick;
75 unsigned long pgtable_cache_sz;
76 unsigned int cpu_clock, master_clock, bus_clock, module_clock;
77
78 /* Cache info */
79 struct cache_info icache;
80 struct cache_info dcache;
81
82 /* TLB info */
83 struct tlb_info itlb;
84 struct tlb_info dtlb;
85};
86
87extern struct sh_cpuinfo boot_cpu_data;
88
89#define cpu_data (&boot_cpu_data)
90#define current_cpu_data boot_cpu_data
91
92#endif
93
94/*
95 * User space process size: 2GB - 4k.
96 */
97#define TASK_SIZE 0x7ffff000UL
98
99/* This decides where the kernel will search for a free chunk of vm
100 * space during mmap's.
101 */
102#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
103
104/*
105 * Bit of SR register
106 *
107 * FD-bit:
108 * When it's set, it means the processor doesn't have right to use FPU,
109 * and it results exception when the floating operation is executed.
110 *
111 * IMASK-bit:
112 * Interrupt level mask
113 *
114 * STEP-bit:
115 * Single step bit
116 *
117 */
118#define SR_FD 0x00008000
119
120#if defined(CONFIG_SH64_SR_WATCH)
121#define SR_MMU 0x84000000
122#else
123#define SR_MMU 0x80000000
124#endif
125
126#define SR_IMASK 0x000000f0
127#define SR_SSTEP 0x08000000
128
129#ifndef __ASSEMBLY__
130
131/*
132 * FPU structure and data : require 8-byte alignment as we need to access it
133 with fld.p, fst.p
134 */
135
136struct sh_fpu_hard_struct {
137 unsigned long fp_regs[64];
138 unsigned int fpscr;
139 /* long status; * software status information */
140};
141
142#if 0
143/* Dummy fpu emulator */
144struct sh_fpu_soft_struct {
145 unsigned long long fp_regs[32];
146 unsigned int fpscr;
147 unsigned char lookahead;
148 unsigned long entry_pc;
149};
150#endif
151
152union sh_fpu_union {
153 struct sh_fpu_hard_struct hard;
154 /* 'hard' itself only produces 32 bit alignment, yet we need
155 to access it using 64 bit load/store as well. */
156 unsigned long long alignment_dummy;
157};
158
159struct thread_struct {
160 unsigned long sp;
161 unsigned long pc;
162 /* This stores the address of the pt_regs built during a context
163 switch, or of the register save area built for a kernel mode
164 exception. It is used for backtracing the stack of a sleeping task
165 or one that traps in kernel mode. */
166 struct pt_regs *kregs;
167 /* This stores the address of the pt_regs constructed on entry from
168 user mode. It is a fixed value over the lifetime of a process, or
169 NULL for a kernel thread. */
170 struct pt_regs *uregs;
171
172 unsigned long trap_no, error_code;
173 unsigned long address;
174 /* Hardware debugging registers may come here */
175
176 /* floating point info */
177 union sh_fpu_union fpu;
178};
179
180#define INIT_MMAP \
181{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
182
183extern struct pt_regs fake_swapper_regs;
184
185#define INIT_THREAD { \
186 .sp = sizeof(init_stack) + \
187 (long) &init_stack, \
188 .pc = 0, \
189 .kregs = &fake_swapper_regs, \
190 .uregs = NULL, \
191 .trap_no = 0, \
192 .error_code = 0, \
193 .address = 0, \
194 .fpu = { { { 0, } }, } \
195}
196
197/*
198 * Do necessary setup to start up a newly executed thread.
199 */
200#define SR_USER (SR_MMU | SR_FD)
201
202#define start_thread(regs, new_pc, new_sp) \
203 set_fs(USER_DS); \
204 regs->sr = SR_USER; /* User mode. */ \
205 regs->pc = new_pc - 4; /* Compensate syscall exit */ \
206 regs->pc |= 1; /* Set SHmedia ! */ \
207 regs->regs[18] = 0; \
208 regs->regs[15] = new_sp
209
210/* Forward declaration, a strange C thing */
211struct task_struct;
212struct mm_struct;
213
214/* Free all resources held by a thread. */
215extern void release_thread(struct task_struct *);
216/*
217 * create a kernel thread without removing it from tasklists
218 */
219extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
220
221
222/* Copy and release all segment info associated with a VM */
223#define copy_segments(p, mm) do { } while (0)
224#define release_segments(mm) do { } while (0)
225#define forget_segments() do { } while (0)
226#define prepare_to_copy(tsk) do { } while (0)
227/*
228 * FPU lazy state save handling.
229 */
230
231extern __inline__ void release_fpu(void)
232{
233 unsigned long long __dummy;
234
235 /* Set FD flag in SR */
236 __asm__ __volatile__("getcon " __SR ", %0\n\t"
237 "or %0, %1, %0\n\t"
238 "putcon %0, " __SR "\n\t"
239 : "=&r" (__dummy)
240 : "r" (SR_FD));
241}
242
243extern __inline__ void grab_fpu(void)
244{
245 unsigned long long __dummy;
246
247 /* Clear out FD flag in SR */
248 __asm__ __volatile__("getcon " __SR ", %0\n\t"
249 "and %0, %1, %0\n\t"
250 "putcon %0, " __SR "\n\t"
251 : "=&r" (__dummy)
252 : "r" (~SR_FD));
253}
254
255/* Round to nearest, no exceptions on inexact, overflow, underflow,
256 zero-divide, invalid. Configure option for whether to flush denorms to
257 zero, or except if a denorm is encountered. */
258#if defined(CONFIG_SH64_FPU_DENORM_FLUSH)
259#define FPSCR_INIT 0x00040000
260#else
261#define FPSCR_INIT 0x00000000
262#endif
263
264/* Save the current FP regs */
265void fpsave(struct sh_fpu_hard_struct *fpregs);
266
267/* Initialise the FP state of a task */
268void fpinit(struct sh_fpu_hard_struct *fpregs);
269
270extern struct task_struct *last_task_used_math;
271
272/*
273 * Return saved PC of a blocked thread.
274 */
275#define thread_saved_pc(tsk) (tsk->thread.pc)
276
277extern unsigned long get_wchan(struct task_struct *p);
278
279#define KSTK_EIP(tsk) ((tsk)->thread.pc)
280#define KSTK_ESP(tsk) ((tsk)->thread.sp)
281
282#define cpu_relax() do { } while (0)
283
284#endif /* __ASSEMBLY__ */
285#endif /* __ASM_SH64_PROCESSOR_H */
286