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authorShaohua Li <shaohua.li@intel.com>2006-03-27 04:15:24 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-27 11:44:44 -0500
commitb06be912a3ad68c69dba0ed6e92723140020e392 (patch)
tree4de1f2c2804ae3230e14e94d3f33a14467889233 /include/asm-sh64/mc146818rtc.h
parent0806903316d516a3b3851c51cea5c71724d9051d (diff)
[PATCH] x86: don't use cpuid.2 to determine cache info if cpuid.4 is supported
Don't use cpuid.2 to determine cache info if cpuid.4 is supported. The exception is P4 trace cache. We always use cpuid.2 to get trace cache under P4. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-sh64/mc146818rtc.h')
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