diff options
author | Paul Mundt <lethal@linux-sh.org> | 2007-11-21 03:28:09 -0500 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2008-01-27 23:18:53 -0500 |
commit | c8eef8800f1c693a2de6374b1948c8ea5e0ad75f (patch) | |
tree | b8f66bd608ae5aa22e2ef508ccf0536a137bd127 /include/asm-sh64/dma-mapping.h | |
parent | e150e7f25f7e3878cf2230193a5c708d99b9971e (diff) |
sh: Purge dead sh64 headers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh64/dma-mapping.h')
-rw-r--r-- | include/asm-sh64/dma-mapping.h | 194 |
1 files changed, 0 insertions, 194 deletions
diff --git a/include/asm-sh64/dma-mapping.h b/include/asm-sh64/dma-mapping.h deleted file mode 100644 index 18f8dd642ac5..000000000000 --- a/include/asm-sh64/dma-mapping.h +++ /dev/null | |||
@@ -1,194 +0,0 @@ | |||
1 | #ifndef __ASM_SH_DMA_MAPPING_H | ||
2 | #define __ASM_SH_DMA_MAPPING_H | ||
3 | |||
4 | #include <linux/mm.h> | ||
5 | #include <linux/scatterlist.h> | ||
6 | #include <asm/io.h> | ||
7 | |||
8 | struct pci_dev; | ||
9 | extern void *consistent_alloc(struct pci_dev *hwdev, size_t size, | ||
10 | dma_addr_t *dma_handle); | ||
11 | extern void consistent_free(struct pci_dev *hwdev, size_t size, | ||
12 | void *vaddr, dma_addr_t dma_handle); | ||
13 | |||
14 | #define dma_supported(dev, mask) (1) | ||
15 | |||
16 | static inline int dma_set_mask(struct device *dev, u64 mask) | ||
17 | { | ||
18 | if (!dev->dma_mask || !dma_supported(dev, mask)) | ||
19 | return -EIO; | ||
20 | |||
21 | *dev->dma_mask = mask; | ||
22 | |||
23 | return 0; | ||
24 | } | ||
25 | |||
26 | static inline void *dma_alloc_coherent(struct device *dev, size_t size, | ||
27 | dma_addr_t *dma_handle, gfp_t flag) | ||
28 | { | ||
29 | return consistent_alloc(NULL, size, dma_handle); | ||
30 | } | ||
31 | |||
32 | static inline void dma_free_coherent(struct device *dev, size_t size, | ||
33 | void *vaddr, dma_addr_t dma_handle) | ||
34 | { | ||
35 | consistent_free(NULL, size, vaddr, dma_handle); | ||
36 | } | ||
37 | |||
38 | #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) | ||
39 | #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) | ||
40 | #define dma_is_consistent(d, h) (1) | ||
41 | |||
42 | static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, | ||
43 | enum dma_data_direction dir) | ||
44 | { | ||
45 | unsigned long start = (unsigned long) vaddr; | ||
46 | unsigned long s = start & L1_CACHE_ALIGN_MASK; | ||
47 | unsigned long e = (start + size) & L1_CACHE_ALIGN_MASK; | ||
48 | |||
49 | for (; s <= e; s += L1_CACHE_BYTES) | ||
50 | asm volatile ("ocbp %0, 0" : : "r" (s)); | ||
51 | } | ||
52 | |||
53 | static inline dma_addr_t dma_map_single(struct device *dev, | ||
54 | void *ptr, size_t size, | ||
55 | enum dma_data_direction dir) | ||
56 | { | ||
57 | #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
58 | if (dev->bus == &pci_bus_type) | ||
59 | return virt_to_phys(ptr); | ||
60 | #endif | ||
61 | dma_cache_sync(dev, ptr, size, dir); | ||
62 | |||
63 | return virt_to_phys(ptr); | ||
64 | } | ||
65 | |||
66 | #define dma_unmap_single(dev, addr, size, dir) do { } while (0) | ||
67 | |||
68 | static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, | ||
69 | int nents, enum dma_data_direction dir) | ||
70 | { | ||
71 | int i; | ||
72 | |||
73 | for (i = 0; i < nents; i++) { | ||
74 | #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
75 | dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir); | ||
76 | #endif | ||
77 | sg[i].dma_address = sg_phys(&sg[i]); | ||
78 | } | ||
79 | |||
80 | return nents; | ||
81 | } | ||
82 | |||
83 | #define dma_unmap_sg(dev, sg, nents, dir) do { } while (0) | ||
84 | |||
85 | static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, | ||
86 | unsigned long offset, size_t size, | ||
87 | enum dma_data_direction dir) | ||
88 | { | ||
89 | return dma_map_single(dev, page_address(page) + offset, size, dir); | ||
90 | } | ||
91 | |||
92 | static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, | ||
93 | size_t size, enum dma_data_direction dir) | ||
94 | { | ||
95 | dma_unmap_single(dev, dma_address, size, dir); | ||
96 | } | ||
97 | |||
98 | static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle, | ||
99 | size_t size, enum dma_data_direction dir) | ||
100 | { | ||
101 | #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
102 | if (dev->bus == &pci_bus_type) | ||
103 | return; | ||
104 | #endif | ||
105 | dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir); | ||
106 | } | ||
107 | |||
108 | static inline void dma_sync_single_range(struct device *dev, | ||
109 | dma_addr_t dma_handle, | ||
110 | unsigned long offset, size_t size, | ||
111 | enum dma_data_direction dir) | ||
112 | { | ||
113 | #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
114 | if (dev->bus == &pci_bus_type) | ||
115 | return; | ||
116 | #endif | ||
117 | dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir); | ||
118 | } | ||
119 | |||
120 | static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, | ||
121 | int nelems, enum dma_data_direction dir) | ||
122 | { | ||
123 | int i; | ||
124 | |||
125 | for (i = 0; i < nelems; i++) { | ||
126 | #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT) | ||
127 | dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir); | ||
128 | #endif | ||
129 | sg[i].dma_address = sg_phys(&sg[i]); | ||
130 | } | ||
131 | } | ||
132 | |||
133 | static inline void dma_sync_single_for_cpu(struct device *dev, | ||
134 | dma_addr_t dma_handle, size_t size, | ||
135 | enum dma_data_direction dir) | ||
136 | { | ||
137 | dma_sync_single(dev, dma_handle, size, dir); | ||
138 | } | ||
139 | |||
140 | static inline void dma_sync_single_for_device(struct device *dev, | ||
141 | dma_addr_t dma_handle, size_t size, | ||
142 | enum dma_data_direction dir) | ||
143 | { | ||
144 | dma_sync_single(dev, dma_handle, size, dir); | ||
145 | } | ||
146 | |||
147 | static inline void dma_sync_single_range_for_cpu(struct device *dev, | ||
148 | dma_addr_t dma_handle, | ||
149 | unsigned long offset, | ||
150 | size_t size, | ||
151 | enum dma_data_direction direction) | ||
152 | { | ||
153 | dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction); | ||
154 | } | ||
155 | |||
156 | static inline void dma_sync_single_range_for_device(struct device *dev, | ||
157 | dma_addr_t dma_handle, | ||
158 | unsigned long offset, | ||
159 | size_t size, | ||
160 | enum dma_data_direction direction) | ||
161 | { | ||
162 | dma_sync_single_for_device(dev, dma_handle+offset, size, direction); | ||
163 | } | ||
164 | |||
165 | static inline void dma_sync_sg_for_cpu(struct device *dev, | ||
166 | struct scatterlist *sg, int nelems, | ||
167 | enum dma_data_direction dir) | ||
168 | { | ||
169 | dma_sync_sg(dev, sg, nelems, dir); | ||
170 | } | ||
171 | |||
172 | static inline void dma_sync_sg_for_device(struct device *dev, | ||
173 | struct scatterlist *sg, int nelems, | ||
174 | enum dma_data_direction dir) | ||
175 | { | ||
176 | dma_sync_sg(dev, sg, nelems, dir); | ||
177 | } | ||
178 | |||
179 | static inline int dma_get_cache_alignment(void) | ||
180 | { | ||
181 | /* | ||
182 | * Each processor family will define its own L1_CACHE_SHIFT, | ||
183 | * L1_CACHE_BYTES wraps to this, so this is always safe. | ||
184 | */ | ||
185 | return L1_CACHE_BYTES; | ||
186 | } | ||
187 | |||
188 | static inline int dma_mapping_error(dma_addr_t dma_addr) | ||
189 | { | ||
190 | return dma_addr == 0; | ||
191 | } | ||
192 | |||
193 | #endif /* __ASM_SH_DMA_MAPPING_H */ | ||
194 | |||