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authorPaul Mundt <lethal@linux-sh.org>2006-12-04 04:17:28 -0500
committerPaul Mundt <lethal@linux-sh.org>2006-12-05 20:45:40 -0500
commitafbfb52e47273a440df33274452c603e8c332de2 (patch)
tree041dc70061a67e787b362959298e093830b4b4d7 /include/asm-sh/system.h
parentc03c69610bfa728805deceeb624ee4268c722a5a (diff)
sh: stacktrace/lockdep/irqflags tracing support.
Wire up all of the essentials for lockdep.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/system.h')
-rw-r--r--include/asm-sh/system.h101
1 files changed, 1 insertions, 100 deletions
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index 3340126f4e0f..b1e42e7f998b 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -6,6 +6,7 @@
6 * Copyright (C) 2002 Paul Mundt 6 * Copyright (C) 2002 Paul Mundt
7 */ 7 */
8 8
9#include <linux/irqflags.h>
9#include <asm/types.h> 10#include <asm/types.h>
10 11
11/* 12/*
@@ -131,103 +132,6 @@ static inline unsigned long tas(volatile int *m)
131 132
132#define set_mb(var, value) do { xchg(&var, value); } while (0) 133#define set_mb(var, value) do { xchg(&var, value); } while (0)
133 134
134/* Interrupt Control */
135#ifdef CONFIG_CPU_HAS_SR_RB
136static inline void local_irq_enable(void)
137{
138 unsigned long __dummy0, __dummy1;
139
140 __asm__ __volatile__("stc sr, %0\n\t"
141 "and %1, %0\n\t"
142 "stc r6_bank, %1\n\t"
143 "or %1, %0\n\t"
144 "ldc %0, sr"
145 : "=&r" (__dummy0), "=r" (__dummy1)
146 : "1" (~0x000000f0)
147 : "memory");
148}
149#else
150static inline void local_irq_enable(void)
151{
152 unsigned long __dummy0, __dummy1;
153
154 __asm__ __volatile__ (
155 "stc sr, %0\n\t"
156 "and %1, %0\n\t"
157 "ldc %0, sr\n\t"
158 : "=&r" (__dummy0), "=r" (__dummy1)
159 : "1" (~0x000000f0)
160 : "memory");
161}
162#endif
163
164static inline void local_irq_disable(void)
165{
166 unsigned long __dummy;
167 __asm__ __volatile__("stc sr, %0\n\t"
168 "or #0xf0, %0\n\t"
169 "ldc %0, sr"
170 : "=&z" (__dummy)
171 : /* no inputs */
172 : "memory");
173}
174
175static inline void set_bl_bit(void)
176{
177 unsigned long __dummy0, __dummy1;
178
179 __asm__ __volatile__ ("stc sr, %0\n\t"
180 "or %2, %0\n\t"
181 "and %3, %0\n\t"
182 "ldc %0, sr"
183 : "=&r" (__dummy0), "=r" (__dummy1)
184 : "r" (0x10000000), "r" (0xffffff0f)
185 : "memory");
186}
187
188static inline void clear_bl_bit(void)
189{
190 unsigned long __dummy0, __dummy1;
191
192 __asm__ __volatile__ ("stc sr, %0\n\t"
193 "and %2, %0\n\t"
194 "ldc %0, sr"
195 : "=&r" (__dummy0), "=r" (__dummy1)
196 : "1" (~0x10000000)
197 : "memory");
198}
199
200#define local_save_flags(x) \
201 __asm__("stc sr, %0; and #0xf0, %0" : "=&z" (x) :/**/: "memory" )
202
203#define irqs_disabled() \
204({ \
205 unsigned long flags; \
206 local_save_flags(flags); \
207 (flags != 0); \
208})
209
210static inline unsigned long local_irq_save(void)
211{
212 unsigned long flags, __dummy;
213
214 __asm__ __volatile__("stc sr, %1\n\t"
215 "mov %1, %0\n\t"
216 "or #0xf0, %0\n\t"
217 "ldc %0, sr\n\t"
218 "mov %1, %0\n\t"
219 "and #0xf0, %0"
220 : "=&z" (flags), "=&r" (__dummy)
221 :/**/
222 : "memory" );
223 return flags;
224}
225
226#define local_irq_restore(x) do { \
227 if ((x & 0x000000f0) != 0x000000f0) \
228 local_irq_enable(); \
229} while (0)
230
231/* 135/*
232 * Jump to P2 area. 136 * Jump to P2 area.
233 * When handling TLB or caches, we need to do it from P2 area. 137 * When handling TLB or caches, we need to do it from P2 area.
@@ -264,9 +168,6 @@ do { \
264 : "=&r" (__dummy)); \ 168 : "=&r" (__dummy)); \
265} while (0) 169} while (0)
266 170
267/* For spinlocks etc */
268#define local_irq_save(x) x = local_irq_save()
269
270static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) 171static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
271{ 172{
272 unsigned long flags, retval; 173 unsigned long flags, retval;