diff options
author | Ingo Molnar <mingo@elte.hu> | 2005-09-10 03:25:56 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-10 13:06:21 -0400 |
commit | fb1c8f93d869b34cacb8b8932e2b83d96a19d720 (patch) | |
tree | a006d078aa02e421a7dc4793c335308204859d36 /include/asm-sh/spinlock.h | |
parent | 4327edf6b8a7ac7dce144313947995538842d8fd (diff) |
[PATCH] spinlock consolidation
This patch (written by me and also containing many suggestions of Arjan van
de Ven) does a major cleanup of the spinlock code. It does the following
things:
- consolidates and enhances the spinlock/rwlock debugging code
- simplifies the asm/spinlock.h files
- encapsulates the raw spinlock type and moves generic spinlock
features (such as ->break_lock) into the generic code.
- cleans up the spinlock code hierarchy to get rid of the spaghetti.
Most notably there's now only a single variant of the debugging code,
located in lib/spinlock_debug.c. (previously we had one SMP debugging
variant per architecture, plus a separate generic one for UP builds)
Also, i've enhanced the rwlock debugging facility, it will now track
write-owners. There is new spinlock-owner/CPU-tracking on SMP builds too.
All locks have lockup detection now, which will work for both soft and hard
spin/rwlock lockups.
The arch-level include files now only contain the minimally necessary
subset of the spinlock code - all the rest that can be generalized now
lives in the generic headers:
include/asm-i386/spinlock_types.h | 16
include/asm-x86_64/spinlock_types.h | 16
I have also split up the various spinlock variants into separate files,
making it easier to see which does what. The new layout is:
SMP | UP
----------------------------|-----------------------------------
asm/spinlock_types_smp.h | linux/spinlock_types_up.h
linux/spinlock_types.h | linux/spinlock_types.h
asm/spinlock_smp.h | linux/spinlock_up.h
linux/spinlock_api_smp.h | linux/spinlock_api_up.h
linux/spinlock.h | linux/spinlock.h
/*
* here's the role of the various spinlock/rwlock related include files:
*
* on SMP builds:
*
* asm/spinlock_types.h: contains the raw_spinlock_t/raw_rwlock_t and the
* initializers
*
* linux/spinlock_types.h:
* defines the generic type and initializers
*
* asm/spinlock.h: contains the __raw_spin_*()/etc. lowlevel
* implementations, mostly inline assembly code
*
* (also included on UP-debug builds:)
*
* linux/spinlock_api_smp.h:
* contains the prototypes for the _spin_*() APIs.
*
* linux/spinlock.h: builds the final spin_*() APIs.
*
* on UP builds:
*
* linux/spinlock_type_up.h:
* contains the generic, simplified UP spinlock type.
* (which is an empty structure on non-debug builds)
*
* linux/spinlock_types.h:
* defines the generic type and initializers
*
* linux/spinlock_up.h:
* contains the __raw_spin_*()/etc. version of UP
* builds. (which are NOPs on non-debug, non-preempt
* builds)
*
* (included on UP-non-debug builds:)
*
* linux/spinlock_api_up.h:
* builds the _spin_*() APIs.
*
* linux/spinlock.h: builds the final spin_*() APIs.
*/
All SMP and UP architectures are converted by this patch.
arm, i386, ia64, ppc, ppc64, s390/s390x, x64 was build-tested via
crosscompilers. m32r, mips, sh, sparc, have not been tested yet, but should
be mostly fine.
From: Grant Grundler <grundler@parisc-linux.org>
Booted and lightly tested on a500-44 (64-bit, SMP kernel, dual CPU).
Builds 32-bit SMP kernel (not booted or tested). I did not try to build
non-SMP kernels. That should be trivial to fix up later if necessary.
I converted bit ops atomic_hash lock to raw_spinlock_t. Doing so avoids
some ugly nesting of linux/*.h and asm/*.h files. Those particular locks
are well tested and contained entirely inside arch specific code. I do NOT
expect any new issues to arise with them.
If someone does ever need to use debug/metrics with them, then they will
need to unravel this hairball between spinlocks, atomic ops, and bit ops
that exist only because parisc has exactly one atomic instruction: LDCW
(load and clear word).
From: "Luck, Tony" <tony.luck@intel.com>
ia64 fix
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Arjan van de Ven <arjanv@infradead.org>
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Cc: Matthew Wilcox <willy@debian.org>
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Signed-off-by: Mikael Pettersson <mikpe@csd.uu.se>
Signed-off-by: Benoit Boissinot <benoit.boissinot@ens-lyon.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-sh/spinlock.h')
-rw-r--r-- | include/asm-sh/spinlock.h | 61 |
1 files changed, 20 insertions, 41 deletions
diff --git a/include/asm-sh/spinlock.h b/include/asm-sh/spinlock.h index e770b55649eb..846322d4c35d 100644 --- a/include/asm-sh/spinlock.h +++ b/include/asm-sh/spinlock.h | |||
@@ -15,20 +15,11 @@ | |||
15 | /* | 15 | /* |
16 | * Your basic SMP spinlocks, allowing only a single CPU anywhere | 16 | * Your basic SMP spinlocks, allowing only a single CPU anywhere |
17 | */ | 17 | */ |
18 | typedef struct { | ||
19 | volatile unsigned long lock; | ||
20 | #ifdef CONFIG_PREEMPT | ||
21 | unsigned int break_lock; | ||
22 | #endif | ||
23 | } spinlock_t; | ||
24 | 18 | ||
25 | #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 } | 19 | #define __raw_spin_is_locked(x) ((x)->lock != 0) |
26 | 20 | #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) | |
27 | #define spin_lock_init(x) do { *(x) = SPIN_LOCK_UNLOCKED; } while(0) | 21 | #define __raw_spin_unlock_wait(x) \ |
28 | 22 | do { cpu_relax(); } while (__raw_spin_is_locked(x)) | |
29 | #define spin_is_locked(x) ((x)->lock != 0) | ||
30 | #define spin_unlock_wait(x) do { barrier(); } while (spin_is_locked(x)) | ||
31 | #define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock) | ||
32 | 23 | ||
33 | /* | 24 | /* |
34 | * Simple spin lock operations. There are two variants, one clears IRQ's | 25 | * Simple spin lock operations. There are two variants, one clears IRQ's |
@@ -36,7 +27,7 @@ typedef struct { | |||
36 | * | 27 | * |
37 | * We make no fairness assumptions. They have a cost. | 28 | * We make no fairness assumptions. They have a cost. |
38 | */ | 29 | */ |
39 | static inline void _raw_spin_lock(spinlock_t *lock) | 30 | static inline void __raw_spin_lock(raw_spinlock_t *lock) |
40 | { | 31 | { |
41 | __asm__ __volatile__ ( | 32 | __asm__ __volatile__ ( |
42 | "1:\n\t" | 33 | "1:\n\t" |
@@ -49,14 +40,14 @@ static inline void _raw_spin_lock(spinlock_t *lock) | |||
49 | ); | 40 | ); |
50 | } | 41 | } |
51 | 42 | ||
52 | static inline void _raw_spin_unlock(spinlock_t *lock) | 43 | static inline void __raw_spin_unlock(raw_spinlock_t *lock) |
53 | { | 44 | { |
54 | assert_spin_locked(lock); | 45 | assert_spin_locked(lock); |
55 | 46 | ||
56 | lock->lock = 0; | 47 | lock->lock = 0; |
57 | } | 48 | } |
58 | 49 | ||
59 | #define _raw_spin_trylock(x) (!test_and_set_bit(0, &(x)->lock)) | 50 | #define __raw_spin_trylock(x) (!test_and_set_bit(0, &(x)->lock)) |
60 | 51 | ||
61 | /* | 52 | /* |
62 | * Read-write spinlocks, allowing multiple readers but only one writer. | 53 | * Read-write spinlocks, allowing multiple readers but only one writer. |
@@ -66,51 +57,40 @@ static inline void _raw_spin_unlock(spinlock_t *lock) | |||
66 | * needs to get a irq-safe write-lock, but readers can get non-irqsafe | 57 | * needs to get a irq-safe write-lock, but readers can get non-irqsafe |
67 | * read-locks. | 58 | * read-locks. |
68 | */ | 59 | */ |
69 | typedef struct { | 60 | |
70 | spinlock_t lock; | 61 | static inline void __raw_read_lock(raw_rwlock_t *rw) |
71 | atomic_t counter; | ||
72 | #ifdef CONFIG_PREEMPT | ||
73 | unsigned int break_lock; | ||
74 | #endif | ||
75 | } rwlock_t; | ||
76 | |||
77 | #define RW_LOCK_BIAS 0x01000000 | ||
78 | #define RW_LOCK_UNLOCKED (rwlock_t) { { 0 }, { RW_LOCK_BIAS } } | ||
79 | #define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while (0) | ||
80 | |||
81 | static inline void _raw_read_lock(rwlock_t *rw) | ||
82 | { | 62 | { |
83 | _raw_spin_lock(&rw->lock); | 63 | __raw_spin_lock(&rw->lock); |
84 | 64 | ||
85 | atomic_inc(&rw->counter); | 65 | atomic_inc(&rw->counter); |
86 | 66 | ||
87 | _raw_spin_unlock(&rw->lock); | 67 | __raw_spin_unlock(&rw->lock); |
88 | } | 68 | } |
89 | 69 | ||
90 | static inline void _raw_read_unlock(rwlock_t *rw) | 70 | static inline void __raw_read_unlock(raw_rwlock_t *rw) |
91 | { | 71 | { |
92 | _raw_spin_lock(&rw->lock); | 72 | __raw_spin_lock(&rw->lock); |
93 | 73 | ||
94 | atomic_dec(&rw->counter); | 74 | atomic_dec(&rw->counter); |
95 | 75 | ||
96 | _raw_spin_unlock(&rw->lock); | 76 | __raw_spin_unlock(&rw->lock); |
97 | } | 77 | } |
98 | 78 | ||
99 | static inline void _raw_write_lock(rwlock_t *rw) | 79 | static inline void __raw_write_lock(raw_rwlock_t *rw) |
100 | { | 80 | { |
101 | _raw_spin_lock(&rw->lock); | 81 | __raw_spin_lock(&rw->lock); |
102 | atomic_set(&rw->counter, -1); | 82 | atomic_set(&rw->counter, -1); |
103 | } | 83 | } |
104 | 84 | ||
105 | static inline void _raw_write_unlock(rwlock_t *rw) | 85 | static inline void __raw_write_unlock(raw_rwlock_t *rw) |
106 | { | 86 | { |
107 | atomic_set(&rw->counter, 0); | 87 | atomic_set(&rw->counter, 0); |
108 | _raw_spin_unlock(&rw->lock); | 88 | __raw_spin_unlock(&rw->lock); |
109 | } | 89 | } |
110 | 90 | ||
111 | #define _raw_read_trylock(lock) generic_raw_read_trylock(lock) | 91 | #define __raw_read_trylock(lock) generic__raw_read_trylock(lock) |
112 | 92 | ||
113 | static inline int _raw_write_trylock(rwlock_t *rw) | 93 | static inline int __raw_write_trylock(raw_rwlock_t *rw) |
114 | { | 94 | { |
115 | if (atomic_sub_and_test(RW_LOCK_BIAS, &rw->counter)) | 95 | if (atomic_sub_and_test(RW_LOCK_BIAS, &rw->counter)) |
116 | return 1; | 96 | return 1; |
@@ -121,4 +101,3 @@ static inline int _raw_write_trylock(rwlock_t *rw) | |||
121 | } | 101 | } |
122 | 102 | ||
123 | #endif /* __ASM_SH_SPINLOCK_H */ | 103 | #endif /* __ASM_SH_SPINLOCK_H */ |
124 | |||