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authorMagnus Damm <damm@igel.co.jp>2007-08-03 01:23:35 -0400
committerPaul Mundt <lethal@linux-sh.org>2007-09-20 22:57:47 -0400
commitd59645d6ba67337ff09369d9da4fc47f7dc361cc (patch)
treecd5e81d64ec7e6a4ea22a6f2e45ddf27e1140567 /include/asm-sh/snapgear.h
parentad89f87a84040a57c4a78ca2759b364f72f423ab (diff)
sh: intc - remove redundant irq code for sh03, snapgear and titan
This patch removes redundant board specific interrupt code for boards using sh775x processors and 4 IRQ lines in "Individual Interrupt Mode" aka IRLM. Three boards are affected: sh03, snapgear and titan. The right way to do this is to use cpu specific code provided by intc. A nice side effect is that sh03 now compiles, board not BROKEN any more. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/snapgear.h')
-rw-r--r--include/asm-sh/snapgear.h12
1 files changed, 4 insertions, 8 deletions
diff --git a/include/asm-sh/snapgear.h b/include/asm-sh/snapgear.h
index 3554e3a74e99..042d95f51c4d 100644
--- a/include/asm-sh/snapgear.h
+++ b/include/asm-sh/snapgear.h
@@ -19,20 +19,16 @@
19 * is the interrupt :-) 19 * is the interrupt :-)
20 */ 20 */
21 21
22#define IRL0_IRQ 2 22#define IRL0_IRQ 2
23#define IRL0_IPR_POS 3
24#define IRL0_PRIORITY 13 23#define IRL0_PRIORITY 13
25 24
26#define IRL1_IRQ 5 25#define IRL1_IRQ 5
27#define IRL1_IPR_POS 2
28#define IRL1_PRIORITY 10 26#define IRL1_PRIORITY 10
29 27
30#define IRL2_IRQ 8 28#define IRL2_IRQ 8
31#define IRL2_IPR_POS 1
32#define IRL2_PRIORITY 7 29#define IRL2_PRIORITY 7
33 30
34#define IRL3_IRQ 11 31#define IRL3_IRQ 11
35#define IRL3_IPR_POS 0
36#define IRL3_PRIORITY 4 32#define IRL3_PRIORITY 4
37#endif 33#endif
38 34