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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-sh/rts7751r2d
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-sh/rts7751r2d')
-rw-r--r--include/asm-sh/rts7751r2d/ide.h8
-rw-r--r--include/asm-sh/rts7751r2d/io.h37
-rw-r--r--include/asm-sh/rts7751r2d/rts7751r2d.h73
-rw-r--r--include/asm-sh/rts7751r2d/voyagergx_reg.h313
4 files changed, 431 insertions, 0 deletions
diff --git a/include/asm-sh/rts7751r2d/ide.h b/include/asm-sh/rts7751r2d/ide.h
new file mode 100644
index 000000000000..416f96b407cb
--- /dev/null
+++ b/include/asm-sh/rts7751r2d/ide.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_SH_RTS7751R2D_IDE_H
2#define __ASM_SH_RTS7751R2D_IDE_H
3
4/* Nothing to see here.. */
5#include <asm/rts7751r2d/rts7751r2d.h>
6
7#endif /* __ASM_SH_RTS7751R2D_IDE_H */
8
diff --git a/include/asm-sh/rts7751r2d/io.h b/include/asm-sh/rts7751r2d/io.h
new file mode 100644
index 000000000000..241094020567
--- /dev/null
+++ b/include/asm-sh/rts7751r2d/io.h
@@ -0,0 +1,37 @@
1/*
2 * include/asm-sh/io_rts7751r2d.h
3 *
4 * Modified version of io_se.h for the rts7751r2d-specific functions.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * IO functions for an Renesas Technology sales RTS7751R2D
10 */
11
12#ifndef _ASM_SH_IO_RTS7751R2D_H
13#define _ASM_SH_IO_RTS7751R2D_H
14
15extern unsigned char rts7751r2d_inb(unsigned long port);
16extern unsigned short rts7751r2d_inw(unsigned long port);
17extern unsigned int rts7751r2d_inl(unsigned long port);
18
19extern void rts7751r2d_outb(unsigned char value, unsigned long port);
20extern void rts7751r2d_outw(unsigned short value, unsigned long port);
21extern void rts7751r2d_outl(unsigned int value, unsigned long port);
22
23extern unsigned char rts7751r2d_inb_p(unsigned long port);
24extern void rts7751r2d_outb_p(unsigned char value, unsigned long port);
25
26extern void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count);
27extern void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count);
28extern void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count);
29extern void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count);
30extern void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count);
31extern void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count);
32
33extern void *rts7751r2d_ioremap(unsigned long offset, unsigned long size);
34
35extern unsigned long rts7751r2d_isa_port2addr(unsigned long offset);
36
37#endif /* _ASM_SH_IO_RTS7751R2D_H */
diff --git a/include/asm-sh/rts7751r2d/rts7751r2d.h b/include/asm-sh/rts7751r2d/rts7751r2d.h
new file mode 100644
index 000000000000..4e09ba597e9a
--- /dev/null
+++ b/include/asm-sh/rts7751r2d/rts7751r2d.h
@@ -0,0 +1,73 @@
1#ifndef __ASM_SH_RENESAS_RTS7751R2D_H
2#define __ASM_SH_RENESAS_RTS7751R2D_H
3
4/*
5 * linux/include/asm-sh/renesas_rts7751r2d.h
6 *
7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd.
8 *
9 * Renesas Technology Sales RTS7751R2D support
10 */
11
12/* Box specific addresses. */
13
14#define PA_BCR 0xa4000000 /* FPGA */
15#define PA_IRLMON 0xa4000002 /* Interrupt Status control */
16#define PA_CFCTL 0xa4000004 /* CF Timing control */
17#define PA_CFPOW 0xa4000006 /* CF Power control */
18#define PA_DISPCTL 0xa4000008 /* Display Timing control */
19#define PA_SDMPOW 0xa400000a /* SD Power control */
20#define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */
21#define PA_PCICD 0xa400000e /* PCI Extention detect control */
22#define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */
23#if defined(CONFIG_RTS7751R2D_REV11)
24#define PA_AXRST 0xa4000022 /* AX_LAN Reset control */
25#define PA_CFRST 0xa4000024 /* CF Reset control */
26#define PA_ADMRTS 0xa4000026 /* SD Reset control */
27#define PA_EXTRST 0xa4000028 /* Extention Reset control */
28#define PA_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */
29#else
30#define PA_CFRST 0xa4000022 /* CF Reset control */
31#define PA_ADMRTS 0xa4000024 /* SD Reset control */
32#define PA_EXTRST 0xa4000026 /* Extention Reset control */
33#define PA_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */
34#define PA_KEYCTLCLR 0xa400002a /* Key Interrupt clear */
35#endif
36#define PA_POWOFF 0xa4000030 /* Board Power OFF control */
37#define PA_VERREG 0xa4000032 /* FPGA Version Register */
38#define PA_INPORT 0xa4000034 /* KEY Input Port control */
39#define PA_OUTPORT 0xa4000036 /* LED control */
40#define PA_DMPORT 0xa4000038 /* DM270 Output Port control */
41
42#define PA_AX88796L 0xaa000400 /* AX88796L Area */
43#define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */
44#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
45#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
46#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
47#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
48
49#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
50
51#if defined(CONFIG_RTS7751R2D_REV11)
52#define IRQ_PCIETH 0 /* PCI Ethernet IRQ */
53#define IRQ_CFCARD 1 /* CF Card IRQ */
54#define IRQ_CFINST 2 /* CF Card Insert IRQ */
55#define IRQ_PCMCIA 3 /* PCMCIA IRQ */
56#define IRQ_VOYAGER 4 /* VOYAGER IRQ */
57#define IRQ_ONETH 5 /* On board Ethernet IRQ */
58#else
59#define IRQ_KEYIN 0 /* Key Input IRQ */
60#define IRQ_PCIETH 1 /* PCI Ethernet IRQ */
61#define IRQ_CFCARD 2 /* CF Card IRQ */
62#define IRQ_CFINST 3 /* CF Card Insert IRQ */
63#define IRQ_PCMCIA 4 /* PCMCIA IRQ */
64#define IRQ_VOYAGER 5 /* VOYAGER IRQ */
65#endif
66#define IRQ_RTCALM 6 /* RTC Alarm IRQ */
67#define IRQ_RTCTIME 7 /* RTC Timer IRQ */
68#define IRQ_SDCARD 8 /* SD Card IRQ */
69#define IRQ_PCISLOT1 9 /* PCI Slot #1 IRQ */
70#define IRQ_PCISLOT2 10 /* PCI Slot #2 IRQ */
71#define IRQ_EXTENTION 11 /* EXTn IRQ */
72
73#endif /* __ASM_SH_RENESAS_RTS7751R2D */
diff --git a/include/asm-sh/rts7751r2d/voyagergx_reg.h b/include/asm-sh/rts7751r2d/voyagergx_reg.h
new file mode 100644
index 000000000000..f031b5d6cf54
--- /dev/null
+++ b/include/asm-sh/rts7751r2d/voyagergx_reg.h
@@ -0,0 +1,313 @@
1/* -------------------------------------------------------------------- */
2/* voyagergx_reg.h */
3/* -------------------------------------------------------------------- */
4/* This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17
18 Copyright 2003 (c) Lineo uSolutions,Inc.
19*/
20/* -------------------------------------------------------------------- */
21
22#ifndef _VOYAGER_GX_REG_H
23#define _VOYAGER_GX_REG_H
24
25#define VOYAGER_BASE 0xb3e00000
26#define VOYAGER_USBH_BASE (0x40000 + VOYAGER_BASE)
27#define VOYAGER_UART_BASE (0x30000 + VOYAGER_BASE)
28#define VOYAGER_AC97_BASE (0xa0000 + VOYAGER_BASE)
29
30#define VOYAGER_IRQ_NUM 32
31#define VOYAGER_IRQ_BASE 50
32#define VOYAGER_USBH_IRQ VOYAGER_IRQ_BASE + 6
33#define VOYAGER_8051_IRQ VOYAGER_IRQ_BASE + 10
34#define VOYAGER_UART0_IRQ VOYAGER_IRQ_BASE + 12
35#define VOYAGER_UART1_IRQ VOYAGER_IRQ_BASE + 13
36#define VOYAGER_AC97_IRQ VOYAGER_IRQ_BASE + 17
37
38/* ----- MISC controle register ------------------------------ */
39#define MISC_CTRL (0x000004 + VOYAGER_BASE)
40#define MISC_CTRL_USBCLK_48 (3 << 28)
41#define MISC_CTRL_USBCLK_96 (2 << 28)
42#define MISC_CTRL_USBCLK_CRYSTAL (1 << 28)
43
44/* ----- GPIO[31:0] register --------------------------------- */
45#define GPIO_MUX_LOW (0x000008 + VOYAGER_BASE)
46#define GPIO_MUX_LOW_AC97 0x1F000000
47#define GPIO_MUX_LOW_8051 0x0000ffff
48#define GPIO_MUX_LOW_PWM (1 << 29)
49
50/* ----- GPIO[63:32] register --------------------------------- */
51#define GPIO_MUX_HIGH (0x00000C + VOYAGER_BASE)
52
53/* ----- DRAM controle register ------------------------------- */
54#define DRAM_CTRL (0x000010 + VOYAGER_BASE)
55#define DRAM_CTRL_EMBEDDED (1 << 31)
56#define DRAM_CTRL_CPU_BURST_1 (0 << 28)
57#define DRAM_CTRL_CPU_BURST_2 (1 << 28)
58#define DRAM_CTRL_CPU_BURST_4 (2 << 28)
59#define DRAM_CTRL_CPU_BURST_8 (3 << 28)
60#define DRAM_CTRL_CPU_CAS_LATENCY (1 << 27)
61#define DRAM_CTRL_CPU_SIZE_2 (0 << 24)
62#define DRAM_CTRL_CPU_SIZE_4 (1 << 24)
63#define DRAM_CTRL_CPU_SIZE_64 (4 << 24)
64#define DRAM_CTRL_CPU_SIZE_32 (5 << 24)
65#define DRAM_CTRL_CPU_SIZE_16 (6 << 24)
66#define DRAM_CTRL_CPU_SIZE_8 (7 << 24)
67#define DRAM_CTRL_CPU_COLUMN_SIZE_1024 (0 << 22)
68#define DRAM_CTRL_CPU_COLUMN_SIZE_512 (2 << 22)
69#define DRAM_CTRL_CPU_COLUMN_SIZE_256 (3 << 22)
70#define DRAM_CTRL_CPU_ACTIVE_PRECHARGE (1 << 21)
71#define DRAM_CTRL_CPU_RESET (1 << 20)
72#define DRAM_CTRL_CPU_BANKS (1 << 19)
73#define DRAM_CTRL_CPU_WRITE_PRECHARGE (1 << 18)
74#define DRAM_CTRL_BLOCK_WRITE (1 << 17)
75#define DRAM_CTRL_REFRESH_COMMAND (1 << 16)
76#define DRAM_CTRL_SIZE_4 (0 << 13)
77#define DRAM_CTRL_SIZE_8 (1 << 13)
78#define DRAM_CTRL_SIZE_16 (2 << 13)
79#define DRAM_CTRL_SIZE_32 (3 << 13)
80#define DRAM_CTRL_SIZE_64 (4 << 13)
81#define DRAM_CTRL_SIZE_2 (5 << 13)
82#define DRAM_CTRL_COLUMN_SIZE_256 (0 << 11)
83#define DRAM_CTRL_COLUMN_SIZE_512 (2 << 11)
84#define DRAM_CTRL_COLUMN_SIZE_1024 (3 << 11)
85#define DRAM_CTRL_BLOCK_WRITE_TIME (1 << 10)
86#define DRAM_CTRL_BLOCK_WRITE_PRECHARGE (1 << 9)
87#define DRAM_CTRL_ACTIVE_PRECHARGE (1 << 8)
88#define DRAM_CTRL_RESET (1 << 7)
89#define DRAM_CTRL_REMAIN_ACTIVE (1 << 6)
90#define DRAM_CTRL_BANKS (1 << 1)
91#define DRAM_CTRL_WRITE_PRECHARGE (1 << 0)
92
93/* ----- Arvitration control register -------------------------- */
94#define ARBITRATION_CTRL (0x000014 + VOYAGER_BASE)
95#define ARBITRATION_CTRL_CPUMEM (1 << 29)
96#define ARBITRATION_CTRL_INTMEM (1 << 28)
97#define ARBITRATION_CTRL_USB_OFF (0 << 24)
98#define ARBITRATION_CTRL_USB_PRIORITY_1 (1 << 24)
99#define ARBITRATION_CTRL_USB_PRIORITY_2 (2 << 24)
100#define ARBITRATION_CTRL_USB_PRIORITY_3 (3 << 24)
101#define ARBITRATION_CTRL_USB_PRIORITY_4 (4 << 24)
102#define ARBITRATION_CTRL_USB_PRIORITY_5 (5 << 24)
103#define ARBITRATION_CTRL_USB_PRIORITY_6 (6 << 24)
104#define ARBITRATION_CTRL_USB_PRIORITY_7 (7 << 24)
105#define ARBITRATION_CTRL_PANEL_OFF (0 << 20)
106#define ARBITRATION_CTRL_PANEL_PRIORITY_1 (1 << 20)
107#define ARBITRATION_CTRL_PANEL_PRIORITY_2 (2 << 20)
108#define ARBITRATION_CTRL_PANEL_PRIORITY_3 (3 << 20)
109#define ARBITRATION_CTRL_PANEL_PRIORITY_4 (4 << 20)
110#define ARBITRATION_CTRL_PANEL_PRIORITY_5 (5 << 20)
111#define ARBITRATION_CTRL_PANEL_PRIORITY_6 (6 << 20)
112#define ARBITRATION_CTRL_PANEL_PRIORITY_7 (7 << 20)
113#define ARBITRATION_CTRL_ZVPORT_OFF (0 << 16)
114#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_1 (1 << 16)
115#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_2 (2 << 16)
116#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_3 (3 << 16)
117#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_4 (4 << 16)
118#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_5 (5 << 16)
119#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_6 (6 << 16)
120#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_7 (7 << 16)
121#define ARBITRATION_CTRL_CMD_INTPR_OFF (0 << 12)
122#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_1 (1 << 12)
123#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_2 (2 << 12)
124#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_3 (3 << 12)
125#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_4 (4 << 12)
126#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_5 (5 << 12)
127#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_6 (6 << 12)
128#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_7 (7 << 12)
129#define ARBITRATION_CTRL_DMA_OFF (0 << 8)
130#define ARBITRATION_CTRL_DMA_PRIORITY_1 (1 << 8)
131#define ARBITRATION_CTRL_DMA_PRIORITY_2 (2 << 8)
132#define ARBITRATION_CTRL_DMA_PRIORITY_3 (3 << 8)
133#define ARBITRATION_CTRL_DMA_PRIORITY_4 (4 << 8)
134#define ARBITRATION_CTRL_DMA_PRIORITY_5 (5 << 8)
135#define ARBITRATION_CTRL_DMA_PRIORITY_6 (6 << 8)
136#define ARBITRATION_CTRL_DMA_PRIORITY_7 (7 << 8)
137#define ARBITRATION_CTRL_VIDEO_OFF (0 << 4)
138#define ARBITRATION_CTRL_VIDEO_PRIORITY_1 (1 << 4)
139#define ARBITRATION_CTRL_VIDEO_PRIORITY_2 (2 << 4)
140#define ARBITRATION_CTRL_VIDEO_PRIORITY_3 (3 << 4)
141#define ARBITRATION_CTRL_VIDEO_PRIORITY_4 (4 << 4)
142#define ARBITRATION_CTRL_VIDEO_PRIORITY_5 (5 << 4)
143#define ARBITRATION_CTRL_VIDEO_PRIORITY_6 (6 << 4)
144#define ARBITRATION_CTRL_VIDEO_PRIORITY_7 (7 << 4)
145#define ARBITRATION_CTRL_CRT_OFF (0 << 0)
146#define ARBITRATION_CTRL_CRT_PRIORITY_1 (1 << 0)
147#define ARBITRATION_CTRL_CRT_PRIORITY_2 (2 << 0)
148#define ARBITRATION_CTRL_CRT_PRIORITY_3 (3 << 0)
149#define ARBITRATION_CTRL_CRT_PRIORITY_4 (4 << 0)
150#define ARBITRATION_CTRL_CRT_PRIORITY_5 (5 << 0)
151#define ARBITRATION_CTRL_CRT_PRIORITY_6 (6 << 0)
152#define ARBITRATION_CTRL_CRT_PRIORITY_7 (7 << 0)
153
154/* ----- Command list status register -------------------------- */
155#define CMD_INTPR_STATUS (0x000024 + VOYAGER_BASE)
156
157/* ----- Interrupt status register ----------------------------- */
158#define INT_STATUS (0x00002c + VOYAGER_BASE)
159#define INT_STATUS_UH (1 << 6)
160#define INT_STATUS_MC (1 << 10)
161#define INT_STATUS_U0 (1 << 12)
162#define INT_STATUS_U1 (1 << 13)
163#define INT_STATUS_AC (1 << 17)
164
165/* ----- Interrupt mask register ------------------------------ */
166#define VOYAGER_INT_MASK (0x000030 + VOYAGER_BASE)
167#define VOYAGER_INT_MASK_AC (1 << 17)
168
169/* ----- Current Gate register ---------------------------------*/
170#define CURRENT_GATE (0x000038 + VOYAGER_BASE)
171
172/* ----- Power mode 0 gate register --------------------------- */
173#define POWER_MODE0_GATE (0x000040 + VOYAGER_BASE)
174#define POWER_MODE0_GATE_G (1 << 6)
175#define POWER_MODE0_GATE_U0 (1 << 7)
176#define POWER_MODE0_GATE_U1 (1 << 8)
177#define POWER_MODE0_GATE_UH (1 << 11)
178#define POWER_MODE0_GATE_AC (1 << 18)
179
180/* ----- Power mode 1 gate register --------------------------- */
181#define POWER_MODE1_GATE (0x000048 + VOYAGER_BASE)
182#define POWER_MODE1_GATE_G (1 << 6)
183#define POWER_MODE1_GATE_U0 (1 << 7)
184#define POWER_MODE1_GATE_U1 (1 << 8)
185#define POWER_MODE1_GATE_UH (1 << 11)
186#define POWER_MODE1_GATE_AC (1 << 18)
187
188/* ----- Power mode 0 clock register -------------------------- */
189#define POWER_MODE0_CLOCK (0x000044 + VOYAGER_BASE)
190
191/* ----- Power mode 1 clock register -------------------------- */
192#define POWER_MODE1_CLOCK (0x00004C + VOYAGER_BASE)
193
194/* ----- Power mode controll register ------------------------- */
195#define POWER_MODE_CTRL (0x000054 + VOYAGER_BASE)
196
197/* ----- Miscellaneous Timing register ------------------------ */
198#define SYSTEM_DRAM_CTRL (0x000068 + VOYAGER_BASE)
199
200/* ----- PWM register ------------------------------------------*/
201#define PWM_0 (0x010020 + VOYAGER_BASE)
202#define PWM_0_HC(x) (((x)&0x0fff)<<20)
203#define PWM_0_LC(x) (((x)&0x0fff)<<8 )
204#define PWM_0_CLK_DEV(x) (((x)&0x000f)<<4 )
205#define PWM_0_EN (1<<0)
206
207/* ----- I2C register ----------------------------------------- */
208#define I2C_BYTECOUNT (0x010040 + VOYAGER_BASE)
209#define I2C_CONTROL (0x010041 + VOYAGER_BASE)
210#define I2C_STATUS (0x010042 + VOYAGER_BASE)
211#define I2C_RESET (0x010042 + VOYAGER_BASE)
212#define I2C_SADDRESS (0x010043 + VOYAGER_BASE)
213#define I2C_DATA (0x010044 + VOYAGER_BASE)
214
215/* ----- Controle register bits ----------------------------------------- */
216#define I2C_CONTROL_E (1 << 0)
217#define I2C_CONTROL_MODE (1 << 1)
218#define I2C_CONTROL_STATUS (1 << 2)
219#define I2C_CONTROL_INT (1 << 4)
220#define I2C_CONTROL_INTACK (1 << 5)
221#define I2C_CONTROL_REPEAT (1 << 6)
222
223/* ----- Status register bits ----------------------------------------- */
224#define I2C_STATUS_BUSY (1 << 0)
225#define I2C_STATUS_ACK (1 << 1)
226#define I2C_STATUS_ERROR (1 << 2)
227#define I2C_STATUS_COMPLETE (1 << 3)
228
229/* ----- Reset register ---------------------------------------------- */
230#define I2C_RESET_ERROR (1 << 2)
231
232/* ----- transmission frequencies ------------------------------------- */
233#define I2C_SADDRESS_SELECT (1 << 0)
234
235/* ----- Display Controll register ----------------------------------------- */
236#define PANEL_DISPLAY_CTRL (0x080000 + VOYAGER_BASE)
237#define PANEL_DISPLAY_CTRL_BIAS (1<<26)
238#define PANEL_PAN_CTRL (0x080004 + VOYAGER_BASE)
239#define PANEL_COLOR_KEY (0x080008 + VOYAGER_BASE)
240#define PANEL_FB_ADDRESS (0x08000C + VOYAGER_BASE)
241#define PANEL_FB_WIDTH (0x080010 + VOYAGER_BASE)
242#define PANEL_WINDOW_WIDTH (0x080014 + VOYAGER_BASE)
243#define PANEL_WINDOW_HEIGHT (0x080018 + VOYAGER_BASE)
244#define PANEL_PLANE_TL (0x08001C + VOYAGER_BASE)
245#define PANEL_PLANE_BR (0x080020 + VOYAGER_BASE)
246#define PANEL_HORIZONTAL_TOTAL (0x080024 + VOYAGER_BASE)
247#define PANEL_HORIZONTAL_SYNC (0x080028 + VOYAGER_BASE)
248#define PANEL_VERTICAL_TOTAL (0x08002C + VOYAGER_BASE)
249#define PANEL_VERTICAL_SYNC (0x080030 + VOYAGER_BASE)
250#define PANEL_CURRENT_LINE (0x080034 + VOYAGER_BASE)
251#define VIDEO_DISPLAY_CTRL (0x080040 + VOYAGER_BASE)
252#define VIDEO_FB_0_ADDRESS (0x080044 + VOYAGER_BASE)
253#define VIDEO_FB_WIDTH (0x080048 + VOYAGER_BASE)
254#define VIDEO_FB_0_LAST_ADDRESS (0x08004C + VOYAGER_BASE)
255#define VIDEO_PLANE_TL (0x080050 + VOYAGER_BASE)
256#define VIDEO_PLANE_BR (0x080054 + VOYAGER_BASE)
257#define VIDEO_SCALE (0x080058 + VOYAGER_BASE)
258#define VIDEO_INITIAL_SCALE (0x08005C + VOYAGER_BASE)
259#define VIDEO_YUV_CONSTANTS (0x080060 + VOYAGER_BASE)
260#define VIDEO_FB_1_ADDRESS (0x080064 + VOYAGER_BASE)
261#define VIDEO_FB_1_LAST_ADDRESS (0x080068 + VOYAGER_BASE)
262#define VIDEO_ALPHA_DISPLAY_CTRL (0x080080 + VOYAGER_BASE)
263#define VIDEO_ALPHA_FB_ADDRESS (0x080084 + VOYAGER_BASE)
264#define VIDEO_ALPHA_FB_WIDTH (0x080088 + VOYAGER_BASE)
265#define VIDEO_ALPHA_FB_LAST_ADDRESS (0x08008C + VOYAGER_BASE)
266#define VIDEO_ALPHA_PLANE_TL (0x080090 + VOYAGER_BASE)
267#define VIDEO_ALPHA_PLANE_BR (0x080094 + VOYAGER_BASE)
268#define VIDEO_ALPHA_SCALE (0x080098 + VOYAGER_BASE)
269#define VIDEO_ALPHA_INITIAL_SCALE (0x08009C + VOYAGER_BASE)
270#define VIDEO_ALPHA_CHROMA_KEY (0x0800A0 + VOYAGER_BASE)
271#define PANEL_HWC_ADDRESS (0x0800F0 + VOYAGER_BASE)
272#define PANEL_HWC_LOCATION (0x0800F4 + VOYAGER_BASE)
273#define PANEL_HWC_COLOR_12 (0x0800F8 + VOYAGER_BASE)
274#define PANEL_HWC_COLOR_3 (0x0800FC + VOYAGER_BASE)
275#define ALPHA_DISPLAY_CTRL (0x080100 + VOYAGER_BASE)
276#define ALPHA_FB_ADDRESS (0x080104 + VOYAGER_BASE)
277#define ALPHA_FB_WIDTH (0x080108 + VOYAGER_BASE)
278#define ALPHA_PLANE_TL (0x08010C + VOYAGER_BASE)
279#define ALPHA_PLANE_BR (0x080110 + VOYAGER_BASE)
280#define ALPHA_CHROMA_KEY (0x080114 + VOYAGER_BASE)
281#define CRT_DISPLAY_CTRL (0x080200 + VOYAGER_BASE)
282#define CRT_FB_ADDRESS (0x080204 + VOYAGER_BASE)
283#define CRT_FB_WIDTH (0x080208 + VOYAGER_BASE)
284#define CRT_HORIZONTAL_TOTAL (0x08020C + VOYAGER_BASE)
285#define CRT_HORIZONTAL_SYNC (0x080210 + VOYAGER_BASE)
286#define CRT_VERTICAL_TOTAL (0x080214 + VOYAGER_BASE)
287#define CRT_VERTICAL_SYNC (0x080218 + VOYAGER_BASE)
288#define CRT_SIGNATURE_ANALYZER (0x08021C + VOYAGER_BASE)
289#define CRT_CURRENT_LINE (0x080220 + VOYAGER_BASE)
290#define CRT_MONITOR_DETECT (0x080224 + VOYAGER_BASE)
291#define CRT_HWC_ADDRESS (0x080230 + VOYAGER_BASE)
292#define CRT_HWC_LOCATION (0x080234 + VOYAGER_BASE)
293#define CRT_HWC_COLOR_12 (0x080238 + VOYAGER_BASE)
294#define CRT_HWC_COLOR_3 (0x08023C + VOYAGER_BASE)
295#define CRT_PALETTE_RAM (0x080400 + VOYAGER_BASE)
296#define PANEL_PALETTE_RAM (0x080800 + VOYAGER_BASE)
297#define VIDEO_PALETTE_RAM (0x080C00 + VOYAGER_BASE)
298
299/* ----- 8051 Controle register ----------------------------------------- */
300#define VOYAGER_8051_BASE (0x000c0000 + VOYAGER_BASE)
301#define VOYAGER_8051_RESET (0x000b0000 + VOYAGER_BASE)
302#define VOYAGER_8051_SELECT (0x000b0004 + VOYAGER_BASE)
303#define VOYAGER_8051_CPU_INT (0x000b000c + VOYAGER_BASE)
304
305/* ----- AC97 Controle register ----------------------------------------- */
306#define AC97_TX_SLOT0 (0x00000000 + VOYAGER_AC97_BASE)
307#define AC97_CONTROL_STATUS (0x00000080 + VOYAGER_AC97_BASE)
308#define AC97C_READ (1 << 19)
309#define AC97C_WD_BIT (1 << 2)
310#define AC97C_INDEX_MASK 0x7f
311/* -------------------------------------------------------------------- */
312
313#endif /* _VOYAGER_GX_REG_H */
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