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authorPaul Mundt <lethal@linux-sh.org>2008-07-28 19:09:44 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-07-28 19:09:44 -0400
commitf15cbe6f1a4b4d9df59142fc8e4abb973302cf44 (patch)
tree774d7b11abaaf33561ab8268bf51ddd9ceb79025 /include/asm-sh/processor_64.h
parent25326277d8d1393d1c66240e6255aca780f9e3eb (diff)
sh: migrate to arch/sh/include/
This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/processor_64.h')
-rw-r--r--include/asm-sh/processor_64.h275
1 files changed, 0 insertions, 275 deletions
diff --git a/include/asm-sh/processor_64.h b/include/asm-sh/processor_64.h
deleted file mode 100644
index fc7fc685ba27..000000000000
--- a/include/asm-sh/processor_64.h
+++ /dev/null
@@ -1,275 +0,0 @@
1#ifndef __ASM_SH_PROCESSOR_64_H
2#define __ASM_SH_PROCESSOR_64_H
3
4/*
5 * include/asm-sh/processor_64.h
6 *
7 * Copyright (C) 2000, 2001 Paolo Alberelli
8 * Copyright (C) 2003 Paul Mundt
9 * Copyright (C) 2004 Richard Curnow
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#ifndef __ASSEMBLY__
16
17#include <linux/compiler.h>
18#include <asm/page.h>
19#include <asm/types.h>
20#include <asm/cache.h>
21#include <asm/ptrace.h>
22#include <asm/cpu/registers.h>
23
24/*
25 * Default implementation of macro that returns current
26 * instruction pointer ("program counter").
27 */
28#define current_text_addr() ({ \
29void *pc; \
30unsigned long long __dummy = 0; \
31__asm__("gettr tr0, %1\n\t" \
32 "pta 4, tr0\n\t" \
33 "gettr tr0, %0\n\t" \
34 "ptabs %1, tr0\n\t" \
35 :"=r" (pc), "=r" (__dummy) \
36 : "1" (__dummy)); \
37pc; })
38
39/*
40 * TLB information structure
41 *
42 * Defined for both I and D tlb, per-processor.
43 */
44struct tlb_info {
45 unsigned long long next;
46 unsigned long long first;
47 unsigned long long last;
48
49 unsigned int entries;
50 unsigned int step;
51
52 unsigned long flags;
53};
54
55struct sh_cpuinfo {
56 enum cpu_type type;
57 unsigned long loops_per_jiffy;
58 unsigned long asid_cache;
59
60 unsigned int cpu_clock, master_clock, bus_clock, module_clock;
61
62 /* Cache info */
63 struct cache_info icache;
64 struct cache_info dcache;
65 struct cache_info scache;
66
67 /* TLB info */
68 struct tlb_info itlb;
69 struct tlb_info dtlb;
70
71 unsigned long flags;
72};
73
74extern struct sh_cpuinfo cpu_data[];
75#define boot_cpu_data cpu_data[0]
76#define current_cpu_data cpu_data[smp_processor_id()]
77#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
78
79#endif
80
81/*
82 * User space process size: 2GB - 4k.
83 */
84#define TASK_SIZE 0x7ffff000UL
85
86#define STACK_TOP TASK_SIZE
87#define STACK_TOP_MAX STACK_TOP
88
89/* This decides where the kernel will search for a free chunk of vm
90 * space during mmap's.
91 */
92#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
93
94/*
95 * Bit of SR register
96 *
97 * FD-bit:
98 * When it's set, it means the processor doesn't have right to use FPU,
99 * and it results exception when the floating operation is executed.
100 *
101 * IMASK-bit:
102 * Interrupt level mask
103 *
104 * STEP-bit:
105 * Single step bit
106 *
107 */
108#if defined(CONFIG_SH64_SR_WATCH)
109#define SR_MMU 0x84000000
110#else
111#define SR_MMU 0x80000000
112#endif
113
114#define SR_IMASK 0x000000f0
115#define SR_FD 0x00008000
116#define SR_SSTEP 0x08000000
117
118#ifndef __ASSEMBLY__
119
120/*
121 * FPU structure and data : require 8-byte alignment as we need to access it
122 with fld.p, fst.p
123 */
124
125struct sh_fpu_hard_struct {
126 unsigned long fp_regs[64];
127 unsigned int fpscr;
128 /* long status; * software status information */
129};
130
131#if 0
132/* Dummy fpu emulator */
133struct sh_fpu_soft_struct {
134 unsigned long long fp_regs[32];
135 unsigned int fpscr;
136 unsigned char lookahead;
137 unsigned long entry_pc;
138};
139#endif
140
141union sh_fpu_union {
142 struct sh_fpu_hard_struct hard;
143 /* 'hard' itself only produces 32 bit alignment, yet we need
144 to access it using 64 bit load/store as well. */
145 unsigned long long alignment_dummy;
146};
147
148struct thread_struct {
149 unsigned long sp;
150 unsigned long pc;
151 /* This stores the address of the pt_regs built during a context
152 switch, or of the register save area built for a kernel mode
153 exception. It is used for backtracing the stack of a sleeping task
154 or one that traps in kernel mode. */
155 struct pt_regs *kregs;
156 /* This stores the address of the pt_regs constructed on entry from
157 user mode. It is a fixed value over the lifetime of a process, or
158 NULL for a kernel thread. */
159 struct pt_regs *uregs;
160
161 unsigned long trap_no, error_code;
162 unsigned long address;
163 /* Hardware debugging registers may come here */
164
165 /* floating point info */
166 union sh_fpu_union fpu;
167};
168
169#define INIT_MMAP \
170{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
171
172extern struct pt_regs fake_swapper_regs;
173
174#define INIT_THREAD { \
175 .sp = sizeof(init_stack) + \
176 (long) &init_stack, \
177 .pc = 0, \
178 .kregs = &fake_swapper_regs, \
179 .uregs = NULL, \
180 .trap_no = 0, \
181 .error_code = 0, \
182 .address = 0, \
183 .fpu = { { { 0, } }, } \
184}
185
186/*
187 * Do necessary setup to start up a newly executed thread.
188 */
189#define SR_USER (SR_MMU | SR_FD)
190
191#define start_thread(regs, new_pc, new_sp) \
192 set_fs(USER_DS); \
193 regs->sr = SR_USER; /* User mode. */ \
194 regs->pc = new_pc - 4; /* Compensate syscall exit */ \
195 regs->pc |= 1; /* Set SHmedia ! */ \
196 regs->regs[18] = 0; \
197 regs->regs[15] = new_sp
198
199/* Forward declaration, a strange C thing */
200struct task_struct;
201struct mm_struct;
202
203/* Free all resources held by a thread. */
204extern void release_thread(struct task_struct *);
205/*
206 * create a kernel thread without removing it from tasklists
207 */
208extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
209
210
211/* Copy and release all segment info associated with a VM */
212#define copy_segments(p, mm) do { } while (0)
213#define release_segments(mm) do { } while (0)
214#define forget_segments() do { } while (0)
215#define prepare_to_copy(tsk) do { } while (0)
216/*
217 * FPU lazy state save handling.
218 */
219
220static inline void disable_fpu(void)
221{
222 unsigned long long __dummy;
223
224 /* Set FD flag in SR */
225 __asm__ __volatile__("getcon " __SR ", %0\n\t"
226 "or %0, %1, %0\n\t"
227 "putcon %0, " __SR "\n\t"
228 : "=&r" (__dummy)
229 : "r" (SR_FD));
230}
231
232static inline void enable_fpu(void)
233{
234 unsigned long long __dummy;
235
236 /* Clear out FD flag in SR */
237 __asm__ __volatile__("getcon " __SR ", %0\n\t"
238 "and %0, %1, %0\n\t"
239 "putcon %0, " __SR "\n\t"
240 : "=&r" (__dummy)
241 : "r" (~SR_FD));
242}
243
244/* Round to nearest, no exceptions on inexact, overflow, underflow,
245 zero-divide, invalid. Configure option for whether to flush denorms to
246 zero, or except if a denorm is encountered. */
247#if defined(CONFIG_SH64_FPU_DENORM_FLUSH)
248#define FPSCR_INIT 0x00040000
249#else
250#define FPSCR_INIT 0x00000000
251#endif
252
253#ifdef CONFIG_SH_FPU
254/* Initialise the FP state of a task */
255void fpinit(struct sh_fpu_hard_struct *fpregs);
256#else
257#define fpinit(fpregs) do { } while (0)
258#endif
259
260extern struct task_struct *last_task_used_math;
261
262/*
263 * Return saved PC of a blocked thread.
264 */
265#define thread_saved_pc(tsk) (tsk->thread.pc)
266
267extern unsigned long get_wchan(struct task_struct *p);
268
269#define KSTK_EIP(tsk) ((tsk)->thread.pc)
270#define KSTK_ESP(tsk) ((tsk)->thread.sp)
271
272#define cpu_relax() barrier()
273
274#endif /* __ASSEMBLY__ */
275#endif /* __ASM_SH_PROCESSOR_64_H */
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