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authorPaul Mundt <lethal@linux-sh.org>2007-11-09 03:08:54 -0500
committerPaul Mundt <lethal@linux-sh.org>2008-01-27 23:18:42 -0500
commitaf3c7dfe822b598a2f977098101ed8b63cf0fdd1 (patch)
tree6c7c496559a2dbcdacdbfb147a95ab6546aac462 /include/asm-sh/processor.h
parent33f242ed11ce6b5fbe73fe4ece7ef4bc2f4e2851 (diff)
sh: Split out processor.h in to _32 and _64 variants.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/processor.h')
-rw-r--r--include/asm-sh/processor.h247
1 files changed, 6 insertions, 241 deletions
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index fda68480f377..bf01f486c3e1 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -1,31 +1,5 @@
1/*
2 * include/asm-sh/processor.h
3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
6 */
7
8#ifndef __ASM_SH_PROCESSOR_H 1#ifndef __ASM_SH_PROCESSOR_H
9#define __ASM_SH_PROCESSOR_H 2#define __ASM_SH_PROCESSOR_H
10#ifdef __KERNEL__
11
12#include <linux/compiler.h>
13#include <asm/page.h>
14#include <asm/types.h>
15#include <asm/cache.h>
16#include <asm/ptrace.h>
17#include <asm/cpu-features.h>
18
19/*
20 * Default implementation of macro that returns current
21 * instruction pointer ("program counter").
22 */
23#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
24
25/* Core Processor Version Register */
26#define CCN_PVR 0xff000030
27#define CCN_CVR 0xff000040
28#define CCN_PRR 0xff000044
29 3
30/* 4/*
31 * CPU type and hardware bug flags. Kept separately for each CPU. 5 * CPU type and hardware bug flags. Kept separately for each CPU.
@@ -57,229 +31,20 @@ enum cpu_type {
57 /* SH4AL-DSP types */ 31 /* SH4AL-DSP types */
58 CPU_SH7343, CPU_SH7722, 32 CPU_SH7343, CPU_SH7722,
59 33
34 /* SH-5 types */
35 CPU_SH5_101, CPU_SH5_103,
36
60 /* Unknown subtype */ 37 /* Unknown subtype */
61 CPU_SH_NONE 38 CPU_SH_NONE
62}; 39};
63 40
64struct sh_cpuinfo { 41#ifdef CONFIG_SUPERH32
65 unsigned int type; 42# include "processor_32.h"
66 unsigned long loops_per_jiffy;
67 unsigned long asid_cache;
68
69 struct cache_info icache; /* Primary I-cache */
70 struct cache_info dcache; /* Primary D-cache */
71 struct cache_info scache; /* Secondary cache */
72
73 unsigned long flags;
74} __attribute__ ((aligned(L1_CACHE_BYTES)));
75
76extern struct sh_cpuinfo cpu_data[];
77#define boot_cpu_data cpu_data[0]
78#define current_cpu_data cpu_data[smp_processor_id()]
79#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
80
81/*
82 * User space process size: 2GB.
83 *
84 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
85 */
86#define TASK_SIZE 0x7c000000UL
87
88/* This decides where the kernel will search for a free chunk of vm
89 * space during mmap's.
90 */
91#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
92
93/*
94 * Bit of SR register
95 *
96 * FD-bit:
97 * When it's set, it means the processor doesn't have right to use FPU,
98 * and it results exception when the floating operation is executed.
99 *
100 * IMASK-bit:
101 * Interrupt level mask
102 */
103#define SR_FD 0x00008000
104#define SR_DSP 0x00001000
105#define SR_IMASK 0x000000f0
106
107/*
108 * FPU structure and data
109 */
110
111struct sh_fpu_hard_struct {
112 unsigned long fp_regs[16];
113 unsigned long xfp_regs[16];
114 unsigned long fpscr;
115 unsigned long fpul;
116
117 long status; /* software status information */
118};
119
120/* Dummy fpu emulator */
121struct sh_fpu_soft_struct {
122 unsigned long fp_regs[16];
123 unsigned long xfp_regs[16];
124 unsigned long fpscr;
125 unsigned long fpul;
126
127 unsigned char lookahead;
128 unsigned long entry_pc;
129};
130
131union sh_fpu_union {
132 struct sh_fpu_hard_struct hard;
133 struct sh_fpu_soft_struct soft;
134};
135
136struct thread_struct {
137 /* Saved registers when thread is descheduled */
138 unsigned long sp;
139 unsigned long pc;
140
141 /* Hardware debugging registers */
142 unsigned long ubc_pc;
143
144 /* floating point info */
145 union sh_fpu_union fpu;
146};
147
148typedef struct {
149 unsigned long seg;
150} mm_segment_t;
151
152/* Count of active tasks with UBC settings */
153extern int ubc_usercnt;
154
155#define INIT_THREAD { \
156 .sp = sizeof(init_stack) + (long) &init_stack, \
157}
158
159/*
160 * Do necessary setup to start up a newly executed thread.
161 */
162#define start_thread(regs, new_pc, new_sp) \
163 set_fs(USER_DS); \
164 regs->pr = 0; \
165 regs->sr = SR_FD; /* User mode. */ \
166 regs->pc = new_pc; \
167 regs->regs[15] = new_sp
168
169/* Forward declaration, a strange C thing */
170struct task_struct;
171struct mm_struct;
172
173/* Free all resources held by a thread. */
174extern void release_thread(struct task_struct *);
175
176/* Prepare to copy thread state - unlazy all lazy status */
177#define prepare_to_copy(tsk) do { } while (0)
178
179/*
180 * create a kernel thread without removing it from tasklists
181 */
182extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
183
184/* Copy and release all segment info associated with a VM */
185#define copy_segments(p, mm) do { } while(0)
186#define release_segments(mm) do { } while(0)
187
188/*
189 * FPU lazy state save handling.
190 */
191
192static __inline__ void disable_fpu(void)
193{
194 unsigned long __dummy;
195
196 /* Set FD flag in SR */
197 __asm__ __volatile__("stc sr, %0\n\t"
198 "or %1, %0\n\t"
199 "ldc %0, sr"
200 : "=&r" (__dummy)
201 : "r" (SR_FD));
202}
203
204static __inline__ void enable_fpu(void)
205{
206 unsigned long __dummy;
207
208 /* Clear out FD flag in SR */
209 __asm__ __volatile__("stc sr, %0\n\t"
210 "and %1, %0\n\t"
211 "ldc %0, sr"
212 : "=&r" (__dummy)
213 : "r" (~SR_FD));
214}
215
216static __inline__ void release_fpu(struct pt_regs *regs)
217{
218 regs->sr |= SR_FD;
219}
220
221static __inline__ void grab_fpu(struct pt_regs *regs)
222{
223 regs->sr &= ~SR_FD;
224}
225
226extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
227
228#define unlazy_fpu(tsk, regs) do { \
229 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
230 save_fpu(tsk, regs); \
231 } \
232} while (0)
233
234#define clear_fpu(tsk, regs) do { \
235 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
236 clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
237 release_fpu(regs); \
238 } \
239} while (0)
240
241/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
242#define FPSCR_INIT 0x00080000
243
244#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
245#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
246
247/*
248 * Return saved PC of a blocked thread.
249 */
250#define thread_saved_pc(tsk) (tsk->thread.pc)
251
252void show_trace(struct task_struct *tsk, unsigned long *sp,
253 struct pt_regs *regs);
254extern unsigned long get_wchan(struct task_struct *p);
255
256#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
257#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
258
259#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
260#define cpu_relax() barrier()
261
262#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
263 defined(CONFIG_CPU_SH4)
264#define PREFETCH_STRIDE L1_CACHE_BYTES
265#define ARCH_HAS_PREFETCH
266#define ARCH_HAS_PREFETCHW
267static inline void prefetch(void *x)
268{
269 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
270}
271
272#define prefetchw(x) prefetch(x)
273#endif
274
275#ifdef CONFIG_VSYSCALL
276extern int vsyscall_init(void);
277#else 43#else
278#define vsyscall_init() do { } while (0) 44# include "processor_64.h"
279#endif 45#endif
280 46
281/* arch/sh/kernel/setup.c */ 47/* arch/sh/kernel/setup.c */
282const char *get_cpu_subtype(struct sh_cpuinfo *c); 48const char *get_cpu_subtype(struct sh_cpuinfo *c);
283 49
284#endif /* __KERNEL__ */
285#endif /* __ASM_SH_PROCESSOR_H */ 50#endif /* __ASM_SH_PROCESSOR_H */