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authorPaul Mundt <lethal@linux-sh.org>2008-07-28 19:09:44 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-07-28 19:09:44 -0400
commitf15cbe6f1a4b4d9df59142fc8e4abb973302cf44 (patch)
tree774d7b11abaaf33561ab8268bf51ddd9ceb79025 /include/asm-sh/pgtable_32.h
parent25326277d8d1393d1c66240e6255aca780f9e3eb (diff)
sh: migrate to arch/sh/include/
This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/pgtable_32.h')
-rw-r--r--include/asm-sh/pgtable_32.h479
1 files changed, 0 insertions, 479 deletions
diff --git a/include/asm-sh/pgtable_32.h b/include/asm-sh/pgtable_32.h
deleted file mode 100644
index 72ea209195bd..000000000000
--- a/include/asm-sh/pgtable_32.h
+++ /dev/null
@@ -1,479 +0,0 @@
1#ifndef __ASM_SH_PGTABLE_32_H
2#define __ASM_SH_PGTABLE_32_H
3
4/*
5 * Linux PTEL encoding.
6 *
7 * Hardware and software bit definitions for the PTEL value (see below for
8 * notes on SH-X2 MMUs and 64-bit PTEs):
9 *
10 * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4).
11 *
12 * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the
13 * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set,
14 * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT).
15 *
16 * In order to keep this relatively clean, do not use these for defining
17 * SH-3 specific flags until all of the other unused bits have been
18 * exhausted.
19 *
20 * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
21 *
22 * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
23 * Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused.
24 *
25 * - On 29 bit platforms, bits 31 to 29 are used for the space attributes
26 * and timing control which (together with bit 0) are moved into the
27 * old-style PTEA on the parts that support it.
28 *
29 * XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day.
30 *
31 * SH-X2 MMUs and extended PTEs
32 *
33 * SH-X2 supports an extended mode TLB with split data arrays due to the
34 * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and
35 * SZ bit placeholders still exist in data array 1, but are implemented as
36 * reserved bits, with the real logic existing in data array 2.
37 *
38 * The downside to this is that we can no longer fit everything in to a 32-bit
39 * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus
40 * side, this gives us quite a few spare bits to play with for future usage.
41 */
42/* Legacy and compat mode bits */
43#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */
44#define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */
45#define _PAGE_DIRTY 0x004 /* D-bit : page changed */
46#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */
47#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */
48#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */
49#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/
50#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */
51#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */
52#define _PAGE_PROTNONE 0x200 /* software: if not present */
53#define _PAGE_ACCESSED 0x400 /* software: page referenced */
54#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
55
56#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1)
57#define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER)
58
59/* Extended mode bits */
60#define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */
61#define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */
62#define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */
63#define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */
64
65#define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */
66#define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */
67#define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */
68
69#define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */
70#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */
71#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */
72
73/* Wrapper for extended mode pgprot twiddling */
74#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
75
76/* software: moves to PTEA.TC (Timing Control) */
77#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
78#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
79
80/* software: moves to PTEA.SA[2:0] (Space Attributes) */
81#define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */
82#define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */
83#define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */
84#define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */
85#define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */
86#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
87#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
88
89/* Mask which drops unused bits from the PTEL value */
90#if defined(CONFIG_CPU_SH3)
91#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \
92 _PAGE_FILE | _PAGE_SZ1 | \
93 _PAGE_HW_SHARED)
94#elif defined(CONFIG_X2TLB)
95/* Get rid of the legacy PR/SZ bits when using extended mode */
96#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \
97 _PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK)
98#else
99#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
100#endif
101
102#define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS))
103
104/* Hardware flags, page size encoding */
105#if !defined(CONFIG_MMU)
106# define _PAGE_FLAGS_HARD 0ULL
107#elif defined(CONFIG_X2TLB)
108# if defined(CONFIG_PAGE_SIZE_4KB)
109# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0)
110# elif defined(CONFIG_PAGE_SIZE_8KB)
111# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1)
112# elif defined(CONFIG_PAGE_SIZE_64KB)
113# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2)
114# endif
115#else
116# if defined(CONFIG_PAGE_SIZE_4KB)
117# define _PAGE_FLAGS_HARD _PAGE_SZ0
118# elif defined(CONFIG_PAGE_SIZE_64KB)
119# define _PAGE_FLAGS_HARD _PAGE_SZ1
120# endif
121#endif
122
123#if defined(CONFIG_X2TLB)
124# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
125# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2)
126# elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
127# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2)
128# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
129# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2)
130# elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
131# define _PAGE_SZHUGE (_PAGE_EXT_ESZ3)
132# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
133# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3)
134# endif
135#else
136# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
137# define _PAGE_SZHUGE (_PAGE_SZ1)
138# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
139# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
140# endif
141#endif
142
143/*
144 * Stub out _PAGE_SZHUGE if we don't have a good definition for it,
145 * to make pte_mkhuge() happy.
146 */
147#ifndef _PAGE_SZHUGE
148# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD)
149#endif
150
151#define _PAGE_CHG_MASK \
152 (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY)
153
154#ifndef __ASSEMBLY__
155
156#if defined(CONFIG_X2TLB) /* SH-X2 TLB */
157#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
158 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
159
160#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
161 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
162 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
163 _PAGE_EXT_KERN_WRITE | \
164 _PAGE_EXT_USER_READ | \
165 _PAGE_EXT_USER_WRITE))
166
167#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
168 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
169 _PAGE_EXT(_PAGE_EXT_KERN_EXEC | \
170 _PAGE_EXT_KERN_READ | \
171 _PAGE_EXT_USER_EXEC | \
172 _PAGE_EXT_USER_READ))
173
174#define PAGE_COPY PAGE_EXECREAD
175
176#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
177 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
178 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
179 _PAGE_EXT_USER_READ))
180
181#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
182 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
183 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
184 _PAGE_EXT_USER_WRITE))
185
186#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
187 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
188 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
189 _PAGE_EXT_KERN_READ | \
190 _PAGE_EXT_KERN_EXEC | \
191 _PAGE_EXT_USER_WRITE | \
192 _PAGE_EXT_USER_READ | \
193 _PAGE_EXT_USER_EXEC))
194
195#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
196 _PAGE_DIRTY | _PAGE_ACCESSED | \
197 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
198 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
199 _PAGE_EXT_KERN_WRITE | \
200 _PAGE_EXT_KERN_EXEC))
201
202#define PAGE_KERNEL_NOCACHE \
203 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
204 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
205 _PAGE_FLAGS_HARD | \
206 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
207 _PAGE_EXT_KERN_WRITE | \
208 _PAGE_EXT_KERN_EXEC))
209
210#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
211 _PAGE_DIRTY | _PAGE_ACCESSED | \
212 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
213 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
214 _PAGE_EXT_KERN_EXEC))
215
216#define PAGE_KERNEL_PCC(slot, type) \
217 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
218 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
219 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
220 _PAGE_EXT_KERN_WRITE | \
221 _PAGE_EXT_KERN_EXEC) \
222 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
223 (type))
224
225#elif defined(CONFIG_MMU) /* SH-X TLB */
226#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
227 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
228
229#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
230 _PAGE_CACHABLE | _PAGE_ACCESSED | \
231 _PAGE_FLAGS_HARD)
232
233#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
234 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
235
236#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
237 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
238
239#define PAGE_EXECREAD PAGE_READONLY
240#define PAGE_RWX PAGE_SHARED
241#define PAGE_WRITEONLY PAGE_SHARED
242
243#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \
244 _PAGE_DIRTY | _PAGE_ACCESSED | \
245 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
246
247#define PAGE_KERNEL_NOCACHE \
248 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
249 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
250 _PAGE_FLAGS_HARD)
251
252#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
253 _PAGE_DIRTY | _PAGE_ACCESSED | \
254 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
255
256#define PAGE_KERNEL_PCC(slot, type) \
257 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
258 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
259 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
260 (type))
261#else /* no mmu */
262#define PAGE_NONE __pgprot(0)
263#define PAGE_SHARED __pgprot(0)
264#define PAGE_COPY __pgprot(0)
265#define PAGE_EXECREAD __pgprot(0)
266#define PAGE_RWX __pgprot(0)
267#define PAGE_READONLY __pgprot(0)
268#define PAGE_WRITEONLY __pgprot(0)
269#define PAGE_KERNEL __pgprot(0)
270#define PAGE_KERNEL_NOCACHE __pgprot(0)
271#define PAGE_KERNEL_RO __pgprot(0)
272
273#define PAGE_KERNEL_PCC(slot, type) \
274 __pgprot(0)
275#endif
276
277#endif /* __ASSEMBLY__ */
278
279#ifndef __ASSEMBLY__
280
281/*
282 * Certain architectures need to do special things when PTEs
283 * within a page table are directly modified. Thus, the following
284 * hook is made available.
285 */
286#ifdef CONFIG_X2TLB
287static inline void set_pte(pte_t *ptep, pte_t pte)
288{
289 ptep->pte_high = pte.pte_high;
290 smp_wmb();
291 ptep->pte_low = pte.pte_low;
292}
293#else
294#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
295#endif
296
297#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
298
299/*
300 * (pmds are folded into pgds so this doesn't get actually called,
301 * but the define is needed for a generic inline function.)
302 */
303#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
304
305#define pfn_pte(pfn, prot) \
306 __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
307#define pfn_pmd(pfn, prot) \
308 __pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
309
310#define pte_none(x) (!pte_val(x))
311#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
312
313#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
314
315#define pmd_none(x) (!pmd_val(x))
316#define pmd_present(x) (pmd_val(x))
317#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
318#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
319
320#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
321#define pte_page(x) pfn_to_page(pte_pfn(x))
322
323/*
324 * The following only work if pte_present() is true.
325 * Undefined behaviour if not..
326 */
327#define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT))
328#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY)
329#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED)
330#define pte_file(pte) ((pte).pte_low & _PAGE_FILE)
331#define pte_special(pte) (0)
332
333#ifdef CONFIG_X2TLB
334#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE)
335#else
336#define pte_write(pte) ((pte).pte_low & _PAGE_RW)
337#endif
338
339#define PTE_BIT_FUNC(h,fn,op) \
340static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; }
341
342#ifdef CONFIG_X2TLB
343/*
344 * We cheat a bit in the SH-X2 TLB case. As the permission bits are
345 * individually toggled (and user permissions are entirely decoupled from
346 * kernel permissions), we attempt to couple them a bit more sanely here.
347 */
348PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE);
349PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);
350PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE);
351#else
352PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW);
353PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW);
354PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE);
355#endif
356
357PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY);
358PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY);
359PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
360PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
361
362static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
363
364/*
365 * Macro and implementation to make a page protection as uncachable.
366 */
367#define pgprot_writecombine(prot) \
368 __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
369
370#define pgprot_noncached pgprot_writecombine
371
372/*
373 * Conversion functions: convert a page and protection to a page entry,
374 * and a page entry and page directory to the page they refer to.
375 *
376 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
377 */
378#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
379
380static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
381{
382 pte.pte_low &= _PAGE_CHG_MASK;
383 pte.pte_low |= pgprot_val(newprot);
384
385#ifdef CONFIG_X2TLB
386 pte.pte_high |= pgprot_val(newprot) >> 32;
387#endif
388
389 return pte;
390}
391
392#define pmd_page_vaddr(pmd) ((unsigned long)pmd_val(pmd))
393#define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))
394
395/* to find an entry in a page-table-directory. */
396#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
397#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
398
399/* to find an entry in a kernel page-table-directory */
400#define pgd_offset_k(address) pgd_offset(&init_mm, address)
401
402/* Find an entry in the third-level page table.. */
403#define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
404#define pte_offset_kernel(dir, address) \
405 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
406#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
407#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
408
409#define pte_unmap(pte) do { } while (0)
410#define pte_unmap_nested(pte) do { } while (0)
411
412#ifdef CONFIG_X2TLB
413#define pte_ERROR(e) \
414 printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \
415 &(e), (e).pte_high, (e).pte_low)
416#define pgd_ERROR(e) \
417 printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e))
418#else
419#define pte_ERROR(e) \
420 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
421#define pgd_ERROR(e) \
422 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
423#endif
424
425/*
426 * Encode and de-code a swap entry
427 *
428 * Constraints:
429 * _PAGE_FILE at bit 0
430 * _PAGE_PRESENT at bit 8
431 * _PAGE_PROTNONE at bit 9
432 *
433 * For the normal case, we encode the swap type into bits 0:7 and the
434 * swap offset into bits 10:30. For the 64-bit PTE case, we keep the
435 * preserved bits in the low 32-bits and use the upper 32 as the swap
436 * offset (along with a 5-bit type), following the same approach as x86
437 * PAE. This keeps the logic quite simple, and allows for a full 32
438 * PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with
439 * in the pte_low case.
440 *
441 * As is evident by the Alpha code, if we ever get a 64-bit unsigned
442 * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes
443 * much cleaner..
444 *
445 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
446 * and _PAGE_PROTNONE bits
447 */
448#ifdef CONFIG_X2TLB
449#define __swp_type(x) ((x).val & 0x1f)
450#define __swp_offset(x) ((x).val >> 5)
451#define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5})
452#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high })
453#define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val })
454
455/*
456 * Encode and decode a nonlinear file mapping entry
457 */
458#define pte_to_pgoff(pte) ((pte).pte_high)
459#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
460
461#define PTE_FILE_MAX_BITS 32
462#else
463#define __swp_type(x) ((x).val & 0xff)
464#define __swp_offset(x) ((x).val >> 10)
465#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10})
466
467#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 })
468#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 })
469
470/*
471 * Encode and decode a nonlinear file mapping entry
472 */
473#define PTE_FILE_MAX_BITS 29
474#define pte_to_pgoff(pte) (pte_val(pte) >> 1)
475#define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE })
476#endif
477
478#endif /* __ASSEMBLY__ */
479#endif /* __ASM_SH_PGTABLE_32_H */
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