diff options
author | Jamie Lenehan <lenehan@twibble.org> | 2006-12-05 22:05:02 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2006-12-05 22:05:02 -0500 |
commit | ea0f8feaa041f3ccec3d6b8ee51325b177daef06 (patch) | |
tree | 261c7d75e5caccbaface63370bae029ecd81b98a /include/asm-sh/irq.h | |
parent | fe9687dec0400c6de7187ab5efa91facd958ca84 (diff) |
sh: sh775x/titan fixes for irq header changes.
The following moves the creation of IPR interupts into setup-7750.c
and updates a few other things to make it all work after the "Drop
CPU subtype IRQ headers" commit. It boots and runs fine on my titan
board.
- adds an ipr_idx to the ipr_data and uses a function in the subtype
code to calculate the address of the IPR registers
- adds a function to enable individual interrupt mode for externals
in the subtype code and calls that from the titan board code
instead of doing it directly.
- I changed the shift in the ipr_data to be the actual # of bits to
shift, instead of the numnber / 4 - made it easier to match with
the manual.
Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/irq.h')
-rw-r--r-- | include/asm-sh/irq.h | 32 |
1 files changed, 28 insertions, 4 deletions
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index f10cfc10227e..fd576088e47e 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h | |||
@@ -93,6 +93,12 @@ | |||
93 | #define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS) | 93 | #define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS) |
94 | 94 | ||
95 | /* | 95 | /* |
96 | * Convert back and forth between INTEVT and IRQ values. | ||
97 | */ | ||
98 | #define evt2irq(evt) (((evt) >> 5) - 16) | ||
99 | #define irq2evt(irq) (((irq) + 16) << 5) | ||
100 | |||
101 | /* | ||
96 | * Simple Mask Register Support | 102 | * Simple Mask Register Support |
97 | */ | 103 | */ |
98 | extern void make_maskreg_irq(unsigned int irq); | 104 | extern void make_maskreg_irq(unsigned int irq); |
@@ -103,18 +109,36 @@ extern unsigned short *irq_mask_register; | |||
103 | */ | 109 | */ |
104 | void init_IRQ_pint(void); | 110 | void init_IRQ_pint(void); |
105 | 111 | ||
112 | /* | ||
113 | * The shift value is now the number of bits to shift, not the number of | ||
114 | * bits/4. This is to make it easier to read the value directly from the | ||
115 | * datasheets. The IPR address, addr, will be set from ipr_idx via the | ||
116 | * map_ipridx_to_addr function. | ||
117 | */ | ||
106 | struct ipr_data { | 118 | struct ipr_data { |
107 | unsigned int irq; | 119 | unsigned int irq; |
108 | unsigned int addr; /* Address of Interrupt Priority Register */ | 120 | int ipr_idx; /* Index for the IPR registered */ |
109 | int shift; /* Shifts of the 16-bit data */ | 121 | int shift; /* Number of bits to shift the data */ |
110 | int priority; /* The priority */ | 122 | int priority; /* The priority */ |
123 | unsigned int addr; /* Address of Interrupt Priority Register */ | ||
111 | }; | 124 | }; |
112 | 125 | ||
113 | /* | 126 | /* |
127 | * Given an IPR IDX, map the value to an IPR register address. | ||
128 | */ | ||
129 | unsigned int map_ipridx_to_addr(int idx); | ||
130 | |||
131 | /* | ||
132 | * Enable individual interrupt mode for external IPR IRQs. | ||
133 | */ | ||
134 | void ipr_irq_enable_irlm(void); | ||
135 | |||
136 | /* | ||
114 | * Function for "on chip support modules". | 137 | * Function for "on chip support modules". |
115 | */ | 138 | */ |
116 | extern void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs); | 139 | void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs); |
117 | extern void make_imask_irq(unsigned int irq); | 140 | void make_imask_irq(unsigned int irq); |
141 | void init_IRQ_ipr(void); | ||
118 | 142 | ||
119 | struct intc2_data { | 143 | struct intc2_data { |
120 | unsigned short irq; | 144 | unsigned short irq; |