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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-13 12:49:04 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-13 12:49:04 -0400
commitdcf397f037f52add9945eced57ca300ab6a4413c (patch)
treee78767d164589e9097a54bf564b072fb01f80820 /include/asm-sh/hw_irq.h
parent6faf035cf9fdd8283c2b2b2c34b76b5445ec6fc4 (diff)
parent68ee0f9c98a42e36f9eab29155b2bb0e7e409ac6 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (124 commits) sh: allow building for both r2d boards in same binary. sh: fix r2d board detection sh: Discard .exit.text/.exit.data at runtime. sh: Fix up some section alignments in linker script. sh: Fix SH-4 DMAC CHCR masking. sh: Rip out left-over nommu cond syscall cruft. sh: Make kgdb i-cache flushing less inept. sh: kgdb section mismatches and tidying. sh: cleanup struct irqaction initializers. sh: early_printk tidying. video: pvr2fb: Add TV (RGB) support to Dreamcast PVR driver. sh: Conditionalize gUSA support. sh: Follow gUSA preempt changes in __switch_to(). sh: Tidy up gUSA preempt handling. sh: __copy_user() optimizations for small copies. sh: clkfwk: Support multi-level clock propagation. sh: Fix URAM start address on SH7785. sh: Use boot_cpu_data for CPU probe. sh: Support extended mode TLB on SH-X3. sh: Bump MAX_ACTIVE_REGIONS for SH7785. ...
Diffstat (limited to 'include/asm-sh/hw_irq.h')
-rw-r--r--include/asm-sh/hw_irq.h53
1 files changed, 23 insertions, 30 deletions
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h
index 20d42959f52a..cb0b6c9f7020 100644
--- a/include/asm-sh/hw_irq.h
+++ b/include/asm-sh/hw_irq.h
@@ -6,24 +6,6 @@
6 6
7extern atomic_t irq_err_count; 7extern atomic_t irq_err_count;
8 8
9struct intc2_data {
10 unsigned short irq;
11 unsigned char ipr_offset, ipr_shift;
12 unsigned char msk_offset, msk_shift;
13 unsigned char priority;
14};
15
16struct intc2_desc {
17 unsigned long prio_base;
18 unsigned long msk_base;
19 unsigned long mskclr_base;
20 struct intc2_data *intc2_data;
21 unsigned int nr_irqs;
22 struct irq_chip chip;
23};
24
25void register_intc2_controller(struct intc2_desc *);
26
27struct ipr_data { 9struct ipr_data {
28 unsigned char irq; 10 unsigned char irq;
29 unsigned char ipr_idx; /* Index for the IPR registered */ 11 unsigned char ipr_idx; /* Index for the IPR registered */
@@ -41,11 +23,6 @@ struct ipr_desc {
41 23
42void register_ipr_controller(struct ipr_desc *); 24void register_ipr_controller(struct ipr_desc *);
43 25
44/*
45 * Enable individual interrupt mode for external IPR IRQs.
46 */
47void __init ipr_irq_enable_irlm(void);
48
49typedef unsigned char intc_enum; 26typedef unsigned char intc_enum;
50 27
51struct intc_vect { 28struct intc_vect {
@@ -54,6 +31,7 @@ struct intc_vect {
54}; 31};
55 32
56#define INTC_VECT(enum_id, vect) { enum_id, vect } 33#define INTC_VECT(enum_id, vect) { enum_id, vect }
34#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
57 35
58struct intc_prio { 36struct intc_prio {
59 intc_enum enum_id; 37 intc_enum enum_id;
@@ -64,19 +42,25 @@ struct intc_prio {
64 42
65struct intc_group { 43struct intc_group {
66 intc_enum enum_id; 44 intc_enum enum_id;
67 intc_enum *enum_ids; 45 intc_enum enum_ids[32];
68}; 46};
69 47
70#define INTC_GROUP(enum_id, ids...) { enum_id, (intc_enum []) { ids, 0 } } 48#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
71 49
72struct intc_mask_reg { 50struct intc_mask_reg {
73 unsigned long set_reg, clr_reg, reg_width; 51 unsigned long set_reg, clr_reg, reg_width;
74 intc_enum enum_ids[32]; 52 intc_enum enum_ids[32];
53#ifdef CONFIG_SMP
54 unsigned long smp;
55#endif
75}; 56};
76 57
77struct intc_prio_reg { 58struct intc_prio_reg {
78 unsigned long reg, reg_width, field_width; 59 unsigned long set_reg, clr_reg, reg_width, field_width;
79 intc_enum enum_ids[16]; 60 intc_enum enum_ids[16];
61#ifdef CONFIG_SMP
62 unsigned long smp;
63#endif
80}; 64};
81 65
82struct intc_sense_reg { 66struct intc_sense_reg {
@@ -84,6 +68,12 @@ struct intc_sense_reg {
84 intc_enum enum_ids[16]; 68 intc_enum enum_ids[16];
85}; 69};
86 70
71#ifdef CONFIG_SMP
72#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
73#else
74#define INTC_SMP(stride, nr)
75#endif
76
87struct intc_desc { 77struct intc_desc {
88 struct intc_vect *vectors; 78 struct intc_vect *vectors;
89 unsigned int nr_vectors; 79 unsigned int nr_vectors;
@@ -97,25 +87,28 @@ struct intc_desc {
97 unsigned int nr_prio_regs; 87 unsigned int nr_prio_regs;
98 struct intc_sense_reg *sense_regs; 88 struct intc_sense_reg *sense_regs;
99 unsigned int nr_sense_regs; 89 unsigned int nr_sense_regs;
100 struct irq_chip chip; 90 char *name;
101}; 91};
102 92
103#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) 93#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
104#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \ 94#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
105 priorities, mask_regs, prio_regs, sense_regs) \ 95 priorities, mask_regs, prio_regs, sense_regs) \
106struct intc_desc symbol = { \ 96struct intc_desc symbol __initdata = { \
107 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ 97 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
108 _INTC_ARRAY(priorities), \ 98 _INTC_ARRAY(priorities), \
109 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ 99 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
110 _INTC_ARRAY(sense_regs), \ 100 _INTC_ARRAY(sense_regs), \
111 .chip.name = chipname, \ 101 chipname, \
112} 102}
113 103
114void __init register_intc_controller(struct intc_desc *desc); 104void __init register_intc_controller(struct intc_desc *desc);
105int intc_set_priority(unsigned int irq, unsigned int prio);
115 106
116void __init plat_irq_setup(void); 107void __init plat_irq_setup(void);
117 108
118enum { IRQ_MODE_IRQ, IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 }; 109enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
110 IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
111 IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
119void __init plat_irq_setup_pins(int mode); 112void __init plat_irq_setup_pins(int mode);
120 113
121#endif /* __ASM_SH_HW_IRQ_H */ 114#endif /* __ASM_SH_HW_IRQ_H */