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authorMark Glaisher <mark.glaisher@st.com>2006-11-24 01:13:52 -0500
committerPaul Mundt <lethal@linux-sh.org>2006-12-05 20:45:39 -0500
commitdb9b99d461ddbbaa43c1e3581b1677b82c960948 (patch)
treea4bb8ff3f8339f3389e4b367bd1c1ecd7caab752 /include/asm-sh/dma.h
parente803aaf63a18b26668fbfbfd41c65527bcc10532 (diff)
sh: dma-api channel capability extensions.
This extends the SH DMA API for allowing handling of DMA channels based off of their respective capabilities. A couple of functions are added to the existing API, the core bits are register_chan_caps() for registering channel capabilities, and request_dma_bycap() for fetching a channel dynamically based off of a capability set. Signed-off-by: Mark Glaisher <mark.glaisher@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/dma.h')
-rw-r--r--include/asm-sh/dma.h40
1 files changed, 29 insertions, 11 deletions
diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h
index d9daa028689f..faf3051cd429 100644
--- a/include/asm-sh/dma.h
+++ b/include/asm-sh/dma.h
@@ -14,9 +14,7 @@
14#include <linux/spinlock.h> 14#include <linux/spinlock.h>
15#include <linux/wait.h> 15#include <linux/wait.h>
16#include <linux/sysdev.h> 16#include <linux/sysdev.h>
17#include <linux/device.h>
18#include <asm/cpu/dma.h> 17#include <asm/cpu/dma.h>
19#include <asm/semaphore.h>
20 18
21/* The maximum address that we can perform a DMA transfer to on this platform */ 19/* The maximum address that we can perform a DMA transfer to on this platform */
22/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any 20/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any
@@ -46,16 +44,21 @@
46 * DMAC (dma_info) flags 44 * DMAC (dma_info) flags
47 */ 45 */
48enum { 46enum {
49 DMAC_CHANNELS_CONFIGURED = 0x00, 47 DMAC_CHANNELS_CONFIGURED = 0x01,
50 DMAC_CHANNELS_TEI_CAPABLE = 0x01, 48 DMAC_CHANNELS_TEI_CAPABLE = 0x02, /* Transfer end interrupt */
51}; 49};
52 50
53/* 51/*
54 * DMA channel capabilities / flags 52 * DMA channel capabilities / flags
55 */ 53 */
56enum { 54enum {
57 DMA_TEI_CAPABLE = 0x01, 55 DMA_CONFIGURED = 0x01,
58 DMA_CONFIGURED = 0x02, 56
57 /*
58 * Transfer end interrupt, inherited from DMAC.
59 * wait_queue used in dma_wait_for_completion.
60 */
61 DMA_TEI_CAPABLE = 0x02,
59}; 62};
60 63
61extern spinlock_t dma_spin_lock; 64extern spinlock_t dma_spin_lock;
@@ -68,28 +71,31 @@ struct dma_ops {
68 71
69 int (*get_residue)(struct dma_channel *chan); 72 int (*get_residue)(struct dma_channel *chan);
70 int (*xfer)(struct dma_channel *chan); 73 int (*xfer)(struct dma_channel *chan);
71 void (*configure)(struct dma_channel *chan, unsigned long flags); 74 int (*configure)(struct dma_channel *chan, unsigned long flags);
75 int (*extend)(struct dma_channel *chan, unsigned long op, void *param);
72}; 76};
73 77
74struct dma_channel { 78struct dma_channel {
75 char dev_id[16]; 79 char dev_id[16]; /* unique name per DMAC of channel */
76 80
77 unsigned int chan; /* Physical channel number */ 81 unsigned int chan; /* DMAC channel number */
78 unsigned int vchan; /* Virtual channel number */ 82 unsigned int vchan; /* Virtual channel number */
83
79 unsigned int mode; 84 unsigned int mode;
80 unsigned int count; 85 unsigned int count;
81 86
82 unsigned long sar; 87 unsigned long sar;
83 unsigned long dar; 88 unsigned long dar;
84 89
90 const char **caps;
91
85 unsigned long flags; 92 unsigned long flags;
86 atomic_t busy; 93 atomic_t busy;
87 94
88 struct semaphore sem;
89 wait_queue_head_t wait_queue; 95 wait_queue_head_t wait_queue;
90 96
91 struct sys_device dev; 97 struct sys_device dev;
92 char *name; 98 void *priv_data;
93}; 99};
94 100
95struct dma_info { 101struct dma_info {
@@ -103,6 +109,12 @@ struct dma_info {
103 struct dma_channel *channels; 109 struct dma_channel *channels;
104 110
105 struct list_head list; 111 struct list_head list;
112 int first_channel_nr;
113};
114
115struct dma_chan_caps {
116 int ch_num;
117 const char **caplist;
106}; 118};
107 119
108#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev) 120#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
@@ -121,6 +133,8 @@ extern int dma_xfer(unsigned int chan, unsigned long from,
121#define dma_read_page(chan, from, to) \ 133#define dma_read_page(chan, from, to) \
122 dma_read(chan, from, to, PAGE_SIZE) 134 dma_read(chan, from, to, PAGE_SIZE)
123 135
136extern int request_dma_bycap(const char **dmac, const char **caps,
137 const char *dev_id);
124extern int request_dma(unsigned int chan, const char *dev_id); 138extern int request_dma(unsigned int chan, const char *dev_id);
125extern void free_dma(unsigned int chan); 139extern void free_dma(unsigned int chan);
126extern int get_dma_residue(unsigned int chan); 140extern int get_dma_residue(unsigned int chan);
@@ -131,6 +145,10 @@ extern void dma_configure_channel(unsigned int chan, unsigned long flags);
131 145
132extern int register_dmac(struct dma_info *info); 146extern int register_dmac(struct dma_info *info);
133extern void unregister_dmac(struct dma_info *info); 147extern void unregister_dmac(struct dma_info *info);
148extern struct dma_info *get_dma_info_by_name(const char *dmac_name);
149
150extern int dma_extend(unsigned int chan, unsigned long op, void *param);
151extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist);
134 152
135#ifdef CONFIG_SYSFS 153#ifdef CONFIG_SYSFS
136/* arch/sh/drivers/dma/dma-sysfs.c */ 154/* arch/sh/drivers/dma/dma-sysfs.c */