diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-sh/cpu-sh4/mmu_context.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-sh/cpu-sh4/mmu_context.h')
-rw-r--r-- | include/asm-sh/cpu-sh4/mmu_context.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/include/asm-sh/cpu-sh4/mmu_context.h b/include/asm-sh/cpu-sh4/mmu_context.h new file mode 100644 index 000000000000..5b64d041f0b9 --- /dev/null +++ b/include/asm-sh/cpu-sh4/mmu_context.h | |||
@@ -0,0 +1,39 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh4/mmu_context.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH4_MMU_CONTEXT_H | ||
11 | #define __ASM_CPU_SH4_MMU_CONTEXT_H | ||
12 | |||
13 | #define MMU_PTEH 0xFF000000 /* Page table entry register HIGH */ | ||
14 | #define MMU_PTEL 0xFF000004 /* Page table entry register LOW */ | ||
15 | #define MMU_TTB 0xFF000008 /* Translation table base register */ | ||
16 | #define MMU_TEA 0xFF00000C /* TLB Exception Address */ | ||
17 | #define MMU_PTEA 0xFF000034 /* Page table entry assistance register */ | ||
18 | |||
19 | #define MMUCR 0xFF000010 /* MMU Control Register */ | ||
20 | |||
21 | #define MMU_ITLB_ADDRESS_ARRAY 0xF2000000 | ||
22 | #define MMU_UTLB_ADDRESS_ARRAY 0xF6000000 | ||
23 | #define MMU_PAGE_ASSOC_BIT 0x80 | ||
24 | |||
25 | #define MMU_NTLB_ENTRIES 64 /* for 7750 */ | ||
26 | #define MMU_CONTROL_INIT 0x205 /* SQMD=1, SV=0, TI=1, AT=1 */ | ||
27 | |||
28 | #define MMU_ITLB_DATA_ARRAY 0xF3000000 | ||
29 | #define MMU_UTLB_DATA_ARRAY 0xF7000000 | ||
30 | |||
31 | #define MMU_UTLB_ENTRIES 64 | ||
32 | #define MMU_U_ENTRY_SHIFT 8 | ||
33 | #define MMU_UTLB_VALID 0x100 | ||
34 | #define MMU_ITLB_ENTRIES 4 | ||
35 | #define MMU_I_ENTRY_SHIFT 8 | ||
36 | #define MMU_ITLB_VALID 0x100 | ||
37 | |||
38 | #endif /* __ASM_CPU_SH4_MMU_CONTEXT_H */ | ||
39 | |||