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authorLinus Torvalds <torvalds@linux-foundation.org>2008-07-28 11:41:13 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-07-28 11:41:13 -0400
commitb10a8b7238d7b034f28d32a85bb05c48475f132a (patch)
tree8e70e816757c2a517de6fb721dd9ac2276619c26 /include/asm-sh/cpu-sh4/freq.h
parent37eaf8c7463e53cf1acf025fb566fb6c4573297f (diff)
parent8b2224dc6a5b46cfa1d54ab1fe82107351c66443 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (72 commits) sh: SuperH Mobile CEU and camera platform data for AP325RXA sh: Update smc911x platform data for AP325RXA sh: SuperH Mobile LCDC platform data for AP325RXA sh: Add SuperH Mobile CEU platform data for Migo-R sh: Add SuperH Mobile LCDC platform data for Migo-R sh: Move asid_cache() out of ifdef to fix SH-3/4 nommu build. sh: Workaround for __put_user_asm() bug with gcc 4.x on big-endian. sh: Wire up new syscalls. sh: fix uImage Entry Point sh_keysc: remove request_mem_region() and release_mem_region() sh: Don't miss pending signals returning to user mode after signal processing sh: Use clk_always_enable() on sh7366 sh: Use clk_always_enable() on sh7343 / SE77343 sh: Use clk_always_enable() on sh7722 / Migo-R / SE7722 sh: Use clk_always_enable() on sh7723 / ap325rxa sh: Introduce clk_always_enable() function sh: Show all clocks and their state in /proc/clocks sh: Merge sh7343 and sh7722 clock code sh: Add SuperH Mobile MSTPCR bits to clock framework sh: Use arch_flags to simplify sh7722 siu clock code ...
Diffstat (limited to 'include/asm-sh/cpu-sh4/freq.h')
-rw-r--r--include/asm-sh/cpu-sh4/freq.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h
index da46e67ae26d..c23af81c2e70 100644
--- a/include/asm-sh/cpu-sh4/freq.h
+++ b/include/asm-sh/cpu-sh4/freq.h
@@ -12,12 +12,16 @@
12 12
13#if defined(CONFIG_CPU_SUBTYPE_SH7722) || \ 13#if defined(CONFIG_CPU_SUBTYPE_SH7722) || \
14 defined(CONFIG_CPU_SUBTYPE_SH7723) || \ 14 defined(CONFIG_CPU_SUBTYPE_SH7723) || \
15 defined(CONFIG_CPU_SUBTYPE_SH7343) || \
15 defined(CONFIG_CPU_SUBTYPE_SH7366) 16 defined(CONFIG_CPU_SUBTYPE_SH7366)
16#define FRQCR 0xa4150000 17#define FRQCR 0xa4150000
17#define VCLKCR 0xa4150004 18#define VCLKCR 0xa4150004
18#define SCLKACR 0xa4150008 19#define SCLKACR 0xa4150008
19#define SCLKBCR 0xa415000c 20#define SCLKBCR 0xa415000c
20#define IrDACLKCR 0xa4150010 21#define IrDACLKCR 0xa4150010
22#define MSTPCR0 0xa4150030
23#define MSTPCR1 0xa4150034
24#define MSTPCR2 0xa4150038
21#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 25#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
22 defined(CONFIG_CPU_SUBTYPE_SH7780) 26 defined(CONFIG_CPU_SUBTYPE_SH7780)
23#define FRQCR 0xffc80000 27#define FRQCR 0xffc80000