diff options
| author | Steven Whitehouse <swhiteho@redhat.com> | 2006-09-28 08:29:59 -0400 |
|---|---|---|
| committer | Steven Whitehouse <swhiteho@redhat.com> | 2006-09-28 08:29:59 -0400 |
| commit | 185a257f2f73bcd89050ad02da5bedbc28fc43fa (patch) | |
| tree | 5e32586114534ed3f2165614cba3d578f5d87307 /include/asm-sh/cpu-sh3/timer.h | |
| parent | 3f1a9aaeffd8d1cbc5ab9776c45cbd66af1c9699 (diff) | |
| parent | a77c64c1a641950626181b4857abb701d8f38ccc (diff) | |
Merge branch 'master' into gfs2
Diffstat (limited to 'include/asm-sh/cpu-sh3/timer.h')
| -rw-r--r-- | include/asm-sh/cpu-sh3/timer.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h index 3d8e95e8d10c..b2394cf76f49 100644 --- a/include/asm-sh/cpu-sh3/timer.h +++ b/include/asm-sh/cpu-sh3/timer.h | |||
| @@ -20,9 +20,14 @@ | |||
| 20 | * SH7710 | 20 | * SH7710 |
| 21 | * SH7720 | 21 | * SH7720 |
| 22 | * SH7300 | 22 | * SH7300 |
| 23 | * SH7710 | ||
| 23 | * --------------------------------------------------------------------------- | 24 | * --------------------------------------------------------------------------- |
| 24 | */ | 25 | */ |
| 25 | 26 | ||
| 27 | #if !defined(CONFIG_CPU_SUBTYPE_SH7727) | ||
| 28 | #define TMU_TOCR 0xfffffe90 /* Byte access */ | ||
| 29 | #endif | ||
| 30 | |||
| 26 | #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) | 31 | #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) |
| 27 | #define TMU_TSTR 0xa412fe92 /* Byte access */ | 32 | #define TMU_TSTR 0xa412fe92 /* Byte access */ |
| 28 | 33 | ||
| @@ -39,9 +44,6 @@ | |||
| 39 | #define TMU2_TCR 0xa412feb4 /* Word access */ | 44 | #define TMU2_TCR 0xa412feb4 /* Word access */ |
| 40 | 45 | ||
| 41 | #else | 46 | #else |
| 42 | #if !defined(CONFIG_CPU_SUBTYPE_SH7727) | ||
| 43 | #define TMU_TOCR 0xfffffe90 /* Byte access */ | ||
| 44 | #endif | ||
| 45 | #define TMU_TSTR 0xfffffe92 /* Byte access */ | 47 | #define TMU_TSTR 0xfffffe92 /* Byte access */ |
| 46 | 48 | ||
| 47 | #define TMU0_TCOR 0xfffffe94 /* Long access */ | 49 | #define TMU0_TCOR 0xfffffe94 /* Long access */ |
