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authorLinus Torvalds <torvalds@g5.osdl.org>2006-09-27 11:49:07 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-27 11:49:07 -0400
commitb98adfccdf5f8dd34ae56a2d5adbe2c030bd4674 (patch)
tree1807a029520f550dd4f90c95ad0063bceb00d645 /include/asm-sh/cpu-sh3/timer.h
parentba21fe71725f94792330ebc3034ef2b35a36276f (diff)
parent33573c0e3243aaa38b6ad96942de85a1b713c2ff (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (108 commits) sh: Fix occasional flush_cache_4096() stack corruption. sh: Calculate shm alignment at runtime. sh: dma-mapping compile fixes. sh: Initial vsyscall page support. sh: Clean up PAGE_SIZE definition for assembly use. sh: Selective flush_cache_mm() flushing. sh: More intelligent entry_mask/way_size calculation. sh: Support for L2 cache on newer SH-4A CPUs. sh: Update kexec support for API changes. sh: Optimized readsl()/writesl() support. sh: Report movli.l/movco.l capabilities. sh: CPU flags in AT_HWCAP in ELF auxvt. sh: Add support for 4K stacks. sh: Enable /proc/kcore support. sh: stack debugging support. sh: select CONFIG_EMBEDDED. sh: machvec rework. sh: Solution Engine SH7343 board support. sh: SH7710VoIPGW board support. sh: Enable verbose BUG() support. ...
Diffstat (limited to 'include/asm-sh/cpu-sh3/timer.h')
-rw-r--r--include/asm-sh/cpu-sh3/timer.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h
index 3d8e95e8d10c..b2394cf76f49 100644
--- a/include/asm-sh/cpu-sh3/timer.h
+++ b/include/asm-sh/cpu-sh3/timer.h
@@ -20,9 +20,14 @@
20 * SH7710 20 * SH7710
21 * SH7720 21 * SH7720
22 * SH7300 22 * SH7300
23 * SH7710
23 * --------------------------------------------------------------------------- 24 * ---------------------------------------------------------------------------
24 */ 25 */
25 26
27#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
28#define TMU_TOCR 0xfffffe90 /* Byte access */
29#endif
30
26#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) 31#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
27#define TMU_TSTR 0xa412fe92 /* Byte access */ 32#define TMU_TSTR 0xa412fe92 /* Byte access */
28 33
@@ -39,9 +44,6 @@
39#define TMU2_TCR 0xa412feb4 /* Word access */ 44#define TMU2_TCR 0xa412feb4 /* Word access */
40 45
41#else 46#else
42#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
43#define TMU_TOCR 0xfffffe90 /* Byte access */
44#endif
45#define TMU_TSTR 0xfffffe92 /* Byte access */ 47#define TMU_TSTR 0xfffffe92 /* Byte access */
46 48
47#define TMU0_TCOR 0xfffffe94 /* Long access */ 49#define TMU0_TCOR 0xfffffe94 /* Long access */