diff options
| author | Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | 2007-12-25 21:45:06 -0500 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2008-01-27 23:19:02 -0500 |
| commit | 31a49c4bf8f964b7a9897baa889916d71b51d9c1 (patch) | |
| tree | e6c900dfbdf51d97d4c189a712a8c4e1aa059cf4 /include/asm-sh/cpu-sh3/timer.h | |
| parent | 52e8b118ecd17185ce514cd3f955094c1d8f4288 (diff) | |
sh: Add support for SH7721 CPU subtype.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/cpu-sh3/timer.h')
| -rw-r--r-- | include/asm-sh/cpu-sh3/timer.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h index 7b795ac5477c..793acf12aa08 100644 --- a/include/asm-sh/cpu-sh3/timer.h +++ b/include/asm-sh/cpu-sh3/timer.h | |||
| @@ -23,12 +23,13 @@ | |||
| 23 | * --------------------------------------------------------------------------- | 23 | * --------------------------------------------------------------------------- |
| 24 | */ | 24 | */ |
| 25 | 25 | ||
| 26 | #if !defined(CONFIG_CPU_SUBTYPE_SH7720) | 26 | #if !defined(CONFIG_CPU_SUBTYPE_SH7720) && !defined(CONFIG_CPU_SUBTYPE_SH7721) |
| 27 | #define TMU_TOCR 0xfffffe90 /* Byte access */ | 27 | #define TMU_TOCR 0xfffffe90 /* Byte access */ |
| 28 | #endif | 28 | #endif |
| 29 | 29 | ||
| 30 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ | 30 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ |
| 31 | defined(CONFIG_CPU_SUBTYPE_SH7720) | 31 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
| 32 | defined(CONFIG_CPU_SUBTYPE_SH7721) | ||
| 32 | #define TMU_012_TSTR 0xa412fe92 /* Byte access */ | 33 | #define TMU_012_TSTR 0xa412fe92 /* Byte access */ |
| 33 | 34 | ||
| 34 | #define TMU0_TCOR 0xa412fe94 /* Long access */ | 35 | #define TMU0_TCOR 0xa412fe94 /* Long access */ |
| @@ -57,7 +58,7 @@ | |||
| 57 | #define TMU2_TCOR 0xfffffeac /* Long access */ | 58 | #define TMU2_TCOR 0xfffffeac /* Long access */ |
| 58 | #define TMU2_TCNT 0xfffffeb0 /* Long access */ | 59 | #define TMU2_TCNT 0xfffffeb0 /* Long access */ |
| 59 | #define TMU2_TCR 0xfffffeb4 /* Word access */ | 60 | #define TMU2_TCR 0xfffffeb4 /* Word access */ |
| 60 | #if !defined(CONFIG_CPU_SUBTYPE_SH7720) | 61 | #if !defined(CONFIG_CPU_SUBTYPE_SH7720) && !defined(CONFIG_CPU_SUBTYPE_SH7721) |
| 61 | #define TMU2_TCPR2 0xfffffeb8 /* Long access */ | 62 | #define TMU2_TCPR2 0xfffffeb8 /* Long access */ |
| 62 | #endif | 63 | #endif |
| 63 | #endif | 64 | #endif |