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authorPaul Mundt <lethal@linux-sh.org>2006-01-17 01:14:09 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-17 02:15:27 -0500
commit0d831770b154a057562236e8cf50905c8f1ae1b0 (patch)
treedc25902b29b09838f2fe32e47be53c951a2fa67e /include/asm-sh/cpu-sh3/dma.h
parent0025835cf20e07056b8521b8c1d7d0bfe07e81f1 (diff)
[PATCH] sh: DMA updates
This extends the current SH DMA API somewhat to support a proper virtual channel abstraction, and also works to represent this through the driver model by giving each DMAC its own platform device. There's also a few other minor changes to support a few new CPU subtypes, and make TEI generation for the SH DMAC configurable. Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-sh/cpu-sh3/dma.h')
-rw-r--r--include/asm-sh/cpu-sh3/dma.h31
1 files changed, 30 insertions, 1 deletions
diff --git a/include/asm-sh/cpu-sh3/dma.h b/include/asm-sh/cpu-sh3/dma.h
index b972e715f9ee..954801b46022 100644
--- a/include/asm-sh/cpu-sh3/dma.h
+++ b/include/asm-sh/cpu-sh3/dma.h
@@ -3,5 +3,34 @@
3 3
4#define SH_DMAC_BASE 0xa4000020 4#define SH_DMAC_BASE 0xa4000020
5 5
6#endif /* __ASM_CPU_SH3_DMA_H */ 6/* Definitions for the SuperH DMAC */
7#define TM_BURST 0x00000020
8#define TS_8 0x00000000
9#define TS_16 0x00000008
10#define TS_32 0x00000010
11#define TS_128 0x00000018
12
13#define CHCR_TS_MASK 0x18
14#define CHCR_TS_SHIFT 3
15
16#define DMAOR_INIT DMAOR_DME
7 17
18/*
19 * The SuperH DMAC supports a number of transmit sizes, we list them here,
20 * with their respective values as they appear in the CHCR registers.
21 */
22enum {
23 XMIT_SZ_8BIT,
24 XMIT_SZ_16BIT,
25 XMIT_SZ_32BIT,
26 XMIT_SZ_128BIT,
27};
28
29static unsigned int ts_shift[] __attribute__ ((used)) = {
30 [XMIT_SZ_8BIT] = 0,
31 [XMIT_SZ_16BIT] = 1,
32 [XMIT_SZ_32BIT] = 2,
33 [XMIT_SZ_128BIT] = 4,
34};
35
36#endif /* __ASM_CPU_SH3_DMA_H */