diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-sh/cpu-sh3/cache.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-sh/cpu-sh3/cache.h')
-rw-r--r-- | include/asm-sh/cpu-sh3/cache.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/include/asm-sh/cpu-sh3/cache.h b/include/asm-sh/cpu-sh3/cache.h new file mode 100644 index 000000000000..406aa8d9b947 --- /dev/null +++ b/include/asm-sh/cpu-sh3/cache.h | |||
@@ -0,0 +1,37 @@ | |||
1 | /* | ||
2 | * include/asm-sh/cpu-sh3/cache.h | ||
3 | * | ||
4 | * Copyright (C) 1999 Niibe Yutaka | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | #ifndef __ASM_CPU_SH3_CACHE_H | ||
11 | #define __ASM_CPU_SH3_CACHE_H | ||
12 | |||
13 | #define L1_CACHE_SHIFT 4 | ||
14 | |||
15 | #define CCR 0xffffffec /* Address of Cache Control Register */ | ||
16 | |||
17 | #define CCR_CACHE_CE 0x01 /* Cache Enable */ | ||
18 | #define CCR_CACHE_WT 0x02 /* Write-Through (for P0,U0,P3) (else writeback) */ | ||
19 | #define CCR_CACHE_CB 0x04 /* Write-Back (for P1) (else writethrough) */ | ||
20 | #define CCR_CACHE_CF 0x08 /* Cache Flush */ | ||
21 | #define CCR_CACHE_ORA 0x20 /* RAM mode */ | ||
22 | |||
23 | #define CACHE_OC_ADDRESS_ARRAY 0xf0000000 | ||
24 | #define CACHE_PHYSADDR_MASK 0x1ffffc00 | ||
25 | |||
26 | #define CCR_CACHE_ENABLE CCR_CACHE_CE | ||
27 | #define CCR_CACHE_INVALIDATE CCR_CACHE_CF | ||
28 | |||
29 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) | ||
30 | #define CCR3 0xa40000b4 | ||
31 | #define CCR_CACHE_16KB 0x00010000 | ||
32 | #define CCR_CACHE_32KB 0x00020000 | ||
33 | #endif | ||
34 | |||
35 | |||
36 | #endif /* __ASM_CPU_SH3_CACHE_H */ | ||
37 | |||