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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-sh/cpu-sh2/cacheflush.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-sh/cpu-sh2/cacheflush.h')
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1 files changed, 42 insertions, 0 deletions
diff --git a/include/asm-sh/cpu-sh2/cacheflush.h b/include/asm-sh/cpu-sh2/cacheflush.h
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1/*
2 * include/asm-sh/cpu-sh2/cacheflush.h
3 *
4 * Copyright (C) 2003 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_CPU_SH2_CACHEFLUSH_H
11#define __ASM_CPU_SH2_CACHEFLUSH_H
12
13/*
14 * Cache flushing:
15 *
16 * - flush_cache_all() flushes entire cache
17 * - flush_cache_mm(mm) flushes the specified mm context's cache lines
18 * - flush_cache_page(mm, vmaddr, pfn) flushes a single page
19 * - flush_cache_range(vma, start, end) flushes a range of pages
20 *
21 * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
22 * - flush_icache_range(start, end) flushes(invalidates) a range for icache
23 * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
24 *
25 * Caches are indexed (effectively) by physical address on SH-2, so
26 * we don't need them.
27 */
28#define flush_cache_all() do { } while (0)
29#define flush_cache_mm(mm) do { } while (0)
30#define flush_cache_range(vma, start, end) do { } while (0)
31#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
32#define flush_dcache_page(page) do { } while (0)
33#define flush_dcache_mmap_lock(mapping) do { } while (0)
34#define flush_dcache_mmap_unlock(mapping) do { } while (0)
35#define flush_icache_range(start, end) do { } while (0)
36#define flush_icache_page(vma,pg) do { } while (0)
37#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
38#define flush_cache_sigtramp(vaddr) do { } while (0)
39
40#define p3_cache_init() do { } while (0)
41#endif /* __ASM_CPU_SH2_CACHEFLUSH_H */
42