diff options
author | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2008-02-19 09:29:28 -0500 |
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committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2008-02-19 09:29:33 -0500 |
commit | a22fb7ff1259e6ee87d0ba3559c9f7b7d0cb20d2 (patch) | |
tree | 46926139f2bd05aa45ce842ef8268474561fb11a /include/asm-s390 | |
parent | 03513bccad33667ed738cfd96dc5757e539e0bdb (diff) |
[S390] find bit corner case.
Fix [ext2_]find_first_[zero_]bit for the corner case of an all clear
or all set bit field by always handling that last word of the bit field
with __ffz_word/__ffs_word.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'include/asm-s390')
-rw-r--r-- | include/asm-s390/bitops.h | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/include/asm-s390/bitops.h b/include/asm-s390/bitops.h index ab83c844d04c..965394e69452 100644 --- a/include/asm-s390/bitops.h +++ b/include/asm-s390/bitops.h | |||
@@ -456,16 +456,18 @@ static inline unsigned long __ffz_word_loop(const unsigned long *addr, | |||
456 | 456 | ||
457 | asm volatile( | 457 | asm volatile( |
458 | #ifndef __s390x__ | 458 | #ifndef __s390x__ |
459 | " ahi %1,31\n" | 459 | " ahi %1,-1\n" |
460 | " srl %1,5\n" | 460 | " sra %1,5\n" |
461 | " jz 1f\n" | ||
461 | "0: c %2,0(%0,%3)\n" | 462 | "0: c %2,0(%0,%3)\n" |
462 | " jne 1f\n" | 463 | " jne 1f\n" |
463 | " la %0,4(%0)\n" | 464 | " la %0,4(%0)\n" |
464 | " brct %1,0b\n" | 465 | " brct %1,0b\n" |
465 | "1:\n" | 466 | "1:\n" |
466 | #else | 467 | #else |
467 | " aghi %1,63\n" | 468 | " aghi %1,-1\n" |
468 | " srlg %1,%1,6\n" | 469 | " srag %1,%1,6\n" |
470 | " jz 1f\n" | ||
469 | "0: cg %2,0(%0,%3)\n" | 471 | "0: cg %2,0(%0,%3)\n" |
470 | " jne 1f\n" | 472 | " jne 1f\n" |
471 | " la %0,8(%0)\n" | 473 | " la %0,8(%0)\n" |
@@ -491,16 +493,18 @@ static inline unsigned long __ffs_word_loop(const unsigned long *addr, | |||
491 | 493 | ||
492 | asm volatile( | 494 | asm volatile( |
493 | #ifndef __s390x__ | 495 | #ifndef __s390x__ |
494 | " ahi %1,31\n" | 496 | " ahi %1,-1\n" |
495 | " srl %1,5\n" | 497 | " sra %1,5\n" |
498 | " jz 1f\n" | ||
496 | "0: c %2,0(%0,%3)\n" | 499 | "0: c %2,0(%0,%3)\n" |
497 | " jne 1f\n" | 500 | " jne 1f\n" |
498 | " la %0,4(%0)\n" | 501 | " la %0,4(%0)\n" |
499 | " brct %1,0b\n" | 502 | " brct %1,0b\n" |
500 | "1:\n" | 503 | "1:\n" |
501 | #else | 504 | #else |
502 | " aghi %1,63\n" | 505 | " aghi %1,-1\n" |
503 | " srlg %1,%1,6\n" | 506 | " srag %1,%1,6\n" |
507 | " jz 1f\n" | ||
504 | "0: cg %2,0(%0,%3)\n" | 508 | "0: cg %2,0(%0,%3)\n" |
505 | " jne 1f\n" | 509 | " jne 1f\n" |
506 | " la %0,8(%0)\n" | 510 | " la %0,8(%0)\n" |