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authorArnd Bergmann <arnd@arndb.de>2006-12-06 23:37:29 -0500
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-07 11:39:37 -0500
commitf5738ceed46782aea7663d62cb6398eb05fc4ce0 (patch)
tree156ebf498bc1d892d6f9e33d2751869417e30eb4 /include/asm-s390/unistd.h
parent28ec24e23229ae3d333f8d7f0e6b31fa8ea7bf46 (diff)
[PATCH] remove kernel syscalls
The last thing we agreed on was to remove the macros entirely for 2.6.19, on all architectures. Unfortunately, I think nobody actually _did_ that, so they are still there. [akpm@osdl.org: x86_64 fix] Cc: David Woodhouse <dwmw2@infradead.org> Cc: Greg Schafer <gschafer@zip.com.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-s390/unistd.h')
-rw-r--r--include/asm-s390/unistd.h154
1 files changed, 0 insertions, 154 deletions
diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h
index 71d3c21b84f0..fb6fef97d739 100644
--- a/include/asm-s390/unistd.h
+++ b/include/asm-s390/unistd.h
@@ -345,160 +345,6 @@
345 345
346#ifdef __KERNEL__ 346#ifdef __KERNEL__
347 347
348#include <linux/err.h>
349
350#define __syscall_return(type, res) \
351do { \
352 if ((unsigned long)(res) >= (unsigned long)(-MAX_ERRNO)) { \
353 errno = -(res); \
354 res = -1; \
355 } \
356 return (type) (res); \
357} while (0)
358
359#define _svc_clobber "1", "cc", "memory"
360
361#define _syscall0(type,name) \
362type name(void) { \
363 register long __svcres asm("2"); \
364 long __res; \
365 asm volatile( \
366 " .if %1 < 256\n" \
367 " svc %b1\n" \
368 " .else\n" \
369 " la %%r1,%1\n" \
370 " svc 0\n" \
371 " .endif" \
372 : "=d" (__svcres) \
373 : "i" (__NR_##name) \
374 : _svc_clobber); \
375 __res = __svcres; \
376 __syscall_return(type,__res); \
377}
378
379#define _syscall1(type,name,type1,arg1) \
380type name(type1 arg1) { \
381 register type1 __arg1 asm("2") = arg1; \
382 register long __svcres asm("2"); \
383 long __res; \
384 asm volatile( \
385 " .if %1 < 256\n" \
386 " svc %b1\n" \
387 " .else\n" \
388 " la %%r1,%1\n" \
389 " svc 0\n" \
390 " .endif" \
391 : "=d" (__svcres) \
392 : "i" (__NR_##name), \
393 "0" (__arg1) \
394 : _svc_clobber); \
395 __res = __svcres; \
396 __syscall_return(type,__res); \
397}
398
399#define _syscall2(type,name,type1,arg1,type2,arg2) \
400type name(type1 arg1, type2 arg2) { \
401 register type1 __arg1 asm("2") = arg1; \
402 register type2 __arg2 asm("3") = arg2; \
403 register long __svcres asm("2"); \
404 long __res; \
405 asm volatile( \
406 " .if %1 < 256\n" \
407 " svc %b1\n" \
408 " .else\n" \
409 " la %%r1,%1\n" \
410 " svc 0\n" \
411 " .endif" \
412 : "=d" (__svcres) \
413 : "i" (__NR_##name), \
414 "0" (__arg1), \
415 "d" (__arg2) \
416 : _svc_clobber ); \
417 __res = __svcres; \
418 __syscall_return(type,__res); \
419}
420
421#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
422type name(type1 arg1, type2 arg2, type3 arg3) { \
423 register type1 __arg1 asm("2") = arg1; \
424 register type2 __arg2 asm("3") = arg2; \
425 register type3 __arg3 asm("4") = arg3; \
426 register long __svcres asm("2"); \
427 long __res; \
428 asm volatile( \
429 " .if %1 < 256\n" \
430 " svc %b1\n" \
431 " .else\n" \
432 " la %%r1,%1\n" \
433 " svc 0\n" \
434 " .endif" \
435 : "=d" (__svcres) \
436 : "i" (__NR_##name), \
437 "0" (__arg1), \
438 "d" (__arg2), \
439 "d" (__arg3) \
440 : _svc_clobber); \
441 __res = __svcres; \
442 __syscall_return(type,__res); \
443}
444
445#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3, \
446 type4,name4) \
447type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
448 register type1 __arg1 asm("2") = arg1; \
449 register type2 __arg2 asm("3") = arg2; \
450 register type3 __arg3 asm("4") = arg3; \
451 register type4 __arg4 asm("5") = arg4; \
452 register long __svcres asm("2"); \
453 long __res; \
454 asm volatile( \
455 " .if %1 < 256\n" \
456 " svc %b1\n" \
457 " .else\n" \
458 " la %%r1,%1\n" \
459 " svc 0\n" \
460 " .endif" \
461 : "=d" (__svcres) \
462 : "i" (__NR_##name), \
463 "0" (__arg1), \
464 "d" (__arg2), \
465 "d" (__arg3), \
466 "d" (__arg4) \
467 : _svc_clobber); \
468 __res = __svcres; \
469 __syscall_return(type,__res); \
470}
471
472#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3, \
473 type4,name4,type5,name5) \
474type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, \
475 type5 arg5) { \
476 register type1 __arg1 asm("2") = arg1; \
477 register type2 __arg2 asm("3") = arg2; \
478 register type3 __arg3 asm("4") = arg3; \
479 register type4 __arg4 asm("5") = arg4; \
480 register type5 __arg5 asm("6") = arg5; \
481 register long __svcres asm("2"); \
482 long __res; \
483 asm volatile( \
484 " .if %1 < 256\n" \
485 " svc %b1\n" \
486 " .else\n" \
487 " la %%r1,%1\n" \
488 " svc 0\n" \
489 " .endif" \
490 : "=d" (__svcres) \
491 : "i" (__NR_##name), \
492 "0" (__arg1), \
493 "d" (__arg2), \
494 "d" (__arg3), \
495 "d" (__arg4), \
496 "d" (__arg5) \
497 : _svc_clobber); \
498 __res = __svcres; \
499 __syscall_return(type,__res); \
500}
501
502#define __ARCH_WANT_IPC_PARSE_VERSION 348#define __ARCH_WANT_IPC_PARSE_VERSION
503#define __ARCH_WANT_OLD_READDIR 349#define __ARCH_WANT_OLD_READDIR
504#define __ARCH_WANT_SYS_ALARM 350#define __ARCH_WANT_SYS_ALARM
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