aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-s390/tlbflush.h
diff options
context:
space:
mode:
authorMartin Schwidefsky <schwidefsky@de.ibm.com>2006-09-28 10:56:43 -0400
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2006-09-28 10:56:43 -0400
commit94c12cc7d196bab34aaa98d38521549fa1e5ef76 (patch)
tree8e0cec0ed44445d74a2cb5160303d6b4dfb1bc31 /include/asm-s390/tlbflush.h
parent25d83cbfaa44e1b9170c0941c3ef52ca39f54ccc (diff)
[S390] Inline assembly cleanup.
Major cleanup of all s390 inline assemblies. They now have a common coding style. Quite a few have been shortened, mainly by using register asm variables. Use of the EX_TABLE macro helps as well. The atomic ops, bit ops and locking inlines new use the Q-constraint if a newer gcc is used. That results in slightly better code. Thanks to Christian Borntraeger for proof reading the changes. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'include/asm-s390/tlbflush.h')
-rw-r--r--include/asm-s390/tlbflush.h32
1 files changed, 16 insertions, 16 deletions
diff --git a/include/asm-s390/tlbflush.h b/include/asm-s390/tlbflush.h
index 73cd85bebfb2..fa4dc916a9bf 100644
--- a/include/asm-s390/tlbflush.h
+++ b/include/asm-s390/tlbflush.h
@@ -25,7 +25,7 @@
25 */ 25 */
26 26
27#define local_flush_tlb() \ 27#define local_flush_tlb() \
28do { __asm__ __volatile__("ptlb": : :"memory"); } while (0) 28do { asm volatile("ptlb": : :"memory"); } while (0)
29 29
30#ifndef CONFIG_SMP 30#ifndef CONFIG_SMP
31 31
@@ -68,24 +68,24 @@ extern void smp_ptlb_all(void);
68 68
69static inline void global_flush_tlb(void) 69static inline void global_flush_tlb(void)
70{ 70{
71 register unsigned long reg2 asm("2");
72 register unsigned long reg3 asm("3");
73 register unsigned long reg4 asm("4");
74 long dummy;
75
71#ifndef __s390x__ 76#ifndef __s390x__
72 if (!MACHINE_HAS_CSP) { 77 if (!MACHINE_HAS_CSP) {
73 smp_ptlb_all(); 78 smp_ptlb_all();
74 return; 79 return;
75 } 80 }
76#endif /* __s390x__ */ 81#endif /* __s390x__ */
77 { 82
78 register unsigned long addr asm("4"); 83 dummy = 0;
79 long dummy; 84 reg2 = reg3 = 0;
80 85 reg4 = ((unsigned long) &dummy) + 1;
81 dummy = 0; 86 asm volatile(
82 addr = ((unsigned long) &dummy) + 1; 87 " csp %0,%2"
83 __asm__ __volatile__ ( 88 : : "d" (reg2), "d" (reg3), "d" (reg4), "m" (dummy) : "cc" );
84 " slr 2,2\n"
85 " slr 3,3\n"
86 " csp 2,%0"
87 : : "a" (addr), "m" (dummy) : "cc", "2", "3" );
88 }
89} 89}
90 90
91/* 91/*
@@ -102,9 +102,9 @@ static inline void __flush_tlb_mm(struct mm_struct * mm)
102 if (unlikely(cpus_empty(mm->cpu_vm_mask))) 102 if (unlikely(cpus_empty(mm->cpu_vm_mask)))
103 return; 103 return;
104 if (MACHINE_HAS_IDTE) { 104 if (MACHINE_HAS_IDTE) {
105 asm volatile (".insn rrf,0xb98e0000,0,%0,%1,0" 105 asm volatile(
106 : : "a" (2048), 106 " .insn rrf,0xb98e0000,0,%0,%1,0"
107 "a" (__pa(mm->pgd)&PAGE_MASK) : "cc" ); 107 : : "a" (2048), "a" (__pa(mm->pgd)&PAGE_MASK) : "cc");
108 return; 108 return;
109 } 109 }
110 preempt_disable(); 110 preempt_disable();