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authorMartin Schwidefsky <schwidefsky@de.ibm.com>2006-09-28 10:56:43 -0400
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2006-09-28 10:56:43 -0400
commit94c12cc7d196bab34aaa98d38521549fa1e5ef76 (patch)
tree8e0cec0ed44445d74a2cb5160303d6b4dfb1bc31 /include/asm-s390/rwsem.h
parent25d83cbfaa44e1b9170c0941c3ef52ca39f54ccc (diff)
[S390] Inline assembly cleanup.
Major cleanup of all s390 inline assemblies. They now have a common coding style. Quite a few have been shortened, mainly by using register asm variables. Use of the EX_TABLE macro helps as well. The atomic ops, bit ops and locking inlines new use the Q-constraint if a newer gcc is used. That results in slightly better code. Thanks to Christian Borntraeger for proof reading the changes. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'include/asm-s390/rwsem.h')
-rw-r--r--include/asm-s390/rwsem.h238
1 files changed, 119 insertions, 119 deletions
diff --git a/include/asm-s390/rwsem.h b/include/asm-s390/rwsem.h
index 13ec16965150..90f4eccaa290 100644
--- a/include/asm-s390/rwsem.h
+++ b/include/asm-s390/rwsem.h
@@ -122,23 +122,23 @@ static inline void __down_read(struct rw_semaphore *sem)
122{ 122{
123 signed long old, new; 123 signed long old, new;
124 124
125 __asm__ __volatile__( 125 asm volatile(
126#ifndef __s390x__ 126#ifndef __s390x__
127 " l %0,0(%3)\n" 127 " l %0,0(%3)\n"
128 "0: lr %1,%0\n" 128 "0: lr %1,%0\n"
129 " ahi %1,%5\n" 129 " ahi %1,%5\n"
130 " cs %0,%1,0(%3)\n" 130 " cs %0,%1,0(%3)\n"
131 " jl 0b" 131 " jl 0b"
132#else /* __s390x__ */ 132#else /* __s390x__ */
133 " lg %0,0(%3)\n" 133 " lg %0,0(%3)\n"
134 "0: lgr %1,%0\n" 134 "0: lgr %1,%0\n"
135 " aghi %1,%5\n" 135 " aghi %1,%5\n"
136 " csg %0,%1,0(%3)\n" 136 " csg %0,%1,0(%3)\n"
137 " jl 0b" 137 " jl 0b"
138#endif /* __s390x__ */ 138#endif /* __s390x__ */
139 : "=&d" (old), "=&d" (new), "=m" (sem->count) 139 : "=&d" (old), "=&d" (new), "=m" (sem->count)
140 : "a" (&sem->count), "m" (sem->count), 140 : "a" (&sem->count), "m" (sem->count),
141 "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory" ); 141 "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory");
142 if (old < 0) 142 if (old < 0)
143 rwsem_down_read_failed(sem); 143 rwsem_down_read_failed(sem);
144} 144}
@@ -150,27 +150,27 @@ static inline int __down_read_trylock(struct rw_semaphore *sem)
150{ 150{
151 signed long old, new; 151 signed long old, new;
152 152
153 __asm__ __volatile__( 153 asm volatile(
154#ifndef __s390x__ 154#ifndef __s390x__
155 " l %0,0(%3)\n" 155 " l %0,0(%3)\n"
156 "0: ltr %1,%0\n" 156 "0: ltr %1,%0\n"
157 " jm 1f\n" 157 " jm 1f\n"
158 " ahi %1,%5\n" 158 " ahi %1,%5\n"
159 " cs %0,%1,0(%3)\n" 159 " cs %0,%1,0(%3)\n"
160 " jl 0b\n" 160 " jl 0b\n"
161 "1:" 161 "1:"
162#else /* __s390x__ */ 162#else /* __s390x__ */
163 " lg %0,0(%3)\n" 163 " lg %0,0(%3)\n"
164 "0: ltgr %1,%0\n" 164 "0: ltgr %1,%0\n"
165 " jm 1f\n" 165 " jm 1f\n"
166 " aghi %1,%5\n" 166 " aghi %1,%5\n"
167 " csg %0,%1,0(%3)\n" 167 " csg %0,%1,0(%3)\n"
168 " jl 0b\n" 168 " jl 0b\n"
169 "1:" 169 "1:"
170#endif /* __s390x__ */ 170#endif /* __s390x__ */
171 : "=&d" (old), "=&d" (new), "=m" (sem->count) 171 : "=&d" (old), "=&d" (new), "=m" (sem->count)
172 : "a" (&sem->count), "m" (sem->count), 172 : "a" (&sem->count), "m" (sem->count),
173 "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory" ); 173 "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory");
174 return old >= 0 ? 1 : 0; 174 return old >= 0 ? 1 : 0;
175} 175}
176 176
@@ -182,23 +182,23 @@ static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
182 signed long old, new, tmp; 182 signed long old, new, tmp;
183 183
184 tmp = RWSEM_ACTIVE_WRITE_BIAS; 184 tmp = RWSEM_ACTIVE_WRITE_BIAS;
185 __asm__ __volatile__( 185 asm volatile(
186#ifndef __s390x__ 186#ifndef __s390x__
187 " l %0,0(%3)\n" 187 " l %0,0(%3)\n"
188 "0: lr %1,%0\n" 188 "0: lr %1,%0\n"
189 " a %1,%5\n" 189 " a %1,%5\n"
190 " cs %0,%1,0(%3)\n" 190 " cs %0,%1,0(%3)\n"
191 " jl 0b" 191 " jl 0b"
192#else /* __s390x__ */ 192#else /* __s390x__ */
193 " lg %0,0(%3)\n" 193 " lg %0,0(%3)\n"
194 "0: lgr %1,%0\n" 194 "0: lgr %1,%0\n"
195 " ag %1,%5\n" 195 " ag %1,%5\n"
196 " csg %0,%1,0(%3)\n" 196 " csg %0,%1,0(%3)\n"
197 " jl 0b" 197 " jl 0b"
198#endif /* __s390x__ */ 198#endif /* __s390x__ */
199 : "=&d" (old), "=&d" (new), "=m" (sem->count) 199 : "=&d" (old), "=&d" (new), "=m" (sem->count)
200 : "a" (&sem->count), "m" (sem->count), "m" (tmp) 200 : "a" (&sem->count), "m" (sem->count), "m" (tmp)
201 : "cc", "memory" ); 201 : "cc", "memory");
202 if (old != 0) 202 if (old != 0)
203 rwsem_down_write_failed(sem); 203 rwsem_down_write_failed(sem);
204} 204}
@@ -215,24 +215,24 @@ static inline int __down_write_trylock(struct rw_semaphore *sem)
215{ 215{
216 signed long old; 216 signed long old;
217 217
218 __asm__ __volatile__( 218 asm volatile(
219#ifndef __s390x__ 219#ifndef __s390x__
220 " l %0,0(%2)\n" 220 " l %0,0(%2)\n"
221 "0: ltr %0,%0\n" 221 "0: ltr %0,%0\n"
222 " jnz 1f\n" 222 " jnz 1f\n"
223 " cs %0,%4,0(%2)\n" 223 " cs %0,%4,0(%2)\n"
224 " jl 0b\n" 224 " jl 0b\n"
225#else /* __s390x__ */ 225#else /* __s390x__ */
226 " lg %0,0(%2)\n" 226 " lg %0,0(%2)\n"
227 "0: ltgr %0,%0\n" 227 "0: ltgr %0,%0\n"
228 " jnz 1f\n" 228 " jnz 1f\n"
229 " csg %0,%4,0(%2)\n" 229 " csg %0,%4,0(%2)\n"
230 " jl 0b\n" 230 " jl 0b\n"
231#endif /* __s390x__ */ 231#endif /* __s390x__ */
232 "1:" 232 "1:"
233 : "=&d" (old), "=m" (sem->count) 233 : "=&d" (old), "=m" (sem->count)
234 : "a" (&sem->count), "m" (sem->count), 234 : "a" (&sem->count), "m" (sem->count),
235 "d" (RWSEM_ACTIVE_WRITE_BIAS) : "cc", "memory" ); 235 "d" (RWSEM_ACTIVE_WRITE_BIAS) : "cc", "memory");
236 return (old == RWSEM_UNLOCKED_VALUE) ? 1 : 0; 236 return (old == RWSEM_UNLOCKED_VALUE) ? 1 : 0;
237} 237}
238 238
@@ -243,24 +243,24 @@ static inline void __up_read(struct rw_semaphore *sem)
243{ 243{
244 signed long old, new; 244 signed long old, new;
245 245
246 __asm__ __volatile__( 246 asm volatile(
247#ifndef __s390x__ 247#ifndef __s390x__
248 " l %0,0(%3)\n" 248 " l %0,0(%3)\n"
249 "0: lr %1,%0\n" 249 "0: lr %1,%0\n"
250 " ahi %1,%5\n" 250 " ahi %1,%5\n"
251 " cs %0,%1,0(%3)\n" 251 " cs %0,%1,0(%3)\n"
252 " jl 0b" 252 " jl 0b"
253#else /* __s390x__ */ 253#else /* __s390x__ */
254 " lg %0,0(%3)\n" 254 " lg %0,0(%3)\n"
255 "0: lgr %1,%0\n" 255 "0: lgr %1,%0\n"
256 " aghi %1,%5\n" 256 " aghi %1,%5\n"
257 " csg %0,%1,0(%3)\n" 257 " csg %0,%1,0(%3)\n"
258 " jl 0b" 258 " jl 0b"
259#endif /* __s390x__ */ 259#endif /* __s390x__ */
260 : "=&d" (old), "=&d" (new), "=m" (sem->count) 260 : "=&d" (old), "=&d" (new), "=m" (sem->count)
261 : "a" (&sem->count), "m" (sem->count), 261 : "a" (&sem->count), "m" (sem->count),
262 "i" (-RWSEM_ACTIVE_READ_BIAS) 262 "i" (-RWSEM_ACTIVE_READ_BIAS)
263 : "cc", "memory" ); 263 : "cc", "memory");
264 if (new < 0) 264 if (new < 0)
265 if ((new & RWSEM_ACTIVE_MASK) == 0) 265 if ((new & RWSEM_ACTIVE_MASK) == 0)
266 rwsem_wake(sem); 266 rwsem_wake(sem);
@@ -274,23 +274,23 @@ static inline void __up_write(struct rw_semaphore *sem)
274 signed long old, new, tmp; 274 signed long old, new, tmp;
275 275
276 tmp = -RWSEM_ACTIVE_WRITE_BIAS; 276 tmp = -RWSEM_ACTIVE_WRITE_BIAS;
277 __asm__ __volatile__( 277 asm volatile(
278#ifndef __s390x__ 278#ifndef __s390x__
279 " l %0,0(%3)\n" 279 " l %0,0(%3)\n"
280 "0: lr %1,%0\n" 280 "0: lr %1,%0\n"
281 " a %1,%5\n" 281 " a %1,%5\n"
282 " cs %0,%1,0(%3)\n" 282 " cs %0,%1,0(%3)\n"
283 " jl 0b" 283 " jl 0b"
284#else /* __s390x__ */ 284#else /* __s390x__ */
285 " lg %0,0(%3)\n" 285 " lg %0,0(%3)\n"
286 "0: lgr %1,%0\n" 286 "0: lgr %1,%0\n"
287 " ag %1,%5\n" 287 " ag %1,%5\n"
288 " csg %0,%1,0(%3)\n" 288 " csg %0,%1,0(%3)\n"
289 " jl 0b" 289 " jl 0b"
290#endif /* __s390x__ */ 290#endif /* __s390x__ */
291 : "=&d" (old), "=&d" (new), "=m" (sem->count) 291 : "=&d" (old), "=&d" (new), "=m" (sem->count)
292 : "a" (&sem->count), "m" (sem->count), "m" (tmp) 292 : "a" (&sem->count), "m" (sem->count), "m" (tmp)
293 : "cc", "memory" ); 293 : "cc", "memory");
294 if (new < 0) 294 if (new < 0)
295 if ((new & RWSEM_ACTIVE_MASK) == 0) 295 if ((new & RWSEM_ACTIVE_MASK) == 0)
296 rwsem_wake(sem); 296 rwsem_wake(sem);
@@ -304,23 +304,23 @@ static inline void __downgrade_write(struct rw_semaphore *sem)
304 signed long old, new, tmp; 304 signed long old, new, tmp;
305 305
306 tmp = -RWSEM_WAITING_BIAS; 306 tmp = -RWSEM_WAITING_BIAS;
307 __asm__ __volatile__( 307 asm volatile(
308#ifndef __s390x__ 308#ifndef __s390x__
309 " l %0,0(%3)\n" 309 " l %0,0(%3)\n"
310 "0: lr %1,%0\n" 310 "0: lr %1,%0\n"
311 " a %1,%5\n" 311 " a %1,%5\n"
312 " cs %0,%1,0(%3)\n" 312 " cs %0,%1,0(%3)\n"
313 " jl 0b" 313 " jl 0b"
314#else /* __s390x__ */ 314#else /* __s390x__ */
315 " lg %0,0(%3)\n" 315 " lg %0,0(%3)\n"
316 "0: lgr %1,%0\n" 316 "0: lgr %1,%0\n"
317 " ag %1,%5\n" 317 " ag %1,%5\n"
318 " csg %0,%1,0(%3)\n" 318 " csg %0,%1,0(%3)\n"
319 " jl 0b" 319 " jl 0b"
320#endif /* __s390x__ */ 320#endif /* __s390x__ */
321 : "=&d" (old), "=&d" (new), "=m" (sem->count) 321 : "=&d" (old), "=&d" (new), "=m" (sem->count)
322 : "a" (&sem->count), "m" (sem->count), "m" (tmp) 322 : "a" (&sem->count), "m" (sem->count), "m" (tmp)
323 : "cc", "memory" ); 323 : "cc", "memory");
324 if (new > 1) 324 if (new > 1)
325 rwsem_downgrade_wake(sem); 325 rwsem_downgrade_wake(sem);
326} 326}
@@ -332,23 +332,23 @@ static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
332{ 332{
333 signed long old, new; 333 signed long old, new;
334 334
335 __asm__ __volatile__( 335 asm volatile(
336#ifndef __s390x__ 336#ifndef __s390x__
337 " l %0,0(%3)\n" 337 " l %0,0(%3)\n"
338 "0: lr %1,%0\n" 338 "0: lr %1,%0\n"
339 " ar %1,%5\n" 339 " ar %1,%5\n"
340 " cs %0,%1,0(%3)\n" 340 " cs %0,%1,0(%3)\n"
341 " jl 0b" 341 " jl 0b"
342#else /* __s390x__ */ 342#else /* __s390x__ */
343 " lg %0,0(%3)\n" 343 " lg %0,0(%3)\n"
344 "0: lgr %1,%0\n" 344 "0: lgr %1,%0\n"
345 " agr %1,%5\n" 345 " agr %1,%5\n"
346 " csg %0,%1,0(%3)\n" 346 " csg %0,%1,0(%3)\n"
347 " jl 0b" 347 " jl 0b"
348#endif /* __s390x__ */ 348#endif /* __s390x__ */
349 : "=&d" (old), "=&d" (new), "=m" (sem->count) 349 : "=&d" (old), "=&d" (new), "=m" (sem->count)
350 : "a" (&sem->count), "m" (sem->count), "d" (delta) 350 : "a" (&sem->count), "m" (sem->count), "d" (delta)
351 : "cc", "memory" ); 351 : "cc", "memory");
352} 352}
353 353
354/* 354/*
@@ -358,23 +358,23 @@ static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
358{ 358{
359 signed long old, new; 359 signed long old, new;
360 360
361 __asm__ __volatile__( 361 asm volatile(
362#ifndef __s390x__ 362#ifndef __s390x__
363 " l %0,0(%3)\n" 363 " l %0,0(%3)\n"
364 "0: lr %1,%0\n" 364 "0: lr %1,%0\n"
365 " ar %1,%5\n" 365 " ar %1,%5\n"
366 " cs %0,%1,0(%3)\n" 366 " cs %0,%1,0(%3)\n"
367 " jl 0b" 367 " jl 0b"
368#else /* __s390x__ */ 368#else /* __s390x__ */
369 " lg %0,0(%3)\n" 369 " lg %0,0(%3)\n"
370 "0: lgr %1,%0\n" 370 "0: lgr %1,%0\n"
371 " agr %1,%5\n" 371 " agr %1,%5\n"
372 " csg %0,%1,0(%3)\n" 372 " csg %0,%1,0(%3)\n"
373 " jl 0b" 373 " jl 0b"
374#endif /* __s390x__ */ 374#endif /* __s390x__ */
375 : "=&d" (old), "=&d" (new), "=m" (sem->count) 375 : "=&d" (old), "=&d" (new), "=m" (sem->count)
376 : "a" (&sem->count), "m" (sem->count), "d" (delta) 376 : "a" (&sem->count), "m" (sem->count), "d" (delta)
377 : "cc", "memory" ); 377 : "cc", "memory");
378 return new; 378 return new;
379} 379}
380 380
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