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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-s390/ptrace.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-s390/ptrace.h')
-rw-r--r--include/asm-s390/ptrace.h475
1 files changed, 475 insertions, 0 deletions
diff --git a/include/asm-s390/ptrace.h b/include/asm-s390/ptrace.h
new file mode 100644
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1/*
2 * include/asm-s390/ptrace.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
7 */
8
9#ifndef _S390_PTRACE_H
10#define _S390_PTRACE_H
11
12/*
13 * Offsets in the user_regs_struct. They are used for the ptrace
14 * system call and in entry.S
15 */
16#ifndef __s390x__
17
18#define PT_PSWMASK 0x00
19#define PT_PSWADDR 0x04
20#define PT_GPR0 0x08
21#define PT_GPR1 0x0C
22#define PT_GPR2 0x10
23#define PT_GPR3 0x14
24#define PT_GPR4 0x18
25#define PT_GPR5 0x1C
26#define PT_GPR6 0x20
27#define PT_GPR7 0x24
28#define PT_GPR8 0x28
29#define PT_GPR9 0x2C
30#define PT_GPR10 0x30
31#define PT_GPR11 0x34
32#define PT_GPR12 0x38
33#define PT_GPR13 0x3C
34#define PT_GPR14 0x40
35#define PT_GPR15 0x44
36#define PT_ACR0 0x48
37#define PT_ACR1 0x4C
38#define PT_ACR2 0x50
39#define PT_ACR3 0x54
40#define PT_ACR4 0x58
41#define PT_ACR5 0x5C
42#define PT_ACR6 0x60
43#define PT_ACR7 0x64
44#define PT_ACR8 0x68
45#define PT_ACR9 0x6C
46#define PT_ACR10 0x70
47#define PT_ACR11 0x74
48#define PT_ACR12 0x78
49#define PT_ACR13 0x7C
50#define PT_ACR14 0x80
51#define PT_ACR15 0x84
52#define PT_ORIGGPR2 0x88
53#define PT_FPC 0x90
54/*
55 * A nasty fact of life that the ptrace api
56 * only supports passing of longs.
57 */
58#define PT_FPR0_HI 0x98
59#define PT_FPR0_LO 0x9C
60#define PT_FPR1_HI 0xA0
61#define PT_FPR1_LO 0xA4
62#define PT_FPR2_HI 0xA8
63#define PT_FPR2_LO 0xAC
64#define PT_FPR3_HI 0xB0
65#define PT_FPR3_LO 0xB4
66#define PT_FPR4_HI 0xB8
67#define PT_FPR4_LO 0xBC
68#define PT_FPR5_HI 0xC0
69#define PT_FPR5_LO 0xC4
70#define PT_FPR6_HI 0xC8
71#define PT_FPR6_LO 0xCC
72#define PT_FPR7_HI 0xD0
73#define PT_FPR7_LO 0xD4
74#define PT_FPR8_HI 0xD8
75#define PT_FPR8_LO 0XDC
76#define PT_FPR9_HI 0xE0
77#define PT_FPR9_LO 0xE4
78#define PT_FPR10_HI 0xE8
79#define PT_FPR10_LO 0xEC
80#define PT_FPR11_HI 0xF0
81#define PT_FPR11_LO 0xF4
82#define PT_FPR12_HI 0xF8
83#define PT_FPR12_LO 0xFC
84#define PT_FPR13_HI 0x100
85#define PT_FPR13_LO 0x104
86#define PT_FPR14_HI 0x108
87#define PT_FPR14_LO 0x10C
88#define PT_FPR15_HI 0x110
89#define PT_FPR15_LO 0x114
90#define PT_CR_9 0x118
91#define PT_CR_10 0x11C
92#define PT_CR_11 0x120
93#define PT_IEEE_IP 0x13C
94#define PT_LASTOFF PT_IEEE_IP
95#define PT_ENDREGS 0x140-1
96
97#define GPR_SIZE 4
98#define CR_SIZE 4
99
100#define STACK_FRAME_OVERHEAD 96 /* size of minimum stack frame */
101
102#else /* __s390x__ */
103
104#define PT_PSWMASK 0x00
105#define PT_PSWADDR 0x08
106#define PT_GPR0 0x10
107#define PT_GPR1 0x18
108#define PT_GPR2 0x20
109#define PT_GPR3 0x28
110#define PT_GPR4 0x30
111#define PT_GPR5 0x38
112#define PT_GPR6 0x40
113#define PT_GPR7 0x48
114#define PT_GPR8 0x50
115#define PT_GPR9 0x58
116#define PT_GPR10 0x60
117#define PT_GPR11 0x68
118#define PT_GPR12 0x70
119#define PT_GPR13 0x78
120#define PT_GPR14 0x80
121#define PT_GPR15 0x88
122#define PT_ACR0 0x90
123#define PT_ACR1 0x94
124#define PT_ACR2 0x98
125#define PT_ACR3 0x9C
126#define PT_ACR4 0xA0
127#define PT_ACR5 0xA4
128#define PT_ACR6 0xA8
129#define PT_ACR7 0xAC
130#define PT_ACR8 0xB0
131#define PT_ACR9 0xB4
132#define PT_ACR10 0xB8
133#define PT_ACR11 0xBC
134#define PT_ACR12 0xC0
135#define PT_ACR13 0xC4
136#define PT_ACR14 0xC8
137#define PT_ACR15 0xCC
138#define PT_ORIGGPR2 0xD0
139#define PT_FPC 0xD8
140#define PT_FPR0 0xE0
141#define PT_FPR1 0xE8
142#define PT_FPR2 0xF0
143#define PT_FPR3 0xF8
144#define PT_FPR4 0x100
145#define PT_FPR5 0x108
146#define PT_FPR6 0x110
147#define PT_FPR7 0x118
148#define PT_FPR8 0x120
149#define PT_FPR9 0x128
150#define PT_FPR10 0x130
151#define PT_FPR11 0x138
152#define PT_FPR12 0x140
153#define PT_FPR13 0x148
154#define PT_FPR14 0x150
155#define PT_FPR15 0x158
156#define PT_CR_9 0x160
157#define PT_CR_10 0x168
158#define PT_CR_11 0x170
159#define PT_IEEE_IP 0x1A8
160#define PT_LASTOFF PT_IEEE_IP
161#define PT_ENDREGS 0x1B0-1
162
163#define GPR_SIZE 8
164#define CR_SIZE 8
165
166#define STACK_FRAME_OVERHEAD 160 /* size of minimum stack frame */
167
168#endif /* __s390x__ */
169
170#define NUM_GPRS 16
171#define NUM_FPRS 16
172#define NUM_CRS 16
173#define NUM_ACRS 16
174
175#define FPR_SIZE 8
176#define FPC_SIZE 4
177#define FPC_PAD_SIZE 4 /* gcc insists on aligning the fpregs */
178#define ACR_SIZE 4
179
180
181#define PTRACE_OLDSETOPTIONS 21
182
183#ifndef __ASSEMBLY__
184#include <linux/config.h>
185#include <linux/stddef.h>
186#include <linux/types.h>
187#include <asm/setup.h>
188
189typedef union
190{
191 float f;
192 double d;
193 __u64 ui;
194 struct
195 {
196 __u32 hi;
197 __u32 lo;
198 } fp;
199} freg_t;
200
201typedef struct
202{
203 __u32 fpc;
204 freg_t fprs[NUM_FPRS];
205} s390_fp_regs;
206
207#define FPC_EXCEPTION_MASK 0xF8000000
208#define FPC_FLAGS_MASK 0x00F80000
209#define FPC_DXC_MASK 0x0000FF00
210#define FPC_RM_MASK 0x00000003
211#define FPC_VALID_MASK 0xF8F8FF03
212
213/* this typedef defines how a Program Status Word looks like */
214typedef struct
215{
216 unsigned long mask;
217 unsigned long addr;
218} __attribute__ ((aligned(8))) psw_t;
219
220#ifndef __s390x__
221
222#define PSW_MASK_PER 0x40000000UL
223#define PSW_MASK_DAT 0x04000000UL
224#define PSW_MASK_IO 0x02000000UL
225#define PSW_MASK_EXT 0x01000000UL
226#define PSW_MASK_KEY 0x00F00000UL
227#define PSW_MASK_MCHECK 0x00040000UL
228#define PSW_MASK_WAIT 0x00020000UL
229#define PSW_MASK_PSTATE 0x00010000UL
230#define PSW_MASK_ASC 0x0000C000UL
231#define PSW_MASK_CC 0x00003000UL
232#define PSW_MASK_PM 0x00000F00UL
233
234#define PSW_ADDR_AMODE 0x80000000UL
235#define PSW_ADDR_INSN 0x7FFFFFFFUL
236
237#define PSW_BASE_BITS 0x00080000UL
238
239#define PSW_ASC_PRIMARY 0x00000000UL
240#define PSW_ASC_ACCREG 0x00004000UL
241#define PSW_ASC_SECONDARY 0x00008000UL
242#define PSW_ASC_HOME 0x0000C000UL
243
244#else /* __s390x__ */
245
246#define PSW_MASK_PER 0x4000000000000000UL
247#define PSW_MASK_DAT 0x0400000000000000UL
248#define PSW_MASK_IO 0x0200000000000000UL
249#define PSW_MASK_EXT 0x0100000000000000UL
250#define PSW_MASK_KEY 0x00F0000000000000UL
251#define PSW_MASK_MCHECK 0x0004000000000000UL
252#define PSW_MASK_WAIT 0x0002000000000000UL
253#define PSW_MASK_PSTATE 0x0001000000000000UL
254#define PSW_MASK_ASC 0x0000C00000000000UL
255#define PSW_MASK_CC 0x0000300000000000UL
256#define PSW_MASK_PM 0x00000F0000000000UL
257
258#define PSW_ADDR_AMODE 0x0000000000000000UL
259#define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL
260
261#define PSW_BASE_BITS 0x0000000180000000UL
262#define PSW_BASE32_BITS 0x0000000080000000UL
263
264#define PSW_ASC_PRIMARY 0x0000000000000000UL
265#define PSW_ASC_ACCREG 0x0000400000000000UL
266#define PSW_ASC_SECONDARY 0x0000800000000000UL
267#define PSW_ASC_HOME 0x0000C00000000000UL
268
269#define PSW_USER32_BITS (PSW_BASE32_BITS | PSW_MASK_DAT | PSW_ASC_HOME | \
270 PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK | \
271 PSW_MASK_PSTATE)
272
273#endif /* __s390x__ */
274
275#define PSW_KERNEL_BITS (PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_PRIMARY)
276#define PSW_USER_BITS (PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_HOME | \
277 PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK | \
278 PSW_MASK_PSTATE)
279
280/* This macro merges a NEW PSW mask specified by the user into
281 the currently active PSW mask CURRENT, modifying only those
282 bits in CURRENT that the user may be allowed to change: this
283 is the condition code and the program mask bits. */
284#define PSW_MASK_MERGE(CURRENT,NEW) \
285 (((CURRENT) & ~(PSW_MASK_CC|PSW_MASK_PM)) | \
286 ((NEW) & (PSW_MASK_CC|PSW_MASK_PM)))
287
288/*
289 * The s390_regs structure is used to define the elf_gregset_t.
290 */
291typedef struct
292{
293 psw_t psw;
294 unsigned long gprs[NUM_GPRS];
295 unsigned int acrs[NUM_ACRS];
296 unsigned long orig_gpr2;
297} s390_regs;
298
299#ifdef __KERNEL__
300/*
301 * The pt_regs struct defines the way the registers are stored on
302 * the stack during a system call.
303 */
304struct pt_regs
305{
306 unsigned long args[1];
307 psw_t psw;
308 unsigned long gprs[NUM_GPRS];
309 unsigned long orig_gpr2;
310 unsigned short ilc;
311 unsigned short trap;
312};
313#endif
314
315/*
316 * Now for the program event recording (trace) definitions.
317 */
318typedef struct
319{
320 unsigned long cr[3];
321} per_cr_words;
322
323#define PER_EM_MASK 0xE8000000UL
324
325typedef struct
326{
327#ifdef __s390x__
328 unsigned : 32;
329#endif /* __s390x__ */
330 unsigned em_branching : 1;
331 unsigned em_instruction_fetch : 1;
332 /*
333 * Switching on storage alteration automatically fixes
334 * the storage alteration event bit in the users std.
335 */
336 unsigned em_storage_alteration : 1;
337 unsigned em_gpr_alt_unused : 1;
338 unsigned em_store_real_address : 1;
339 unsigned : 3;
340 unsigned branch_addr_ctl : 1;
341 unsigned : 1;
342 unsigned storage_alt_space_ctl : 1;
343 unsigned : 21;
344 unsigned long starting_addr;
345 unsigned long ending_addr;
346} per_cr_bits;
347
348typedef struct
349{
350 unsigned short perc_atmid;
351 unsigned long address;
352 unsigned char access_id;
353} per_lowcore_words;
354
355typedef struct
356{
357 unsigned perc_branching : 1;
358 unsigned perc_instruction_fetch : 1;
359 unsigned perc_storage_alteration : 1;
360 unsigned perc_gpr_alt_unused : 1;
361 unsigned perc_store_real_address : 1;
362 unsigned : 3;
363 unsigned atmid_psw_bit_31 : 1;
364 unsigned atmid_validity_bit : 1;
365 unsigned atmid_psw_bit_32 : 1;
366 unsigned atmid_psw_bit_5 : 1;
367 unsigned atmid_psw_bit_16 : 1;
368 unsigned atmid_psw_bit_17 : 1;
369 unsigned si : 2;
370 unsigned long address;
371 unsigned : 4;
372 unsigned access_id : 4;
373} per_lowcore_bits;
374
375typedef struct
376{
377 union {
378 per_cr_words words;
379 per_cr_bits bits;
380 } control_regs;
381 /*
382 * Use these flags instead of setting em_instruction_fetch
383 * directly they are used so that single stepping can be
384 * switched on & off while not affecting other tracing
385 */
386 unsigned single_step : 1;
387 unsigned instruction_fetch : 1;
388 unsigned : 30;
389 /*
390 * These addresses are copied into cr10 & cr11 if single
391 * stepping is switched off
392 */
393 unsigned long starting_addr;
394 unsigned long ending_addr;
395 union {
396 per_lowcore_words words;
397 per_lowcore_bits bits;
398 } lowcore;
399} per_struct;
400
401typedef struct
402{
403 unsigned int len;
404 unsigned long kernel_addr;
405 unsigned long process_addr;
406} ptrace_area;
407
408/*
409 * S/390 specific non posix ptrace requests. I chose unusual values so
410 * they are unlikely to clash with future ptrace definitions.
411 */
412#define PTRACE_PEEKUSR_AREA 0x5000
413#define PTRACE_POKEUSR_AREA 0x5001
414#define PTRACE_PEEKTEXT_AREA 0x5002
415#define PTRACE_PEEKDATA_AREA 0x5003
416#define PTRACE_POKETEXT_AREA 0x5004
417#define PTRACE_POKEDATA_AREA 0x5005
418
419/*
420 * PT_PROT definition is loosely based on hppa bsd definition in
421 * gdb/hppab-nat.c
422 */
423#define PTRACE_PROT 21
424
425typedef enum
426{
427 ptprot_set_access_watchpoint,
428 ptprot_set_write_watchpoint,
429 ptprot_disable_watchpoint
430} ptprot_flags;
431
432typedef struct
433{
434 unsigned long lowaddr;
435 unsigned long hiaddr;
436 ptprot_flags prot;
437} ptprot_area;
438
439/* Sequence of bytes for breakpoint illegal instruction. */
440#define S390_BREAKPOINT {0x0,0x1}
441#define S390_BREAKPOINT_U16 ((__u16)0x0001)
442#define S390_SYSCALL_OPCODE ((__u16)0x0a00)
443#define S390_SYSCALL_SIZE 2
444
445/*
446 * The user_regs_struct defines the way the user registers are
447 * store on the stack for signal handling.
448 */
449struct user_regs_struct
450{
451 psw_t psw;
452 unsigned long gprs[NUM_GPRS];
453 unsigned int acrs[NUM_ACRS];
454 unsigned long orig_gpr2;
455 s390_fp_regs fp_regs;
456 /*
457 * These per registers are in here so that gdb can modify them
458 * itself as there is no "official" ptrace interface for hardware
459 * watchpoints. This is the way intel does it.
460 */
461 per_struct per_info;
462 unsigned long ieee_instruction_pointer;
463 /* Used to give failing instruction back to user for ieee exceptions */
464};
465
466#ifdef __KERNEL__
467#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
468#define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN)
469#define profile_pc(regs) instruction_pointer(regs)
470extern void show_regs(struct pt_regs * regs);
471#endif
472
473#endif /* __ASSEMBLY__ */
474
475#endif /* _S390_PTRACE_H */