diff options
author | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2008-01-26 08:10:58 -0500 |
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committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2008-01-26 08:11:10 -0500 |
commit | 6f457e1a149eb39ee58d51913e8023fc27c52806 (patch) | |
tree | d702ec38780667a3305e45df05c4f7df3730e9f6 /include/asm-s390/mmu_context.h | |
parent | 4b28a8fe78bd593cdc4454cf28af71ca9556914d (diff) |
[S390] Fix tlb flushing with idte.
The clear-by-asce operation of the idte instruction gets an asce
(address-space-control-element) as argument to specify which TLBs
need to get flushed. The current code passes a plain pointer to
the start of the pgd without the additional bits which would make
the pointer an asce. The current machines don't mind the difference
but a future model might want to use the designation type control
bits in the asce as a filter for the TLBs to flush.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'include/asm-s390/mmu_context.h')
-rw-r--r-- | include/asm-s390/mmu_context.h | 27 |
1 files changed, 12 insertions, 15 deletions
diff --git a/include/asm-s390/mmu_context.h b/include/asm-s390/mmu_context.h index 05b842126b99..a77d4ba3c8eb 100644 --- a/include/asm-s390/mmu_context.h +++ b/include/asm-s390/mmu_context.h | |||
@@ -12,10 +12,15 @@ | |||
12 | #include <asm/pgalloc.h> | 12 | #include <asm/pgalloc.h> |
13 | #include <asm-generic/mm_hooks.h> | 13 | #include <asm-generic/mm_hooks.h> |
14 | 14 | ||
15 | /* | 15 | static inline int init_new_context(struct task_struct *tsk, |
16 | * get a new mmu context.. S390 don't know about contexts. | 16 | struct mm_struct *mm) |
17 | */ | 17 | { |
18 | #define init_new_context(tsk,mm) 0 | 18 | mm->context = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS; |
19 | #ifdef CONFIG_64BIT | ||
20 | mm->context |= _ASCE_TYPE_REGION3; | ||
21 | #endif | ||
22 | return 0; | ||
23 | } | ||
19 | 24 | ||
20 | #define destroy_context(mm) do { } while (0) | 25 | #define destroy_context(mm) do { } while (0) |
21 | 26 | ||
@@ -27,19 +32,11 @@ | |||
27 | 32 | ||
28 | static inline void update_mm(struct mm_struct *mm, struct task_struct *tsk) | 33 | static inline void update_mm(struct mm_struct *mm, struct task_struct *tsk) |
29 | { | 34 | { |
30 | pgd_t *pgd = mm->pgd; | 35 | S390_lowcore.user_asce = mm->context | __pa(mm->pgd); |
31 | unsigned long asce_bits; | ||
32 | |||
33 | /* Calculate asce bits from the first pgd table entry. */ | ||
34 | asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS; | ||
35 | #ifdef CONFIG_64BIT | ||
36 | asce_bits |= _ASCE_TYPE_REGION3; | ||
37 | #endif | ||
38 | S390_lowcore.user_asce = asce_bits | __pa(pgd); | ||
39 | if (switch_amode) { | 36 | if (switch_amode) { |
40 | /* Load primary space page table origin. */ | 37 | /* Load primary space page table origin. */ |
41 | pgd_t *shadow_pgd = get_shadow_table(pgd) ? : pgd; | 38 | pgd_t *shadow_pgd = get_shadow_table(mm->pgd) ? : mm->pgd; |
42 | S390_lowcore.user_exec_asce = asce_bits | __pa(shadow_pgd); | 39 | S390_lowcore.user_exec_asce = mm->context | __pa(shadow_pgd); |
43 | asm volatile(LCTL_OPCODE" 1,1,%0\n" | 40 | asm volatile(LCTL_OPCODE" 1,1,%0\n" |
44 | : : "m" (S390_lowcore.user_exec_asce) ); | 41 | : : "m" (S390_lowcore.user_exec_asce) ); |
45 | } else | 42 | } else |