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authorVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 14:38:05 -0400
committerVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 14:38:05 -0400
commitd3465c921f79cfef0a4a8ceeeef9a3721bbbb57d (patch)
tree73d602a02efd3f358990dcfa9231131e69318d3b /include/asm-ppc
parentfc8e50e349aa722d9f97ed9ba30e324ede8fa408 (diff)
POWERPC: overhaul with cpm2_map mechanism
Incorporating the new way of cpm2 immr access, introduced in the previous patch, into CPM2 peripheral devices (fs_enet and cpm_uart). Both ppc and powerpc approved working( real actions taken in powerpc only, ppc just has a wrapper to keep init stuff consistent). Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Diffstat (limited to 'include/asm-ppc')
-rw-r--r--include/asm-ppc/cpm2.h53
1 files changed, 53 insertions, 0 deletions
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index bd6623aed383..220cc2debe08 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -1196,5 +1196,58 @@ typedef struct im_idma {
1196#define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1) 1196#define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1)
1197#define FCC3_MEM_OFFSET FCC_MEM_OFFSET(2) 1197#define FCC3_MEM_OFFSET FCC_MEM_OFFSET(2)
1198 1198
1199/* Clocks and GRG's */
1200
1201enum cpm_clk_dir {
1202 CPM_CLK_RX,
1203 CPM_CLK_TX,
1204 CPM_CLK_RTX
1205};
1206
1207enum cpm_clk_target {
1208 CPM_CLK_SCC1,
1209 CPM_CLK_SCC2,
1210 CPM_CLK_SCC3,
1211 CPM_CLK_SCC4,
1212 CPM_CLK_FCC1,
1213 CPM_CLK_FCC2,
1214 CPM_CLK_FCC3
1215};
1216
1217enum cpm_clk {
1218 CPM_CLK_NONE = 0,
1219 CPM_BRG1, /* Baud Rate Generator 1 */
1220 CPM_BRG2, /* Baud Rate Generator 2 */
1221 CPM_BRG3, /* Baud Rate Generator 3 */
1222 CPM_BRG4, /* Baud Rate Generator 4 */
1223 CPM_BRG5, /* Baud Rate Generator 5 */
1224 CPM_BRG6, /* Baud Rate Generator 6 */
1225 CPM_BRG7, /* Baud Rate Generator 7 */
1226 CPM_BRG8, /* Baud Rate Generator 8 */
1227 CPM_CLK1, /* Clock 1 */
1228 CPM_CLK2, /* Clock 2 */
1229 CPM_CLK3, /* Clock 3 */
1230 CPM_CLK4, /* Clock 4 */
1231 CPM_CLK5, /* Clock 5 */
1232 CPM_CLK6, /* Clock 6 */
1233 CPM_CLK7, /* Clock 7 */
1234 CPM_CLK8, /* Clock 8 */
1235 CPM_CLK9, /* Clock 9 */
1236 CPM_CLK10, /* Clock 10 */
1237 CPM_CLK11, /* Clock 11 */
1238 CPM_CLK12, /* Clock 12 */
1239 CPM_CLK13, /* Clock 13 */
1240 CPM_CLK14, /* Clock 14 */
1241 CPM_CLK15, /* Clock 15 */
1242 CPM_CLK16, /* Clock 16 */
1243 CPM_CLK17, /* Clock 17 */
1244 CPM_CLK18, /* Clock 18 */
1245 CPM_CLK19, /* Clock 19 */
1246 CPM_CLK20, /* Clock 20 */
1247 CPM_CLK_DUMMY
1248};
1249
1250extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode);
1251
1199#endif /* __CPM2__ */ 1252#endif /* __CPM2__ */
1200#endif /* __KERNEL__ */ 1253#endif /* __KERNEL__ */