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authorStephen Rothwell <sfr@canb.auug.org.au>2005-11-18 09:40:46 -0500
committerStephen Rothwell <sfr@canb.auug.org.au>2005-11-18 09:48:52 -0500
commit78b09735a2f42f32c4611d92ea51755e1faae385 (patch)
tree7123a78093d45454aff1350e95457b129383366d /include/asm-ppc
parent78baa2f8ad53968ff82ad9827b7793b3f46cba0e (diff)
powerpc: merge dma-mapping.h
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'include/asm-ppc')
-rw-r--r--include/asm-ppc/dma-mapping.h227
1 files changed, 0 insertions, 227 deletions
diff --git a/include/asm-ppc/dma-mapping.h b/include/asm-ppc/dma-mapping.h
deleted file mode 100644
index 798602620e87..000000000000
--- a/include/asm-ppc/dma-mapping.h
+++ /dev/null
@@ -1,227 +0,0 @@
1/*
2 * This is based on both include/asm-sh/dma-mapping.h and
3 * include/asm-ppc/pci.h
4 */
5#ifndef __ASM_PPC_DMA_MAPPING_H
6#define __ASM_PPC_DMA_MAPPING_H
7
8#include <linux/config.h>
9/* need struct page definitions */
10#include <linux/mm.h>
11#include <asm/scatterlist.h>
12#include <asm/io.h>
13
14#ifdef CONFIG_NOT_COHERENT_CACHE
15/*
16 * DMA-consistent mapping functions for PowerPCs that don't support
17 * cache snooping. These allocate/free a region of uncached mapped
18 * memory space for use with DMA devices. Alternatively, you could
19 * allocate the space "normally" and use the cache management functions
20 * to ensure it is consistent.
21 */
22extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
23extern void __dma_free_coherent(size_t size, void *vaddr);
24extern void __dma_sync(void *vaddr, size_t size, int direction);
25extern void __dma_sync_page(struct page *page, unsigned long offset,
26 size_t size, int direction);
27
28#else /* ! CONFIG_NOT_COHERENT_CACHE */
29/*
30 * Cache coherent cores.
31 */
32
33#define __dma_alloc_coherent(gfp, size, handle) NULL
34#define __dma_free_coherent(size, addr) do { } while (0)
35#define __dma_sync(addr, size, rw) do { } while (0)
36#define __dma_sync_page(pg, off, sz, rw) do { } while (0)
37
38#endif /* ! CONFIG_NOT_COHERENT_CACHE */
39
40#define dma_supported(dev, mask) (1)
41
42static inline int dma_set_mask(struct device *dev, u64 dma_mask)
43{
44 if (!dev->dma_mask || !dma_supported(dev, mask))
45 return -EIO;
46
47 *dev->dma_mask = dma_mask;
48
49 return 0;
50}
51
52static inline void *dma_alloc_coherent(struct device *dev, size_t size,
53 dma_addr_t * dma_handle,
54 gfp_t gfp)
55{
56#ifdef CONFIG_NOT_COHERENT_CACHE
57 return __dma_alloc_coherent(size, dma_handle, gfp);
58#else
59 void *ret;
60 /* ignore region specifiers */
61 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
62
63 if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
64 gfp |= GFP_DMA;
65
66 ret = (void *)__get_free_pages(gfp, get_order(size));
67
68 if (ret != NULL) {
69 memset(ret, 0, size);
70 *dma_handle = virt_to_bus(ret);
71 }
72
73 return ret;
74#endif
75}
76
77static inline void
78dma_free_coherent(struct device *dev, size_t size, void *vaddr,
79 dma_addr_t dma_handle)
80{
81#ifdef CONFIG_NOT_COHERENT_CACHE
82 __dma_free_coherent(size, vaddr);
83#else
84 free_pages((unsigned long)vaddr, get_order(size));
85#endif
86}
87
88static inline dma_addr_t
89dma_map_single(struct device *dev, void *ptr, size_t size,
90 enum dma_data_direction direction)
91{
92 BUG_ON(direction == DMA_NONE);
93
94 __dma_sync(ptr, size, direction);
95
96 return virt_to_bus(ptr);
97}
98
99/* We do nothing. */
100#define dma_unmap_single(dev, addr, size, dir) do { } while (0)
101
102static inline dma_addr_t
103dma_map_page(struct device *dev, struct page *page,
104 unsigned long offset, size_t size,
105 enum dma_data_direction direction)
106{
107 BUG_ON(direction == DMA_NONE);
108
109 __dma_sync_page(page, offset, size, direction);
110
111 return page_to_bus(page) + offset;
112}
113
114/* We do nothing. */
115#define dma_unmap_page(dev, handle, size, dir) do { } while (0)
116
117static inline int
118dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
119 enum dma_data_direction direction)
120{
121 int i;
122
123 BUG_ON(direction == DMA_NONE);
124
125 for (i = 0; i < nents; i++, sg++) {
126 BUG_ON(!sg->page);
127 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
128 sg->dma_address = page_to_bus(sg->page) + sg->offset;
129 }
130
131 return nents;
132}
133
134/* We don't do anything here. */
135#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0)
136
137static inline void
138dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
139 size_t size,
140 enum dma_data_direction direction)
141{
142 BUG_ON(direction == DMA_NONE);
143
144 __dma_sync(bus_to_virt(dma_handle), size, direction);
145}
146
147static inline void
148dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
149 size_t size,
150 enum dma_data_direction direction)
151{
152 BUG_ON(direction == DMA_NONE);
153
154 __dma_sync(bus_to_virt(dma_handle), size, direction);
155}
156
157static inline void
158dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
159 enum dma_data_direction direction)
160{
161 int i;
162
163 BUG_ON(direction == DMA_NONE);
164
165 for (i = 0; i < nents; i++, sg++)
166 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
167}
168
169static inline void
170dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
171 enum dma_data_direction direction)
172{
173 int i;
174
175 BUG_ON(direction == DMA_NONE);
176
177 for (i = 0; i < nents; i++, sg++)
178 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
179}
180
181#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
182#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
183#ifdef CONFIG_NOT_COHERENT_CACHE
184#define dma_is_consistent(d) (0)
185#else
186#define dma_is_consistent(d) (1)
187#endif
188
189static inline int dma_get_cache_alignment(void)
190{
191 /*
192 * Each processor family will define its own L1_CACHE_SHIFT,
193 * L1_CACHE_BYTES wraps to this, so this is always safe.
194 */
195 return L1_CACHE_BYTES;
196}
197
198static inline void
199dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
200 unsigned long offset, size_t size,
201 enum dma_data_direction direction)
202{
203 /* just sync everything for now */
204 dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
205}
206
207static inline void
208dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
209 unsigned long offset, size_t size,
210 enum dma_data_direction direction)
211{
212 /* just sync everything for now */
213 dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
214}
215
216static inline void dma_cache_sync(void *vaddr, size_t size,
217 enum dma_data_direction direction)
218{
219 __dma_sync(vaddr, size, (int)direction);
220}
221
222static inline int dma_mapping_error(dma_addr_t dma_addr)
223{
224 return 0;
225}
226
227#endif /* __ASM_PPC_DMA_MAPPING_H */