Pull release into acpica branch

91 files changed, 260 insertions, 7536 deletions

diff --git a/include/asm-ppc/a.out.h b/include/asm-ppc/a.out.h
deleted file mode 100644
index 8979a94c4a81..000000000000
--- a/include/asm-ppc/a.out.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef __PPC_A_OUT_H__
-#define __PPC_A_OUT_H__
-
-/* grabbed from the intel stuff  */
-#define STACK_TOP TASK_SIZE
-
-
-struct exec
-{
-  unsigned long a_info;         /* Use macros N_MAGIC, etc for access */
-  unsigned a_text;              /* length of text, in bytes */
-  unsigned a_data;              /* length of data, in bytes */
-  unsigned a_bss;               /* length of uninitialized data area for file, in bytes */
-  unsigned a_syms;              /* length of symbol table data in file, in bytes */
-  unsigned a_entry;             /* start address */
-  unsigned a_trsize;            /* length of relocation info for text, in bytes */
-  unsigned a_drsize;            /* length of relocation info for data, in bytes */
-};
-
-
-#define N_TRSIZE(a)     ((a).a_trsize)
-#define N_DRSIZE(a)     ((a).a_drsize)
-#define N_SYMSIZE(a)    ((a).a_syms)
-
-
-#endif
diff --git a/include/asm-ppc/atomic.h b/include/asm-ppc/atomic.h
deleted file mode 100644
index eeafd505836e..000000000000
--- a/include/asm-ppc/atomic.h
+++ /dev/null
@@ -1,214 +0,0 @@
-/*
- * PowerPC atomic operations
- */
-
-#ifndef _ASM_PPC_ATOMIC_H_
-#define _ASM_PPC_ATOMIC_H_
-
-typedef struct { volatile int counter; } atomic_t;
-
-#ifdef __KERNEL__
-
-#define ATOMIC_INIT(i)  { (i) }
-
-#define atomic_read(v)          ((v)->counter)
-#define atomic_set(v,i)         (((v)->counter) = (i))
-
-extern void atomic_clear_mask(unsigned long mask, unsigned long *addr);
-
-#ifdef CONFIG_SMP
-#define SMP_SYNC        "sync"
-#define SMP_ISYNC       "\n\tisync"
-#else
-#define SMP_SYNC        ""
-#define SMP_ISYNC
-#endif
-
-/* Erratum #77 on the 405 means we need a sync or dcbt before every stwcx.
- * The old ATOMIC_SYNC_FIX covered some but not all of this.
- */
-#ifdef CONFIG_IBM405_ERR77
-#define PPC405_ERR77(ra,rb)     "dcbt " #ra "," #rb ";"
-#else
-#define PPC405_ERR77(ra,rb)
-#endif
-
-static __inline__ void atomic_add(int a, atomic_t *v)
-{
-        int t;
-
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%3         # atomic_add\n\
-        add     %0,%2,%0\n"
-        PPC405_ERR77(0,%3)
-"       stwcx.  %0,0,%3 \n\
-        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
-        : "r" (a), "r" (&v->counter), "m" (v->counter)
-        : "cc");
-}
-
-static __inline__ int atomic_add_return(int a, atomic_t *v)
-{
-        int t;
-
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%2         # atomic_add_return\n\
-        add     %0,%1,%0\n"
-        PPC405_ERR77(0,%2)
-"       stwcx.  %0,0,%2 \n\
-        bne-    1b"
-        SMP_ISYNC
-        : "=&r" (t)
-        : "r" (a), "r" (&v->counter)
-        : "cc", "memory");
-
-        return t;
-}
-
-#define atomic_add_negative(a, v)       (atomic_add_return((a), (v)) < 0)
-
-static __inline__ void atomic_sub(int a, atomic_t *v)
-{
-        int t;
-
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%3         # atomic_sub\n\
-        subf    %0,%2,%0\n"
-        PPC405_ERR77(0,%3)
-"       stwcx.  %0,0,%3 \n\
-        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
-        : "r" (a), "r" (&v->counter), "m" (v->counter)
-        : "cc");
-}
-
-static __inline__ int atomic_sub_return(int a, atomic_t *v)
-{
-        int t;
-
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%2         # atomic_sub_return\n\
-        subf    %0,%1,%0\n"
-        PPC405_ERR77(0,%2)
-"       stwcx.  %0,0,%2 \n\
-        bne-    1b"
-        SMP_ISYNC
-        : "=&r" (t)
-        : "r" (a), "r" (&v->counter)
-        : "cc", "memory");
-
-        return t;
-}
-
-static __inline__ void atomic_inc(atomic_t *v)
-{
-        int t;
-
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%2         # atomic_inc\n\
-        addic   %0,%0,1\n"
-        PPC405_ERR77(0,%2)
-"       stwcx.  %0,0,%2 \n\
-        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
-        : "r" (&v->counter), "m" (v->counter)
-        : "cc");
-}
-
-static __inline__ int atomic_inc_return(atomic_t *v)
-{
-        int t;
-
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%1         # atomic_inc_return\n\
-        addic   %0,%0,1\n"
-        PPC405_ERR77(0,%1)
-"       stwcx.  %0,0,%1 \n\
-        bne-    1b"
-        SMP_ISYNC
-        : "=&r" (t)
-        : "r" (&v->counter)
-        : "cc", "memory");
-
-        return t;
-}
-
-/*
- * atomic_inc_and_test - increment and test
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1
- * and returns true if the result is zero, or false for all
- * other cases.
- */
-#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
-
-static __inline__ void atomic_dec(atomic_t *v)
-{
-        int t;
-
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%2         # atomic_dec\n\
-        addic   %0,%0,-1\n"
-        PPC405_ERR77(0,%2)\
-"       stwcx.  %0,0,%2\n\
-        bne-    1b"
-        : "=&r" (t), "=m" (v->counter)
-        : "r" (&v->counter), "m" (v->counter)
-        : "cc");
-}
-
-static __inline__ int atomic_dec_return(atomic_t *v)
-{
-        int t;
-
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%1         # atomic_dec_return\n\
-        addic   %0,%0,-1\n"
-        PPC405_ERR77(0,%1)
-"       stwcx.  %0,0,%1\n\
-        bne-    1b"
-        SMP_ISYNC
-        : "=&r" (t)
-        : "r" (&v->counter)
-        : "cc", "memory");
-
-        return t;
-}
-
-#define atomic_sub_and_test(a, v)       (atomic_sub_return((a), (v)) == 0)
-#define atomic_dec_and_test(v)          (atomic_dec_return((v)) == 0)
-
-/*
- * Atomically test *v and decrement if it is greater than 0.
- * The function returns the old value of *v minus 1.
- */
-static __inline__ int atomic_dec_if_positive(atomic_t *v)
-{
-        int t;
-
-        __asm__ __volatile__(
-"1:     lwarx   %0,0,%1         # atomic_dec_if_positive\n\
-        addic.  %0,%0,-1\n\
-        blt-    2f\n"
-        PPC405_ERR77(0,%1)
-"       stwcx.  %0,0,%1\n\
-        bne-    1b"
-        SMP_ISYNC
-        "\n\
-2:"     : "=&r" (t)
-        : "r" (&v->counter)
-        : "cc", "memory");
-
-        return t;
-}
-
-#define __MB    __asm__ __volatile__ (SMP_SYNC : : : "memory")
-#define smp_mb__before_atomic_dec()     __MB
-#define smp_mb__after_atomic_dec()      __MB
-#define smp_mb__before_atomic_inc()     __MB
-#define smp_mb__after_atomic_inc()      __MB
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_PPC_ATOMIC_H_ */
diff --git a/include/asm-ppc/auxvec.h b/include/asm-ppc/auxvec.h
deleted file mode 100644
index 172358df29c8..000000000000
--- a/include/asm-ppc/auxvec.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef __PPC_AUXVEC_H
-#define __PPC_AUXVEC_H
-
-/*
- * We need to put in some extra aux table entries to tell glibc what
- * the cache block size is, so it can use the dcbz instruction safely.
- */
-#define AT_DCACHEBSIZE          19
-#define AT_ICACHEBSIZE          20
-#define AT_UCACHEBSIZE          21
-/* A special ignored type value for PPC, for glibc compatibility.  */
-#define AT_IGNOREPPC            22
-
-#endif
diff --git a/include/asm-ppc/backlight.h b/include/asm-ppc/backlight.h
deleted file mode 100644
index 3a1c3dede2a0..000000000000
--- a/include/asm-ppc/backlight.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Routines for handling backlight control on PowerBooks
- *
- * For now, implementation resides in arch/ppc/kernel/pmac_support.c
- *
- */
-#ifdef __KERNEL__
-#ifndef __ASM_PPC_BACKLIGHT_H
-#define __ASM_PPC_BACKLIGHT_H
-
-/* Abstract values */
-#define BACKLIGHT_OFF   0
-#define BACKLIGHT_MIN   1
-#define BACKLIGHT_MAX   0xf
-
-struct backlight_controller {
-        int (*set_enable)(int enable, int level, void *data);
-        int (*set_level)(int level, void *data);
-};
-
-extern void register_backlight_controller(struct backlight_controller *ctrler, void *data, char *type);
-extern void unregister_backlight_controller(struct backlight_controller *ctrler, void *data);
-
-extern int set_backlight_enable(int enable);
-extern int get_backlight_enable(void);
-extern int set_backlight_level(int level);
-extern int get_backlight_level(void);
-
-#endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/bitops.h b/include/asm-ppc/bitops.h
deleted file mode 100644
index e30f536fd830..000000000000
--- a/include/asm-ppc/bitops.h
+++ /dev/null
@@ -1,460 +0,0 @@
-/*
- * bitops.h: Bit string operations on the ppc
- */
-
-#ifdef __KERNEL__
-#ifndef _PPC_BITOPS_H
-#define _PPC_BITOPS_H
-
-#include <linux/config.h>
-#include <linux/compiler.h>
-#include <asm/byteorder.h>
-#include <asm/atomic.h>
-
-/*
- * The test_and_*_bit operations are taken to imply a memory barrier
- * on SMP systems.
- */
-#ifdef CONFIG_SMP
-#define SMP_WMB         "eieio\n"
-#define SMP_MB          "\nsync"
-#else
-#define SMP_WMB
-#define SMP_MB
-#endif /* CONFIG_SMP */
-
-static __inline__ void set_bit(int nr, volatile unsigned long * addr)
-{
-        unsigned long old;
-        unsigned long mask = 1 << (nr & 0x1f);
-        unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
-        
-        __asm__ __volatile__("\n\
-1:      lwarx   %0,0,%3 \n\
-        or      %0,%0,%2 \n"
-        PPC405_ERR77(0,%3)
-"       stwcx.  %0,0,%3 \n\
-        bne-    1b"
-        : "=&r" (old), "=m" (*p)
-        : "r" (mask), "r" (p), "m" (*p)
-        : "cc" );
-}
-
-/*
- * non-atomic version
- */
-static __inline__ void __set_bit(int nr, volatile unsigned long *addr)
-{
-        unsigned long mask = 1 << (nr & 0x1f);
-        unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
-
-        *p |= mask;
-}
-
-/*
- * clear_bit doesn't imply a memory barrier
- */
-#define smp_mb__before_clear_bit()      smp_mb()
-#define smp_mb__after_clear_bit()       smp_mb()
-
-static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
-{
-        unsigned long old;
-        unsigned long mask = 1 << (nr & 0x1f);
-        unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
-
-        __asm__ __volatile__("\n\
-1:      lwarx   %0,0,%3 \n\
-        andc    %0,%0,%2 \n"
-        PPC405_ERR77(0,%3)
-"       stwcx.  %0,0,%3 \n\
-        bne-    1b"
-        : "=&r" (old), "=m" (*p)
-        : "r" (mask), "r" (p), "m" (*p)
-        : "cc");
-}
-
-/*
- * non-atomic version
- */
-static __inline__ void __clear_bit(int nr, volatile unsigned long *addr)
-{
-        unsigned long mask = 1 << (nr & 0x1f);
-        unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
-
-        *p &= ~mask;
-}
-
-static __inline__ void change_bit(int nr, volatile unsigned long *addr)
-{
-        unsigned long old;
-        unsigned long mask = 1 << (nr & 0x1f);
-        unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
-
-        __asm__ __volatile__("\n\
-1:      lwarx   %0,0,%3 \n\
-        xor     %0,%0,%2 \n"
-        PPC405_ERR77(0,%3)
-"       stwcx.  %0,0,%3 \n\
-        bne-    1b"
-        : "=&r" (old), "=m" (*p)
-        : "r" (mask), "r" (p), "m" (*p)
-        : "cc");
-}
-
-/*
- * non-atomic version
- */
-static __inline__ void __change_bit(int nr, volatile unsigned long *addr)
-{
-        unsigned long mask = 1 << (nr & 0x1f);
-        unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
-
-        *p ^= mask;
-}
-
-/*
- * test_and_*_bit do imply a memory barrier (?)
- */
-static __inline__ int test_and_set_bit(int nr, volatile unsigned long *addr)
-{
-        unsigned int old, t;
-        unsigned int mask = 1 << (nr & 0x1f);
-        volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
-
-        __asm__ __volatile__(SMP_WMB "\n\
-1:      lwarx   %0,0,%4 \n\
-        or      %1,%0,%3 \n"
-        PPC405_ERR77(0,%4)
-"       stwcx.  %1,0,%4 \n\
-        bne     1b"
-        SMP_MB
-        : "=&r" (old), "=&r" (t), "=m" (*p)
-        : "r" (mask), "r" (p), "m" (*p)
-        : "cc", "memory");
-
-        return (old & mask) != 0;
-}
-
-/*
- * non-atomic version
- */
-static __inline__ int __test_and_set_bit(int nr, volatile unsigned long *addr)
-{
-        unsigned long mask = 1 << (nr & 0x1f);
-        unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
-        unsigned long old = *p;
-
-        *p = old | mask;
-        return (old & mask) != 0;
-}
-
-static __inline__ int test_and_clear_bit(int nr, volatile unsigned long *addr)
-{
-        unsigned int old, t;
-        unsigned int mask = 1 << (nr & 0x1f);
-        volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
-
-        __asm__ __volatile__(SMP_WMB "\n\
-1:      lwarx   %0,0,%4 \n\
-        andc    %1,%0,%3 \n"
-        PPC405_ERR77(0,%4)
-"       stwcx.  %1,0,%4 \n\
-        bne     1b"
-        SMP_MB
-        : "=&r" (old), "=&r" (t), "=m" (*p)
-        : "r" (mask), "r" (p), "m" (*p)
-        : "cc", "memory");
-
-        return (old & mask) != 0;
-}
-
-/*
- * non-atomic version
- */
-static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr)
-{
-        unsigned long mask = 1 << (nr & 0x1f);
-        unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
-        unsigned long old = *p;
-
-        *p = old & ~mask;
-        return (old & mask) != 0;
-}
-
-static __inline__ int test_and_change_bit(int nr, volatile unsigned long *addr)
-{
-        unsigned int old, t;
-        unsigned int mask = 1 << (nr & 0x1f);
-        volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
-
-        __asm__ __volatile__(SMP_WMB "\n\
-1:      lwarx   %0,0,%4 \n\
-        xor     %1,%0,%3 \n"
-        PPC405_ERR77(0,%4)
-"       stwcx.  %1,0,%4 \n\
-        bne     1b"
-        SMP_MB
-        : "=&r" (old), "=&r" (t), "=m" (*p)
-        : "r" (mask), "r" (p), "m" (*p)
-        : "cc", "memory");
-
-        return (old & mask) != 0;
-}
-
-/*
- * non-atomic version
- */
-static __inline__ int __test_and_change_bit(int nr, volatile unsigned long *addr)
-{
-        unsigned long mask = 1 << (nr & 0x1f);
-        unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
-        unsigned long old = *p;
-
-        *p = old ^ mask;
-        return (old & mask) != 0;
-}
-
-static __inline__ int test_bit(int nr, __const__ volatile unsigned long *addr)
-{
-        return ((addr[nr >> 5] >> (nr & 0x1f)) & 1) != 0;
-}
-
-/* Return the bit position of the most significant 1 bit in a word */
-static __inline__ int __ilog2(unsigned long x)
-{
-        int lz;
-
-        asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
-        return 31 - lz;
-}
-
-static __inline__ int ffz(unsigned long x)
-{
-        if ((x = ~x) == 0)
-                return 32;
-        return __ilog2(x & -x);
-}
-
-static inline int __ffs(unsigned long x)
-{
-        return __ilog2(x & -x);
-}
-
-/*
- * ffs: find first bit set. This is defined the same way as
- * the libc and compiler builtin ffs routines, therefore
- * differs in spirit from the above ffz (man ffs).
- */
-static __inline__ int ffs(int x)
-{
-        return __ilog2(x & -x) + 1;
-}
-
-/*
- * fls: find last (most-significant) bit set.
- * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
- */
-static __inline__ int fls(unsigned int x)
-{
-        int lz;
-
-        asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
-        return 32 - lz;
-}
-
-/*
- * hweightN: returns the hamming weight (i.e. the number
- * of bits set) of a N-bit word
- */
-
-#define hweight32(x) generic_hweight32(x)
-#define hweight16(x) generic_hweight16(x)
-#define hweight8(x) generic_hweight8(x)
-
-/*
- * Find the first bit set in a 140-bit bitmap.
- * The first 100 bits are unlikely to be set.
- */
-static inline int sched_find_first_bit(const unsigned long *b)
-{
-        if (unlikely(b[0]))
-                return __ffs(b[0]);
-        if (unlikely(b[1]))
-                return __ffs(b[1]) + 32;
-        if (unlikely(b[2]))
-                return __ffs(b[2]) + 64;
-        if (b[3])
-                return __ffs(b[3]) + 96;
-        return __ffs(b[4]) + 128;
-}
-
-/**
- * find_next_bit - find the next set bit in a memory region
- * @addr: The address to base the search on
- * @offset: The bitnumber to start searching at
- * @size: The maximum size to search
- */
-static __inline__ unsigned long find_next_bit(const unsigned long *addr,
-        unsigned long size, unsigned long offset)
-{
-        unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
-        unsigned int result = offset & ~31UL;
-        unsigned int tmp;
-
-        if (offset >= size)
-                return size;
-        size -= result;
-        offset &= 31UL;
-        if (offset) {
-                tmp = *p++;
-                tmp &= ~0UL << offset;
-                if (size < 32)
-                        goto found_first;
-                if (tmp)
-                        goto found_middle;
-                size -= 32;
-                result += 32;
-        }
-        while (size >= 32) {
-                if ((tmp = *p++) != 0)
-                        goto found_middle;
-                result += 32;
-                size -= 32;
-        }
-        if (!size)
-                return result;
-        tmp = *p;
-
-found_first:
-        tmp &= ~0UL >> (32 - size);
-        if (tmp == 0UL)        /* Are any bits set? */
-                return result + size; /* Nope. */
-found_middle:
-        return result + __ffs(tmp);
-}
-
-/**
- * find_first_bit - find the first set bit in a memory region
- * @addr: The address to start the search at
- * @size: The maximum size to search
- *
- * Returns the bit-number of the first set bit, not the number of the byte
- * containing a bit.
- */
-#define find_first_bit(addr, size) \
-        find_next_bit((addr), (size), 0)
-
-/*
- * This implementation of find_{first,next}_zero_bit was stolen from
- * Linus' asm-alpha/bitops.h.
- */
-#define find_first_zero_bit(addr, size) \
-        find_next_zero_bit((addr), (size), 0)
-
-static __inline__ unsigned long find_next_zero_bit(const unsigned long *addr,
-        unsigned long size, unsigned long offset)
-{
-        unsigned int * p = ((unsigned int *) addr) + (offset >> 5);
-        unsigned int result = offset & ~31UL;
-        unsigned int tmp;
-
-        if (offset >= size)
-                return size;
-        size -= result;
-        offset &= 31UL;
-        if (offset) {
-                tmp = *p++;
-                tmp |= ~0UL >> (32-offset);
-                if (size < 32)
-                        goto found_first;
-                if (tmp != ~0U)
-                        goto found_middle;
-                size -= 32;
-                result += 32;
-        }
-        while (size >= 32) {
-                if ((tmp = *p++) != ~0U)
-                        goto found_middle;
-                result += 32;
-                size -= 32;
-        }
-        if (!size)
-                return result;
-        tmp = *p;
-found_first:
-        tmp |= ~0UL << size;
-        if (tmp == ~0UL)        /* Are any bits zero? */
-                return result + size; /* Nope. */
-found_middle:
-        return result + ffz(tmp);
-}
-
-
-#define ext2_set_bit(nr, addr)  __test_and_set_bit((nr) ^ 0x18, (unsigned long *)(addr))
-#define ext2_set_bit_atomic(lock, nr, addr)  test_and_set_bit((nr) ^ 0x18, (unsigned long *)(addr))
-#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 0x18, (unsigned long *)(addr))
-#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 0x18, (unsigned long *)(addr))
-
-static __inline__ int ext2_test_bit(int nr, __const__ void * addr)
-{
-        __const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
-
-        return (ADDR[nr >> 3] >> (nr & 7)) & 1;
-}
-
-/*
- * This implementation of ext2_find_{first,next}_zero_bit was stolen from
- * Linus' asm-alpha/bitops.h and modified for a big-endian machine.
- */
-
-#define ext2_find_first_zero_bit(addr, size) \
-        ext2_find_next_zero_bit((addr), (size), 0)
-
-static __inline__ unsigned long ext2_find_next_zero_bit(const void *addr,
-        unsigned long size, unsigned long offset)
-{
-        unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
-        unsigned int result = offset & ~31UL;
-        unsigned int tmp;
-
-        if (offset >= size)
-                return size;
-        size -= result;
-        offset &= 31UL;
-        if (offset) {
-                tmp = cpu_to_le32p(p++);
-                tmp |= ~0UL >> (32-offset);
-                if (size < 32)
-                        goto found_first;
-                if (tmp != ~0U)
-                        goto found_middle;
-                size -= 32;
-                result += 32;
-        }
-        while (size >= 32) {
-                if ((tmp = cpu_to_le32p(p++)) != ~0U)
-                        goto found_middle;
-                result += 32;
-                size -= 32;
-        }
-        if (!size)
-                return result;
-        tmp = cpu_to_le32p(p);
-found_first:
-        tmp |= ~0U << size;
-        if (tmp == ~0UL)        /* Are any bits zero? */
-                return result + size; /* Nope. */
-found_middle:
-        return result + ffz(tmp);
-}
-
-/* Bitmap functions for the minix filesystem.  */
-#define minix_test_and_set_bit(nr,addr) ext2_set_bit(nr,addr)
-#define minix_set_bit(nr,addr) ((void)ext2_set_bit(nr,addr))
-#define minix_test_and_clear_bit(nr,addr) ext2_clear_bit(nr,addr)
-#define minix_test_bit(nr,addr) ext2_test_bit(nr,addr)
-#define minix_find_first_zero_bit(addr,size) ext2_find_first_zero_bit(addr,size)
-
-#endif /* _PPC_BITOPS_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/btext.h b/include/asm-ppc/btext.h
index 36c7640d00f2..ccaefabe0bf5 100644
--- a/include/asm-ppc/btext.h
+++ b/include/asm-ppc/btext.h
@@ -17,18 +17,18 @@ extern unsigned long disp_BAT[2];
 extern boot_infos_t disp_bi;
 extern int boot_text_mapped;
 
-void btext_init(boot_infos_t *bi);
-void btext_welcome(void);
-void btext_prepare_BAT(void);
-void btext_setup_display(int width, int height, int depth, int pitch,
-                         unsigned long address);
-void map_boot_text(void);
-void btext_update_display(unsigned long phys, int width, int height,
-                          int depth, int pitch);
+extern void init_boot_display(void);
+extern void btext_welcome(void);
+extern void btext_prepare_BAT(void);
+extern void btext_setup_display(int width, int height, int depth, int pitch,
+                                unsigned long address);
+extern void map_boot_text(void);
+extern void btext_update_display(unsigned long phys, int width, int height,
+                                 int depth, int pitch);
 
-void btext_drawchar(char c);
-void btext_drawstring(const char *str);
-void btext_drawhex(unsigned long v);
+extern void btext_drawchar(char c);
+extern void btext_drawstring(const char *str);
+extern void btext_drawhex(unsigned long v);
 
 #endif /* __KERNEL__ */
 #endif /* __PPC_BTEXT_H */
diff --git a/include/asm-ppc/bug.h b/include/asm-ppc/bug.h
deleted file mode 100644
index 8b34fd682b0d..000000000000
--- a/include/asm-ppc/bug.h
+++ /dev/null
@@ -1,58 +0,0 @@
-#ifndef _PPC_BUG_H
-#define _PPC_BUG_H
-
-struct bug_entry {
-        unsigned long   bug_addr;
-        int             line;
-        const char      *file;
-        const char      *function;
-};
-
-/*
- * If this bit is set in the line number it means that the trap
- * is for WARN_ON rather than BUG or BUG_ON.
- */
-#define BUG_WARNING_TRAP        0x1000000
-
-#ifdef CONFIG_BUG
-#define BUG() do {                                                       \
-        __asm__ __volatile__(                                            \
-                "1:     twi 31,0,0\n"                                    \
-                ".section __bug_table,\"a\"\n\t"                         \
-                "       .long 1b,%0,%1,%2\n"                             \
-                ".previous"                                              \
-                : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
-} while (0)
-
-#define BUG_ON(x) do {                                                  \
-        if (!__builtin_constant_p(x) || (x)) {                          \
-                __asm__ __volatile__(                                   \
-                        "1:     twnei %0,0\n"                           \
-                        ".section __bug_table,\"a\"\n\t"                \
-                        "       .long 1b,%1,%2,%3\n"                    \
-                        ".previous"                                     \
-                        : : "r" (x), "i" (__LINE__), "i" (__FILE__),    \
-                            "i" (__FUNCTION__));                        \
-        }                                                               \
-} while (0)
-
-#define WARN_ON(x) do {                                                 \
-        if (!__builtin_constant_p(x) || (x)) {                          \
-                __asm__ __volatile__(                                   \
-                        "1:     twnei %0,0\n"                           \
-                        ".section __bug_table,\"a\"\n\t"                \
-                        "       .long 1b,%1,%2,%3\n"                    \
-                        ".previous"                                     \
-                        : : "r" (x), "i" (__LINE__ + BUG_WARNING_TRAP), \
-                            "i" (__FILE__), "i" (__FUNCTION__));        \
-        }                                                               \
-} while (0)
-
-#define HAVE_ARCH_BUG
-#define HAVE_ARCH_BUG_ON
-#define HAVE_ARCH_WARN_ON
-#endif
-
-#include <asm-generic/bug.h>
-
-#endif
diff --git a/include/asm-ppc/byteorder.h b/include/asm-ppc/byteorder.h
deleted file mode 100644
index c63c81ec7968..000000000000
--- a/include/asm-ppc/byteorder.h
+++ /dev/null
@@ -1,76 +0,0 @@
-#ifndef _PPC_BYTEORDER_H
-#define _PPC_BYTEORDER_H
-
-#include <asm/types.h>
-#include <linux/compiler.h>
-
-#ifdef __GNUC__
-#ifdef __KERNEL__
-
-extern __inline__ unsigned ld_le16(const volatile unsigned short *addr)
-{
-        unsigned val;
-
-        __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
-        return val;
-}
-
-extern __inline__ void st_le16(volatile unsigned short *addr, const unsigned val)
-{
-        __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
-}
-
-extern __inline__ unsigned ld_le32(const volatile unsigned *addr)
-{
-        unsigned val;
-
-        __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
-        return val;
-}
-
-extern __inline__ void st_le32(volatile unsigned *addr, const unsigned val)
-{
-        __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
-}
-
-static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 value)
-{
-        __u16 result;
-
-        __asm__("rlwimi %0,%2,8,16,23" : "=&r" (result) : "0" (value >> 8), "r" (value));
-        return result;
-}
-
-static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value)
-{
-        __u32 result;
-
-        __asm__("rlwimi %0,%2,24,16,23" : "=&r" (result) : "0" (value>>24), "r" (value));
-        __asm__("rlwimi %0,%2,8,8,15"   : "=&r" (result) : "0" (result),    "r" (value));
-        __asm__("rlwimi %0,%2,24,0,7"   : "=&r" (result) : "0" (result),    "r" (value));
-
-        return result;
-}
-#define __arch__swab32(x) ___arch__swab32(x)
-#define __arch__swab16(x) ___arch__swab16(x)
-
-/* The same, but returns converted value from the location pointer by addr. */
-#define __arch__swab16p(addr) ld_le16(addr)
-#define __arch__swab32p(addr) ld_le32(addr)
-
-/* The same, but do the conversion in situ, ie. put the value back to addr. */
-#define __arch__swab16s(addr) st_le16(addr,*addr)
-#define __arch__swab32s(addr) st_le32(addr,*addr)
-
-#endif /* __KERNEL__ */
-
-#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-#  define __BYTEORDER_HAS_U64__
-#  define __SWAB_64_THRU_32__
-#endif
-
-#endif /* __GNUC__ */
-
-#include <linux/byteorder/big_endian.h>
-
-#endif /* _PPC_BYTEORDER_H */
diff --git a/include/asm-ppc/cache.h b/include/asm-ppc/cache.h
deleted file mode 100644
index 38f2f1be4a87..000000000000
--- a/include/asm-ppc/cache.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * include/asm-ppc/cache.h
- */
-#ifdef __KERNEL__
-#ifndef __ARCH_PPC_CACHE_H
-#define __ARCH_PPC_CACHE_H
-
-#include <linux/config.h>
-
-/* bytes per L1 cache line */
-#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
-#define L1_CACHE_LINE_SIZE      16
-#define LG_L1_CACHE_LINE_SIZE   4
-#define MAX_COPY_PREFETCH       1
-#elif defined(CONFIG_PPC64BRIDGE)
-#define L1_CACHE_LINE_SIZE      128
-#define LG_L1_CACHE_LINE_SIZE   7
-#define MAX_COPY_PREFETCH       1
-#else
-#define L1_CACHE_LINE_SIZE      32
-#define LG_L1_CACHE_LINE_SIZE   5
-#define MAX_COPY_PREFETCH       4
-#endif
-
-#define L1_CACHE_BYTES L1_CACHE_LINE_SIZE
-#define L1_CACHE_SHIFT LG_L1_CACHE_LINE_SIZE
-#define SMP_CACHE_BYTES L1_CACHE_BYTES
-#define L1_CACHE_SHIFT_MAX 7    /* largest L1 which this arch supports */
-
-#define L1_CACHE_ALIGN(x)       (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
-#define L1_CACHE_PAGES          8
-
-#ifndef __ASSEMBLY__
-extern void clean_dcache_range(unsigned long start, unsigned long stop);
-extern void flush_dcache_range(unsigned long start, unsigned long stop);
-extern void invalidate_dcache_range(unsigned long start, unsigned long stop);
-extern void flush_dcache_all(void);
-#endif /* __ASSEMBLY__ */
-
-/* prep registers for L2 */
-#define CACHECRBA       0x80000823      /* Cache configuration register address */
-#define L2CACHE_MASK    0x03    /* Mask for 2 L2 Cache bits */
-#define L2CACHE_512KB   0x00    /* 512KB */
-#define L2CACHE_256KB   0x01    /* 256KB */
-#define L2CACHE_1MB     0x02    /* 1MB */
-#define L2CACHE_NONE    0x03    /* NONE */
-#define L2CACHE_PARITY  0x08    /* Mask for L2 Cache Parity Protected bit */
-
-#ifdef CONFIG_8xx
-/* Cache control on the MPC8xx is provided through some additional
- * special purpose registers.
- */
-#define SPRN_IC_CST     560     /* Instruction cache control/status */
-#define SPRN_IC_ADR     561     /* Address needed for some commands */
-#define SPRN_IC_DAT     562     /* Read-only data register */
-#define SPRN_DC_CST     568     /* Data cache control/status */
-#define SPRN_DC_ADR     569     /* Address needed for some commands */
-#define SPRN_DC_DAT     570     /* Read-only data register */
-
-/* Commands.  Only the first few are available to the instruction cache.
-*/
-#define IDC_ENABLE      0x02000000      /* Cache enable */
-#define IDC_DISABLE     0x04000000      /* Cache disable */
-#define IDC_LDLCK       0x06000000      /* Load and lock */
-#define IDC_UNLINE      0x08000000      /* Unlock line */
-#define IDC_UNALL       0x0a000000      /* Unlock all */
-#define IDC_INVALL      0x0c000000      /* Invalidate all */
-
-#define DC_FLINE        0x0e000000      /* Flush data cache line */
-#define DC_SFWT         0x01000000      /* Set forced writethrough mode */
-#define DC_CFWT         0x03000000      /* Clear forced writethrough mode */
-#define DC_SLES         0x05000000      /* Set little endian swap mode */
-#define DC_CLES         0x07000000      /* Clear little endian swap mode */
-
-/* Status.
-*/
-#define IDC_ENABLED     0x80000000      /* Cache is enabled */
-#define IDC_CERR1       0x00200000      /* Cache error 1 */
-#define IDC_CERR2       0x00100000      /* Cache error 2 */
-#define IDC_CERR3       0x00080000      /* Cache error 3 */
-
-#define DC_DFWT         0x40000000      /* Data cache is forced write through */
-#define DC_LES          0x20000000      /* Caches are little endian mode */
-#endif /* CONFIG_8xx */
-
-#endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/cacheflush.h b/include/asm-ppc/cacheflush.h
deleted file mode 100644
index 6a243efb3317..000000000000
--- a/include/asm-ppc/cacheflush.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * include/asm-ppc/cacheflush.h
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- */
-#ifdef __KERNEL__
-#ifndef _PPC_CACHEFLUSH_H
-#define _PPC_CACHEFLUSH_H
-
-#include <linux/mm.h>
-
-/*
- * No cache flushing is required when address mappings are
- * changed, because the caches on PowerPCs are physically
- * addressed.  -- paulus
- * Also, when SMP we use the coherency (M) bit of the
- * BATs and PTEs.  -- Cort
- */
-#define flush_cache_all()               do { } while (0)
-#define flush_cache_mm(mm)              do { } while (0)
-#define flush_cache_range(vma, a, b)    do { } while (0)
-#define flush_cache_page(vma, p, pfn)   do { } while (0)
-#define flush_icache_page(vma, page)    do { } while (0)
-#define flush_cache_vmap(start, end)    do { } while (0)
-#define flush_cache_vunmap(start, end)  do { } while (0)
-
-extern void flush_dcache_page(struct page *page);
-#define flush_dcache_mmap_lock(mapping)         do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-
-extern void flush_icache_range(unsigned long, unsigned long);
-extern void flush_icache_user_range(struct vm_area_struct *vma,
-                struct page *page, unsigned long addr, int len);
-
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
-do { memcpy(dst, src, len); \
-     flush_icache_user_range(vma, page, vaddr, len); \
-} while (0)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
-        memcpy(dst, src, len)
-
-extern void __flush_dcache_icache(void *page_va);
-extern void __flush_dcache_icache_phys(unsigned long physaddr);
-extern void flush_dcache_icache_page(struct page *page);
-#endif /* _PPC_CACHEFLUSH_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/checksum.h b/include/asm-ppc/checksum.h
deleted file mode 100644
index cf953a92c7ab..000000000000
--- a/include/asm-ppc/checksum.h
+++ /dev/null
@@ -1,107 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _PPC_CHECKSUM_H
-#define _PPC_CHECKSUM_H
-
-
-/*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-extern unsigned int csum_partial(const unsigned char * buff, int len,
-                                 unsigned int sum);
-
-/*
- * Computes the checksum of a memory block at src, length len,
- * and adds in "sum" (32-bit), while copying the block to dst.
- * If an access exception occurs on src or dst, it stores -EFAULT
- * to *src_err or *dst_err respectively (if that pointer is not
- * NULL), and, for an error on src, zeroes the rest of dst.
- *
- * Like csum_partial, this must be called with even lengths,
- * except for the last fragment.
- */
-extern unsigned int csum_partial_copy_generic(const char *src, char *dst,
-                                              int len, unsigned int sum,
-                                              int *src_err, int *dst_err);
-
-#define csum_partial_copy_from_user(src, dst, len, sum, errp)   \
-        csum_partial_copy_generic((__force void *)(src), (dst), (len), (sum), (errp), NULL)
-
-/* FIXME: this needs to be written to really do no check -- Cort */
-#define csum_partial_copy_nocheck(src, dst, len, sum)   \
-        csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL)
-
-/*
- * turns a 32-bit partial checksum (e.g. from csum_partial) into a
- * 1's complement 16-bit checksum.
- */
-static inline unsigned int csum_fold(unsigned int sum)
-{
-        unsigned int tmp;
-
-        /* swap the two 16-bit halves of sum */
-        __asm__("rlwinm %0,%1,16,0,31" : "=r" (tmp) : "r" (sum));
-        /* if there is a carry from adding the two 16-bit halves,
-           it will carry from the lower half into the upper half,
-           giving us the correct sum in the upper half. */
-        sum = ~(sum + tmp) >> 16;
-        return sum;
-}
-
-/*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-static inline unsigned short ip_compute_csum(unsigned char * buff, int len)
-{
-        return csum_fold(csum_partial(buff, len, 0));
-}
-
-/*
- * FIXME: I swiped this one from the sparc and made minor modifications.
- * It may not be correct.  -- Cort
- */
-static inline unsigned long csum_tcpudp_nofold(unsigned long saddr,
-                                                   unsigned long daddr,
-                                                   unsigned short len,
-                                                   unsigned short proto,
-                                                   unsigned int sum)
-{
-    __asm__("\n\
-        addc %0,%0,%1 \n\
-        adde %0,%0,%2 \n\
-        adde %0,%0,%3 \n\
-        addze %0,%0 \n\
-        "
-        : "=r" (sum)
-        : "r" (daddr), "r"(saddr), "r"((proto<<16)+len), "0"(sum));
-    return sum;
-}
-
-/*
- * This is a version of ip_compute_csum() optimized for IP headers,
- * which always checksum on 4 octet boundaries.  ihl is the number
- * of 32-bit words and is always >= 5.
- */
-extern unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl);
-
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- */
-extern unsigned short csum_tcpudp_magic(unsigned long saddr,
-                                        unsigned long daddr,
-                                        unsigned short len,
-                                        unsigned short proto,
-                                        unsigned int sum);
-
-#endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/commproc.h b/include/asm-ppc/commproc.h
index 5bbb8e2c1c6d..973e60908234 100644
--- a/include/asm-ppc/commproc.h
+++ b/include/asm-ppc/commproc.h
@@ -83,6 +83,8 @@ extern uint m8xx_cpm_hostalloc(uint size);
 extern int  m8xx_cpm_hostfree(uint start);
 extern void m8xx_cpm_hostdump(void);
 
+extern void cpm_load_patch(volatile immap_t *immr);
+
 /* Buffer descriptors used by many of the CPM protocols.
 */
 typedef struct cpm_buf_desc {
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index 9483d4bfacf7..b638b87cebe3 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -1087,6 +1087,11 @@ typedef struct im_idma {
 #define SCCR_PCIDF_MSK  0x00000078      /* PCI division factor  */
 #define SCCR_PCIDF_SHIFT 3
 
+#ifndef CPM_IMMR_OFFSET
+#define CPM_IMMR_OFFSET 0x101a8
+#endif
+
+#define FCC_PSMR_RMII   ((uint)0x00020000)      /* Use RMII interface */
 
 #endif /* __CPM2__ */
 #endif /* __KERNEL__ */
diff --git a/include/asm-ppc/cputable.h b/include/asm-ppc/cputable.h
deleted file mode 100644
index 41d8f8425c04..000000000000
--- a/include/asm-ppc/cputable.h
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- *  include/asm-ppc/cputable.h
- *
- *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- */
-
-#ifndef __ASM_PPC_CPUTABLE_H
-#define __ASM_PPC_CPUTABLE_H
-
-/* Exposed to userland CPU features */
-#define PPC_FEATURE_32                  0x80000000
-#define PPC_FEATURE_64                  0x40000000
-#define PPC_FEATURE_601_INSTR           0x20000000
-#define PPC_FEATURE_HAS_ALTIVEC         0x10000000
-#define PPC_FEATURE_HAS_FPU             0x08000000
-#define PPC_FEATURE_HAS_MMU             0x04000000
-#define PPC_FEATURE_HAS_4xxMAC          0x02000000
-#define PPC_FEATURE_UNIFIED_CACHE       0x01000000
-#define PPC_FEATURE_HAS_SPE             0x00800000
-#define PPC_FEATURE_HAS_EFP_SINGLE      0x00400000
-#define PPC_FEATURE_HAS_EFP_DOUBLE      0x00200000
-
-#ifdef __KERNEL__
-
-#ifndef __ASSEMBLY__
-
-/* This structure can grow, it's real size is used by head.S code
- * via the mkdefs mecanism.
- */
-struct cpu_spec;
-
-typedef void (*cpu_setup_t)(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
-
-struct cpu_spec {
-        /* CPU is matched via (PVR & pvr_mask) == pvr_value */
-        unsigned int    pvr_mask;
-        unsigned int    pvr_value;
-
-        char            *cpu_name;
-        unsigned int    cpu_features;           /* Kernel features */
-        unsigned int    cpu_user_features;      /* Userland features */
-
-        /* cache line sizes */
-        unsigned int    icache_bsize;
-        unsigned int    dcache_bsize;
-
-        /* number of performance monitor counters */
-        unsigned int    num_pmcs;
-
-        /* this is called to initialize various CPU bits like L1 cache,
-         * BHT, SPD, etc... from head.S before branching to identify_machine
-         */
-        cpu_setup_t     cpu_setup;
-};
-
-extern struct cpu_spec          cpu_specs[];
-extern struct cpu_spec          *cur_cpu_spec[];
-
-static inline unsigned int cpu_has_feature(unsigned int feature)
-{
-        return cur_cpu_spec[0]->cpu_features & feature;
-}
-
-#endif /* __ASSEMBLY__ */
-
-/* CPU kernel features */
-#define CPU_FTR_SPLIT_ID_CACHE          0x00000001
-#define CPU_FTR_L2CR                    0x00000002
-#define CPU_FTR_SPEC7450                0x00000004
-#define CPU_FTR_ALTIVEC                 0x00000008
-#define CPU_FTR_TAU                     0x00000010
-#define CPU_FTR_CAN_DOZE                0x00000020
-#define CPU_FTR_USE_TB                  0x00000040
-#define CPU_FTR_604_PERF_MON            0x00000080
-#define CPU_FTR_601                     0x00000100
-#define CPU_FTR_HPTE_TABLE              0x00000200
-#define CPU_FTR_CAN_NAP                 0x00000400
-#define CPU_FTR_L3CR                    0x00000800
-#define CPU_FTR_L3_DISABLE_NAP          0x00001000
-#define CPU_FTR_NAP_DISABLE_L2_PR       0x00002000
-#define CPU_FTR_DUAL_PLL_750FX          0x00004000
-#define CPU_FTR_NO_DPM                  0x00008000
-#define CPU_FTR_HAS_HIGH_BATS           0x00010000
-#define CPU_FTR_NEED_COHERENT           0x00020000
-#define CPU_FTR_NO_BTIC                 0x00040000
-#define CPU_FTR_BIG_PHYS                0x00080000
-
-#ifdef __ASSEMBLY__
-
-#define BEGIN_FTR_SECTION               98:
-
-#define END_FTR_SECTION(msk, val)               \
-99:                                             \
-        .section __ftr_fixup,"a";               \
-        .align 2;                               \
-        .long msk;                              \
-        .long val;                              \
-        .long 98b;                              \
-        .long 99b;                              \
-        .previous
-
-#else
-
-#define BEGIN_FTR_SECTION               "98:\n"
-#define END_FTR_SECTION(msk, val)               \
-"99:\n"                                         \
-"       .section __ftr_fixup,\"a\";\n"          \
-"       .align 2;\n"                            \
-"       .long "#msk";\n"                        \
-"       .long "#val";\n"                        \
-"       .long 98b;\n"                           \
-"       .long 99b;\n"                           \
-"       .previous\n"
-
-
-#endif /* __ASSEMBLY__ */
-
-#define END_FTR_SECTION_IFSET(msk)      END_FTR_SECTION((msk), (msk))
-#define END_FTR_SECTION_IFCLR(msk)      END_FTR_SECTION((msk), 0)
-
-#endif /* __ASM_PPC_CPUTABLE_H */
-#endif /* __KERNEL__ */
-
diff --git a/include/asm-ppc/current.h b/include/asm-ppc/current.h
deleted file mode 100644
index 8d41501ba10d..000000000000
--- a/include/asm-ppc/current.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _PPC_CURRENT_H
-#define _PPC_CURRENT_H
-
-/*
- * We keep `current' in r2 for speed.
- */
-register struct task_struct *current asm ("r2");
-
-#endif /* !(_PPC_CURRENT_H) */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/dbdma.h b/include/asm-ppc/dbdma.h
deleted file mode 100644
index 8973565f95d3..000000000000
--- a/include/asm-ppc/dbdma.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * Definitions for using the Apple Descriptor-Based DMA controller
- * in Power Macintosh computers.
- *
- * Copyright (C) 1996 Paul Mackerras.
- */
-
-#ifdef __KERNEL__
-#ifndef _ASM_DBDMA_H_
-#define _ASM_DBDMA_H_
-/*
- * DBDMA control/status registers.  All little-endian.
- */
-struct dbdma_regs {
-    unsigned int control;       /* lets you change bits in status */
-    unsigned int status;        /* DMA and device status bits (see below) */
-    unsigned int cmdptr_hi;     /* upper 32 bits of command address */
-    unsigned int cmdptr;        /* (lower 32 bits of) command address (phys) */
-    unsigned int intr_sel;      /* select interrupt condition bit */
-    unsigned int br_sel;        /* select branch condition bit */
-    unsigned int wait_sel;      /* select wait condition bit */
-    unsigned int xfer_mode;
-    unsigned int data2ptr_hi;
-    unsigned int data2ptr;
-    unsigned int res1;
-    unsigned int address_hi;
-    unsigned int br_addr_hi;
-    unsigned int res2[3];
-};
-
-/* Bits in control and status registers */
-#define RUN     0x8000
-#define PAUSE   0x4000
-#define FLUSH   0x2000
-#define WAKE    0x1000
-#define DEAD    0x0800
-#define ACTIVE  0x0400
-#define BT      0x0100
-#define DEVSTAT 0x00ff
-
-/*
- * DBDMA command structure.  These fields are all little-endian!
- */
-struct dbdma_cmd {
-    unsigned short req_count;   /* requested byte transfer count */
-    unsigned short command;     /* command word (has bit-fields) */
-    unsigned int   phy_addr;    /* physical data address */
-    unsigned int   cmd_dep;     /* command-dependent field */
-    unsigned short res_count;   /* residual count after completion */
-    unsigned short xfer_status; /* transfer status */
-};
-
-/* DBDMA command values in command field */
-#define OUTPUT_MORE     0       /* transfer memory data to stream */
-#define OUTPUT_LAST     0x1000  /* ditto followed by end marker */
-#define INPUT_MORE      0x2000  /* transfer stream data to memory */
-#define INPUT_LAST      0x3000  /* ditto, expect end marker */
-#define STORE_WORD      0x4000  /* write word (4 bytes) to device reg */
-#define LOAD_WORD       0x5000  /* read word (4 bytes) from device reg */
-#define DBDMA_NOP       0x6000  /* do nothing */
-#define DBDMA_STOP      0x7000  /* suspend processing */
-
-/* Key values in command field */
-#define KEY_STREAM0     0       /* usual data stream */
-#define KEY_STREAM1     0x100   /* control/status stream */
-#define KEY_STREAM2     0x200   /* device-dependent stream */
-#define KEY_STREAM3     0x300   /* device-dependent stream */
-#define KEY_REGS        0x500   /* device register space */
-#define KEY_SYSTEM      0x600   /* system memory-mapped space */
-#define KEY_DEVICE      0x700   /* device memory-mapped space */
-
-/* Interrupt control values in command field */
-#define INTR_NEVER      0       /* don't interrupt */
-#define INTR_IFSET      0x10    /* intr if condition bit is 1 */
-#define INTR_IFCLR      0x20    /* intr if condition bit is 0 */
-#define INTR_ALWAYS     0x30    /* always interrupt */
-
-/* Branch control values in command field */
-#define BR_NEVER        0       /* don't branch */
-#define BR_IFSET        0x4     /* branch if condition bit is 1 */
-#define BR_IFCLR        0x8     /* branch if condition bit is 0 */
-#define BR_ALWAYS       0xc     /* always branch */
-
-/* Wait control values in command field */
-#define WAIT_NEVER      0       /* don't wait */
-#define WAIT_IFSET      1       /* wait if condition bit is 1 */
-#define WAIT_IFCLR      2       /* wait if condition bit is 0 */
-#define WAIT_ALWAYS     3       /* always wait */
-
-/* Align an address for a DBDMA command structure */
-#define DBDMA_ALIGN(x)  (((unsigned long)(x) + sizeof(struct dbdma_cmd) - 1) \
-                         & -sizeof(struct dbdma_cmd))
-
-/* Useful macros */
-#define DBDMA_DO_STOP(regs) do {                                \
-        out_le32(&((regs)->control), (RUN|FLUSH)<<16);          \
-        while(in_le32(&((regs)->status)) & (ACTIVE|FLUSH))      \
-                ;                                               \
-} while(0)
-
-#endif /* _ASM_DBDMA_H_ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/dma-mapping.h b/include/asm-ppc/dma-mapping.h
deleted file mode 100644
index 92b8ee78dcc2..000000000000
--- a/include/asm-ppc/dma-mapping.h
+++ /dev/null
@@ -1,237 +0,0 @@
-/*
- * This is based on both include/asm-sh/dma-mapping.h and
- * include/asm-ppc/pci.h
- */
-#ifndef __ASM_PPC_DMA_MAPPING_H
-#define __ASM_PPC_DMA_MAPPING_H
-
-#include <linux/config.h>
-/* need struct page definitions */
-#include <linux/mm.h>
-#include <asm/scatterlist.h>
-#include <asm/io.h>
-
-#ifdef CONFIG_NOT_COHERENT_CACHE
-/*
- * DMA-consistent mapping functions for PowerPCs that don't support
- * cache snooping.  These allocate/free a region of uncached mapped
- * memory space for use with DMA devices.  Alternatively, you could
- * allocate the space "normally" and use the cache management functions
- * to ensure it is consistent.
- */
-extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, int gfp);
-extern void __dma_free_coherent(size_t size, void *vaddr);
-extern void __dma_sync(void *vaddr, size_t size, int direction);
-extern void __dma_sync_page(struct page *page, unsigned long offset,
-                                 size_t size, int direction);
-#define dma_cache_inv(_start,_size) \
-        invalidate_dcache_range(_start, (_start + _size))
-#define dma_cache_wback(_start,_size) \
-        clean_dcache_range(_start, (_start + _size))
-#define dma_cache_wback_inv(_start,_size) \
-        flush_dcache_range(_start, (_start + _size))
-
-#else /* ! CONFIG_NOT_COHERENT_CACHE */
-/*
- * Cache coherent cores.
- */
-
-#define dma_cache_inv(_start,_size)             do { } while (0)
-#define dma_cache_wback(_start,_size)           do { } while (0)
-#define dma_cache_wback_inv(_start,_size)       do { } while (0)
-
-#define __dma_alloc_coherent(gfp, size, handle) NULL
-#define __dma_free_coherent(size, addr)         do { } while (0)
-#define __dma_sync(addr, size, rw)              do { } while (0)
-#define __dma_sync_page(pg, off, sz, rw)        do { } while (0)
-
-#endif /* ! CONFIG_NOT_COHERENT_CACHE */
-
-#define dma_supported(dev, mask)        (1)
-
-static inline int dma_set_mask(struct device *dev, u64 dma_mask)
-{
-        if (!dev->dma_mask || !dma_supported(dev, mask))
-                return -EIO;
-
-        *dev->dma_mask = dma_mask;
-
-        return 0;
-}
-
-static inline void *dma_alloc_coherent(struct device *dev, size_t size,
-                                       dma_addr_t * dma_handle,
-                                       unsigned int __nocast gfp)
-{
-#ifdef CONFIG_NOT_COHERENT_CACHE
-        return __dma_alloc_coherent(size, dma_handle, gfp);
-#else
-        void *ret;
-        /* ignore region specifiers */
-        gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
-
-        if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
-                gfp |= GFP_DMA;
-
-        ret = (void *)__get_free_pages(gfp, get_order(size));
-
-        if (ret != NULL) {
-                memset(ret, 0, size);
-                *dma_handle = virt_to_bus(ret);
-        }
-
-        return ret;
-#endif
-}
-
-static inline void
-dma_free_coherent(struct device *dev, size_t size, void *vaddr,
-                  dma_addr_t dma_handle)
-{
-#ifdef CONFIG_NOT_COHERENT_CACHE
-        __dma_free_coherent(size, vaddr);
-#else
-        free_pages((unsigned long)vaddr, get_order(size));
-#endif
-}
-
-static inline dma_addr_t
-dma_map_single(struct device *dev, void *ptr, size_t size,
-               enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-
-        __dma_sync(ptr, size, direction);
-
-        return virt_to_bus(ptr);
-}
-
-/* We do nothing. */
-#define dma_unmap_single(dev, addr, size, dir)  do { } while (0)
-
-static inline dma_addr_t
-dma_map_page(struct device *dev, struct page *page,
-             unsigned long offset, size_t size,
-             enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-
-        __dma_sync_page(page, offset, size, direction);
-
-        return page_to_bus(page) + offset;
-}
-
-/* We do nothing. */
-#define dma_unmap_page(dev, handle, size, dir)  do { } while (0)
-
-static inline int
-dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
-           enum dma_data_direction direction)
-{
-        int i;
-
-        BUG_ON(direction == DMA_NONE);
-
-        for (i = 0; i < nents; i++, sg++) {
-                BUG_ON(!sg->page);
-                __dma_sync_page(sg->page, sg->offset, sg->length, direction);
-                sg->dma_address = page_to_bus(sg->page) + sg->offset;
-        }
-
-        return nents;
-}
-
-/* We don't do anything here. */
-#define dma_unmap_sg(dev, sg, nents, dir)       do { } while (0)
-
-static inline void
-dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
-                        size_t size,
-                        enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-
-        __dma_sync(bus_to_virt(dma_handle), size, direction);
-}
-
-static inline void
-dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
-                        size_t size,
-                        enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-
-        __dma_sync(bus_to_virt(dma_handle), size, direction);
-}
-
-static inline void
-dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
-                    enum dma_data_direction direction)
-{
-        int i;
-
-        BUG_ON(direction == DMA_NONE);
-
-        for (i = 0; i < nents; i++, sg++)
-                __dma_sync_page(sg->page, sg->offset, sg->length, direction);
-}
-
-static inline void
-dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
-                    enum dma_data_direction direction)
-{
-        int i;
-
-        BUG_ON(direction == DMA_NONE);
-
-        for (i = 0; i < nents; i++, sg++)
-                __dma_sync_page(sg->page, sg->offset, sg->length, direction);
-}
-
-#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
-#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-#ifdef CONFIG_NOT_COHERENT_CACHE
-#define dma_is_consistent(d)    (0)
-#else
-#define dma_is_consistent(d)    (1)
-#endif
-
-static inline int dma_get_cache_alignment(void)
-{
-        /*
-         * Each processor family will define its own L1_CACHE_SHIFT,
-         * L1_CACHE_BYTES wraps to this, so this is always safe.
-         */
-        return L1_CACHE_BYTES;
-}
-
-static inline void
-dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
-                              unsigned long offset, size_t size,
-                              enum dma_data_direction direction)
-{
-        /* just sync everything for now */
-        dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
-}
-
-static inline void
-dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
-                                 unsigned long offset, size_t size,
-                                 enum dma_data_direction direction)
-{
-        /* just sync everything for now */
-        dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
-}
-
-static inline void dma_cache_sync(void *vaddr, size_t size,
-                                  enum dma_data_direction direction)
-{
-        __dma_sync(vaddr, size, (int)direction);
-}
-
-static inline int dma_mapping_error(dma_addr_t dma_addr)
-{
-        return 0;
-}
-
-#endif                          /* __ASM_PPC_DMA_MAPPING_H */
diff --git a/include/asm-ppc/dma.h b/include/asm-ppc/dma.h
deleted file mode 100644
index cc8e5cd8c9d2..000000000000
--- a/include/asm-ppc/dma.h
+++ /dev/null
@@ -1,371 +0,0 @@
-/*
- * include/asm-ppc/dma.h: Defines for using and allocating dma channels.
- * Written by Hennus Bergman, 1992.
- * High DMA channel support & info by Hannu Savolainen
- * and John Boyd, Nov. 1992.
- * Changes for ppc sound by Christoph Nadig
- */
-
-#ifdef __KERNEL__
-
-#include <linux/config.h>
-#include <asm/io.h>
-#include <linux/spinlock.h>
-#include <asm/system.h>
-
-/*
- * Note: Adapted for PowerPC by Gary Thomas
- * Modified by Cort Dougan <cort@cs.nmt.edu>
- *
- * None of this really applies for Power Macintoshes.  There is
- * basically just enough here to get kernel/dma.c to compile.
- *
- * There may be some comments or restrictions made here which are
- * not valid for the PReP platform.  Take what you read
- * with a grain of salt.
- */
-
-#ifndef _ASM_DMA_H
-#define _ASM_DMA_H
-
-#ifndef MAX_DMA_CHANNELS
-#define MAX_DMA_CHANNELS        8
-#endif
-
-/* The maximum address that we can perform a DMA transfer to on this platform */
-/* Doesn't really apply... */
-#define MAX_DMA_ADDRESS         0xFFFFFFFF
-
-/* in arch/ppc/kernel/setup.c -- Cort */
-extern unsigned long DMA_MODE_WRITE, DMA_MODE_READ;
-extern unsigned long ISA_DMA_THRESHOLD;
-
-#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
-#define dma_outb        outb_p
-#else
-#define dma_outb        outb
-#endif
-
-#define dma_inb         inb
-
-/*
- * NOTES about DMA transfers:
- *
- *  controller 1: channels 0-3, byte operations, ports 00-1F
- *  controller 2: channels 4-7, word operations, ports C0-DF
- *
- *  - ALL registers are 8 bits only, regardless of transfer size
- *  - channel 4 is not used - cascades 1 into 2.
- *  - channels 0-3 are byte - addresses/counts are for physical bytes
- *  - channels 5-7 are word - addresses/counts are for physical words
- *  - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
- *  - transfer count loaded to registers is 1 less than actual count
- *  - controller 2 offsets are all even (2x offsets for controller 1)
- *  - page registers for 5-7 don't use data bit 0, represent 128K pages
- *  - page registers for 0-3 use bit 0, represent 64K pages
- *
- * On PReP, DMA transfers are limited to the lower 16MB of _physical_ memory.
- * On CHRP, the W83C553F (and VLSI Tollgate?) support full 32 bit addressing.
- * Note that addresses loaded into registers must be _physical_ addresses,
- * not logical addresses (which may differ if paging is active).
- *
- *  Address mapping for channels 0-3:
- *
- *   A23 ... A16 A15 ... A8  A7 ... A0    (Physical addresses)
- *    |  ...  |   |  ... |   |  ... |
- *    |  ...  |   |  ... |   |  ... |
- *    |  ...  |   |  ... |   |  ... |
- *   P7  ...  P0  A7 ... A0  A7 ... A0
- * |    Page    | Addr MSB | Addr LSB |   (DMA registers)
- *
- *  Address mapping for channels 5-7:
- *
- *   A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0    (Physical addresses)
- *    |  ...  |   \   \   ... \  \  \  ... \  \
- *    |  ...  |    \   \   ... \  \  \  ... \  (not used)
- *    |  ...  |     \   \   ... \  \  \  ... \
- *   P7  ...  P1 (0) A7 A6  ... A0 A7 A6 ... A0
- * |      Page      |  Addr MSB   |  Addr LSB  |   (DMA registers)
- *
- * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
- * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
- * the hardware level, so odd-byte transfers aren't possible).
- *
- * Transfer count (_not # bytes_) is limited to 64K, represented as actual
- * count - 1 : 64K => 0xFFFF, 1 => 0x0000.  Thus, count is always 1 or more,
- * and up to 128K bytes may be transferred on channels 5-7 in one operation.
- *
- */
-
-/* see prep_setup_arch() for detailed informations */
-#if defined(CONFIG_SOUND_CS4232) && defined(CONFIG_PPC_PREP)
-extern long ppc_cs4232_dma, ppc_cs4232_dma2;
-#define SND_DMA1 ppc_cs4232_dma
-#define SND_DMA2 ppc_cs4232_dma2
-#else
-#define SND_DMA1 -1
-#define SND_DMA2 -1
-#endif
-
-/* 8237 DMA controllers */
-#define IO_DMA1_BASE    0x00    /* 8 bit slave DMA, channels 0..3 */
-#define IO_DMA2_BASE    0xC0    /* 16 bit master DMA, ch 4(=slave input)..7 */
-
-/* DMA controller registers */
-#define DMA1_CMD_REG            0x08    /* command register (w) */
-#define DMA1_STAT_REG           0x08    /* status register (r) */
-#define DMA1_REQ_REG            0x09    /* request register (w) */
-#define DMA1_MASK_REG           0x0A    /* single-channel mask (w) */
-#define DMA1_MODE_REG           0x0B    /* mode register (w) */
-#define DMA1_CLEAR_FF_REG       0x0C    /* clear pointer flip-flop (w) */
-#define DMA1_TEMP_REG           0x0D    /* Temporary Register (r) */
-#define DMA1_RESET_REG          0x0D    /* Master Clear (w) */
-#define DMA1_CLR_MASK_REG       0x0E    /* Clear Mask */
-#define DMA1_MASK_ALL_REG       0x0F    /* all-channels mask (w) */
-
-#define DMA2_CMD_REG            0xD0    /* command register (w) */
-#define DMA2_STAT_REG           0xD0    /* status register (r) */
-#define DMA2_REQ_REG            0xD2    /* request register (w) */
-#define DMA2_MASK_REG           0xD4    /* single-channel mask (w) */
-#define DMA2_MODE_REG           0xD6    /* mode register (w) */
-#define DMA2_CLEAR_FF_REG       0xD8    /* clear pointer flip-flop (w) */
-#define DMA2_TEMP_REG           0xDA    /* Temporary Register (r) */
-#define DMA2_RESET_REG          0xDA    /* Master Clear (w) */
-#define DMA2_CLR_MASK_REG       0xDC    /* Clear Mask */
-#define DMA2_MASK_ALL_REG       0xDE    /* all-channels mask (w) */
-
-#define DMA_ADDR_0              0x00    /* DMA address registers */
-#define DMA_ADDR_1              0x02
-#define DMA_ADDR_2              0x04
-#define DMA_ADDR_3              0x06
-#define DMA_ADDR_4              0xC0
-#define DMA_ADDR_5              0xC4
-#define DMA_ADDR_6              0xC8
-#define DMA_ADDR_7              0xCC
-
-#define DMA_CNT_0               0x01    /* DMA count registers */
-#define DMA_CNT_1               0x03
-#define DMA_CNT_2               0x05
-#define DMA_CNT_3               0x07
-#define DMA_CNT_4               0xC2
-#define DMA_CNT_5               0xC6
-#define DMA_CNT_6               0xCA
-#define DMA_CNT_7               0xCE
-
-#define DMA_LO_PAGE_0           0x87    /* DMA page registers */
-#define DMA_LO_PAGE_1           0x83
-#define DMA_LO_PAGE_2           0x81
-#define DMA_LO_PAGE_3           0x82
-#define DMA_LO_PAGE_5           0x8B
-#define DMA_LO_PAGE_6           0x89
-#define DMA_LO_PAGE_7           0x8A
-
-#define DMA_HI_PAGE_0           0x487   /* DMA page registers */
-#define DMA_HI_PAGE_1           0x483
-#define DMA_HI_PAGE_2           0x481
-#define DMA_HI_PAGE_3           0x482
-#define DMA_HI_PAGE_5           0x48B
-#define DMA_HI_PAGE_6           0x489
-#define DMA_HI_PAGE_7           0x48A
-
-#define DMA1_EXT_REG            0x40B
-#define DMA2_EXT_REG            0x4D6
-
-#define DMA_MODE_CASCADE        0xC0    /* pass thru DREQ->HRQ, DACK<-HLDA only */
-#define DMA_AUTOINIT            0x10
-
-extern spinlock_t dma_spin_lock;
-
-static __inline__ unsigned long claim_dma_lock(void)
-{
-        unsigned long flags;
-        spin_lock_irqsave(&dma_spin_lock, flags);
-        return flags;
-}
-
-static __inline__ void release_dma_lock(unsigned long flags)
-{
-        spin_unlock_irqrestore(&dma_spin_lock, flags);
-}
-
-/* enable/disable a specific DMA channel */
-static __inline__ void enable_dma(unsigned int dmanr)
-{
-        unsigned char ucDmaCmd = 0x00;
-
-        if (dmanr != 4) {
-                dma_outb(0, DMA2_MASK_REG);     /* This may not be enabled */
-                dma_outb(ucDmaCmd, DMA2_CMD_REG);       /* Enable group */
-        }
-        if (dmanr <= 3) {
-                dma_outb(dmanr, DMA1_MASK_REG);
-                dma_outb(ucDmaCmd, DMA1_CMD_REG);       /* Enable group */
-        } else
-                dma_outb(dmanr & 3, DMA2_MASK_REG);
-}
-
-static __inline__ void disable_dma(unsigned int dmanr)
-{
-        if (dmanr <= 3)
-                dma_outb(dmanr | 4, DMA1_MASK_REG);
-        else
-                dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
-}
-
-/* Clear the 'DMA Pointer Flip Flop'.
- * Write 0 for LSB/MSB, 1 for MSB/LSB access.
- * Use this once to initialize the FF to a known state.
- * After that, keep track of it. :-)
- * --- In order to do that, the DMA routines below should ---
- * --- only be used while interrupts are disabled! ---
- */
-static __inline__ void clear_dma_ff(unsigned int dmanr)
-{
-        if (dmanr <= 3)
-                dma_outb(0, DMA1_CLEAR_FF_REG);
-        else
-                dma_outb(0, DMA2_CLEAR_FF_REG);
-}
-
-/* set mode (above) for a specific DMA channel */
-static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
-{
-        if (dmanr <= 3)
-                dma_outb(mode | dmanr, DMA1_MODE_REG);
-        else
-                dma_outb(mode | (dmanr & 3), DMA2_MODE_REG);
-}
-
-/* Set only the page register bits of the transfer address.
- * This is used for successive transfers when we know the contents of
- * the lower 16 bits of the DMA current address register, but a 64k boundary
- * may have been crossed.
- */
-static __inline__ void set_dma_page(unsigned int dmanr, int pagenr)
-{
-        switch (dmanr) {
-        case 0:
-                dma_outb(pagenr, DMA_LO_PAGE_0);
-                dma_outb(pagenr >> 8, DMA_HI_PAGE_0);
-                break;
-        case 1:
-                dma_outb(pagenr, DMA_LO_PAGE_1);
-                dma_outb(pagenr >> 8, DMA_HI_PAGE_1);
-                break;
-        case 2:
-                dma_outb(pagenr, DMA_LO_PAGE_2);
-                dma_outb(pagenr >> 8, DMA_HI_PAGE_2);
-                break;
-        case 3:
-                dma_outb(pagenr, DMA_LO_PAGE_3);
-                dma_outb(pagenr >> 8, DMA_HI_PAGE_3);
-                break;
-        case 5:
-                if (SND_DMA1 == 5 || SND_DMA2 == 5)
-                        dma_outb(pagenr, DMA_LO_PAGE_5);
-                else
-                        dma_outb(pagenr & 0xfe, DMA_LO_PAGE_5);
-                dma_outb(pagenr >> 8, DMA_HI_PAGE_5);
-                break;
-        case 6:
-                if (SND_DMA1 == 6 || SND_DMA2 == 6)
-                        dma_outb(pagenr, DMA_LO_PAGE_6);
-                else
-                        dma_outb(pagenr & 0xfe, DMA_LO_PAGE_6);
-                dma_outb(pagenr >> 8, DMA_HI_PAGE_6);
-                break;
-        case 7:
-                if (SND_DMA1 == 7 || SND_DMA2 == 7)
-                        dma_outb(pagenr, DMA_LO_PAGE_7);
-                else
-                        dma_outb(pagenr & 0xfe, DMA_LO_PAGE_7);
-                dma_outb(pagenr >> 8, DMA_HI_PAGE_7);
-                break;
-        }
-}
-
-/* Set transfer address & page bits for specific DMA channel.
- * Assumes dma flipflop is clear.
- */
-static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys)
-{
-        if (dmanr <= 3) {
-                dma_outb(phys & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
-                dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
-        } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
-                dma_outb(phys & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
-                dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
-                dma_outb((dmanr & 3), DMA2_EXT_REG);
-        } else {
-                dma_outb((phys >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
-                dma_outb((phys >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
-        }
-        set_dma_page(dmanr, phys >> 16);
-}
-
-/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
- * a specific DMA channel.
- * You must ensure the parameters are valid.
- * NOTE: from a manual: "the number of transfers is one more
- * than the initial word count"! This is taken into account.
- * Assumes dma flip-flop is clear.
- * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
- */
-static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
-{
-        count--;
-        if (dmanr <= 3) {
-                dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
-                dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 1) + 1 +
-                         IO_DMA1_BASE);
-        } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
-                dma_outb(count & 0xff, ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
-                dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 2) + 2 +
-                         IO_DMA2_BASE);
-        } else {
-                dma_outb((count >> 1) & 0xff, ((dmanr & 3) << 2) + 2 +
-                         IO_DMA2_BASE);
-                dma_outb((count >> 9) & 0xff, ((dmanr & 3) << 2) + 2 +
-                         IO_DMA2_BASE);
-        }
-}
-
-/* Get DMA residue count. After a DMA transfer, this
- * should return zero. Reading this while a DMA transfer is
- * still in progress will return unpredictable results.
- * If called before the channel has been used, it may return 1.
- * Otherwise, it returns the number of _bytes_ left to transfer.
- *
- * Assumes DMA flip-flop is clear.
- */
-static __inline__ int get_dma_residue(unsigned int dmanr)
-{
-        unsigned int io_port = (dmanr <= 3) ?
-            ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
-            : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE;
-
-        /* using short to get 16-bit wrap around */
-        unsigned short count;
-
-        count = 1 + dma_inb(io_port);
-        count += dma_inb(io_port) << 8;
-
-        return (dmanr <= 3 || dmanr == SND_DMA1 || dmanr == SND_DMA2)
-            ? count : (count << 1);
-
-}
-
-/* These are in kernel/dma.c: */
-
-/* reserve a DMA channel */
-extern int request_dma(unsigned int dmanr, const char *device_id);
-/* release it again */
-extern void free_dma(unsigned int dmanr);
-
-#ifdef CONFIG_PCI
-extern int isa_dma_bridge_buggy;
-#else
-#define isa_dma_bridge_buggy    (0)
-#endif
-#endif                          /* _ASM_DMA_H */
-#endif                          /* __KERNEL__ */
diff --git a/include/asm-ppc/elf.h b/include/asm-ppc/elf.h
deleted file mode 100644
index c25cc35e6ab5..000000000000
--- a/include/asm-ppc/elf.h
+++ /dev/null
@@ -1,151 +0,0 @@
-#ifndef __PPC_ELF_H
-#define __PPC_ELF_H
-
-/*
- * ELF register definitions..
- */
-#include <asm/types.h>
-#include <asm/ptrace.h>
-#include <asm/cputable.h>
-#include <asm/auxvec.h>
-
-/* PowerPC relocations defined by the ABIs */
-#define R_PPC_NONE              0
-#define R_PPC_ADDR32            1       /* 32bit absolute address */
-#define R_PPC_ADDR24            2       /* 26bit address, 2 bits ignored.  */
-#define R_PPC_ADDR16            3       /* 16bit absolute address */
-#define R_PPC_ADDR16_LO         4       /* lower 16bit of absolute address */
-#define R_PPC_ADDR16_HI         5       /* high 16bit of absolute address */
-#define R_PPC_ADDR16_HA         6       /* adjusted high 16bit */
-#define R_PPC_ADDR14            7       /* 16bit address, 2 bits ignored */
-#define R_PPC_ADDR14_BRTAKEN    8
-#define R_PPC_ADDR14_BRNTAKEN   9
-#define R_PPC_REL24             10      /* PC relative 26 bit */
-#define R_PPC_REL14             11      /* PC relative 16 bit */
-#define R_PPC_REL14_BRTAKEN     12
-#define R_PPC_REL14_BRNTAKEN    13
-#define R_PPC_GOT16             14
-#define R_PPC_GOT16_LO          15
-#define R_PPC_GOT16_HI          16
-#define R_PPC_GOT16_HA          17
-#define R_PPC_PLTREL24          18
-#define R_PPC_COPY              19
-#define R_PPC_GLOB_DAT          20
-#define R_PPC_JMP_SLOT          21
-#define R_PPC_RELATIVE          22
-#define R_PPC_LOCAL24PC         23
-#define R_PPC_UADDR32           24
-#define R_PPC_UADDR16           25
-#define R_PPC_REL32             26
-#define R_PPC_PLT32             27
-#define R_PPC_PLTREL32          28
-#define R_PPC_PLT16_LO          29
-#define R_PPC_PLT16_HI          30
-#define R_PPC_PLT16_HA          31
-#define R_PPC_SDAREL16          32
-#define R_PPC_SECTOFF           33
-#define R_PPC_SECTOFF_LO        34
-#define R_PPC_SECTOFF_HI        35
-#define R_PPC_SECTOFF_HA        36
-/* Keep this the last entry.  */
-#define R_PPC_NUM               37
-
-#define ELF_NGREG       48      /* includes nip, msr, lr, etc. */
-#define ELF_NFPREG      33      /* includes fpscr */
-#define ELF_NVRREG      33      /* includes vscr */
-#define ELF_NEVRREG     34      /* includes acc (as 2) */
-
-/*
- * These are used to set parameters in the core dumps.
- */
-#define ELF_ARCH        EM_PPC
-#define ELF_CLASS       ELFCLASS32
-#define ELF_DATA        ELFDATA2MSB
-
-/* General registers */
-typedef unsigned long elf_greg_t;
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-/* Floating point registers */
-typedef double elf_fpreg_t;
-typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
-
-/* Altivec registers */
-typedef __vector128 elf_vrreg_t;
-typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
-
-#ifdef __KERNEL__
-
-struct task_struct;
-
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-
-#define elf_check_arch(x) ((x)->e_machine == EM_PPC)
-
-/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
-   use of this is to invoke "./ld.so someprog" to test out a new version of
-   the loader.  We need to make sure that it is out of the way of the program
-   that it will "exec", and that there is sufficient room for the brk.  */
-
-#define ELF_ET_DYN_BASE         (0x08000000)
-
-#define USE_ELF_CORE_DUMP
-#define ELF_EXEC_PAGESIZE       4096
-
-#define ELF_CORE_COPY_REGS(gregs, regs)                         \
-        memcpy((gregs), (regs), sizeof(struct pt_regs));        \
-        memset((char *)(gregs) + sizeof(struct pt_regs), 0,     \
-               sizeof(elf_gregset_t) - sizeof(struct pt_regs));
-
-#define ELF_CORE_COPY_TASK_REGS(t, elfregs)                     \
-        ((t)->thread.regs?                                      \
-         ({ ELF_CORE_COPY_REGS((elfregs), (t)->thread.regs); 1; }): 0)
-
-extern int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpu);
-#define ELF_CORE_COPY_FPREGS(t, fpu)    dump_task_fpu((t), (fpu))
-
-/* This yields a mask that user programs can use to figure out what
-   instruction set this cpu supports.  This could be done in userspace,
-   but it's not easy, and we've already done it here.  */
-
-#define ELF_HWCAP       (cur_cpu_spec[0]->cpu_user_features)
-
-/* This yields a string that ld.so will use to load implementation
-   specific libraries for optimization.  This is more specific in
-   intent than poking at uname or /proc/cpuinfo.
-
-   For the moment, we have only optimizations for the Intel generations,
-   but that could change... */
-
-#define ELF_PLATFORM    (NULL)
-
-#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
-
-extern int dcache_bsize;
-extern int icache_bsize;
-extern int ucache_bsize;
-
-/*
- * The requirements here are:
- * - keep the final alignment of sp (sp & 0xf)
- * - make sure the 32-bit value at the first 16 byte aligned position of
- *   AUXV is greater than 16 for glibc compatibility.
- *   AT_IGNOREPPC is used for that.
- * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
- *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
- */
-#define ARCH_DLINFO                                                     \
-do {                                                                    \
-        /* Handle glibc compatibility. */                               \
-        NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
-        NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
-        /* Cache size items */                                          \
-        NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);                      \
-        NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);                      \
-        NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);                      \
- } while (0)
-
-#endif /* __KERNEL__ */
-#endif
diff --git a/include/asm-ppc/futex.h b/include/asm-ppc/futex.h
deleted file mode 100644
index 9feff4ce1424..000000000000
--- a/include/asm-ppc/futex.h
+++ /dev/null
@@ -1,53 +0,0 @@
-#ifndef _ASM_FUTEX_H
-#define _ASM_FUTEX_H
-
-#ifdef __KERNEL__
-
-#include <linux/futex.h>
-#include <asm/errno.h>
-#include <asm/uaccess.h>
-
-static inline int
-futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
-{
-        int op = (encoded_op >> 28) & 7;
-        int cmp = (encoded_op >> 24) & 15;
-        int oparg = (encoded_op << 8) >> 20;
-        int cmparg = (encoded_op << 20) >> 20;
-        int oldval = 0, ret;
-        if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
-                oparg = 1 << oparg;
-
-        if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
-                return -EFAULT;
-
-        inc_preempt_count();
-
-        switch (op) {
-        case FUTEX_OP_SET:
-        case FUTEX_OP_ADD:
-        case FUTEX_OP_OR:
-        case FUTEX_OP_ANDN:
-        case FUTEX_OP_XOR:
-        default:
-                ret = -ENOSYS;
-        }
-
-        dec_preempt_count();
-
-        if (!ret) {
-                switch (cmp) {
-                case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
-                case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
-                case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
-                case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
-                case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
-                case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
-                default: ret = -ENOSYS;
-                }
-        }
-        return ret;
-}
-
-#endif
-#endif
diff --git a/include/asm-ppc/hardirq.h b/include/asm-ppc/hardirq.h
deleted file mode 100644
index 94f1411b1a93..000000000000
--- a/include/asm-ppc/hardirq.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifdef __KERNEL__
-#ifndef __ASM_HARDIRQ_H
-#define __ASM_HARDIRQ_H
-
-#include <linux/config.h>
-#include <linux/cache.h>
-#include <linux/smp_lock.h>
-#include <asm/irq.h>
-
-/* The __last_jiffy_stamp field is needed to ensure that no decrementer
- * interrupt is lost on SMP machines. Since on most CPUs it is in the same
- * cache line as local_irq_count, it is cheap to access and is also used on UP
- * for uniformity.
- */
-typedef struct {
-        unsigned long __softirq_pending;        /* set_bit is used on this */
-        unsigned int __last_jiffy_stamp;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
-
-#define last_jiffy_stamp(cpu) __IRQ_STAT((cpu), __last_jiffy_stamp)
-
-static inline void ack_bad_irq(int irq)
-{
-        printk(KERN_CRIT "illegal vector %d received!\n", irq);
-        BUG();
-}
-
-#endif /* __ASM_HARDIRQ_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/heathrow.h b/include/asm-ppc/heathrow.h
deleted file mode 100644
index 22ac179856b9..000000000000
--- a/include/asm-ppc/heathrow.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * heathrow.h: definitions for using the "Heathrow" I/O controller chip.
- *
- * Grabbed from Open Firmware definitions on a PowerBook G3 Series
- *
- * Copyright (C) 1997 Paul Mackerras.
- */
-
-/* Front light color on Yikes/B&W G3. 32 bits */
-#define HEATHROW_FRONT_LIGHT            0x32 /* (set to 0 or 0xffffffff) */
-
-/* Brightness/contrast (gossamer iMac ?). 8 bits */
-#define HEATHROW_BRIGHTNESS_CNTL        0x32
-#define HEATHROW_CONTRAST_CNTL          0x33
-
-/* offset from ohare base for feature control register */
-#define HEATHROW_MBCR                   0x34    /* Media bay control */
-#define HEATHROW_FCR                    0x38    /* Feature control */
-#define HEATHROW_AUX_CNTL_REG           0x3c    /* Aux control */
-
-/*
- * Bits in feature control register.
- * Bits postfixed with a _N are in inverse logic
- */
-#define HRW_SCC_TRANS_EN_N      0x00000001      /* Also controls modem power */
-#define HRW_BAY_POWER_N         0x00000002
-#define HRW_BAY_PCI_ENABLE      0x00000004
-#define HRW_BAY_IDE_ENABLE      0x00000008
-#define HRW_BAY_FLOPPY_ENABLE   0x00000010
-#define HRW_IDE0_ENABLE         0x00000020
-#define HRW_IDE0_RESET_N        0x00000040
-#define HRW_BAY_DEV_MASK        0x0000001c
-#define HRW_BAY_RESET_N         0x00000080
-#define HRW_IOBUS_ENABLE        0x00000100      /* Internal IDE ? */
-#define HRW_SCC_ENABLE          0x00000200
-#define HRW_MESH_ENABLE         0x00000400
-#define HRW_SWIM_ENABLE         0x00000800
-#define HRW_SOUND_POWER_N       0x00001000
-#define HRW_SOUND_CLK_ENABLE    0x00002000
-#define HRW_SCCA_IO             0x00004000
-#define HRW_SCCB_IO             0x00008000
-#define HRW_PORT_OR_DESK_VIA_N  0x00010000      /* This one is 0 on PowerBook */
-#define HRW_PWM_MON_ID_N        0x00020000      /* ??? (0) */
-#define HRW_HOOK_MB_CNT_N       0x00040000      /* ??? (0) */
-#define HRW_SWIM_CLONE_FLOPPY   0x00080000      /* ??? (0) */
-#define HRW_AUD_RUN22           0x00100000      /* ??? (1) */
-#define HRW_SCSI_LINK_MODE      0x00200000      /* Read ??? (1) */
-#define HRW_ARB_BYPASS          0x00400000      /* Disable internal PCI arbitrer */
-#define HRW_IDE1_RESET_N        0x00800000      /* Media bay */
-#define HRW_SLOW_SCC_PCLK       0x01000000      /* ??? (0) */
-#define HRW_RESET_SCC           0x02000000
-#define HRW_MFDC_CELL_ENABLE    0x04000000      /* ??? (0) */
-#define HRW_USE_MFDC            0x08000000      /* ??? (0) */
-#define HRW_BMAC_IO_ENABLE      0x60000000      /* two bits, not documented in OF */
-#define HRW_BMAC_RESET          0x80000000      /* not documented in OF */
-
-/* We OR those features at boot on desktop G3s */
-#define HRW_DEFAULTS            (HRW_SCCA_IO | HRW_SCCB_IO | HRW_SCC_ENABLE)
-
-/* Looks like Heathrow has some sort of GPIOs as well... */
-#define HRW_GPIO_MODEM_RESET    0x6d
-
diff --git a/include/asm-ppc/hw_irq.h b/include/asm-ppc/hw_irq.h
deleted file mode 100644
index 47dc7990fb26..000000000000
--- a/include/asm-ppc/hw_irq.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
- */
-#ifdef __KERNEL__
-#ifndef _PPC_HW_IRQ_H
-#define _PPC_HW_IRQ_H
-
-#include <asm/ptrace.h>
-#include <asm/reg.h>
-
-extern void timer_interrupt(struct pt_regs *);
-
-#define INLINE_IRQS
-
-#define irqs_disabled() ((mfmsr() & MSR_EE) == 0)
-
-#ifdef INLINE_IRQS
-
-static inline void local_irq_disable(void)
-{
-        unsigned long msr;
-        msr = mfmsr();
-        mtmsr(msr & ~MSR_EE);
-        __asm__ __volatile__("": : :"memory");
-}
-
-static inline void local_irq_enable(void)
-{
-        unsigned long msr;
-        __asm__ __volatile__("": : :"memory");
-        msr = mfmsr();
-        mtmsr(msr | MSR_EE);
-}
-
-static inline void local_irq_save_ptr(unsigned long *flags)
-{
-        unsigned long msr;
-        msr = mfmsr();
-        *flags = msr;
-        mtmsr(msr & ~MSR_EE);
-        __asm__ __volatile__("": : :"memory");
-}
-
-#define local_save_flags(flags)         ((flags) = mfmsr())
-#define local_irq_save(flags)           local_irq_save_ptr(&flags)
-#define local_irq_restore(flags)        mtmsr(flags)
-
-#else
-
-extern void local_irq_enable(void);
-extern void local_irq_disable(void);
-extern void local_irq_restore(unsigned long);
-extern void local_save_flags_ptr(unsigned long *);
-
-#define local_save_flags(flags) local_save_flags_ptr(&flags)
-#define local_irq_save(flags) ({local_save_flags(flags);local_irq_disable();})
-
-#endif
-
-extern void do_lost_interrupts(unsigned long);
-
-#define mask_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->disable) irq_desc[irq].handler->disable(irq);})
-#define unmask_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->enable) irq_desc[irq].handler->enable(irq);})
-#define ack_irq(irq) ({if (irq_desc[irq].handler && irq_desc[irq].handler->ack) irq_desc[irq].handler->ack(irq);})
-
-/* Should we handle this via lost interrupts and IPIs or should we don't care like
- * we do now ? --BenH.
- */
-struct hw_interrupt_type;
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
-
-
-#endif /* _PPC_HW_IRQ_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/i8259.h b/include/asm-ppc/i8259.h
deleted file mode 100644
index 091b71295de4..000000000000
--- a/include/asm-ppc/i8259.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef _PPC_KERNEL_i8259_H
-#define _PPC_KERNEL_i8259_H
-
-#include <linux/irq.h>
-
-extern struct hw_interrupt_type i8259_pic;
-
-extern void i8259_init(long intack_addr);
-extern int i8259_irq(struct pt_regs *regs);
-
-#endif /* _PPC_KERNEL_i8259_H */
diff --git a/include/asm-ppc/ibm44x.h b/include/asm-ppc/ibm44x.h
index e5374be86aef..f835066fb3ca 100644
--- a/include/asm-ppc/ibm44x.h
+++ b/include/asm-ppc/ibm44x.h
@@ -34,12 +34,20 @@
 /* Lowest TLB slot consumed by the default pinned TLBs */
 #define PPC44x_LOW_SLOT         63
 
-/* LS 32-bits of UART0 physical address location for early serial text debug */
+/*
+ * Least significant 32-bits and extended real page number (ERPN) of
+ * UART0 physical address location for early serial text debug
+ */
 #if defined(CONFIG_440SP)
+#define UART0_PHYS_ERPN         1
+#define UART0_PHYS_IO_BASE      0xf0000200
+#elif defined(CONFIG_440SPE)
+#define UART0_PHYS_ERPN         4
 #define UART0_PHYS_IO_BASE      0xf0000200
 #elif defined(CONFIG_440EP)
 #define UART0_PHYS_IO_BASE      0xe0000000
 #else
+#define UART0_PHYS_ERPN         1
 #define UART0_PHYS_IO_BASE      0x40000200
 #endif
 
@@ -56,6 +64,11 @@
 #define PPC44x_PCICFG_PAGE      0x0000000900000000ULL
 #define PPC44x_PCIIO_PAGE       PPC44x_PCICFG_PAGE
 #define PPC44x_PCIMEM_PAGE      0x0000000a00000000ULL
+#elif defined(CONFIG_440SPE)
+#define PPC44x_IO_PAGE          0x0000000400000000ULL
+#define PPC44x_PCICFG_PAGE      0x0000000c00000000ULL
+#define PPC44x_PCIIO_PAGE       PPC44x_PCICFG_PAGE
+#define PPC44x_PCIMEM_PAGE      0x0000000d00000000ULL
 #elif defined(CONFIG_440EP)
 #define PPC44x_IO_PAGE          0x0000000000000000ULL
 #define PPC44x_PCICFG_PAGE      0x0000000000000000ULL
@@ -71,7 +84,7 @@
 /*
  * 36-bit trap ranges
  */
-#if defined(CONFIG_440SP)
+#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
 #define PPC44x_IO_LO            0xf0000000UL
 #define PPC44x_IO_HI            0xf0000fffUL
 #define PPC44x_PCI0CFG_LO       0x0ec00000UL
@@ -109,7 +122,7 @@
  */
 
 
-/* CPRs (440GX and 440SP) */
+/* CPRs (440GX and 440SP/440SPe) */
 #define DCRN_CPR_CONFIG_ADDR    0xc
 #define DCRN_CPR_CONFIG_DATA    0xd
 
@@ -130,7 +143,7 @@
         mtdcr(DCRN_CPR_CONFIG_ADDR, offset); \
         mtdcr(DCRN_CPR_CONFIG_DATA, data);})
 
-/* SDRs (440GX and 440SP) */
+/* SDRs (440GX and 440SP/440SPe) */
 #define DCRN_SDR_CONFIG_ADDR    0xe
 #define DCRN_SDR_CONFIG_DATA    0xf
 #define DCRN_SDR_PFC0           0x4100
@@ -180,7 +193,7 @@
         mtdcr(DCRN_SDR_CONFIG_ADDR, offset); \
         mtdcr(DCRN_SDR_CONFIG_DATA,data);})
 
-/* DMA (excluding 440SP) */
+/* DMA (excluding 440SP/440SPe) */
 #define DCRN_DMA0_BASE          0x100
 #define DCRN_DMA1_BASE          0x108
 #define DCRN_DMA2_BASE          0x110
@@ -200,12 +213,20 @@
 /* UIC */
 #define DCRN_UIC0_BASE  0xc0
 #define DCRN_UIC1_BASE  0xd0
-#define DCRN_UIC2_BASE  0x210
-#define DCRN_UICB_BASE  0x200
 #define UIC0            DCRN_UIC0_BASE
 #define UIC1            DCRN_UIC1_BASE
+
+#ifdef CONFIG_440SPE
+#define DCRN_UIC2_BASE  0xe0
+#define DCRN_UIC3_BASE  0xf0
+#define UIC2            DCRN_UIC2_BASE
+#define UIC3            DCRN_UIC3_BASE
+#else
+#define DCRN_UIC2_BASE  0x210
+#define DCRN_UICB_BASE  0x200
 #define UIC2            DCRN_UIC2_BASE
 #define UICB            DCRN_UICB_BASE
+#endif
 
 #define DCRN_UIC_SR(base)       (base + 0x0)
 #define DCRN_UIC_ER(base)       (base + 0x2)
@@ -218,6 +239,12 @@
 
 #define UIC0_UIC1NC             0x00000002
 
+#ifdef CONFIG_440SPE
+#define UIC0_UIC1NC      0x00000002
+#define UIC0_UIC2NC      0x00200000
+#define UIC0_UIC3NC      0x00008000
+#endif
+
 #define UICB_UIC0NC             0x40000000
 #define UICB_UIC1NC             0x10000000
 #define UICB_UIC2NC             0x04000000
@@ -297,6 +324,23 @@
 #define MALOBISR_CH0            0x80000000      /* EOB channel 1 bit */
 #define MALOBISR_CH2            0x40000000      /* EOB channel 2 bit */
 
+#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
+/* 440SP/440SPe PLB Arbiter DCRs */
+#define DCRN_PLB_REVID         0x080            /* PLB Revision ID */
+#define DCRN_PLB_CCR           0x088            /* PLB Crossbar Control */
+
+#define DCRN_PLB0_ACR          0x081            /* PLB Arbiter Control */
+#define DCRN_PLB0_BESRL        0x082            /* PLB Error Status */
+#define DCRN_PLB0_BESRH        0x083            /* PLB Error Status */
+#define DCRN_PLB0_BEARL        0x084            /* PLB Error Address Low */
+#define DCRN_PLB0_BEARH        0x085            /* PLB Error Address High */
+
+#define DCRN_PLB1_ACR           0x089           /* PLB Arbiter Control */
+#define DCRN_PLB1_BESRL         0x08a           /* PLB Error Status */
+#define DCRN_PLB1_BESRH         0x08b           /* PLB Error Status */
+#define DCRN_PLB1_BEARL         0x08c           /* PLB Error Address Low */
+#define DCRN_PLB1_BEARH         0x08d           /* PLB Error Address High */
+#else
 /* 440GP/GX PLB Arbiter DCRs */
 #define DCRN_PLB0_REVID         0x082           /* PLB Arbiter Revision ID */
 #define DCRN_PLB0_ACR           0x083           /* PLB Arbiter Control */
@@ -304,6 +348,7 @@
 #define DCRN_PLB0_BEARL         0x086           /* PLB Error Address Low */
 #define DCRN_PLB0_BEAR          DCRN_PLB0_BEARL /* 40x compatibility */
 #define DCRN_PLB0_BEARH         0x087           /* PLB Error Address High */
+#endif
 
 /* 440GP/GX PLB to OPB bridge DCRs */
 #define DCRN_POB0_BESR0         0x090
@@ -407,9 +452,13 @@
 #define PPC44x_MEM_SIZE_1G              0x40000000
 #define PPC44x_MEM_SIZE_2G              0x80000000
 
-/* 440SP memory controller DCRs */
+/* 440SP/440SPe memory controller DCRs */
 #define DCRN_MQ0_BS0BAS                 0x40
-#define DCRN_MQ0_BS1BAS                 0x41
+#if defined(CONFIG_440SP)
+#define MQ0_NUM_BANKS                   2
+#elif defined(CONFIG_440SPE)
+#define MQ0_NUM_BANKS                   4
+#endif
 
 #define MQ0_CONFIG_SIZE_MASK            0x0000fff0
 #define MQ0_CONFIG_SIZE_8M              0x0000ffc0
@@ -421,8 +470,9 @@
 #define MQ0_CONFIG_SIZE_512M            0x0000f000
 #define MQ0_CONFIG_SIZE_1G              0x0000e000
 #define MQ0_CONFIG_SIZE_2G              0x0000c000
+#define MQ0_CONFIG_SIZE_4G              0x00008000
 
-/* Internal SRAM Controller 440GX/440SP */
+/* Internal SRAM Controller 440GX/440SP/440SPe */
 #define DCRN_SRAM0_BASE         0x000
 
 #define DCRN_SRAM0_SB0CR        (DCRN_SRAM0_BASE + 0x020)
@@ -446,7 +496,7 @@
 #define DCRN_SRAM0_DPC          (DCRN_SRAM0_BASE + 0x02a)
 #define  SRAM_DPC_ENABLE        0x80000000
 
-/* L2 Cache Controller 440GX/440SP */
+/* L2 Cache Controller 440GX/440SP/440SPe */
 #define DCRN_L2C0_CFG           0x030
 #define  L2C_CFG_L2M            0x80000000
 #define  L2C_CFG_ICU            0x40000000
@@ -610,8 +660,10 @@
 #define IIC_CLOCK               50
 
 #undef NR_UICS
-#ifdef CONFIG_440GX
+#if defined(CONFIG_440GX)
 #define NR_UICS 3
+#elif defined(CONFIG_440SPE)
+#define NR_UICS 4
 #else
 #define NR_UICS 2
 #endif
diff --git a/include/asm-ppc/ibm4xx.h b/include/asm-ppc/ibm4xx.h
index e992369cb8e9..6c28ae7807f4 100644
--- a/include/asm-ppc/ibm4xx.h
+++ b/include/asm-ppc/ibm4xx.h
@@ -97,6 +97,10 @@ void ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #include <platforms/4xx/luan.h>
 #endif
 
+#if defined(CONFIG_YUCCA)
+#include <platforms/4xx/yucca.h>
+#endif
+
 #if defined(CONFIG_OCOTEA)
 #include <platforms/4xx/ocotea.h>
 #endif
diff --git a/include/asm-ppc/ibm_ocp.h b/include/asm-ppc/ibm_ocp.h
index 6f10a25bd628..9c21de1ff4ed 100644
--- a/include/asm-ppc/ibm_ocp.h
+++ b/include/asm-ppc/ibm_ocp.h
@@ -131,9 +131,22 @@ static inline void ibm_ocp_set_emac(int start, int end)
         /* Copy MAC addresses to EMAC additions */
         for (i=start; i<=end; i++) {
                 def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i);
-                memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
-                                &__res.bi_enetaddr[i],
-                                6);
+                if (i == 0)
+                        memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
+                               __res.bi_enetaddr, 6);
+#if defined(CONFIG_405EP) || defined(CONFIG_44x)
+                else if (i == 1)
+                        memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
+                               __res.bi_enet1addr, 6);
+#endif
+#if defined(CONFIG_440GX)
+                else if (i == 2)
+                        memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
+                               __res.bi_enet2addr, 6);
+                else if (i == 3)
+                        memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
+                               __res.bi_enet3addr, 6);
+#endif
         }
 }
 #endif
diff --git a/include/asm-ppc/ide.h b/include/asm-ppc/ide.h
deleted file mode 100644
index 7d6e6599fac4..000000000000
--- a/include/asm-ppc/ide.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- *  linux/include/asm-ppc/ide.h
- *
- *  Copyright (C) 1994-1996 Linus Torvalds & authors */
-
-/*
- *  This file contains the ppc architecture specific IDE code.
- */
-
-#ifndef __ASMPPC_IDE_H
-#define __ASMPPC_IDE_H
-
-#ifdef __KERNEL__
-
-#include <linux/sched.h>
-#include <asm/mpc8xx.h>
-
-#ifndef MAX_HWIFS
-#define MAX_HWIFS       8
-#endif
-
-#include <linux/config.h>
-#include <linux/hdreg.h>
-#include <linux/ioport.h>
-#include <asm/io.h>
-
-extern void __ide_mm_insw(void __iomem *port, void *addr, u32 count);
-extern void __ide_mm_outsw(void __iomem *port, void *addr, u32 count);
-extern void __ide_mm_insl(void __iomem *port, void *addr, u32 count);
-extern void __ide_mm_outsl(void __iomem *port, void *addr, u32 count);
-
-struct ide_machdep_calls {
-        int         (*default_irq)(unsigned long base);
-        unsigned long (*default_io_base)(int index);
-        void        (*ide_init_hwif)(hw_regs_t *hw,
-                                     unsigned long data_port,
-                                     unsigned long ctrl_port,
-                                     int *irq);
-};
-
-extern struct ide_machdep_calls ppc_ide_md;
-
-#undef  SUPPORT_SLOW_DATA_PORTS
-#define SUPPORT_SLOW_DATA_PORTS 0
-
-#define IDE_ARCH_OBSOLETE_DEFAULTS
-
-static __inline__ int ide_default_irq(unsigned long base)
-{
-        if (ppc_ide_md.default_irq)
-                return ppc_ide_md.default_irq(base);
-        return 0;
-}
-
-static __inline__ unsigned long ide_default_io_base(int index)
-{
-        if (ppc_ide_md.default_io_base)
-                return ppc_ide_md.default_io_base(index);
-        return 0;
-}
-
-#define IDE_ARCH_OBSOLETE_INIT
-#define ide_default_io_ctl(base)        ((base) + 0x206) /* obsolete */
-
-#ifdef CONFIG_PCI
-#define ide_init_default_irq(base)      (0)
-#else
-#define ide_init_default_irq(base)      ide_default_irq(base)
-#endif
-
-#if (defined CONFIG_APUS || defined CONFIG_BLK_DEV_MPC8xx_IDE )
-#define IDE_ARCH_ACK_INTR  1
-#define ide_ack_intr(hwif) (hwif->hw.ack_intr ? hwif->hw.ack_intr(hwif) : 1)
-#endif
-
-#endif /* __KERNEL__ */
-
-#endif /* __ASMPPC_IDE_H */
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 50fb5e47094a..9383d0c13ff8 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -3,7 +3,7 @@
  *
  * MPC85xx Internal Memory Map
  *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  *
  * Copyright 2004 Freescale Semiconductor, Inc
  *
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 7eb7cf6360bd..84ac6e258eef 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -8,6 +8,7 @@
 
 #include <asm/page.h>
 #include <asm/byteorder.h>
+#include <asm/synch.h>
 #include <asm/mmu.h>
 
 #define SIO_CONFIG_RA   0x398
@@ -56,7 +57,7 @@ extern unsigned long pci_dram_offset;
  * is actually performed (i.e. the data has come back) before we start
  * executing any following instructions.
  */
-extern inline int in_8(volatile unsigned char __iomem *addr)
+extern inline int in_8(const volatile unsigned char __iomem *addr)
 {
         int ret;
 
@@ -72,7 +73,7 @@ extern inline void out_8(volatile unsigned char __iomem *addr, int val)
         __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
 }
 
-extern inline int in_le16(volatile unsigned short __iomem *addr)
+extern inline int in_le16(const volatile unsigned short __iomem *addr)
 {
         int ret;
 
@@ -83,7 +84,7 @@ extern inline int in_le16(volatile unsigned short __iomem *addr)
         return ret;
 }
 
-extern inline int in_be16(volatile unsigned short __iomem *addr)
+extern inline int in_be16(const volatile unsigned short __iomem *addr)
 {
         int ret;
 
@@ -104,7 +105,7 @@ extern inline void out_be16(volatile unsigned short __iomem *addr, int val)
         __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
 }
 
-extern inline unsigned in_le32(volatile unsigned __iomem *addr)
+extern inline unsigned in_le32(const volatile unsigned __iomem *addr)
 {
         unsigned ret;
 
@@ -115,7 +116,7 @@ extern inline unsigned in_le32(volatile unsigned __iomem *addr)
         return ret;
 }
 
-extern inline unsigned in_be32(volatile unsigned __iomem *addr)
+extern inline unsigned in_be32(const volatile unsigned __iomem *addr)
 {
         unsigned ret;
 
@@ -139,7 +140,7 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val)
 #define readb(addr) in_8((volatile u8 *)(addr))
 #define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
 #else
-static inline __u8 readb(volatile void __iomem *addr)
+static inline __u8 readb(const volatile void __iomem *addr)
 {
         return in_8(addr);
 }
@@ -150,11 +151,11 @@ static inline void writeb(__u8 b, volatile void __iomem *addr)
 #endif
 
 #if defined(CONFIG_APUS)
-static inline __u16 readw(volatile void __iomem *addr)
+static inline __u16 readw(const volatile void __iomem *addr)
 {
         return *(__force volatile __u16 *)(addr);
 }
-static inline __u32 readl(volatile void __iomem *addr)
+static inline __u32 readl(const volatile void __iomem *addr)
 {
         return *(__force volatile __u32 *)(addr);
 }
@@ -173,11 +174,11 @@ static inline void writel(__u32 b, volatile void __iomem *addr)
 #define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
 #define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
 #else
-static inline __u16 readw(volatile void __iomem *addr)
+static inline __u16 readw(const volatile void __iomem *addr)
 {
         return in_le16(addr);
 }
-static inline __u32 readl(volatile void __iomem *addr)
+static inline __u32 readl(const volatile void __iomem *addr)
 {
         return in_le32(addr);
 }
@@ -236,9 +237,9 @@ static inline void __raw_writel(__u32 b, volatile void __iomem *addr)
 #define outsl(port, buf, nl)    _outsl_ns((port)+___IO_BASE, (buf), (nl))
 
 /*
- * On powermacs, we will get a machine check exception if we
- * try to read data from a non-existent I/O port.  Because the
- * machine check is an asynchronous exception, it isn't
+ * On powermacs and 8xx we will get a machine check exception 
+ * if we try to read data from a non-existent I/O port. Because
+ * the machine check is an asynchronous exception, it isn't
  * well-defined which instruction SRR0 will point to when the
  * exception occurs.
  * With the sequence below (twi; isync; nop), we have found that
@@ -257,7 +258,7 @@ extern __inline__ unsigned int name(unsigned int port)	\
 {                                                       \
         unsigned int x;                                 \
         __asm__ __volatile__(                           \
-                        op "    %0,0,%1\n"              \
+                "0:"    op "    %0,0,%1\n"              \
                 "1:     twi     0,%0,0\n"               \
                 "2:     isync\n"                        \
                 "3:     nop\n"                          \
@@ -268,6 +269,7 @@ extern __inline__ unsigned int name(unsigned int port)	\
                 ".previous\n"                           \
                 ".section __ex_table,\"a\"\n"           \
                 "       .align  2\n"                    \
+                "       .long   0b,5b\n"                \
                 "       .long   1b,5b\n"                \
                 "       .long   2b,5b\n"                \
                 "       .long   3b,5b\n"                \
@@ -281,11 +283,12 @@ extern __inline__ unsigned int name(unsigned int port)	\
 extern __inline__ void name(unsigned int val, unsigned int port) \
 {                                                       \
         __asm__ __volatile__(                           \
-                op " %0,0,%1\n"                         \
+                "0:" op " %0,0,%1\n"                    \
                 "1:     sync\n"                         \
                 "2:\n"                                  \
                 ".section __ex_table,\"a\"\n"           \
                 "       .align  2\n"                    \
+                "       .long   0b,2b\n"                \
                 "       .long   1b,2b\n"                \
                 ".previous"                             \
                 : : "r" (val), "r" (port + ___IO_BASE));        \
@@ -440,16 +443,6 @@ extern inline void * phys_to_virt(unsigned long address)
 #define page_to_phys(page)      (page_to_pfn(page) << PAGE_SHIFT)
 #define page_to_bus(page)       (page_to_phys(page) + PCI_DRAM_OFFSET)
 
-/*
- * Enforce In-order Execution of I/O:
- * Acts as a barrier to ensure all previous I/O accesses have
- * completed before any further ones are issued.
- */
-extern inline void eieio(void)
-{
-        __asm__ __volatile__ ("eieio" : : : "memory");
-}
-
 /* Enforce in-order execution of data I/O.
  * No distinction between read/write on PPC; use eieio for all three.
  */
@@ -552,6 +545,23 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
 #include <asm/mpc8260_pci9.h>
 #endif
 
+#ifdef CONFIG_NOT_COHERENT_CACHE
+
+#define dma_cache_inv(_start,_size) \
+        invalidate_dcache_range(_start, (_start + _size))
+#define dma_cache_wback(_start,_size) \
+        clean_dcache_range(_start, (_start + _size))
+#define dma_cache_wback_inv(_start,_size) \
+        flush_dcache_range(_start, (_start + _size))
+
+#else
+
+#define dma_cache_inv(_start,_size)             do { } while (0)
+#define dma_cache_wback(_start,_size)           do { } while (0)
+#define dma_cache_wback_inv(_start,_size)       do { } while (0)
+
+#endif
+
 /*
  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  * access
diff --git a/include/asm-ppc/ipcbuf.h b/include/asm-ppc/ipcbuf.h
deleted file mode 100644
index fab6752c7480..000000000000
--- a/include/asm-ppc/ipcbuf.h
+++ /dev/null
@@ -1,29 +0,0 @@
-#ifndef __PPC_IPCBUF_H__
-#define __PPC_IPCBUF_H__
-
-/*
- * The ipc64_perm structure for PPC architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 1 32-bit value to fill up for 8-byte alignment
- * - 2 miscellaneous 64-bit values (so that this structure matches
- *                                  PPC64 ipc64_perm)
- */
-
-struct ipc64_perm
-{
-        __kernel_key_t          key;
-        __kernel_uid_t          uid;
-        __kernel_gid_t          gid;
-        __kernel_uid_t          cuid;
-        __kernel_gid_t          cgid;
-        __kernel_mode_t         mode;
-        unsigned long           seq;
-        unsigned int            __pad2;
-        unsigned long long      __unused1;
-        unsigned long long      __unused2;
-};
-
-#endif /* __PPC_IPCBUF_H__ */
diff --git a/include/asm-ppc/ipic.h b/include/asm-ppc/ipic.h
index 9092b920997a..0fe396a2b666 100644
--- a/include/asm-ppc/ipic.h
+++ b/include/asm-ppc/ipic.h
@@ -3,7 +3,7 @@
  *
  * IPIC external definitions and structure.
  *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  *
  * Copyright 2005 Freescale Semiconductor, Inc
  *
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h
deleted file mode 100644
index bd9674807f05..000000000000
--- a/include/asm-ppc/irq.h
+++ /dev/null
@@ -1,418 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _ASM_IRQ_H
-#define _ASM_IRQ_H
-
-#include <linux/config.h>
-#include <asm/machdep.h>                /* ppc_md */
-#include <asm/atomic.h>
-
-/*
- * These constants are used for passing information about interrupt
- * signal polarity and level/edge sensing to the low-level PIC chip
- * drivers.
- */
-#define IRQ_SENSE_MASK          0x1
-#define IRQ_SENSE_LEVEL         0x1     /* interrupt on active level */
-#define IRQ_SENSE_EDGE          0x0     /* interrupt triggered by edge */
-
-#define IRQ_POLARITY_MASK       0x2
-#define IRQ_POLARITY_POSITIVE   0x2     /* high level or low->high edge */
-#define IRQ_POLARITY_NEGATIVE   0x0     /* low level or high->low edge */
-
-/*
- * IRQ line status macro IRQ_PER_CPU is used
- */
-#define ARCH_HAS_IRQ_PER_CPU
-
-#if defined(CONFIG_40x)
-#include <asm/ibm4xx.h>
-
-#ifndef NR_BOARD_IRQS
-#define NR_BOARD_IRQS 0
-#endif
-
-#ifndef UIC_WIDTH /* Number of interrupts per device */
-#define UIC_WIDTH 32
-#endif
-
-#ifndef NR_UICS /* number  of UIC devices */
-#define NR_UICS 1
-#endif
-
-#if defined (CONFIG_403)
-/*
- * The PowerPC 403 cores' Asynchronous Interrupt Controller (AIC) has
- * 32 possible interrupts, a majority of which are not implemented on
- * all cores. There are six configurable, external interrupt pins and
- * there are eight internal interrupts for the on-chip serial port
- * (SPU), DMA controller, and JTAG controller.
- *
- */
-
-#define NR_AIC_IRQS 32
-#define NR_IRQS  (NR_AIC_IRQS + NR_BOARD_IRQS)
-
-#elif !defined (CONFIG_403)
-
-/*
- *  The PowerPC 405 cores' Universal Interrupt Controller (UIC) has 32
- * possible interrupts as well. There are seven, configurable external
- * interrupt pins and there are 17 internal interrupts for the on-chip
- * serial port, DMA controller, on-chip Ethernet controller, PCI, etc.
- *
- */
-
-
-#define NR_UIC_IRQS UIC_WIDTH
-#define NR_IRQS         ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS)
-#endif
-static __inline__ int
-irq_canonicalize(int irq)
-{
-        return (irq);
-}
-
-#elif defined(CONFIG_44x)
-#include <asm/ibm44x.h>
-
-#define NR_UIC_IRQS     32
-#define NR_IRQS         ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS)
-
-static __inline__ int
-irq_canonicalize(int irq)
-{
-        return (irq);
-}
-
-#elif defined(CONFIG_8xx)
-
-/* Now include the board configuration specific associations.
-*/
-#include <asm/mpc8xx.h>
-
-/* The MPC8xx cores have 16 possible interrupts.  There are eight
- * possible level sensitive interrupts assigned and generated internally
- * from such devices as CPM, PCMCIA, RTC, PIT, TimeBase and Decrementer.
- * There are eight external interrupts (IRQs) that can be configured
- * as either level or edge sensitive.
- *
- * On some implementations, there is also the possibility of an 8259
- * through the PCI and PCI-ISA bridges.
- *
- * We are "flattening" the interrupt vectors of the cascaded CPM
- * and 8259 interrupt controllers so that we can uniquely identify
- * any interrupt source with a single integer.
- */
-#define NR_SIU_INTS     16
-#define NR_CPM_INTS     32
-#ifndef NR_8259_INTS
-#define NR_8259_INTS 0
-#endif
-
-#define SIU_IRQ_OFFSET          0
-#define CPM_IRQ_OFFSET          (SIU_IRQ_OFFSET + NR_SIU_INTS)
-#define I8259_IRQ_OFFSET        (CPM_IRQ_OFFSET + NR_CPM_INTS)
-
-#define NR_IRQS (NR_SIU_INTS + NR_CPM_INTS + NR_8259_INTS)
-
-/* These values must be zero-based and map 1:1 with the SIU configuration.
- * They are used throughout the 8xx I/O subsystem to generate
- * interrupt masks, flags, and other control patterns.  This is why the
- * current kernel assumption of the 8259 as the base controller is such
- * a pain in the butt.
- */
-#define SIU_IRQ0        (0)     /* Highest priority */
-#define SIU_LEVEL0      (1)
-#define SIU_IRQ1        (2)
-#define SIU_LEVEL1      (3)
-#define SIU_IRQ2        (4)
-#define SIU_LEVEL2      (5)
-#define SIU_IRQ3        (6)
-#define SIU_LEVEL3      (7)
-#define SIU_IRQ4        (8)
-#define SIU_LEVEL4      (9)
-#define SIU_IRQ5        (10)
-#define SIU_LEVEL5      (11)
-#define SIU_IRQ6        (12)
-#define SIU_LEVEL6      (13)
-#define SIU_IRQ7        (14)
-#define SIU_LEVEL7      (15)
-
-#define MPC8xx_INT_FEC1         SIU_LEVEL1
-#define MPC8xx_INT_FEC2         SIU_LEVEL3
-
-#define MPC8xx_INT_SCC1         (CPM_IRQ_OFFSET + CPMVEC_SCC1)
-#define MPC8xx_INT_SCC2         (CPM_IRQ_OFFSET + CPMVEC_SCC2)
-#define MPC8xx_INT_SCC3         (CPM_IRQ_OFFSET + CPMVEC_SCC3)
-#define MPC8xx_INT_SCC4         (CPM_IRQ_OFFSET + CPMVEC_SCC4)
-#define MPC8xx_INT_SMC1         (CPM_IRQ_OFFSET + CPMVEC_SMC1)
-#define MPC8xx_INT_SMC2         (CPM_IRQ_OFFSET + CPMVEC_SMC2)
-
-/* The internal interrupts we can configure as we see fit.
- * My personal preference is CPM at level 2, which puts it above the
- * MBX PCI/ISA/IDE interrupts.
- */
-#ifndef PIT_INTERRUPT
-#define PIT_INTERRUPT           SIU_LEVEL0
-#endif
-#ifndef CPM_INTERRUPT
-#define CPM_INTERRUPT           SIU_LEVEL2
-#endif
-#ifndef PCMCIA_INTERRUPT
-#define PCMCIA_INTERRUPT        SIU_LEVEL6
-#endif
-#ifndef DEC_INTERRUPT
-#define DEC_INTERRUPT           SIU_LEVEL7
-#endif
-
-/* Some internal interrupt registers use an 8-bit mask for the interrupt
- * level instead of a number.
- */
-#define mk_int_int_mask(IL) (1 << (7 - (IL/2)))
-
-/* always the same on 8xx -- Cort */
-static __inline__ int irq_canonicalize(int irq)
-{
-        return irq;
-}
-
-#elif defined(CONFIG_83xx)
-#include <asm/mpc83xx.h>
-
-static __inline__ int irq_canonicalize(int irq)
-{
-        return irq;
-}
-
-#define NR_IRQS (NR_IPIC_INTS)
-
-#elif defined(CONFIG_85xx)
-/* Now include the board configuration specific associations.
-*/
-#include <asm/mpc85xx.h>
-
-/* The MPC8548 openpic has 48 internal interrupts and 12 external
- * interrupts.
- *
- * We are "flattening" the interrupt vectors of the cascaded CPM
- * so that we can uniquely identify any interrupt source with a
- * single integer.
- */
-#define NR_CPM_INTS     64
-#define NR_EPIC_INTS    60
-#ifndef NR_8259_INTS
-#define NR_8259_INTS    0
-#endif
-#define NUM_8259_INTERRUPTS NR_8259_INTS
-
-#ifndef CPM_IRQ_OFFSET
-#define CPM_IRQ_OFFSET  0
-#endif
-
-#define NR_IRQS (NR_EPIC_INTS + NR_CPM_INTS + NR_8259_INTS)
-
-/* Internal IRQs on MPC85xx OpenPIC */
-
-#ifndef MPC85xx_OPENPIC_IRQ_OFFSET
-#ifdef CONFIG_CPM2
-#define MPC85xx_OPENPIC_IRQ_OFFSET      (CPM_IRQ_OFFSET + NR_CPM_INTS)
-#else
-#define MPC85xx_OPENPIC_IRQ_OFFSET      0
-#endif
-#endif
-
-/* Not all of these exist on all MPC85xx implementations */
-#define MPC85xx_IRQ_L2CACHE     ( 0 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_ECM         ( 1 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_DDR         ( 2 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_LBIU        ( 3 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_DMA0        ( 4 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_DMA1        ( 5 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_DMA2        ( 6 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_DMA3        ( 7 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_PCI1        ( 8 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_PCI2        ( 9 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_RIO_ERROR   ( 9 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_RIO_BELL    (10 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_RIO_TX      (11 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_RIO_RX      (12 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC1_TX    (13 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC1_RX    (14 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC3_TX    (15 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC3_RX    (16 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC3_ERROR (17 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC1_ERROR (18 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC2_TX    (19 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC2_RX    (20 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC4_TX    (21 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC4_RX    (22 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC4_ERROR (23 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_TSEC2_ERROR (24 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_FEC         (25 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_DUART       (26 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_IIC1        (27 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_PERFMON     (28 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_SEC2        (29 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_CPM         (30 + MPC85xx_OPENPIC_IRQ_OFFSET)
-
-/* The 12 external interrupt lines */
-#define MPC85xx_IRQ_EXT0        (48 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT1        (49 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT2        (50 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT3        (51 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT4        (52 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT5        (53 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT6        (54 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT7        (55 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT8        (56 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT9        (57 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT10       (58 + MPC85xx_OPENPIC_IRQ_OFFSET)
-#define MPC85xx_IRQ_EXT11       (59 + MPC85xx_OPENPIC_IRQ_OFFSET)
-
-/* CPM related interrupts */
-#define SIU_INT_ERROR           ((uint)0x00+CPM_IRQ_OFFSET)
-#define SIU_INT_I2C             ((uint)0x01+CPM_IRQ_OFFSET)
-#define SIU_INT_SPI             ((uint)0x02+CPM_IRQ_OFFSET)
-#define SIU_INT_RISC            ((uint)0x03+CPM_IRQ_OFFSET)
-#define SIU_INT_SMC1            ((uint)0x04+CPM_IRQ_OFFSET)
-#define SIU_INT_SMC2            ((uint)0x05+CPM_IRQ_OFFSET)
-#define SIU_INT_USB             ((uint)0x0b+CPM_IRQ_OFFSET)
-#define SIU_INT_TIMER1          ((uint)0x0c+CPM_IRQ_OFFSET)
-#define SIU_INT_TIMER2          ((uint)0x0d+CPM_IRQ_OFFSET)
-#define SIU_INT_TIMER3          ((uint)0x0e+CPM_IRQ_OFFSET)
-#define SIU_INT_TIMER4          ((uint)0x0f+CPM_IRQ_OFFSET)
-#define SIU_INT_FCC1            ((uint)0x20+CPM_IRQ_OFFSET)
-#define SIU_INT_FCC2            ((uint)0x21+CPM_IRQ_OFFSET)
-#define SIU_INT_FCC3            ((uint)0x22+CPM_IRQ_OFFSET)
-#define SIU_INT_MCC1            ((uint)0x24+CPM_IRQ_OFFSET)
-#define SIU_INT_MCC2            ((uint)0x25+CPM_IRQ_OFFSET)
-#define SIU_INT_SCC1            ((uint)0x28+CPM_IRQ_OFFSET)
-#define SIU_INT_SCC2            ((uint)0x29+CPM_IRQ_OFFSET)
-#define SIU_INT_SCC3            ((uint)0x2a+CPM_IRQ_OFFSET)
-#define SIU_INT_SCC4            ((uint)0x2b+CPM_IRQ_OFFSET)
-#define SIU_INT_PC15            ((uint)0x30+CPM_IRQ_OFFSET)
-#define SIU_INT_PC14            ((uint)0x31+CPM_IRQ_OFFSET)
-#define SIU_INT_PC13            ((uint)0x32+CPM_IRQ_OFFSET)
-#define SIU_INT_PC12            ((uint)0x33+CPM_IRQ_OFFSET)
-#define SIU_INT_PC11            ((uint)0x34+CPM_IRQ_OFFSET)
-#define SIU_INT_PC10            ((uint)0x35+CPM_IRQ_OFFSET)
-#define SIU_INT_PC9             ((uint)0x36+CPM_IRQ_OFFSET)
-#define SIU_INT_PC8             ((uint)0x37+CPM_IRQ_OFFSET)
-#define SIU_INT_PC7             ((uint)0x38+CPM_IRQ_OFFSET)
-#define SIU_INT_PC6             ((uint)0x39+CPM_IRQ_OFFSET)
-#define SIU_INT_PC5             ((uint)0x3a+CPM_IRQ_OFFSET)
-#define SIU_INT_PC4             ((uint)0x3b+CPM_IRQ_OFFSET)
-#define SIU_INT_PC3             ((uint)0x3c+CPM_IRQ_OFFSET)
-#define SIU_INT_PC2             ((uint)0x3d+CPM_IRQ_OFFSET)
-#define SIU_INT_PC1             ((uint)0x3e+CPM_IRQ_OFFSET)
-#define SIU_INT_PC0             ((uint)0x3f+CPM_IRQ_OFFSET)
-
-static __inline__ int irq_canonicalize(int irq)
-{
-        return irq;
-}
-
-#else /* CONFIG_40x + CONFIG_8xx */
-/*
- * this is the # irq's for all ppc arch's (pmac/chrp/prep)
- * so it is the max of them all
- */
-#define NR_IRQS                 256
-
-#ifndef CONFIG_8260
-
-#define NUM_8259_INTERRUPTS     16
-
-#else /* CONFIG_8260 */
-
-/* The 8260 has an internal interrupt controller with a maximum of
- * 64 IRQs.  We will use NR_IRQs from above since it is large enough.
- * Don't be confused by the 8260 documentation where they list an
- * "interrupt number" and "interrupt vector".  We are only interested
- * in the interrupt vector.  There are "reserved" holes where the
- * vector number increases, but the interrupt number in the table does not.
- * (Document errata updates have fixed this...make sure you have up to
- * date processor documentation -- Dan).
- */
-
-#ifndef CPM_IRQ_OFFSET
-#define CPM_IRQ_OFFSET  0
-#endif
-
-#define NR_CPM_INTS     64
-
-#define SIU_INT_ERROR           ((uint)0x00 + CPM_IRQ_OFFSET)
-#define SIU_INT_I2C             ((uint)0x01 + CPM_IRQ_OFFSET)
-#define SIU_INT_SPI             ((uint)0x02 + CPM_IRQ_OFFSET)
-#define SIU_INT_RISC            ((uint)0x03 + CPM_IRQ_OFFSET)
-#define SIU_INT_SMC1            ((uint)0x04 + CPM_IRQ_OFFSET)
-#define SIU_INT_SMC2            ((uint)0x05 + CPM_IRQ_OFFSET)
-#define SIU_INT_IDMA1           ((uint)0x06 + CPM_IRQ_OFFSET)
-#define SIU_INT_IDMA2           ((uint)0x07 + CPM_IRQ_OFFSET)
-#define SIU_INT_IDMA3           ((uint)0x08 + CPM_IRQ_OFFSET)
-#define SIU_INT_IDMA4           ((uint)0x09 + CPM_IRQ_OFFSET)
-#define SIU_INT_SDMA            ((uint)0x0a + CPM_IRQ_OFFSET)
-#define SIU_INT_USB             ((uint)0x0b + CPM_IRQ_OFFSET)
-#define SIU_INT_TIMER1          ((uint)0x0c + CPM_IRQ_OFFSET)
-#define SIU_INT_TIMER2          ((uint)0x0d + CPM_IRQ_OFFSET)
-#define SIU_INT_TIMER3          ((uint)0x0e + CPM_IRQ_OFFSET)
-#define SIU_INT_TIMER4          ((uint)0x0f + CPM_IRQ_OFFSET)
-#define SIU_INT_TMCNT           ((uint)0x10 + CPM_IRQ_OFFSET)
-#define SIU_INT_PIT             ((uint)0x11 + CPM_IRQ_OFFSET)
-#define SIU_INT_IRQ1            ((uint)0x13 + CPM_IRQ_OFFSET)
-#define SIU_INT_IRQ2            ((uint)0x14 + CPM_IRQ_OFFSET)
-#define SIU_INT_IRQ3            ((uint)0x15 + CPM_IRQ_OFFSET)
-#define SIU_INT_IRQ4            ((uint)0x16 + CPM_IRQ_OFFSET)
-#define SIU_INT_IRQ5            ((uint)0x17 + CPM_IRQ_OFFSET)
-#define SIU_INT_IRQ6            ((uint)0x18 + CPM_IRQ_OFFSET)
-#define SIU_INT_IRQ7            ((uint)0x19 + CPM_IRQ_OFFSET)
-#define SIU_INT_FCC1            ((uint)0x20 + CPM_IRQ_OFFSET)
-#define SIU_INT_FCC2            ((uint)0x21 + CPM_IRQ_OFFSET)
-#define SIU_INT_FCC3            ((uint)0x22 + CPM_IRQ_OFFSET)
-#define SIU_INT_MCC1            ((uint)0x24 + CPM_IRQ_OFFSET)
-#define SIU_INT_MCC2            ((uint)0x25 + CPM_IRQ_OFFSET)
-#define SIU_INT_SCC1            ((uint)0x28 + CPM_IRQ_OFFSET)
-#define SIU_INT_SCC2            ((uint)0x29 + CPM_IRQ_OFFSET)
-#define SIU_INT_SCC3            ((uint)0x2a + CPM_IRQ_OFFSET)
-#define SIU_INT_SCC4            ((uint)0x2b + CPM_IRQ_OFFSET)
-#define SIU_INT_PC15            ((uint)0x30 + CPM_IRQ_OFFSET)
-#define SIU_INT_PC14            ((uint)0x31 + CPM_IRQ_OFFSET)
-#define SIU_INT_PC13            ((uint)0x32 + CPM_IRQ_OFFSET)
-#define SIU_INT_PC12            ((uint)0x33 + CPM_IRQ_OFFSET)
-#define SIU_INT_PC11            ((uint)0x34 + CPM_IRQ_OFFSET)
-#define SIU_INT_PC10            ((uint)0x35 + CPM_IRQ_OFFSET)
-#define SIU_INT_PC9             ((uint)0x36 + CPM_IRQ_OFFSET)
-#define SIU_INT_PC8             ((uint)0x37 + CPM_IRQ_OFFSET)
-#define SIU_INT_PC7             ((uint)0x38 + CPM_IRQ_OFFSET)
-#define SIU_INT_PC6             ((uint)0x39 + CPM_IRQ_OFFSET)
-#define SIU_INT_PC5             ((uint)0x3a + CPM_IRQ_OFFSET)
-#define SIU_INT_PC4             ((uint)0x3b + CPM_IRQ_OFFSET)
-#define SIU_INT_PC3             ((uint)0x3c + CPM_IRQ_OFFSET)
-#define SIU_INT_PC2             ((uint)0x3d + CPM_IRQ_OFFSET)
-#define SIU_INT_PC1             ((uint)0x3e + CPM_IRQ_OFFSET)
-#define SIU_INT_PC0             ((uint)0x3f + CPM_IRQ_OFFSET)
-
-#endif /* CONFIG_8260 */
-
-/*
- * This gets called from serial.c, which is now used on
- * powermacs as well as prep/chrp boxes.
- * Prep and chrp both have cascaded 8259 PICs.
- */
-static __inline__ int irq_canonicalize(int irq)
-{
-        if (ppc_md.irq_canonicalize)
-                return ppc_md.irq_canonicalize(irq);
-        return irq;
-}
-
-#endif
-
-#define NR_MASK_WORDS   ((NR_IRQS + 31) / 32)
-/* pedantic: these are long because they are used with set_bit --RR */
-extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
-extern unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
-extern atomic_t ppc_n_lost_interrupts;
-
-#endif /* _ASM_IRQ_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/kexec.h b/include/asm-ppc/kexec.h
deleted file mode 100644
index 6d2aa0aa4642..000000000000
--- a/include/asm-ppc/kexec.h
+++ /dev/null
@@ -1,40 +0,0 @@
-#ifndef _PPC_KEXEC_H
-#define _PPC_KEXEC_H
-
-#ifdef CONFIG_KEXEC
-
-/*
- * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
- * I.e. Maximum page that is mapped directly into kernel memory,
- * and kmap is not required.
- *
- * Someone correct me if FIXADDR_START - PAGEOFFSET is not the correct
- * calculation for the amount of memory directly mappable into the
- * kernel memory space.
- */
-
-/* Maximum physical address we can use pages from */
-#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
-/* Maximum address we can reach in physical address mode */
-#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
-/* Maximum address we can use for the control code buffer */
-#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
-
-#define KEXEC_CONTROL_CODE_SIZE 4096
-
-/* The native architecture */
-#define KEXEC_ARCH KEXEC_ARCH_PPC
-
-#ifndef __ASSEMBLY__
-
-extern void *crash_notes;
-
-struct kimage;
-
-extern void machine_kexec_simple(struct kimage *image);
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* CONFIG_KEXEC */
-
-#endif /* _PPC_KEXEC_H */
diff --git a/include/asm-ppc/keylargo.h b/include/asm-ppc/keylargo.h
deleted file mode 100644
index a669a3f0f5a2..000000000000
--- a/include/asm-ppc/keylargo.h
+++ /dev/null
@@ -1,248 +0,0 @@
-/*
- * keylargo.h: definitions for using the "KeyLargo" I/O controller chip.
- *
- */
-
-/* "Pangea" chipset has keylargo device-id 0x25 while core99
- * has device-id 0x22. The rev. of the pangea one is 0, so we
- * fake an artificial rev. in keylargo_rev by oring 0x100
- */
-#define KL_PANGEA_REV           0x100
-
-/* offset from base for feature control registers */
-#define KEYLARGO_MBCR           0x34    /* KL Only, Media bay control/status */
-#define KEYLARGO_FCR0           0x38
-#define KEYLARGO_FCR1           0x3c
-#define KEYLARGO_FCR2           0x40
-#define KEYLARGO_FCR3           0x44
-#define KEYLARGO_FCR4           0x48
-#define KEYLARGO_FCR5           0x4c    /* Pangea only */
-
-/* K2 aditional FCRs */
-#define K2_FCR6                 0x34
-#define K2_FCR7                 0x30
-#define K2_FCR8                 0x2c
-#define K2_FCR9                 0x28
-#define K2_FCR10                0x24
-
-/* GPIO registers */
-#define KEYLARGO_GPIO_LEVELS0           0x50
-#define KEYLARGO_GPIO_LEVELS1           0x54
-#define KEYLARGO_GPIO_EXTINT_0          0x58
-#define KEYLARGO_GPIO_EXTINT_CNT        18
-#define KEYLARGO_GPIO_0                 0x6A
-#define KEYLARGO_GPIO_CNT               17
-#define KEYLARGO_GPIO_EXTINT_DUAL_EDGE  0x80
-#define KEYLARGO_GPIO_OUTPUT_ENABLE     0x04
-#define KEYLARGO_GPIO_OUTOUT_DATA       0x01
-#define KEYLARGO_GPIO_INPUT_DATA        0x02
-
-/* K2 does only extint GPIOs and does 51 of them */
-#define K2_GPIO_EXTINT_0                0x58
-#define K2_GPIO_EXTINT_CNT              51
-
-/* Specific GPIO regs */
-
-#define KL_GPIO_MODEM_RESET             (KEYLARGO_GPIO_0+0x03)
-#define KL_GPIO_MODEM_POWER             (KEYLARGO_GPIO_0+0x02) /* Pangea */
-
-#define KL_GPIO_SOUND_POWER             (KEYLARGO_GPIO_0+0x05)
-
-/* Hrm... this one is only to be used on Pismo. It seeem to also
- * control the timebase enable on other machines. Still to be
- * experimented... --BenH.
- */
-#define KL_GPIO_FW_CABLE_POWER          (KEYLARGO_GPIO_0+0x09)
-#define KL_GPIO_TB_ENABLE               (KEYLARGO_GPIO_0+0x09)
-
-#define KL_GPIO_ETH_PHY_RESET           (KEYLARGO_GPIO_0+0x10)
-
-#define KL_GPIO_EXTINT_CPU1             (KEYLARGO_GPIO_0+0x0a)
-#define KL_GPIO_EXTINT_CPU1_ASSERT      0x04
-#define KL_GPIO_EXTINT_CPU1_RELEASE     0x38
-
-#define KL_GPIO_RESET_CPU0              (KEYLARGO_GPIO_EXTINT_0+0x03)
-#define KL_GPIO_RESET_CPU1              (KEYLARGO_GPIO_EXTINT_0+0x04)
-#define KL_GPIO_RESET_CPU2              (KEYLARGO_GPIO_EXTINT_0+0x0f)
-#define KL_GPIO_RESET_CPU3              (KEYLARGO_GPIO_EXTINT_0+0x10)
-
-#define KL_GPIO_PMU_MESSAGE_IRQ         (KEYLARGO_GPIO_EXTINT_0+0x09)
-#define KL_GPIO_PMU_MESSAGE_BIT         KEYLARGO_GPIO_INPUT_DATA
-
-#define KL_GPIO_MEDIABAY_IRQ            (KEYLARGO_GPIO_EXTINT_0+0x0e)
-
-#define KL_GPIO_AIRPORT_0               (KEYLARGO_GPIO_EXTINT_0+0x0a)
-#define KL_GPIO_AIRPORT_1               (KEYLARGO_GPIO_EXTINT_0+0x0d)
-#define KL_GPIO_AIRPORT_2               (KEYLARGO_GPIO_0+0x0d)
-#define KL_GPIO_AIRPORT_3               (KEYLARGO_GPIO_0+0x0e)
-#define KL_GPIO_AIRPORT_4               (KEYLARGO_GPIO_0+0x0f)
-
-/*
- * Bits in feature control register. Those bits different for K2 are
- * listed separately
- */
-#define KL_MBCR_MB0_PCI_ENABLE          0x00000800      /* exist ? */
-#define KL_MBCR_MB0_IDE_ENABLE          0x00001000
-#define KL_MBCR_MB0_FLOPPY_ENABLE       0x00002000      /* exist ? */
-#define KL_MBCR_MB0_SOUND_ENABLE        0x00004000      /* hrm... */
-#define KL_MBCR_MB0_DEV_MASK            0x00007800
-#define KL_MBCR_MB0_DEV_POWER           0x00000400
-#define KL_MBCR_MB0_DEV_RESET           0x00000200
-#define KL_MBCR_MB0_ENABLE              0x00000100
-#define KL_MBCR_MB1_PCI_ENABLE          0x08000000      /* exist ? */
-#define KL_MBCR_MB1_IDE_ENABLE          0x10000000
-#define KL_MBCR_MB1_FLOPPY_ENABLE       0x20000000      /* exist ? */
-#define KL_MBCR_MB1_SOUND_ENABLE        0x40000000      /* hrm... */
-#define KL_MBCR_MB1_DEV_MASK            0x78000000
-#define KL_MBCR_MB1_DEV_POWER           0x04000000
-#define KL_MBCR_MB1_DEV_RESET           0x02000000
-#define KL_MBCR_MB1_ENABLE              0x01000000
-
-#define KL0_SCC_B_INTF_ENABLE           0x00000001      /* (KL Only) */
-#define KL0_SCC_A_INTF_ENABLE           0x00000002
-#define KL0_SCC_SLOWPCLK                0x00000004
-#define KL0_SCC_RESET                   0x00000008
-#define KL0_SCCA_ENABLE                 0x00000010
-#define KL0_SCCB_ENABLE                 0x00000020
-#define KL0_SCC_CELL_ENABLE             0x00000040
-#define KL0_IRDA_HIGH_BAND              0x00000100      /* (KL Only) */
-#define KL0_IRDA_SOURCE2_SEL            0x00000200      /* (KL Only) */
-#define KL0_IRDA_SOURCE1_SEL            0x00000400      /* (KL Only) */
-#define KL0_PG_USB0_PMI_ENABLE          0x00000400      /* (Pangea/Intrepid Only) */
-#define KL0_IRDA_RESET                  0x00000800      /* (KL Only) */
-#define KL0_PG_USB0_REF_SUSPEND_SEL     0x00000800      /* (Pangea/Intrepid Only) */
-#define KL0_IRDA_DEFAULT1               0x00001000      /* (KL Only) */
-#define KL0_PG_USB0_REF_SUSPEND         0x00001000      /* (Pangea/Intrepid Only) */
-#define KL0_IRDA_DEFAULT0               0x00002000      /* (KL Only) */
-#define KL0_PG_USB0_PAD_SUSPEND         0x00002000      /* (Pangea/Intrepid Only) */
-#define KL0_IRDA_FAST_CONNECT           0x00004000      /* (KL Only) */
-#define KL0_PG_USB1_PMI_ENABLE          0x00004000      /* (Pangea/Intrepid Only) */
-#define KL0_IRDA_ENABLE                 0x00008000      /* (KL Only) */
-#define KL0_PG_USB1_REF_SUSPEND_SEL     0x00008000      /* (Pangea/Intrepid Only) */
-#define KL0_IRDA_CLK32_ENABLE           0x00010000      /* (KL Only) */
-#define KL0_PG_USB1_REF_SUSPEND         0x00010000      /* (Pangea/Intrepid Only) */
-#define KL0_IRDA_CLK19_ENABLE           0x00020000      /* (KL Only) */
-#define KL0_PG_USB1_PAD_SUSPEND         0x00020000      /* (Pangea/Intrepid Only) */
-#define KL0_USB0_PAD_SUSPEND0           0x00040000
-#define KL0_USB0_PAD_SUSPEND1           0x00080000
-#define KL0_USB0_CELL_ENABLE            0x00100000
-#define KL0_USB1_PAD_SUSPEND0           0x00400000
-#define KL0_USB1_PAD_SUSPEND1           0x00800000
-#define KL0_USB1_CELL_ENABLE            0x01000000
-#define KL0_USB_REF_SUSPEND             0x10000000      /* (KL Only) */
-
-#define KL0_SERIAL_ENABLE               (KL0_SCC_B_INTF_ENABLE | \
-                                        KL0_SCC_SLOWPCLK | \
-                                        KL0_SCC_CELL_ENABLE | KL0_SCCA_ENABLE)
-
-#define KL1_USB2_PMI_ENABLE             0x00000001      /* Intrepid only */
-#define KL1_AUDIO_SEL_22MCLK            0x00000002      /* KL/Pangea only */
-#define KL1_USB2_REF_SUSPEND_SEL        0x00000002      /* Intrepid only */
-#define KL1_USB2_REF_SUSPEND            0x00000004      /* Intrepid only */
-#define KL1_AUDIO_CLK_ENABLE_BIT        0x00000008      /* KL/Pangea only */
-#define KL1_USB2_PAD_SUSPEND_SEL        0x00000008      /* Intrepid only */
-#define KL1_USB2_PAD_SUSPEND0           0x00000010      /* Intrepid only */
-#define KL1_AUDIO_CLK_OUT_ENABLE        0x00000020      /* KL/Pangea only */
-#define KL1_USB2_PAD_SUSPEND1           0x00000020      /* Intrepid only */
-#define KL1_AUDIO_CELL_ENABLE           0x00000040      /* KL/Pangea only */
-#define KL1_USB2_CELL_ENABLE            0x00000040      /* Intrepid only */
-#define KL1_AUDIO_CHOOSE                0x00000080      /* KL/Pangea only */
-#define KL1_I2S0_CHOOSE                 0x00000200      /* KL Only */
-#define KL1_I2S0_CELL_ENABLE            0x00000400
-#define KL1_I2S0_CLK_ENABLE_BIT         0x00001000
-#define KL1_I2S0_ENABLE                 0x00002000
-#define KL1_I2S1_CELL_ENABLE            0x00020000
-#define KL1_I2S1_CLK_ENABLE_BIT         0x00080000
-#define KL1_I2S1_ENABLE                 0x00100000
-#define KL1_EIDE0_ENABLE                0x00800000      /* KL/Intrepid Only */
-#define KL1_EIDE0_RESET_N               0x01000000      /* KL/Intrepid Only */
-#define KL1_EIDE1_ENABLE                0x04000000      /* KL Only */
-#define KL1_EIDE1_RESET_N               0x08000000      /* KL Only */
-#define KL1_UIDE_ENABLE                 0x20000000      /* KL/Pangea Only */
-#define KL1_UIDE_RESET_N                0x40000000      /* KL/Pangea Only */
-
-#define KL2_IOBUS_ENABLE                0x00000002
-#define KL2_SLEEP_STATE_BIT             0x00000100      /* KL Only */
-#define KL2_PG_STOP_ALL_CLOCKS          0x00000100      /* Pangea Only */
-#define KL2_MPIC_ENABLE                 0x00020000
-#define KL2_CARDSLOT_RESET              0x00040000      /* Pangea/Intrepid Only */
-#define KL2_ALT_DATA_OUT                0x02000000      /* KL Only ??? */
-#define KL2_MEM_IS_BIG                  0x04000000
-#define KL2_CARDSEL_16                  0x08000000
-
-#define KL3_SHUTDOWN_PLL_TOTAL          0x00000001      /* KL/Pangea only */
-#define KL3_SHUTDOWN_PLLKW6             0x00000002      /* KL/Pangea only */
-#define KL3_IT_SHUTDOWN_PLL3            0x00000002      /* Intrepid only */
-#define KL3_SHUTDOWN_PLLKW4             0x00000004      /* KL/Pangea only */
-#define KL3_IT_SHUTDOWN_PLL2            0x00000004      /* Intrepid only */
-#define KL3_SHUTDOWN_PLLKW35            0x00000008      /* KL/Pangea only */
-#define KL3_IT_SHUTDOWN_PLL1            0x00000008      /* Intrepid only */
-#define KL3_SHUTDOWN_PLLKW12            0x00000010      /* KL Only */
-#define KL3_IT_ENABLE_PLL3_SHUTDOWN     0x00000010      /* Intrepid only */
-#define KL3_PLL_RESET                   0x00000020      /* KL/Pangea only */
-#define KL3_IT_ENABLE_PLL2_SHUTDOWN     0x00000020      /* Intrepid only */
-#define KL3_IT_ENABLE_PLL1_SHUTDOWN     0x00000010      /* Intrepid only */
-#define KL3_SHUTDOWN_PLL2X              0x00000080      /* KL Only */
-#define KL3_CLK66_ENABLE                0x00000100      /* KL Only */
-#define KL3_CLK49_ENABLE                0x00000200
-#define KL3_CLK45_ENABLE                0x00000400
-#define KL3_CLK31_ENABLE                0x00000800      /* KL/Pangea only */
-#define KL3_TIMER_CLK18_ENABLE          0x00001000
-#define KL3_I2S1_CLK18_ENABLE           0x00002000
-#define KL3_I2S0_CLK18_ENABLE           0x00004000
-#define KL3_VIA_CLK16_ENABLE            0x00008000      /* KL/Pangea only */
-#define KL3_IT_VIA_CLK32_ENABLE         0x00008000      /* Intrepid only */
-#define KL3_STOPPING33_ENABLED          0x00080000      /* KL Only */
-#define KL3_PG_PLL_ENABLE_TEST          0x00080000      /* Pangea Only */
-
-/* Intrepid USB bus 2, port 0,1 */
-#define KL3_IT_PORT_WAKEUP_ENABLE(p)            (0x00080000 << ((p)<<3))
-#define KL3_IT_PORT_RESUME_WAKE_EN(p)           (0x00040000 << ((p)<<3))
-#define KL3_IT_PORT_CONNECT_WAKE_EN(p)          (0x00020000 << ((p)<<3))
-#define KL3_IT_PORT_DISCONNECT_WAKE_EN(p)       (0x00010000 << ((p)<<3))
-#define KL3_IT_PORT_RESUME_STAT(p)              (0x00300000 << ((p)<<3))
-#define KL3_IT_PORT_CONNECT_STAT(p)             (0x00200000 << ((p)<<3))
-#define KL3_IT_PORT_DISCONNECT_STAT(p)          (0x00100000 << ((p)<<3))
-
-/* Port 0,1 : bus 0, port 2,3 : bus 1 */
-#define KL4_PORT_WAKEUP_ENABLE(p)       (0x00000008 << ((p)<<3))
-#define KL4_PORT_RESUME_WAKE_EN(p)      (0x00000004 << ((p)<<3))
-#define KL4_PORT_CONNECT_WAKE_EN(p)     (0x00000002 << ((p)<<3))
-#define KL4_PORT_DISCONNECT_WAKE_EN(p)  (0x00000001 << ((p)<<3))
-#define KL4_PORT_RESUME_STAT(p)         (0x00000040 << ((p)<<3))
-#define KL4_PORT_CONNECT_STAT(p)        (0x00000020 << ((p)<<3))
-#define KL4_PORT_DISCONNECT_STAT(p)     (0x00000010 << ((p)<<3))
-
-/* Pangea and Intrepid only */
-#define KL5_VIA_USE_CLK31               0000000001      /* Pangea Only */
-#define KL5_SCC_USE_CLK31               0x00000002      /* Pangea Only */
-#define KL5_PWM_CLK32_EN                0x00000004
-#define KL5_CLK3_68_EN                  0x00000010
-#define KL5_CLK32_EN                    0x00000020
-
-
-/* K2 definitions */
-#define K2_FCR0_USB0_SWRESET            0x00200000
-#define K2_FCR0_USB1_SWRESET            0x02000000
-#define K2_FCR0_RING_PME_DISABLE        0x08000000
-
-#define K2_FCR1_PCI1_BUS_RESET_N        0x00000010
-#define K2_FCR1_PCI1_SLEEP_RESET_EN     0x00000020
-#define K2_FCR1_I2S0_CELL_ENABLE        0x00000400
-#define K2_FCR1_I2S0_RESET              0x00000800
-#define K2_FCR1_I2S0_CLK_ENABLE_BIT     0x00001000
-#define K2_FCR1_I2S0_ENABLE             0x00002000
-
-#define K2_FCR1_PCI1_CLK_ENABLE         0x00004000
-#define K2_FCR1_FW_CLK_ENABLE           0x00008000
-#define K2_FCR1_FW_RESET_N              0x00010000
-#define K2_FCR1_GMAC_CLK_ENABLE         0x00400000
-#define K2_FCR1_GMAC_POWER_DOWN         0x00800000
-#define K2_FCR1_GMAC_RESET_N            0x01000000
-#define K2_FCR1_SATA_CLK_ENABLE         0x02000000
-#define K2_FCR1_SATA_POWER_DOWN         0x04000000
-#define K2_FCR1_SATA_RESET_N            0x08000000
-#define K2_FCR1_UATA_CLK_ENABLE         0x10000000
-#define K2_FCR1_UATA_RESET_N            0x40000000
-#define K2_FCR1_UATA_CHOOSE_CLK66       0x80000000
-
diff --git a/include/asm-ppc/kgdb.h b/include/asm-ppc/kgdb.h
index 1d3c927ce626..b617dac82969 100644
--- a/include/asm-ppc/kgdb.h
+++ b/include/asm-ppc/kgdb.h
@@ -31,7 +31,7 @@ extern void breakpoint(void);
 /* For taking exceptions
  * these are defined in traps.c
  */
-extern void (*debugger)(struct pt_regs *regs);
+extern int (*debugger)(struct pt_regs *regs);
 extern int (*debugger_bpt)(struct pt_regs *regs);
 extern int (*debugger_sstep)(struct pt_regs *regs);
 extern int (*debugger_iabr_match)(struct pt_regs *regs);
diff --git a/include/asm-ppc/kmap_types.h b/include/asm-ppc/kmap_types.h
deleted file mode 100644
index 6d6fc78731e5..000000000000
--- a/include/asm-ppc/kmap_types.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _ASM_KMAP_TYPES_H
-#define _ASM_KMAP_TYPES_H
-
-enum km_type {
-        KM_BOUNCE_READ,
-        KM_SKB_SUNRPC_DATA,
-        KM_SKB_DATA_SOFTIRQ,
-        KM_USER0,
-        KM_USER1,
-        KM_BIO_SRC_IRQ,
-        KM_BIO_DST_IRQ,
-        KM_PTE0,
-        KM_PTE1,
-        KM_IRQ0,
-        KM_IRQ1,
-        KM_SOFTIRQ0,
-        KM_SOFTIRQ1,
-        KM_PPC_SYNC_PAGE,
-        KM_PPC_SYNC_ICACHE,
-        KM_TYPE_NR
-};
-
-#endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/machdep.h b/include/asm-ppc/machdep.h
index 1d4ab70a56f3..f01255bd1dc3 100644
--- a/include/asm-ppc/machdep.h
+++ b/include/asm-ppc/machdep.h
@@ -98,7 +98,7 @@ struct machdep_calls {
 
         /* Get access protection for /dev/mem */
         pgprot_t        (*phys_mem_access_prot)(struct file *file,
-                                                unsigned long offset,
+                                                unsigned long pfn,
                                                 unsigned long size,
                                                 pgprot_t vma_prot);
 
@@ -167,7 +167,7 @@ extern sys_ctrler_t sys_ctrler;
 
 #ifdef CONFIG_SMP
 struct smp_ops_t {
-        void  (*message_pass)(int target, int msg, unsigned long data, int wait);
+        void  (*message_pass)(int target, int msg);
         int   (*probe)(void);
         void  (*kick_cpu)(int nr);
         void  (*setup_cpu)(int nr);
diff --git a/include/asm-ppc/macio.h b/include/asm-ppc/macio.h
deleted file mode 100644
index a481b772d154..000000000000
--- a/include/asm-ppc/macio.h
+++ /dev/null
@@ -1,141 +0,0 @@
-#ifndef __MACIO_ASIC_H__
-#define __MACIO_ASIC_H__
-
-#include <linux/mod_devicetable.h>
-#include <asm/of_device.h>
-
-extern struct bus_type macio_bus_type;
-
-/* MacIO device driver is defined later */
-struct macio_driver;
-struct macio_chip;
-
-#define MACIO_DEV_COUNT_RESOURCES       8
-#define MACIO_DEV_COUNT_IRQS            8
-
-/*
- * the macio_bus structure is used to describe a "virtual" bus
- * within a MacIO ASIC. It's typically provided by a macio_pci_asic
- * PCI device, but could be provided differently as well (nubus
- * machines using a fake OF tree).
- *
- * The pdev field can be NULL on non-PCI machines
- */
-struct macio_bus
-{
-        struct macio_chip       *chip;          /* macio_chip (private use) */
-        int                     index;          /* macio chip index in system */
-#ifdef CONFIG_PCI
-        struct pci_dev          *pdev;          /* PCI device hosting this bus */
-#endif
-};
-
-/*
- * the macio_dev structure is used to describe a device
- * within an Apple MacIO ASIC.
- */
-struct macio_dev
-{
-        struct macio_bus        *bus;           /* macio bus this device is on */
-        struct macio_dev        *media_bay;     /* Device is part of a media bay */
-        struct of_device        ofdev;
-        int                     n_resources;
-        struct resource         resource[MACIO_DEV_COUNT_RESOURCES];
-        int                     n_interrupts;
-        struct resource         interrupt[MACIO_DEV_COUNT_IRQS];
-};
-#define to_macio_device(d) container_of(d, struct macio_dev, ofdev.dev)
-#define of_to_macio_device(d) container_of(d, struct macio_dev, ofdev)
-
-extern struct macio_dev *macio_dev_get(struct macio_dev *dev);
-extern void macio_dev_put(struct macio_dev *dev);
-
-/*
- * Accessors to resources & interrupts and other device
- * fields
- */
-
-static inline int macio_resource_count(struct macio_dev *dev)
-{
-        return dev->n_resources;
-}
-
-static inline unsigned long macio_resource_start(struct macio_dev *dev, int resource_no)
-{
-        return dev->resource[resource_no].start;
-}
-
-static inline unsigned long macio_resource_end(struct macio_dev *dev, int resource_no)
-{
-        return dev->resource[resource_no].end;
-}
-
-static inline unsigned long macio_resource_len(struct macio_dev *dev, int resource_no)
-{
-        struct resource *res = &dev->resource[resource_no];
-        if (res->start == 0 || res->end == 0 || res->end < res->start)
-                return 0;
-        return res->end - res->start + 1;
-}
-
-extern int macio_request_resource(struct macio_dev *dev, int resource_no, const char *name);
-extern void macio_release_resource(struct macio_dev *dev, int resource_no);
-extern int macio_request_resources(struct macio_dev *dev, const char *name);
-extern void macio_release_resources(struct macio_dev *dev);
-
-static inline int macio_irq_count(struct macio_dev *dev)
-{
-        return dev->n_interrupts;
-}
-
-static inline int macio_irq(struct macio_dev *dev, int irq_no)
-{
-        return dev->interrupt[irq_no].start;
-}
-
-static inline void macio_set_drvdata(struct macio_dev *dev, void *data)
-{
-        dev_set_drvdata(&dev->ofdev.dev, data);
-}
-
-static inline void* macio_get_drvdata(struct macio_dev *dev)
-{
-        return dev_get_drvdata(&dev->ofdev.dev);
-}
-
-static inline struct device_node *macio_get_of_node(struct macio_dev *mdev)
-{
-        return mdev->ofdev.node;
-}
-
-#ifdef CONFIG_PCI
-static inline struct pci_dev *macio_get_pci_dev(struct macio_dev *mdev)
-{
-        return mdev->bus->pdev;
-}
-#endif
-
-/*
- * A driver for a mac-io chip based device
- */
-struct macio_driver
-{
-        char                    *name;
-        struct of_device_id     *match_table;
-        struct module           *owner;
-
-        int     (*probe)(struct macio_dev* dev, const struct of_device_id *match);
-        int     (*remove)(struct macio_dev* dev);
-
-        int     (*suspend)(struct macio_dev* dev, pm_message_t state);
-        int     (*resume)(struct macio_dev* dev);
-        int     (*shutdown)(struct macio_dev* dev);
-
-        struct device_driver    driver;
-};
-#define to_macio_driver(drv) container_of(drv,struct macio_driver, driver)
-
-extern int macio_register_driver(struct macio_driver *);
-extern void macio_unregister_driver(struct macio_driver *);
-
-#endif /* __MACIO_ASIC_H__ */
diff --git a/include/asm-ppc/mediabay.h b/include/asm-ppc/mediabay.h
deleted file mode 100644
index 9daa3252d7b6..000000000000
--- a/include/asm-ppc/mediabay.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * mediabay.h: definitions for using the media bay
- * on PowerBook 3400 and similar computers.
- *
- * Copyright (C) 1997 Paul Mackerras.
- */
-#ifndef _PPC_MEDIABAY_H
-#define _PPC_MEDIABAY_H
-
-#ifdef __KERNEL__
-
-#define MB_FD           0       /* media bay contains floppy drive (automatic eject ?) */
-#define MB_FD1          1       /* media bay contains floppy drive (manual eject ?) */
-#define MB_SOUND        2       /* sound device ? */
-#define MB_CD           3       /* media bay contains ATA drive such as CD or ZIP */
-#define MB_PCI          5       /* media bay contains a PCI device */
-#define MB_POWER        6       /* media bay contains a Power device (???) */
-#define MB_NO           7       /* media bay contains nothing */
-
-int check_media_bay(struct device_node *which_bay, int what);
-int check_media_bay_by_base(unsigned long base, int what);
-
-/* Number of bays in the machine or 0 */
-extern int media_bay_count;
-
-/* called by pmac-ide.c to register IDE controller for media bay */
-extern int media_bay_set_ide_infos(struct device_node* which_bay,
-                        unsigned long base, int irq, int index);
-
-#endif /* __KERNEL__ */
-#endif /* _PPC_MEDIABAY_H */
diff --git a/include/asm-ppc/mmu_context.h b/include/asm-ppc/mmu_context.h
index afe26ffc2e2d..4f152cca13c1 100644
--- a/include/asm-ppc/mmu_context.h
+++ b/include/asm-ppc/mmu_context.h
@@ -164,13 +164,11 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                              struct task_struct *tsk)
 {
 #ifdef CONFIG_ALTIVEC
-        asm volatile (
- BEGIN_FTR_SECTION
-        "dssall;\n"
+        if (cpu_has_feature(CPU_FTR_ALTIVEC))
+        asm volatile ("dssall;\n"
 #ifndef CONFIG_POWER4
          "sync;\n" /* G4 needs a sync here, G5 apparently not */
 #endif
- END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
          : : );
 #endif /* CONFIG_ALTIVEC */
 
diff --git a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h
index 9694eca16e92..321452695039 100644
--- a/include/asm-ppc/mpc8260.h
+++ b/include/asm-ppc/mpc8260.h
@@ -92,6 +92,10 @@ enum ppc_sys_devices {
 extern unsigned char __res[];
 #endif
 
+#ifndef BOARD_CHIP_NAME
+#define BOARD_CHIP_NAME ""
+#endif
+
 #endif /* CONFIG_8260 */
 #endif /* !__ASM_PPC_MPC8260_H__ */
 #endif /* __KERNEL__ */
diff --git a/include/asm-ppc/mpc83xx.h b/include/asm-ppc/mpc83xx.h
index bb1b0576c947..7cdf60fa69b6 100644
--- a/include/asm-ppc/mpc83xx.h
+++ b/include/asm-ppc/mpc83xx.h
@@ -3,7 +3,7 @@
  *
  * MPC83xx definitions
  *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  *
  * Copyright 2005 Freescale Semiconductor, Inc
  *
@@ -107,6 +107,7 @@ enum ppc_sys_devices {
         MPC83xx_SEC2,
         MPC83xx_USB2_DR,
         MPC83xx_USB2_MPH,
+        MPC83xx_MDIO,
 };
 
 #endif /* CONFIG_83xx */
diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
index 516984ee14b5..9d14baea3d71 100644
--- a/include/asm-ppc/mpc85xx.h
+++ b/include/asm-ppc/mpc85xx.h
@@ -3,7 +3,7 @@
  *
  * MPC85xx definitions
  *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  *
  * Copyright 2004 Freescale Semiconductor, Inc
  *
@@ -67,6 +67,8 @@ extern unsigned char __res[];
 #define MPC85xx_DMA3_SIZE       (0x00080)
 #define MPC85xx_ENET1_OFFSET    (0x24000)
 #define MPC85xx_ENET1_SIZE      (0x01000)
+#define MPC85xx_MIIM_OFFSET     (0x24520)
+#define MPC85xx_MIIM_SIZE       (0x00018)
 #define MPC85xx_ENET2_OFFSET    (0x25000)
 #define MPC85xx_ENET2_SIZE      (0x01000)
 #define MPC85xx_ENET3_OFFSET    (0x26000)
@@ -132,6 +134,7 @@ enum ppc_sys_devices {
         MPC85xx_eTSEC3,
         MPC85xx_eTSEC4,
         MPC85xx_IIC2,
+        MPC85xx_MDIO,
 };
 
 /* Internal interrupts are all Level Sensitive, and Positive Polarity */
diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
index 208a2e11daee..46f159cf589e 100644
--- a/include/asm-ppc/mpc8xx.h
+++ b/include/asm-ppc/mpc8xx.h
@@ -113,6 +113,10 @@ enum ppc_sys_devices {
         MPC8xx_CPM_USB,
 };
 
+#ifndef BOARD_CHIP_NAME
+#define BOARD_CHIP_NAME ""
+#endif
+
 #endif /* !__ASSEMBLY__ */
 #endif /* CONFIG_8xx */
 #endif /* __CONFIG_8xx_DEFS */
diff --git a/include/asm-ppc/mv64x60.h b/include/asm-ppc/mv64x60.h
index 75c2ffa26b26..4f2405b83612 100644
--- a/include/asm-ppc/mv64x60.h
+++ b/include/asm-ppc/mv64x60.h
@@ -27,6 +27,8 @@
 #include <asm/pci-bridge.h>
 #include <asm/mv64x60_defs.h>
 
+struct platform_device;
+
 extern u8       mv64x60_pci_exclude_bridge;
 
 extern spinlock_t mv64x60_lock;
@@ -233,7 +235,7 @@ struct mv64x60_chip_info {
 struct mv64x60_handle {
         u32             type;           /* type of bridge */
         u32             rev;            /* revision of bridge */
-        void            *v_base;        /* virtual base addr of bridge regs */
+        void            __iomem *v_base;/* virtual base addr of bridge regs */
         phys_addr_t     p_base;         /* physical base addr of bridge regs */
 
         u32             pci_mode_a;     /* pci 0 mode: conventional pci, pci-x*/
@@ -303,7 +305,7 @@ void mv64x60_alloc_hose(struct mv64x60_handle *bh, u32 cfg_addr,
         u32 cfg_data, struct pci_controller **hose);
 int mv64x60_get_type(struct mv64x60_handle *bh);
 int mv64x60_setup_for_chip(struct mv64x60_handle *bh);
-void *mv64x60_get_bridge_vbase(void);
+void __iomem *mv64x60_get_bridge_vbase(void);
 u32 mv64x60_get_bridge_type(void);
 u32 mv64x60_get_bridge_rev(void);
 void mv64x60_get_mem_windows(struct mv64x60_handle *bh,
diff --git a/include/asm-ppc/nvram.h b/include/asm-ppc/nvram.h
deleted file mode 100644
index 31ef16e3fc4f..000000000000
--- a/include/asm-ppc/nvram.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * PreP compliant NVRAM access
- */
-
-#ifdef __KERNEL__
-#ifndef _PPC_NVRAM_H
-#define _PPC_NVRAM_H
-
-#define NVRAM_AS0  0x74
-#define NVRAM_AS1  0x75
-#define NVRAM_DATA 0x77
-
-
-/* RTC Offsets */
-
-#define MOTO_RTC_SECONDS                0x1FF9
-#define MOTO_RTC_MINUTES                0x1FFA
-#define MOTO_RTC_HOURS          0x1FFB
-#define MOTO_RTC_DAY_OF_WEEK            0x1FFC
-#define MOTO_RTC_DAY_OF_MONTH   0x1FFD
-#define MOTO_RTC_MONTH          0x1FFE
-#define MOTO_RTC_YEAR           0x1FFF
-#define MOTO_RTC_CONTROLA            0x1FF8
-#define MOTO_RTC_CONTROLB            0x1FF9
-
-/* PowerMac specific nvram stuffs */
-
-enum {
-        pmac_nvram_OF,          /* Open Firmware partition */
-        pmac_nvram_XPRAM,       /* MacOS XPRAM partition */
-        pmac_nvram_NR           /* MacOS Name Registry partition */
-};
-
-/* Return partition offset in nvram */
-extern int      pmac_get_partition(int partition);
-
-/* Direct access to XPRAM on PowerMacs */
-extern u8       pmac_xpram_read(int xpaddr);
-extern void     pmac_xpram_write(int xpaddr, u8 data);
-
-/* Synchronize NVRAM */
-extern void     nvram_sync(void);
-
-/* Normal access to NVRAM */
-extern unsigned char nvram_read_byte(int i);
-extern void nvram_write_byte(unsigned char c, int i);
-
-/* Some offsets in XPRAM */
-#define PMAC_XPRAM_MACHINE_LOC  0xe4
-#define PMAC_XPRAM_SOUND_VOLUME 0x08
-
-/* Machine location structure in PowerMac XPRAM */
-struct pmac_machine_location {
-        unsigned int    latitude;       /* 2+30 bit Fractional number */
-        unsigned int    longitude;      /* 2+30 bit Fractional number */
-        unsigned int    delta;          /* mix of GMT delta and DLS */
-};
-
-/*
- * /dev/nvram ioctls
- *
- * Note that PMAC_NVRAM_GET_OFFSET is still supported, but is
- * definitely obsolete. Do not use it if you can avoid it
- */
-
-#define OBSOLETE_PMAC_NVRAM_GET_OFFSET \
-                                _IOWR('p', 0x40, int)
-
-#define IOC_NVRAM_GET_OFFSET    _IOWR('p', 0x42, int)   /* Get NVRAM partition offset */
-#define IOC_NVRAM_SYNC          _IO('p', 0x43)          /* Sync NVRAM image */
-
-#endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/of_device.h b/include/asm-ppc/of_device.h
deleted file mode 100644
index 4b264cfd3998..000000000000
--- a/include/asm-ppc/of_device.h
+++ /dev/null
@@ -1,62 +0,0 @@
-#ifndef __OF_DEVICE_H__
-#define __OF_DEVICE_H__
-
-#include <linux/device.h>
-#include <asm/prom.h>
-
-/*
- * The of_platform_bus_type is a bus type used by drivers that do not
- * attach to a macio or similar bus but still use OF probing
- * mecanism
- */
-extern struct bus_type of_platform_bus_type;
-
-/*
- * The of_device is a kind of "base class" that is a superset of
- * struct device for use by devices attached to an OF node and
- * probed using OF properties
- */
-struct of_device
-{
-        struct device_node      *node;          /* OF device node */
-        u64                     dma_mask;       /* DMA mask */
-        struct device           dev;            /* Generic device interface */
-};
-#define to_of_device(d) container_of(d, struct of_device, dev)
-
-extern const struct of_device_id *of_match_device(
-        const struct of_device_id *matches, const struct of_device *dev);
-
-extern struct of_device *of_dev_get(struct of_device *dev);
-extern void of_dev_put(struct of_device *dev);
-
-/*
- * An of_platform_driver driver is attached to a basic of_device on
- * the "platform bus" (of_platform_bus_type)
- */
-struct of_platform_driver
-{
-        char                    *name;
-        struct of_device_id     *match_table;
-        struct module           *owner;
-
-        int     (*probe)(struct of_device* dev, const struct of_device_id *match);
-        int     (*remove)(struct of_device* dev);
-
-        int     (*suspend)(struct of_device* dev, pm_message_t state);
-        int     (*resume)(struct of_device* dev);
-        int     (*shutdown)(struct of_device* dev);
-
-        struct device_driver    driver;
-};
-#define to_of_platform_driver(drv) container_of(drv,struct of_platform_driver, driver)
-
-extern int of_register_driver(struct of_platform_driver *drv);
-extern void of_unregister_driver(struct of_platform_driver *drv);
-extern int of_device_register(struct of_device *ofdev);
-extern void of_device_unregister(struct of_device *ofdev);
-extern struct of_device *of_platform_device_create(struct device_node *np, const char *bus_id);
-extern void of_release_dev(struct device *dev);
-
-#endif /* __OF_DEVICE_H__ */
-
diff --git a/include/asm-ppc/ohare.h b/include/asm-ppc/ohare.h
deleted file mode 100644
index 023b59772231..000000000000
--- a/include/asm-ppc/ohare.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * ohare.h: definitions for using the "O'Hare" I/O controller chip.
- *
- * Copyright (C) 1997 Paul Mackerras.
- *
- * BenH: Changed to match those of heathrow (but not all of them). Please
- *       check if I didn't break anything (especially the media bay).
- */
-
-/* offset from ohare base for feature control register */
-#define OHARE_MBCR      0x34
-#define OHARE_FCR       0x38
-
-/*
- * Bits in feature control register.
- * These were mostly derived by experiment on a powerbook 3400
- * and may differ for other machines.
- */
-#define OH_SCC_RESET            1
-#define OH_BAY_POWER_N          2       /* a guess */
-#define OH_BAY_PCI_ENABLE       4       /* a guess */
-#define OH_BAY_IDE_ENABLE       8
-#define OH_BAY_FLOPPY_ENABLE    0x10
-#define OH_IDE0_ENABLE          0x20
-#define OH_IDE0_RESET_N         0x40    /* a guess */
-#define OH_BAY_DEV_MASK         0x1c
-#define OH_BAY_RESET_N          0x80
-#define OH_IOBUS_ENABLE         0x100   /* IOBUS seems to be IDE */
-#define OH_SCC_ENABLE           0x200
-#define OH_MESH_ENABLE          0x400
-#define OH_FLOPPY_ENABLE        0x800
-#define OH_SCCA_IO              0x4000
-#define OH_SCCB_IO              0x8000
-#define OH_VIA_ENABLE           0x10000 /* Is apparently wrong, to be verified */
-#define OH_IDE1_RESET_N         0x800000
-
-/*
- * Bits to set in the feature control register on PowerBooks.
- */
-#define PBOOK_FEATURES          (OH_IDE_ENABLE | OH_SCC_ENABLE | \
-                                 OH_MESH_ENABLE | OH_SCCA_IO | OH_SCCB_IO)
-
-/*
- * A magic value to put into the feature control register of the
- * "ohare" I/O controller on Starmaxes to enable the IDE CD interface.
- * Contributed by Harry Eaton.
- */
-#define STARMAX_FEATURES        0xbeff7a
diff --git a/include/asm-ppc/open_pic.h b/include/asm-ppc/open_pic.h
index 7848aa610c05..ec2f46629ca2 100644
--- a/include/asm-ppc/open_pic.h
+++ b/include/asm-ppc/open_pic.h
@@ -58,8 +58,7 @@ extern int openpic_get_irq(struct pt_regs *regs);
 extern void openpic_reset_processor_phys(u_int cpumask);
 extern void openpic_setup_ISU(int isu_num, unsigned long addr);
 extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask);
-extern void smp_openpic_message_pass(int target, int msg, unsigned long data,
-                                     int wait);
+extern void smp_openpic_message_pass(int target, int msg);
 extern void openpic_set_k2_cascade(int irq);
 extern void openpic_set_priority(u_int pri);
 extern u_int openpic_get_priority(void);
diff --git a/include/asm-ppc/page.h b/include/asm-ppc/page.h
index 4789dc024240..538e0c8ab243 100644
--- a/include/asm-ppc/page.h
+++ b/include/asm-ppc/page.h
@@ -1,9 +1,12 @@
 #ifndef _PPC_PAGE_H
 #define _PPC_PAGE_H
 
+#include <linux/config.h>
+#include <asm/asm-compat.h>
+
 /* PAGE_SHIFT determines the page size */
 #define PAGE_SHIFT      12
-#define PAGE_SIZE       (1UL << PAGE_SHIFT)
+#define PAGE_SIZE       (ASM_CONST(1) << PAGE_SHIFT)
 
 /*
  * Subtle: this is an int (not an unsigned long) and so it
@@ -34,6 +37,17 @@ typedef unsigned long pte_basic_t;
 #define PTE_FMT         "%.8lx"
 #endif
 
+/* align addr on a size boundary - adjust address up/down if needed */
+#define _ALIGN_UP(addr,size)    (((addr)+((size)-1))&(~((size)-1)))
+#define _ALIGN_DOWN(addr,size)  ((addr)&(~((size)-1)))
+
+/* align addr on a size boundary - adjust address up if needed */
+#define _ALIGN(addr,size)     _ALIGN_UP(addr,size)
+
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr)        _ALIGN(addr, PAGE_SIZE)
+
+
 #undef STRICT_MM_TYPECHECKS
 
 #ifdef STRICT_MM_TYPECHECKS
@@ -76,13 +90,6 @@ typedef unsigned long pgprot_t;
 
 #endif
 
-
-/* align addr on a size boundary - adjust address up if needed -- Cort */
-#define _ALIGN(addr,size)       (((addr)+(size)-1)&(~((size)-1)))
-
-/* to align the pointer to the (next) page boundary */
-#define PAGE_ALIGN(addr)        (((addr)+PAGE_SIZE-1)&PAGE_MASK)
-
 struct page;
 extern void clear_pages(void *page, int order);
 static inline void clear_page(void *page) { clear_pages(page, 0); }
@@ -165,5 +172,8 @@ extern __inline__ int get_order(unsigned long size)
 #define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
+/* We do define AT_SYSINFO_EHDR but don't use the gate mecanism */
+#define __HAVE_ARCH_GATE_AREA           1
+
 #endif /* __KERNEL__ */
 #endif /* _PPC_PAGE_H */
diff --git a/include/asm-ppc/parport.h b/include/asm-ppc/parport.h
deleted file mode 100644
index 11f96d3de5b6..000000000000
--- a/include/asm-ppc/parport.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * parport.h: platform-specific PC-style parport initialisation
- *
- * Copyright (C) 1999, 2000  Tim Waugh <tim@cyberelk.demon.co.uk>
- *
- * This file should only be included by drivers/parport/parport_pc.c.
- */
-
-#ifndef _ASM_PPC_PARPORT_H
-#define _ASM_PPC_PARPORT_H
-
-static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
-static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
-{
-        return parport_pc_find_isa_ports (autoirq, autodma);
-}
-
-#endif /* !(_ASM_PPC_PARPORT_H) */
diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h
index ffa423456c2b..e58c78f90a5a 100644
--- a/include/asm-ppc/pci-bridge.h
+++ b/include/asm-ppc/pci-bridge.h
@@ -79,6 +79,11 @@ struct pci_controller {
         struct resource mem_space;
 };
 
+static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
+{
+        return bus->sysdata;
+}
+
 /* These are used for config access before all the PCI probing
    has been done. */
 int early_read_config_byte(struct pci_controller *hose, int bus, int dev_fn,
diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h
index 9dd06cd40096..61434edbad7b 100644
--- a/include/asm-ppc/pci.h
+++ b/include/asm-ppc/pci.h
@@ -24,9 +24,9 @@ struct pci_dev;
  * Set this to 1 if you want the kernel to re-assign all PCI
  * bus numbers
  */
-extern int pci_assign_all_busses;
+extern int pci_assign_all_buses;
 
-#define pcibios_assign_all_busses()     (pci_assign_all_busses)
+#define pcibios_assign_all_busses()     (pci_assign_all_buses)
 #define pcibios_scan_all_fns(a, b)      0
 
 #define PCIBIOS_MIN_IO          0x1000
@@ -126,7 +126,7 @@ extern void pcibios_add_platform_entries(struct pci_dev *dev);
 
 struct file;
 extern pgprot_t pci_phys_mem_access_prot(struct file *file,
-                                         unsigned long offset,
+                                         unsigned long pfn,
                                          unsigned long size,
                                          pgprot_t prot);
 
diff --git a/include/asm-ppc/perfmon.h b/include/asm-ppc/perfmon.h
deleted file mode 100644
index 5e7a89c47b5b..000000000000
--- a/include/asm-ppc/perfmon.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef __PERFMON_H
-#define __PERFMON_H
-
-extern void (*perf_irq)(struct pt_regs *);
-
-int request_perfmon_irq(void (*handler)(struct pt_regs *));
-void free_perfmon_irq(void);
-
-#ifdef CONFIG_FSL_BOOKE
-void init_pmc_stop(int ctr);
-void set_pmc_event(int ctr, int event);
-void set_pmc_user_kernel(int ctr, int user, int kernel);
-void set_pmc_marked(int ctr, int mark0, int mark1);
-void pmc_start_ctr(int ctr, int enable);
-void pmc_start_ctrs(int enable);
-void pmc_stop_ctrs(void);
-void dump_pmcs(void);
-
-extern struct op_ppc32_model op_model_fsl_booke;
-#endif
-
-#endif /* __PERFMON_H */
diff --git a/include/asm-ppc/pgalloc.h b/include/asm-ppc/pgalloc.h
index 931b6de7ef53..bdefd1c4a558 100644
--- a/include/asm-ppc/pgalloc.h
+++ b/include/asm-ppc/pgalloc.h
@@ -28,7 +28,7 @@ extern void pgd_free(pgd_t *pgd);
 #define pmd_populate_kernel(mm, pmd, pte)       \
                 (pmd_val(*(pmd)) = (unsigned long)pte | _PMD_PRESENT)
 #define pmd_populate(mm, pmd, pte)      \
-                (pmd_val(*(pmd)) = (unsigned long)page_to_virt(pte) | _PMD_PRESENT)
+                (pmd_val(*(pmd)) = (unsigned long)lowmem_page_address(pte) | _PMD_PRESENT)
 #endif
 
 extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index eee601bb9ada..6d1c39e8a6af 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -12,6 +12,7 @@
 #include <asm/processor.h>              /* For TASK_SIZE */
 #include <asm/mmu.h>
 #include <asm/page.h>
+struct mm_struct;
 
 extern unsigned long va_to_phys(unsigned long address);
 extern pte_t *va_to_pte(unsigned long address);
@@ -705,7 +706,7 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
 #define pgprot_noncached(prot)  (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
 
 struct file;
-extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr,
+extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
                                      unsigned long size, pgprot_t vma_prot);
 #define __HAVE_PHYS_MEM_ACCESS_PROT
 
diff --git a/include/asm-ppc/pmac_feature.h b/include/asm-ppc/pmac_feature.h
deleted file mode 100644
index e9683bcff19b..000000000000
--- a/include/asm-ppc/pmac_feature.h
+++ /dev/null
@@ -1,380 +0,0 @@
-/*
- * Definition of platform feature hooks for PowerMacs
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1998 Paul Mackerras &
- *                    Ben. Herrenschmidt.
- *
- *
- * Note: I removed media-bay details from the feature stuff, I believe it's
- *       not worth it, the media-bay driver can directly use the mac-io
- *       ASIC registers.
- *
- * Implementation note: Currently, none of these functions will block.
- * However, they may internally protect themselves with a spinlock
- * for way too long. Be prepared for at least some of these to block
- * in the future.
- *
- * Unless specifically defined, the result code is assumed to be an
- * error when negative, 0 is the default success result. Some functions
- * may return additional positive result values.
- *
- * To keep implementation simple, all feature calls are assumed to have
- * the prototype parameters (struct device_node* node, int value).
- * When either is not used, pass 0.
- */
-
-#ifdef __KERNEL__
-#ifndef __PPC_ASM_PMAC_FEATURE_H
-#define __PPC_ASM_PMAC_FEATURE_H
-
-#include <asm/macio.h>
-#include <asm/machdep.h>
-
-/*
- * Known Mac motherboard models
- *
- * Please, report any error here to benh@kernel.crashing.org, thanks !
- *
- * Note that I don't fully maintain this list for Core99 & MacRISC2
- * and I'm considering removing all NewWorld entries from it and
- * entirely rely on the model string.
- */
-
-/* PowerSurge are the first generation of PCI Pmacs. This include
- * all of the Grand-Central based machines. We currently don't
- * differenciate most of them.
- */
-#define PMAC_TYPE_PSURGE                0x10    /* PowerSurge */
-#define PMAC_TYPE_ANS                   0x11    /* Apple Network Server */
-
-/* Here is the infamous serie of OHare based machines
- */
-#define PMAC_TYPE_COMET                 0x20    /* Beleived to be PowerBook 2400 */
-#define PMAC_TYPE_HOOPER                0x21    /* Beleived to be PowerBook 3400 */
-#define PMAC_TYPE_KANGA                 0x22    /* PowerBook 3500 (first G3) */
-#define PMAC_TYPE_ALCHEMY               0x23    /* Alchemy motherboard base */
-#define PMAC_TYPE_GAZELLE               0x24    /* Spartacus, some 5xxx/6xxx */
-#define PMAC_TYPE_UNKNOWN_OHARE         0x2f    /* Unknown, but OHare based */
-
-/* Here are the Heathrow based machines
- * FIXME: Differenciate wallstreet,mainstreet,wallstreetII
- */
-#define PMAC_TYPE_GOSSAMER              0x30    /* Gossamer motherboard */
-#define PMAC_TYPE_SILK                  0x31    /* Desktop PowerMac G3 */
-#define PMAC_TYPE_WALLSTREET            0x32    /* Wallstreet/Mainstreet PowerBook*/
-#define PMAC_TYPE_UNKNOWN_HEATHROW      0x3f    /* Unknown but heathrow based */
-
-/* Here are newworld machines based on Paddington (heathrow derivative)
- */
-#define PMAC_TYPE_101_PBOOK             0x40    /* 101 PowerBook (aka Lombard) */
-#define PMAC_TYPE_ORIG_IMAC             0x41    /* First generation iMac */
-#define PMAC_TYPE_YOSEMITE              0x42    /* B&W G3 */
-#define PMAC_TYPE_YIKES                 0x43    /* Yikes G4 (PCI graphics) */
-#define PMAC_TYPE_UNKNOWN_PADDINGTON    0x4f    /* Unknown but paddington based */
-
-/* Core99 machines based on UniNorth 1.0 and 1.5
- *
- * Note: A single entry here may cover several actual models according
- * to the device-tree. (Sawtooth is most tower G4s, FW_IMAC is most
- * FireWire based iMacs, etc...). Those machines are too similar to be
- * distinguished here, when they need to be differencied, use the
- * device-tree "model" or "compatible" property.
- */
-#define PMAC_TYPE_ORIG_IBOOK            0x40    /* First iBook model (no firewire) */
-#define PMAC_TYPE_SAWTOOTH              0x41    /* Desktop G4s */
-#define PMAC_TYPE_FW_IMAC               0x42    /* FireWire iMacs (except Pangea based) */
-#define PMAC_TYPE_FW_IBOOK              0x43    /* FireWire iBooks (except iBook2) */
-#define PMAC_TYPE_CUBE                  0x44    /* Cube PowerMac */
-#define PMAC_TYPE_QUICKSILVER           0x45    /* QuickSilver G4s */
-#define PMAC_TYPE_PISMO                 0x46    /* Pismo PowerBook */
-#define PMAC_TYPE_TITANIUM              0x47    /* Titanium PowerBook */
-#define PMAC_TYPE_TITANIUM2             0x48    /* Titanium II PowerBook (no L3, M6) */
-#define PMAC_TYPE_TITANIUM3             0x49    /* Titanium III PowerBook (with L3 & M7) */
-#define PMAC_TYPE_TITANIUM4             0x50    /* Titanium IV PowerBook (with L3 & M9) */
-#define PMAC_TYPE_EMAC                  0x50    /* eMac */
-#define PMAC_TYPE_UNKNOWN_CORE99        0x5f
-
-/* MacRisc2 with UniNorth 2.0 */
-#define PMAC_TYPE_RACKMAC               0x80    /* XServe */
-#define PMAC_TYPE_WINDTUNNEL            0x81
-
-/* MacRISC2 machines based on the Pangea chipset
- */
-#define PMAC_TYPE_PANGEA_IMAC           0x100   /* Flower Power iMac */
-#define PMAC_TYPE_IBOOK2                0x101   /* iBook2 (polycarbonate) */
-#define PMAC_TYPE_FLAT_PANEL_IMAC       0x102   /* Flat panel iMac */
-#define PMAC_TYPE_UNKNOWN_PANGEA        0x10f
-
-/* MacRISC2 machines based on the Intrepid chipset
- */
-#define PMAC_TYPE_UNKNOWN_INTREPID      0x11f   /* Generic */
-
-/* MacRISC4 / G5 machines. We don't have per-machine selection here anymore,
- * but rather machine families
- */
-#define PMAC_TYPE_POWERMAC_G5           0x150   /* U3 & U3H based */
-#define PMAC_TYPE_POWERMAC_G5_U3L       0x151   /* U3L based desktop */
-#define PMAC_TYPE_IMAC_G5               0x152   /* iMac G5 */
-#define PMAC_TYPE_XSERVE_G5             0x153   /* Xserve G5 */
-#define PMAC_TYPE_UNKNOWN_K2            0x19f   /* Any other K2 based */
-
-/*
- * Motherboard flags
- */
-
-#define PMAC_MB_CAN_SLEEP               0x00000001
-#define PMAC_MB_HAS_FW_POWER            0x00000002
-#define PMAC_MB_OLD_CORE99              0x00000004
-#define PMAC_MB_MOBILE                  0x00000008
-#define PMAC_MB_MAY_SLEEP               0x00000010
-
-/*
- * Feature calls supported on pmac
- *
- */
-
-/*
- * Use this inline wrapper
- */
-struct device_node;
-
-static inline long pmac_call_feature(int selector, struct device_node* node,
-                                        long param, long value)
-{
-        if (!ppc_md.feature_call)
-                return -ENODEV;
-        return ppc_md.feature_call(selector, node, param, value);
-}
-
-/* PMAC_FTR_SERIAL_ENABLE       (struct device_node* node, int param, int value)
- * enable/disable an SCC side. Pass the node corresponding to the
- * channel side as a parameter.
- * param is the type of port
- * if param is ored with PMAC_SCC_FLAG_XMON, then the SCC is locked enabled
- * for use by xmon.
- */
-#define PMAC_FTR_SCC_ENABLE             PMAC_FTR_DEF(0)
-        #define PMAC_SCC_ASYNC          0
-        #define PMAC_SCC_IRDA           1
-        #define PMAC_SCC_I2S1           2
-        #define PMAC_SCC_FLAG_XMON      0x00001000
-
-/* PMAC_FTR_MODEM_ENABLE        (struct device_node* node, 0, int value)
- * enable/disable the internal modem.
- */
-#define PMAC_FTR_MODEM_ENABLE           PMAC_FTR_DEF(1)
-
-/* PMAC_FTR_SWIM3_ENABLE        (struct device_node* node, 0,int value)
- * enable/disable the swim3 (floppy) cell of a mac-io ASIC
- */
-#define PMAC_FTR_SWIM3_ENABLE           PMAC_FTR_DEF(2)
-
-/* PMAC_FTR_MESH_ENABLE         (struct device_node* node, 0, int value)
- * enable/disable the mesh (scsi) cell of a mac-io ASIC
- */
-#define PMAC_FTR_MESH_ENABLE            PMAC_FTR_DEF(3)
-
-/* PMAC_FTR_IDE_ENABLE          (struct device_node* node, int busID, int value)
- * enable/disable an IDE port of a mac-io ASIC
- * pass the busID parameter
- */
-#define PMAC_FTR_IDE_ENABLE             PMAC_FTR_DEF(4)
-
-/* PMAC_FTR_IDE_RESET           (struct device_node* node, int busID, int value)
- * assert(1)/release(0) an IDE reset line (mac-io IDE only)
- */
-#define PMAC_FTR_IDE_RESET              PMAC_FTR_DEF(5)
-
-/* PMAC_FTR_BMAC_ENABLE         (struct device_node* node, 0, int value)
- * enable/disable the bmac (ethernet) cell of a mac-io ASIC, also drive
- * it's reset line
- */
-#define PMAC_FTR_BMAC_ENABLE            PMAC_FTR_DEF(6)
-
-/* PMAC_FTR_GMAC_ENABLE         (struct device_node* node, 0, int value)
- * enable/disable the gmac (ethernet) cell of an uninorth ASIC. This
- * control the cell's clock.
- */
-#define PMAC_FTR_GMAC_ENABLE            PMAC_FTR_DEF(7)
-
-/* PMAC_FTR_GMAC_PHY_RESET      (struct device_node* node, 0, 0)
- * Perform a HW reset of the PHY connected to a gmac controller.
- * Pass the gmac device node, not the PHY node.
- */
-#define PMAC_FTR_GMAC_PHY_RESET         PMAC_FTR_DEF(8)
-
-/* PMAC_FTR_SOUND_CHIP_ENABLE   (struct device_node* node, 0, int value)
- * enable/disable the sound chip, whatever it is and provided it can
- * acually be controlled
- */
-#define PMAC_FTR_SOUND_CHIP_ENABLE      PMAC_FTR_DEF(9)
-
-/* -- add various tweaks related to sound routing -- */
-
-/* PMAC_FTR_AIRPORT_ENABLE      (struct device_node* node, 0, int value)
- * enable/disable the airport card
- */
-#define PMAC_FTR_AIRPORT_ENABLE         PMAC_FTR_DEF(10)
-
-/* PMAC_FTR_RESET_CPU           (NULL, int cpu_nr, 0)
- * toggle the reset line of a CPU on an uninorth-based SMP machine
- */
-#define PMAC_FTR_RESET_CPU              PMAC_FTR_DEF(11)
-
-/* PMAC_FTR_USB_ENABLE          (struct device_node* node, 0, int value)
- * enable/disable an USB cell, along with the power of the USB "pad"
- * on keylargo based machines
- */
-#define PMAC_FTR_USB_ENABLE             PMAC_FTR_DEF(12)
-
-/* PMAC_FTR_1394_ENABLE         (struct device_node* node, 0, int value)
- * enable/disable the firewire cell of an uninorth ASIC.
- */
-#define PMAC_FTR_1394_ENABLE            PMAC_FTR_DEF(13)
-
-/* PMAC_FTR_1394_CABLE_POWER    (struct device_node* node, 0, int value)
- * enable/disable the firewire cable power supply of the uninorth
- * firewire cell
- */
-#define PMAC_FTR_1394_CABLE_POWER       PMAC_FTR_DEF(14)
-
-/* PMAC_FTR_SLEEP_STATE         (struct device_node* node, 0, int value)
- * set the sleep state of the motherboard.
- *
- * Pass -1 as value to query for sleep capability
- * Pass 1 to set IOs to sleep
- * Pass 0 to set IOs to wake
- */
-#define PMAC_FTR_SLEEP_STATE            PMAC_FTR_DEF(15)
-
-/* PMAC_FTR_GET_MB_INFO         (NULL, selector, 0)
- *
- * returns some motherboard infos.
- * selector: 0  - model id
- *           1  - model flags (capabilities)
- *           2  - model name (cast to const char *)
- */
-#define PMAC_FTR_GET_MB_INFO            PMAC_FTR_DEF(16)
-#define   PMAC_MB_INFO_MODEL    0
-#define   PMAC_MB_INFO_FLAGS    1
-#define   PMAC_MB_INFO_NAME     2
-
-/* PMAC_FTR_READ_GPIO           (NULL, int index, 0)
- *
- * read a GPIO from a mac-io controller of type KeyLargo or Pangea.
- * the value returned is a byte (positive), or a negative error code
- */
-#define PMAC_FTR_READ_GPIO              PMAC_FTR_DEF(17)
-
-/* PMAC_FTR_WRITE_GPIO          (NULL, int index, int value)
- *
- * write a GPIO of a mac-io controller of type KeyLargo or Pangea.
- */
-#define PMAC_FTR_WRITE_GPIO             PMAC_FTR_DEF(18)
-
-/* PMAC_FTR_ENABLE_MPIC
- *
- * Enable the MPIC cell
- */
-#define PMAC_FTR_ENABLE_MPIC            PMAC_FTR_DEF(19)
-
-/* PMAC_FTR_AACK_DELAY_ENABLE   (NULL, int enable, 0)
- *
- * Enable/disable the AACK delay on the northbridge for systems using DFS
- */
-#define PMAC_FTR_AACK_DELAY_ENABLE      PMAC_FTR_DEF(20)
-
-/* PMAC_FTR_DEVICE_CAN_WAKE
- *
- * Used by video drivers to inform system that they can actually perform
- * wakeup from sleep
- */
-#define PMAC_FTR_DEVICE_CAN_WAKE        PMAC_FTR_DEF(22)
-
-
-/* Don't use those directly, they are for the sake of pmac_setup.c */
-extern long pmac_do_feature_call(unsigned int selector, ...);
-extern void pmac_feature_init(void);
-
-/* Video suspend tweak */
-extern void pmac_set_early_video_resume(void (*proc)(void *data), void *data);
-extern void pmac_call_early_video_resume(void);
-
-#define PMAC_FTR_DEF(x) ((_MACH_Pmac << 16) | (x))
-
-/* The AGP driver registers itself here */
-extern void pmac_register_agp_pm(struct pci_dev *bridge,
-                                 int (*suspend)(struct pci_dev *bridge),
-                                 int (*resume)(struct pci_dev *bridge));
-
-/* Those are meant to be used by video drivers to deal with AGP
- * suspend resume properly
- */
-extern void pmac_suspend_agp_for_card(struct pci_dev *dev);
-extern void pmac_resume_agp_for_card(struct pci_dev *dev);
-
-/* Used by the via-pmu driver for suspend/resume
- */
-extern void pmac_tweak_clock_spreading(int enable);
-
-/*
- * The part below is for use by macio_asic.c only, do not rely
- * on the data structures or constants below in a normal driver
- *
- */
-
-#define MAX_MACIO_CHIPS         2
-
-enum {
-        macio_unknown = 0,
-        macio_grand_central,
-        macio_ohare,
-        macio_ohareII,
-        macio_heathrow,
-        macio_gatwick,
-        macio_paddington,
-        macio_keylargo,
-        macio_pangea,
-        macio_intrepid,
-        macio_keylargo2,
-};
-
-struct macio_chip
-{
-        struct device_node      *of_node;
-        int                     type;
-        const char              *name;
-        int                     rev;
-        volatile u32            __iomem *base;
-        unsigned long           flags;
-
-        /* For use by macio_asic PCI driver */
-        struct macio_bus        lbus;
-};
-
-extern struct macio_chip macio_chips[MAX_MACIO_CHIPS];
-
-#define MACIO_FLAG_SCCA_ON      0x00000001
-#define MACIO_FLAG_SCCB_ON      0x00000002
-#define MACIO_FLAG_SCC_LOCKED   0x00000004
-#define MACIO_FLAG_AIRPORT_ON   0x00000010
-#define MACIO_FLAG_FW_SUPPORTED 0x00000020
-
-extern struct macio_chip* macio_find(struct device_node* child, int type);
-
-#define MACIO_FCR32(macio, r)   ((macio)->base + ((r) >> 2))
-#define MACIO_FCR8(macio, r)    (((volatile u8 __iomem *)((macio)->base)) + (r))
-
-#define MACIO_IN32(r)           (in_le32(MACIO_FCR32(macio,r)))
-#define MACIO_OUT32(r,v)        (out_le32(MACIO_FCR32(macio,r), (v)))
-#define MACIO_BIS(r,v)          (MACIO_OUT32((r), MACIO_IN32(r) | (v)))
-#define MACIO_BIC(r,v)          (MACIO_OUT32((r), MACIO_IN32(r) & ~(v)))
-#define MACIO_IN8(r)            (in_8(MACIO_FCR8(macio,r)))
-#define MACIO_OUT8(r,v)         (out_8(MACIO_FCR8(macio,r), (v)))
-
-#endif /* __PPC_ASM_PMAC_FEATURE_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/pmac_low_i2c.h b/include/asm-ppc/pmac_low_i2c.h
deleted file mode 100644
index 809a5963d5e7..000000000000
--- a/include/asm-ppc/pmac_low_i2c.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/* 
- *  include/asm-ppc/pmac_low_i2c.h
- *
- *  Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org)
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- *
- */
-#ifndef __PMAC_LOW_I2C_H__
-#define __PMAC_LOW_I2C_H__
-
-/* i2c mode (based on the platform functions format) */
-enum {
-        pmac_low_i2c_mode_dumb          = 1,
-        pmac_low_i2c_mode_std           = 2,
-        pmac_low_i2c_mode_stdsub        = 3,
-        pmac_low_i2c_mode_combined      = 4,
-};
-
-/* RW bit in address */
-enum {
-        pmac_low_i2c_read               = 0x01,
-        pmac_low_i2c_write              = 0x00
-};
-
-/* Init, called early during boot */
-extern void pmac_init_low_i2c(void);
-
-/* Locking functions exposed to i2c-keywest */
-int pmac_low_i2c_lock(struct device_node *np);
-int pmac_low_i2c_unlock(struct device_node *np);
-
-/* Access functions for platform code */
-int pmac_low_i2c_open(struct device_node *np, int channel);
-int pmac_low_i2c_close(struct device_node *np);
-int pmac_low_i2c_setmode(struct device_node *np, int mode);
-int pmac_low_i2c_xfer(struct device_node *np, u8 addrdir, u8 subaddr, u8 *data, int len);
-
-
-#endif /* __PMAC_LOW_I2C_H__ */
diff --git a/include/asm-ppc/posix_types.h b/include/asm-ppc/posix_types.h
deleted file mode 100644
index a14a82abe8d2..000000000000
--- a/include/asm-ppc/posix_types.h
+++ /dev/null
@@ -1,111 +0,0 @@
-#ifndef _PPC_POSIX_TYPES_H
-#define _PPC_POSIX_TYPES_H
-
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc.  Also, we cannot
- * assume GCC is being used.
- */
-
-typedef unsigned long   __kernel_ino_t;
-typedef unsigned int    __kernel_mode_t;
-typedef unsigned short  __kernel_nlink_t;
-typedef long            __kernel_off_t;
-typedef int             __kernel_pid_t;
-typedef unsigned int    __kernel_uid_t;
-typedef unsigned int    __kernel_gid_t;
-typedef unsigned int    __kernel_size_t;
-typedef int             __kernel_ssize_t;
-typedef long            __kernel_ptrdiff_t;
-typedef long            __kernel_time_t;
-typedef long            __kernel_suseconds_t;
-typedef long            __kernel_clock_t;
-typedef int             __kernel_timer_t;
-typedef int             __kernel_clockid_t;
-typedef int             __kernel_daddr_t;
-typedef char *          __kernel_caddr_t;
-typedef short             __kernel_ipc_pid_t;
-typedef unsigned short  __kernel_uid16_t;
-typedef unsigned short  __kernel_gid16_t;
-typedef unsigned int    __kernel_uid32_t;
-typedef unsigned int    __kernel_gid32_t;
-
-typedef unsigned int    __kernel_old_uid_t;
-typedef unsigned int    __kernel_old_gid_t;
-typedef unsigned int    __kernel_old_dev_t;
-
-#ifdef __GNUC__
-typedef long long       __kernel_loff_t;
-#endif
-
-typedef struct {
-        int     val[2];
-} __kernel_fsid_t;
-
-#ifndef __GNUC__
-
-#define __FD_SET(d, set)        ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
-#define __FD_CLR(d, set)        ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
-#define __FD_ISSET(d, set)      ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
-#define __FD_ZERO(set)  \
-  ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set)))
-
-#else /* __GNUC__ */
-
-#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) \
-    || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 0)
-/* With GNU C, use inline functions instead so args are evaluated only once: */
-
-#undef __FD_SET
-static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
-}
-
-#undef __FD_CLR
-static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
-}
-
-#undef __FD_ISSET
-static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set *p)
-{
-        unsigned long _tmp = fd / __NFDBITS;
-        unsigned long _rem = fd % __NFDBITS;
-        return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0;
-}
-
-/*
- * This will unroll the loop for the normal constant case (8 ints,
- * for a 256-bit fd_set)
- */
-#undef __FD_ZERO
-static __inline__ void __FD_ZERO(__kernel_fd_set *p)
-{
-        unsigned int *tmp = (unsigned int *)p->fds_bits;
-        int i;
-
-        if (__builtin_constant_p(__FDSET_LONGS)) {
-                switch (__FDSET_LONGS) {
-                        case 8:
-                                tmp[0] = 0; tmp[1] = 0; tmp[2] = 0; tmp[3] = 0;
-                                tmp[4] = 0; tmp[5] = 0; tmp[6] = 0; tmp[7] = 0;
-                                return;
-                }
-        }
-        i = __FDSET_LONGS;
-        while (i) {
-                i--;
-                *tmp = 0;
-                tmp++;
-        }
-}
-
-#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
-#endif /* __GNUC__ */
-#endif /* _PPC_POSIX_TYPES_H */
diff --git a/include/asm-ppc/ppc_asm.h b/include/asm-ppc/ppc_asm.h
deleted file mode 100644
index bb53e2def363..000000000000
--- a/include/asm-ppc/ppc_asm.h
+++ /dev/null
@@ -1,350 +0,0 @@
-/*
- * include/asm-ppc/ppc_asm.h
- *
- * Definitions used by various bits of low-level assembly code on PowerPC.
- *
- * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- */
-
-#include <linux/config.h>
-
-/*
- * Macros for storing registers into and loading registers from
- * exception frames.
- */
-#define SAVE_GPR(n, base)       stw     n,GPR0+4*(n)(base)
-#define SAVE_2GPRS(n, base)     SAVE_GPR(n, base); SAVE_GPR(n+1, base)
-#define SAVE_4GPRS(n, base)     SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
-#define SAVE_8GPRS(n, base)     SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
-#define SAVE_10GPRS(n, base)    SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
-#define REST_GPR(n, base)       lwz     n,GPR0+4*(n)(base)
-#define REST_2GPRS(n, base)     REST_GPR(n, base); REST_GPR(n+1, base)
-#define REST_4GPRS(n, base)     REST_2GPRS(n, base); REST_2GPRS(n+2, base)
-#define REST_8GPRS(n, base)     REST_4GPRS(n, base); REST_4GPRS(n+4, base)
-#define REST_10GPRS(n, base)    REST_8GPRS(n, base); REST_2GPRS(n+8, base)
-
-#define SAVE_NVGPRS(base)       SAVE_GPR(13, base); SAVE_8GPRS(14, base); \
-                                SAVE_10GPRS(22, base)
-#define REST_NVGPRS(base)       REST_GPR(13, base); REST_8GPRS(14, base); \
-                                REST_10GPRS(22, base)
-
-#define SAVE_FPR(n, base)       stfd    n,THREAD_FPR0+8*(n)(base)
-#define SAVE_2FPRS(n, base)     SAVE_FPR(n, base); SAVE_FPR(n+1, base)
-#define SAVE_4FPRS(n, base)     SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
-#define SAVE_8FPRS(n, base)     SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
-#define SAVE_16FPRS(n, base)    SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
-#define SAVE_32FPRS(n, base)    SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
-#define REST_FPR(n, base)       lfd     n,THREAD_FPR0+8*(n)(base)
-#define REST_2FPRS(n, base)     REST_FPR(n, base); REST_FPR(n+1, base)
-#define REST_4FPRS(n, base)     REST_2FPRS(n, base); REST_2FPRS(n+2, base)
-#define REST_8FPRS(n, base)     REST_4FPRS(n, base); REST_4FPRS(n+4, base)
-#define REST_16FPRS(n, base)    REST_8FPRS(n, base); REST_8FPRS(n+8, base)
-#define REST_32FPRS(n, base)    REST_16FPRS(n, base); REST_16FPRS(n+16, base)
-
-#define SAVE_VR(n,b,base)       li b,THREAD_VR0+(16*(n));  stvx n,b,base
-#define SAVE_2VR(n,b,base)      SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
-#define SAVE_4VR(n,b,base)      SAVE_2VR(n,b,base); SAVE_2VR(n+2,b,base)
-#define SAVE_8VR(n,b,base)      SAVE_4VR(n,b,base); SAVE_4VR(n+4,b,base)
-#define SAVE_16VR(n,b,base)     SAVE_8VR(n,b,base); SAVE_8VR(n+8,b,base)
-#define SAVE_32VR(n,b,base)     SAVE_16VR(n,b,base); SAVE_16VR(n+16,b,base)
-#define REST_VR(n,b,base)       li b,THREAD_VR0+(16*(n)); lvx n,b,base
-#define REST_2VR(n,b,base)      REST_VR(n,b,base); REST_VR(n+1,b,base)
-#define REST_4VR(n,b,base)      REST_2VR(n,b,base); REST_2VR(n+2,b,base)
-#define REST_8VR(n,b,base)      REST_4VR(n,b,base); REST_4VR(n+4,b,base)
-#define REST_16VR(n,b,base)     REST_8VR(n,b,base); REST_8VR(n+8,b,base)
-#define REST_32VR(n,b,base)     REST_16VR(n,b,base); REST_16VR(n+16,b,base)
-
-#define SAVE_EVR(n,s,base)      evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base)
-#define SAVE_2EVR(n,s,base)     SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
-#define SAVE_4EVR(n,s,base)     SAVE_2EVR(n,s,base); SAVE_2EVR(n+2,s,base)
-#define SAVE_8EVR(n,s,base)     SAVE_4EVR(n,s,base); SAVE_4EVR(n+4,s,base)
-#define SAVE_16EVR(n,s,base)    SAVE_8EVR(n,s,base); SAVE_8EVR(n+8,s,base)
-#define SAVE_32EVR(n,s,base)    SAVE_16EVR(n,s,base); SAVE_16EVR(n+16,s,base)
-
-#define REST_EVR(n,s,base)      lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n
-#define REST_2EVR(n,s,base)     REST_EVR(n,s,base); REST_EVR(n+1,s,base)
-#define REST_4EVR(n,s,base)     REST_2EVR(n,s,base); REST_2EVR(n+2,s,base)
-#define REST_8EVR(n,s,base)     REST_4EVR(n,s,base); REST_4EVR(n+4,s,base)
-#define REST_16EVR(n,s,base)    REST_8EVR(n,s,base); REST_8EVR(n+8,s,base)
-#define REST_32EVR(n,s,base)    REST_16EVR(n,s,base); REST_16EVR(n+16,s,base)
-
-#ifdef CONFIG_PPC601_SYNC_FIX
-#define SYNC                            \
-BEGIN_FTR_SECTION                       \
-        sync;                           \
-        isync;                          \
-END_FTR_SECTION_IFSET(CPU_FTR_601)
-#define SYNC_601                        \
-BEGIN_FTR_SECTION                       \
-        sync;                           \
-END_FTR_SECTION_IFSET(CPU_FTR_601)
-#define ISYNC_601                       \
-BEGIN_FTR_SECTION                       \
-        isync;                          \
-END_FTR_SECTION_IFSET(CPU_FTR_601)
-#else
-#define SYNC
-#define SYNC_601
-#define ISYNC_601
-#endif
-
-#ifndef CONFIG_SMP
-#define TLBSYNC
-#else /* CONFIG_SMP */
-/* tlbsync is not implemented on 601 */
-#define TLBSYNC                         \
-BEGIN_FTR_SECTION                       \
-        tlbsync;                        \
-        sync;                           \
-END_FTR_SECTION_IFCLR(CPU_FTR_601)
-#endif
-
-/*
- * This instruction is not implemented on the PPC 603 or 601; however, on
- * the 403GCX and 405GP tlbia IS defined and tlbie is not.
- * All of these instructions exist in the 8xx, they have magical powers,
- * and they must be used.
- */
-
-#if !defined(CONFIG_4xx) && !defined(CONFIG_8xx)
-#define tlbia                                   \
-        li      r4,1024;                        \
-        mtctr   r4;                             \
-        lis     r4,KERNELBASE@h;                \
-0:      tlbie   r4;                             \
-        addi    r4,r4,0x1000;                   \
-        bdnz    0b
-#endif
-
-#ifdef CONFIG_BOOKE
-#define tophys(rd,rs)                           \
-        addis   rd,rs,0
-
-#define tovirt(rd,rs)                           \
-        addis   rd,rs,0
-
-#else  /* CONFIG_BOOKE */
-/*
- * On APUS (Amiga PowerPC cpu upgrade board), we don't know the
- * physical base address of RAM at compile time.
- */
-#define tophys(rd,rs)                           \
-0:      addis   rd,rs,-KERNELBASE@h;            \
-        .section ".vtop_fixup","aw";            \
-        .align  1;                              \
-        .long   0b;                             \
-        .previous
-
-#define tovirt(rd,rs)                           \
-0:      addis   rd,rs,KERNELBASE@h;             \
-        .section ".ptov_fixup","aw";            \
-        .align  1;                              \
-        .long   0b;                             \
-        .previous
-#endif  /* CONFIG_BOOKE */
-
-/*
- * On 64-bit cpus, we use the rfid instruction instead of rfi, but
- * we then have to make sure we preserve the top 32 bits except for
- * the 64-bit mode bit, which we clear.
- */
-#ifdef CONFIG_PPC64BRIDGE
-#define FIX_SRR1(ra, rb)        \
-        mr      rb,ra;          \
-        mfmsr   ra;             \
-        clrldi  ra,ra,1;                /* turn off 64-bit mode */ \
-        rldimi  ra,rb,0,32
-#define RFI             .long   0x4c000024      /* rfid instruction */
-#define MTMSRD(r)       .long   (0x7c000164 + ((r) << 21))      /* mtmsrd */
-#define CLR_TOP32(r)    rlwinm  (r),(r),0,0,31  /* clear top 32 bits */
-
-#else
-#define FIX_SRR1(ra, rb)
-#ifndef CONFIG_40x
-#define RFI             rfi
-#else
-#define RFI             rfi; b .        /* Prevent prefetch past rfi */
-#endif
-#define MTMSRD(r)       mtmsr   r
-#define CLR_TOP32(r)
-#endif /* CONFIG_PPC64BRIDGE */
-
-#define RFCI            .long 0x4c000066        /* rfci instruction */
-#define RFDI            .long 0x4c00004e        /* rfdi instruction */
-#define RFMCI           .long 0x4c00004c        /* rfmci instruction */
-
-#ifdef CONFIG_IBM405_ERR77
-#define PPC405_ERR77(ra,rb)     dcbt    ra, rb;
-#define PPC405_ERR77_SYNC       sync;
-#else
-#define PPC405_ERR77(ra,rb)
-#define PPC405_ERR77_SYNC
-#endif
-
-#ifdef CONFIG_IBM440EP_ERR42
-#define PPC440EP_ERR42 isync
-#else
-#define PPC440EP_ERR42
-#endif
-
-/* The boring bits... */
-
-/* Condition Register Bit Fields */
-
-#define cr0     0
-#define cr1     1
-#define cr2     2
-#define cr3     3
-#define cr4     4
-#define cr5     5
-#define cr6     6
-#define cr7     7
-
-
-/* General Purpose Registers (GPRs) */
-
-#define r0      0
-#define r1      1
-#define r2      2
-#define r3      3
-#define r4      4
-#define r5      5
-#define r6      6
-#define r7      7
-#define r8      8
-#define r9      9
-#define r10     10
-#define r11     11
-#define r12     12
-#define r13     13
-#define r14     14
-#define r15     15
-#define r16     16
-#define r17     17
-#define r18     18
-#define r19     19
-#define r20     20
-#define r21     21
-#define r22     22
-#define r23     23
-#define r24     24
-#define r25     25
-#define r26     26
-#define r27     27
-#define r28     28
-#define r29     29
-#define r30     30
-#define r31     31
-
-
-/* Floating Point Registers (FPRs) */
-
-#define fr0     0
-#define fr1     1
-#define fr2     2
-#define fr3     3
-#define fr4     4
-#define fr5     5
-#define fr6     6
-#define fr7     7
-#define fr8     8
-#define fr9     9
-#define fr10    10
-#define fr11    11
-#define fr12    12
-#define fr13    13
-#define fr14    14
-#define fr15    15
-#define fr16    16
-#define fr17    17
-#define fr18    18
-#define fr19    19
-#define fr20    20
-#define fr21    21
-#define fr22    22
-#define fr23    23
-#define fr24    24
-#define fr25    25
-#define fr26    26
-#define fr27    27
-#define fr28    28
-#define fr29    29
-#define fr30    30
-#define fr31    31
-
-#define vr0     0
-#define vr1     1
-#define vr2     2
-#define vr3     3
-#define vr4     4
-#define vr5     5
-#define vr6     6
-#define vr7     7
-#define vr8     8
-#define vr9     9
-#define vr10    10
-#define vr11    11
-#define vr12    12
-#define vr13    13
-#define vr14    14
-#define vr15    15
-#define vr16    16
-#define vr17    17
-#define vr18    18
-#define vr19    19
-#define vr20    20
-#define vr21    21
-#define vr22    22
-#define vr23    23
-#define vr24    24
-#define vr25    25
-#define vr26    26
-#define vr27    27
-#define vr28    28
-#define vr29    29
-#define vr30    30
-#define vr31    31
-
-#define evr0    0
-#define evr1    1
-#define evr2    2
-#define evr3    3
-#define evr4    4
-#define evr5    5
-#define evr6    6
-#define evr7    7
-#define evr8    8
-#define evr9    9
-#define evr10   10
-#define evr11   11
-#define evr12   12
-#define evr13   13
-#define evr14   14
-#define evr15   15
-#define evr16   16
-#define evr17   17
-#define evr18   18
-#define evr19   19
-#define evr20   20
-#define evr21   21
-#define evr22   22
-#define evr23   23
-#define evr24   24
-#define evr25   25
-#define evr26   26
-#define evr27   27
-#define evr28   28
-#define evr29   29
-#define evr30   30
-#define evr31   31
-
-/* some stab codes */
-#define N_FUN   36
-#define N_RSYM  64
-#define N_SLINE 68
-#define N_SO    100
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
index 549f44843c5e..83d8c77c124d 100644
--- a/include/asm-ppc/ppc_sys.h
+++ b/include/asm-ppc/ppc_sys.h
@@ -3,7 +3,7 @@
  *
  * PPC system definitions and library functions
  *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  *
  * Copyright 2005 Freescale Semiconductor, Inc
  *
@@ -18,7 +18,7 @@
 #define __ASM_PPC_SYS_H
 
 #include <linux/init.h>
-#include <linux/device.h>
+#include <linux/platform_device.h>
 #include <linux/types.h>
 
 #if defined(CONFIG_8260)
diff --git a/include/asm-ppc/ppcboot.h b/include/asm-ppc/ppcboot.h
index fe24e4520208..6b7b63f71daa 100644
--- a/include/asm-ppc/ppcboot.h
+++ b/include/asm-ppc/ppcboot.h
@@ -73,8 +73,8 @@ typedef struct bd_info {
 #if defined(CONFIG_HYMOD)
         hymod_conf_t    bi_hymod_conf;  /* hymod configuration information */
 #endif
-#if defined(CONFIG_EVB64260) || defined(CONFIG_44x) || defined(CONFIG_85xx) ||\
-        defined(CONFIG_83xx)
+#if defined(CONFIG_EVB64260) || defined(CONFIG_405EP) || defined(CONFIG_44x) || \
+        defined(CONFIG_85xx) || defined(CONFIG_83xx)
         /* second onboard ethernet port */
         unsigned char   bi_enet1addr[6];
 #endif
@@ -96,5 +96,7 @@ typedef struct bd_info {
 #endif
 } bd_t;
 
+#define bi_tbfreq       bi_intfreq
+
 #endif /* __ASSEMBLY__ */
 #endif  /* __ASM_PPCBOOT_H__ */
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
deleted file mode 100644
index b05b5d9cae20..000000000000
--- a/include/asm-ppc/processor.h
+++ /dev/null
@@ -1,201 +0,0 @@
-#ifdef __KERNEL__
-#ifndef __ASM_PPC_PROCESSOR_H
-#define __ASM_PPC_PROCESSOR_H
-
-/*
- * Default implementation of macro that returns current
- * instruction pointer ("program counter").
- */
-#define current_text_addr() ({ __label__ _l; _l: &&_l;})
-
-#include <linux/config.h>
-#include <linux/stringify.h>
-
-#include <asm/ptrace.h>
-#include <asm/types.h>
-#include <asm/mpc8xx.h>
-#include <asm/reg.h>
-
-/* We only need to define a new _MACH_xxx for machines which are part of
- * a configuration which supports more than one type of different machine.
- * This is currently limited to CONFIG_PPC_MULTIPLATFORM and CHRP/PReP/PMac.
- * -- Tom
- */
-#define _MACH_prep      0x00000001
-#define _MACH_Pmac      0x00000002      /* pmac or pmac clone (non-chrp) */
-#define _MACH_chrp      0x00000004      /* chrp machine */
-
-/* see residual.h for these */
-#define _PREP_Motorola  0x01    /* motorola prep */
-#define _PREP_Firm      0x02    /* firmworks prep */
-#define _PREP_IBM       0x00    /* ibm prep */
-#define _PREP_Bull      0x03    /* bull prep */
-
-/* these are arbitrary */
-#define _CHRP_Motorola  0x04    /* motorola chrp, the cobra */
-#define _CHRP_IBM       0x05    /* IBM chrp, the longtrail and longtrail 2 */
-#define _CHRP_Pegasos   0x06    /* Genesi/bplan's Pegasos and Pegasos2 */
-
-#define _GLOBAL(n)\
-        .stabs __stringify(n:F-1),N_FUN,0,0,n;\
-        .globl n;\
-n:
-
-/*
- * this is the minimum allowable io space due to the location
- * of the io areas on prep (first one at 0x80000000) but
- * as soon as I get around to remapping the io areas with the BATs
- * to match the mac we can raise this. -- Cort
- */
-#define TASK_SIZE       (CONFIG_TASK_SIZE)
-
-#ifndef __ASSEMBLY__
-#ifdef CONFIG_PPC_MULTIPLATFORM
-extern int _machine;
-
-/* what kind of prep workstation we are */
-extern int _prep_type;
-extern int _chrp_type;
-
-/*
- * This is used to identify the board type from a given PReP board
- * vendor. Board revision is also made available.
- */
-extern unsigned char ucSystemType;
-extern unsigned char ucBoardRev;
-extern unsigned char ucBoardRevMaj, ucBoardRevMin;
-#else
-#define _machine 0
-#endif /* CONFIG_PPC_MULTIPLATFORM */
-
-struct task_struct;
-void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp);
-void release_thread(struct task_struct *);
-
-/* Prepare to copy thread state - unlazy all lazy status */
-extern void prepare_to_copy(struct task_struct *tsk);
-
-/*
- * Create a new kernel thread.
- */
-extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
-
-/* Lazy FPU handling on uni-processor */
-extern struct task_struct *last_task_used_math;
-extern struct task_struct *last_task_used_altivec;
-extern struct task_struct *last_task_used_spe;
-
-/* This decides where the kernel will search for a free chunk of vm
- * space during mmap's.
- */
-#define TASK_UNMAPPED_BASE      (TASK_SIZE / 8 * 3)
-
-typedef struct {
-        unsigned long seg;
-} mm_segment_t;
-
-struct thread_struct {
-        unsigned long   ksp;            /* Kernel stack pointer */
-        struct pt_regs  *regs;          /* Pointer to saved register state */
-        mm_segment_t    fs;             /* for get_fs() validation */
-        void            *pgdir;         /* root of page-table tree */
-        int             fpexc_mode;     /* floating-point exception mode */
-        signed long     last_syscall;
-#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE)
-        unsigned long   dbcr0;          /* debug control register values */
-        unsigned long   dbcr1;
-#endif
-        double          fpr[32];        /* Complete floating point set */
-        unsigned long   fpscr_pad;      /* fpr ... fpscr must be contiguous */
-        unsigned long   fpscr;          /* Floating point status */
-#ifdef CONFIG_ALTIVEC
-        /* Complete AltiVec register set */
-        vector128       vr[32] __attribute((aligned(16)));
-        /* AltiVec status */
-        vector128       vscr __attribute((aligned(16)));
-        unsigned long   vrsave;
-        int             used_vr;        /* set if process has used altivec */
-#endif /* CONFIG_ALTIVEC */
-#ifdef CONFIG_SPE
-        unsigned long   evr[32];        /* upper 32-bits of SPE regs */
-        u64             acc;            /* Accumulator */
-        unsigned long   spefscr;        /* SPE & eFP status */
-        int             used_spe;       /* set if process has used spe */
-#endif /* CONFIG_SPE */
-};
-
-#define ARCH_MIN_TASKALIGN 16
-
-#define INIT_SP         (sizeof(init_stack) + (unsigned long) &init_stack)
-
-#define INIT_THREAD { \
-        .ksp = INIT_SP, \
-        .fs = KERNEL_DS, \
-        .pgdir = swapper_pg_dir, \
-        .fpexc_mode = MSR_FE0 | MSR_FE1, \
-}
-
-/*
- * Return saved PC of a blocked thread. For now, this is the "user" PC
- */
-#define thread_saved_pc(tsk)    \
-        ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
-
-unsigned long get_wchan(struct task_struct *p);
-
-#define KSTK_EIP(tsk)   ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
-#define KSTK_ESP(tsk)   ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0)
-
-/* Get/set floating-point exception mode */
-#define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr))
-#define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val))
-
-extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr);
-extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val);
-
-static inline unsigned int __unpack_fe01(unsigned int msr_bits)
-{
-        return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8);
-}
-
-static inline unsigned int __pack_fe01(unsigned int fpmode)
-{
-        return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1);
-}
-
-/* in process.c - for early bootup debug -- Cort */
-int ll_printk(const char *, ...);
-void ll_puts(const char *);
-
-/* In misc.c */
-void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
-
-#define have_of (_machine == _MACH_chrp || _machine == _MACH_Pmac)
-
-#define cpu_relax()     barrier()
-
-/*
- * Prefetch macros.
- */
-#define ARCH_HAS_PREFETCH
-#define ARCH_HAS_PREFETCHW
-#define ARCH_HAS_SPINLOCK_PREFETCH
-
-extern inline void prefetch(const void *x)
-{
-         __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x));
-}
-
-extern inline void prefetchw(const void *x)
-{
-         __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x));
-}
-
-#define spin_lock_prefetch(x)   prefetchw(x)
-
-extern int emulate_altivec(struct pt_regs *regs);
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* __ASM_PPC_PROCESSOR_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/prom.h b/include/asm-ppc/prom.h
index 75c0637acdc8..3e39827ed566 100644
--- a/include/asm-ppc/prom.h
+++ b/include/asm-ppc/prom.h
@@ -93,7 +93,7 @@ extern int device_is_compatible(struct device_node *device, const char *);
 extern int machine_is_compatible(const char *compat);
 extern unsigned char *get_property(struct device_node *node, const char *name,
                                    int *lenp);
-extern void prom_add_property(struct device_node* np, struct property* prop);
+extern int prom_add_property(struct device_node* np, struct property* prop);
 extern void prom_get_irq_senses(unsigned char *, int, int);
 extern int prom_n_addr_cells(struct device_node* np);
 extern int prom_n_size_cells(struct device_node* np);
diff --git a/include/asm-ppc/ptrace.h b/include/asm-ppc/ptrace.h
deleted file mode 100644
index 7043c164b537..000000000000
--- a/include/asm-ppc/ptrace.h
+++ /dev/null
@@ -1,152 +0,0 @@
-#ifndef _PPC_PTRACE_H
-#define _PPC_PTRACE_H
-
-/*
- * This struct defines the way the registers are stored on the
- * kernel stack during a system call or other kernel entry.
- *
- * this should only contain volatile regs
- * since we can keep non-volatile in the thread_struct
- * should set this up when only volatiles are saved
- * by intr code.
- *
- * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
- * that the overall structure is a multiple of 16 bytes in length.
- *
- * Note that the offsets of the fields in this struct correspond with
- * the PT_* values below.  This simplifies arch/ppc/kernel/ptrace.c.
- */
-
-#ifndef __ASSEMBLY__
-struct pt_regs {
-        unsigned long gpr[32];
-        unsigned long nip;
-        unsigned long msr;
-        unsigned long orig_gpr3;        /* Used for restarting system calls */
-        unsigned long ctr;
-        unsigned long link;
-        unsigned long xer;
-        unsigned long ccr;
-        unsigned long mq;               /* 601 only (not used at present) */
-                                        /* Used on APUS to hold IPL value. */
-        unsigned long trap;             /* Reason for being here */
-        /* N.B. for critical exceptions on 4xx, the dar and dsisr
-           fields are overloaded to hold srr0 and srr1. */
-        unsigned long dar;              /* Fault registers */
-        unsigned long dsisr;            /* on 4xx/Book-E used for ESR */
-        unsigned long result;           /* Result of a system call */
-};
-
-#endif /* __ASSEMBLY__ */
-
-#ifdef __KERNEL__
-#define STACK_FRAME_OVERHEAD    16      /* size of minimum stack frame */
-
-/* Size of stack frame allocated when calling signal handler. */
-#define __SIGNAL_FRAMESIZE      64
-
-#ifndef __ASSEMBLY__
-#define instruction_pointer(regs) ((regs)->nip)
-#ifdef CONFIG_SMP
-extern unsigned long profile_pc(struct pt_regs *regs);
-#else
-#define profile_pc(regs) instruction_pointer(regs)
-#endif
-
-#define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
-
-#define force_successful_syscall_return()   \
-        do { \
-                current_thread_info()->local_flags |= _TIFL_FORCE_NOERROR; \
-        } while(0)
-
-/*
- * We use the least-significant bit of the trap field to indicate
- * whether we have saved the full set of registers, or only a
- * partial set.  A 1 there means the partial set.
- * On 4xx we use the next bit to indicate whether the exception
- * is a critical exception (1 means it is).
- */
-#define FULL_REGS(regs)         (((regs)->trap & 1) == 0)
-#define IS_CRITICAL_EXC(regs)   (((regs)->trap & 2) == 0)
-#define TRAP(regs)              ((regs)->trap & ~0xF)
-
-#define CHECK_FULL_REGS(regs)                                                 \
-do {                                                                          \
-        if ((regs)->trap & 1)                                                 \
-                printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \
-} while (0)
-#endif /* __ASSEMBLY__ */
-
-#endif /* __KERNEL__ */
-
-/*
- * Offsets used by 'ptrace' system call interface.
- * These can't be changed without breaking binary compatibility
- * with MkLinux, etc.
- */
-#define PT_R0   0
-#define PT_R1   1
-#define PT_R2   2
-#define PT_R3   3
-#define PT_R4   4
-#define PT_R5   5
-#define PT_R6   6
-#define PT_R7   7
-#define PT_R8   8
-#define PT_R9   9
-#define PT_R10  10
-#define PT_R11  11
-#define PT_R12  12
-#define PT_R13  13
-#define PT_R14  14
-#define PT_R15  15
-#define PT_R16  16
-#define PT_R17  17
-#define PT_R18  18
-#define PT_R19  19
-#define PT_R20  20
-#define PT_R21  21
-#define PT_R22  22
-#define PT_R23  23
-#define PT_R24  24
-#define PT_R25  25
-#define PT_R26  26
-#define PT_R27  27
-#define PT_R28  28
-#define PT_R29  29
-#define PT_R30  30
-#define PT_R31  31
-
-#define PT_NIP  32
-#define PT_MSR  33
-#ifdef __KERNEL__
-#define PT_ORIG_R3 34
-#endif
-#define PT_CTR  35
-#define PT_LNK  36
-#define PT_XER  37
-#define PT_CCR  38
-#define PT_MQ   39
-
-#define PT_FPR0 48      /* each FP reg occupies 2 slots in this space */
-#define PT_FPR31 (PT_FPR0 + 2*31)
-#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
-
-/* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go */
-#define PTRACE_GETVRREGS        18
-#define PTRACE_SETVRREGS        19
-
-/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
- * spefscr, in one go */
-#define PTRACE_GETEVRREGS       20
-#define PTRACE_SETEVRREGS       21
-
-/*
- * Get or set a debug register. The first 16 are DABR registers and the
- * second 16 are IABR registers.
- */
-#define PTRACE_GET_DEBUGREG     25
-#define PTRACE_SET_DEBUGREG     26
-
-#endif
diff --git a/include/asm-ppc/reg.h b/include/asm-ppc/reg.h
deleted file mode 100644
index 73c33e3ef9c6..000000000000
--- a/include/asm-ppc/reg.h
+++ /dev/null
@@ -1,440 +0,0 @@
-/*
- * Contains the definition of registers common to all PowerPC variants.
- * If a register definition has been changed in a different PowerPC
- * variant, we will case it in #ifndef XXX ... #endif, and have the
- * number used in the Programming Environments Manual For 32-Bit
- * Implementations of the PowerPC Architecture (a.k.a. Green Book) here.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_PPC_REGS_H__
-#define __ASM_PPC_REGS_H__
-
-#include <linux/stringify.h>
-
-/* Pickup Book E specific registers. */
-#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
-#include <asm/reg_booke.h>
-#endif
-
-/* Machine State Register (MSR) Fields */
-#define MSR_SF          (1<<63)
-#define MSR_ISF         (1<<61)
-#define MSR_VEC         (1<<25)         /* Enable AltiVec */
-#define MSR_POW         (1<<18)         /* Enable Power Management */
-#define MSR_WE          (1<<18)         /* Wait State Enable */
-#define MSR_TGPR        (1<<17)         /* TLB Update registers in use */
-#define MSR_CE          (1<<17)         /* Critical Interrupt Enable */
-#define MSR_ILE         (1<<16)         /* Interrupt Little Endian */
-#define MSR_EE          (1<<15)         /* External Interrupt Enable */
-#define MSR_PR          (1<<14)         /* Problem State / Privilege Level */
-#define MSR_FP          (1<<13)         /* Floating Point enable */
-#define MSR_ME          (1<<12)         /* Machine Check Enable */
-#define MSR_FE0         (1<<11)         /* Floating Exception mode 0 */
-#define MSR_SE          (1<<10)         /* Single Step */
-#define MSR_BE          (1<<9)          /* Branch Trace */
-#define MSR_DE          (1<<9)          /* Debug Exception Enable */
-#define MSR_FE1         (1<<8)          /* Floating Exception mode 1 */
-#define MSR_IP          (1<<6)          /* Exception prefix 0x000/0xFFF */
-#define MSR_IR          (1<<5)          /* Instruction Relocate */
-#define MSR_DR          (1<<4)          /* Data Relocate */
-#define MSR_PE          (1<<3)          /* Protection Enable */
-#define MSR_PX          (1<<2)          /* Protection Exclusive Mode */
-#define MSR_RI          (1<<1)          /* Recoverable Exception */
-#define MSR_LE          (1<<0)          /* Little Endian */
-
-/* Default MSR for kernel mode. */
-#ifdef CONFIG_APUS_FAST_EXCEPT
-#define MSR_KERNEL      (MSR_ME|MSR_IP|MSR_RI|MSR_IR|MSR_DR)
-#endif
-
-#ifndef MSR_KERNEL
-#define MSR_KERNEL      (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
-#endif
-
-#define MSR_USER        (MSR_KERNEL|MSR_PR|MSR_EE)
-
-/* Floating Point Status and Control Register (FPSCR) Fields */
-#define FPSCR_FX        0x80000000      /* FPU exception summary */
-#define FPSCR_FEX       0x40000000      /* FPU enabled exception summary */
-#define FPSCR_VX        0x20000000      /* Invalid operation summary */
-#define FPSCR_OX        0x10000000      /* Overflow exception summary */
-#define FPSCR_UX        0x08000000      /* Underflow exception summary */
-#define FPSCR_ZX        0x04000000      /* Zero-devide exception summary */
-#define FPSCR_XX        0x02000000      /* Inexact exception summary */
-#define FPSCR_VXSNAN    0x01000000      /* Invalid op for SNaN */
-#define FPSCR_VXISI     0x00800000      /* Invalid op for Inv - Inv */
-#define FPSCR_VXIDI     0x00400000      /* Invalid op for Inv / Inv */
-#define FPSCR_VXZDZ     0x00200000      /* Invalid op for Zero / Zero */
-#define FPSCR_VXIMZ     0x00100000      /* Invalid op for Inv * Zero */
-#define FPSCR_VXVC      0x00080000      /* Invalid op for Compare */
-#define FPSCR_FR        0x00040000      /* Fraction rounded */
-#define FPSCR_FI        0x00020000      /* Fraction inexact */
-#define FPSCR_FPRF      0x0001f000      /* FPU Result Flags */
-#define FPSCR_FPCC      0x0000f000      /* FPU Condition Codes */
-#define FPSCR_VXSOFT    0x00000400      /* Invalid op for software request */
-#define FPSCR_VXSQRT    0x00000200      /* Invalid op for square root */
-#define FPSCR_VXCVI     0x00000100      /* Invalid op for integer convert */
-#define FPSCR_VE        0x00000080      /* Invalid op exception enable */
-#define FPSCR_OE        0x00000040      /* IEEE overflow exception enable */
-#define FPSCR_UE        0x00000020      /* IEEE underflow exception enable */
-#define FPSCR_ZE        0x00000010      /* IEEE zero divide exception enable */
-#define FPSCR_XE        0x00000008      /* FP inexact exception enable */
-#define FPSCR_NI        0x00000004      /* FPU non IEEE-Mode */
-#define FPSCR_RN        0x00000003      /* FPU rounding control */
-
-/* Special Purpose Registers (SPRNs)*/
-#define SPRN_CTR        0x009   /* Count Register */
-#define SPRN_DABR       0x3F5   /* Data Address Breakpoint Register */
-#define SPRN_DAR        0x013   /* Data Address Register */
-#define SPRN_TBRL       0x10C   /* Time Base Read Lower Register (user, R/O) */
-#define SPRN_TBRU       0x10D   /* Time Base Read Upper Register (user, R/O) */
-#define SPRN_TBWL       0x11C   /* Time Base Lower Register (super, R/W) */
-#define SPRN_TBWU       0x11D   /* Time Base Upper Register (super, R/W) */
-#define SPRN_HIOR       0x137   /* 970 Hypervisor interrupt offset */
-#define SPRN_DBAT0L     0x219   /* Data BAT 0 Lower Register */
-#define SPRN_DBAT0U     0x218   /* Data BAT 0 Upper Register */
-#define SPRN_DBAT1L     0x21B   /* Data BAT 1 Lower Register */
-#define SPRN_DBAT1U     0x21A   /* Data BAT 1 Upper Register */
-#define SPRN_DBAT2L     0x21D   /* Data BAT 2 Lower Register */
-#define SPRN_DBAT2U     0x21C   /* Data BAT 2 Upper Register */
-#define SPRN_DBAT3L     0x21F   /* Data BAT 3 Lower Register */
-#define SPRN_DBAT3U     0x21E   /* Data BAT 3 Upper Register */
-#define SPRN_DBAT4L     0x239   /* Data BAT 4 Lower Register */
-#define SPRN_DBAT4U     0x238   /* Data BAT 4 Upper Register */
-#define SPRN_DBAT5L     0x23B   /* Data BAT 5 Lower Register */
-#define SPRN_DBAT5U     0x23A   /* Data BAT 5 Upper Register */
-#define SPRN_DBAT6L     0x23D   /* Data BAT 6 Lower Register */
-#define SPRN_DBAT6U     0x23C   /* Data BAT 6 Upper Register */
-#define SPRN_DBAT7L     0x23F   /* Data BAT 7 Lower Register */
-#define SPRN_DBAT7U     0x23E   /* Data BAT 7 Upper Register */
-
-#define SPRN_DEC        0x016           /* Decrement Register */
-#define SPRN_DER        0x095           /* Debug Enable Regsiter */
-#define DER_RSTE        0x40000000      /* Reset Interrupt */
-#define DER_CHSTPE      0x20000000      /* Check Stop */
-#define DER_MCIE        0x10000000      /* Machine Check Interrupt */
-#define DER_EXTIE       0x02000000      /* External Interrupt */
-#define DER_ALIE        0x01000000      /* Alignment Interrupt */
-#define DER_PRIE        0x00800000      /* Program Interrupt */
-#define DER_FPUVIE      0x00400000      /* FP Unavailable Interrupt */
-#define DER_DECIE       0x00200000      /* Decrementer Interrupt */
-#define DER_SYSIE       0x00040000      /* System Call Interrupt */
-#define DER_TRE         0x00020000      /* Trace Interrupt */
-#define DER_SEIE        0x00004000      /* FP SW Emulation Interrupt */
-#define DER_ITLBMSE     0x00002000      /* Imp. Spec. Instruction TLB Miss */
-#define DER_ITLBERE     0x00001000      /* Imp. Spec. Instruction TLB Error */
-#define DER_DTLBMSE     0x00000800      /* Imp. Spec. Data TLB Miss */
-#define DER_DTLBERE     0x00000400      /* Imp. Spec. Data TLB Error */
-#define DER_LBRKE       0x00000008      /* Load/Store Breakpoint Interrupt */
-#define DER_IBRKE       0x00000004      /* Instruction Breakpoint Interrupt */
-#define DER_EBRKE       0x00000002      /* External Breakpoint Interrupt */
-#define DER_DPIE        0x00000001      /* Dev. Port Nonmaskable Request */
-#define SPRN_DMISS      0x3D0           /* Data TLB Miss Register */
-#define SPRN_DSISR      0x012   /* Data Storage Interrupt Status Register */
-#define SPRN_EAR        0x11A           /* External Address Register */
-#define SPRN_HASH1      0x3D2           /* Primary Hash Address Register */
-#define SPRN_HASH2      0x3D3           /* Secondary Hash Address Resgister */
-#define SPRN_HID0       0x3F0           /* Hardware Implementation Register 0 */
-#define HID0_EMCP       (1<<31)         /* Enable Machine Check pin */
-#define HID0_EBA        (1<<29)         /* Enable Bus Address Parity */
-#define HID0_EBD        (1<<28)         /* Enable Bus Data Parity */
-#define HID0_SBCLK      (1<<27)
-#define HID0_EICE       (1<<26)
-#define HID0_TBEN       (1<<26)         /* Timebase enable - 745x */
-#define HID0_ECLK       (1<<25)
-#define HID0_PAR        (1<<24)
-#define HID0_STEN       (1<<24)         /* Software table search enable - 745x */
-#define HID0_HIGH_BAT   (1<<23)         /* Enable high BATs - 7455 */
-#define HID0_DOZE       (1<<23)
-#define HID0_NAP        (1<<22)
-#define HID0_SLEEP      (1<<21)
-#define HID0_DPM        (1<<20)
-#define HID0_BHTCLR     (1<<18)         /* Clear branch history table - 7450 */
-#define HID0_XAEN       (1<<17)         /* Extended addressing enable - 7450 */
-#define HID0_NHR        (1<<16)         /* Not hard reset (software bit-7450)*/
-#define HID0_ICE        (1<<15)         /* Instruction Cache Enable */
-#define HID0_DCE        (1<<14)         /* Data Cache Enable */
-#define HID0_ILOCK      (1<<13)         /* Instruction Cache Lock */
-#define HID0_DLOCK      (1<<12)         /* Data Cache Lock */
-#define HID0_ICFI       (1<<11)         /* Instr. Cache Flash Invalidate */
-#define HID0_DCI        (1<<10)         /* Data Cache Invalidate */
-#define HID0_SPD        (1<<9)          /* Speculative disable */
-#define HID0_DAPUEN     (1<<8)          /* Debug APU enable */
-#define HID0_SGE        (1<<7)          /* Store Gathering Enable */
-#define HID0_SIED       (1<<7)          /* Serial Instr. Execution [Disable] */
-#define HID0_DFCA       (1<<6)          /* Data Cache Flush Assist */
-#define HID0_LRSTK      (1<<4)          /* Link register stack - 745x */
-#define HID0_BTIC       (1<<5)          /* Branch Target Instr Cache Enable */
-#define HID0_ABE        (1<<3)          /* Address Broadcast Enable */
-#define HID0_FOLD       (1<<3)          /* Branch Folding enable - 745x */
-#define HID0_BHTE       (1<<2)          /* Branch History Table Enable */
-#define HID0_BTCD       (1<<1)          /* Branch target cache disable */
-#define HID0_NOPDST     (1<<1)          /* No-op dst, dstt, etc. instr. */
-#define HID0_NOPTI      (1<<0)          /* No-op dcbt and dcbst instr. */
-
-#define SPRN_HID1       0x3F1           /* Hardware Implementation Register 1 */
-#define HID1_EMCP       (1<<31)         /* 7450 Machine Check Pin Enable */
-#define HID1_DFS        (1<<22)         /* 7447A Dynamic Frequency Scaling */
-#define HID1_PC0        (1<<16)         /* 7450 PLL_CFG[0] */
-#define HID1_PC1        (1<<15)         /* 7450 PLL_CFG[1] */
-#define HID1_PC2        (1<<14)         /* 7450 PLL_CFG[2] */
-#define HID1_PC3        (1<<13)         /* 7450 PLL_CFG[3] */
-#define HID1_SYNCBE     (1<<11)         /* 7450 ABE for sync, eieio */
-#define HID1_ABE        (1<<10)         /* 7450 Address Broadcast Enable */
-#define HID1_PS         (1<<16)         /* 750FX PLL selection */
-#define SPRN_HID2       0x3F8           /* Hardware Implementation Register 2 */
-#define SPRN_IABR       0x3F2   /* Instruction Address Breakpoint Register */
-#define SPRN_HID4       0x3F4           /* 970 HID4 */
-#define SPRN_HID5       0x3F6           /* 970 HID5 */
-#if !defined(SPRN_IAC1) && !defined(SPRN_IAC2)
-#define SPRN_IAC1       0x3F4           /* Instruction Address Compare 1 */
-#define SPRN_IAC2       0x3F5           /* Instruction Address Compare 2 */
-#endif
-#define SPRN_IBAT0L     0x211           /* Instruction BAT 0 Lower Register */
-#define SPRN_IBAT0U     0x210           /* Instruction BAT 0 Upper Register */
-#define SPRN_IBAT1L     0x213           /* Instruction BAT 1 Lower Register */
-#define SPRN_IBAT1U     0x212           /* Instruction BAT 1 Upper Register */
-#define SPRN_IBAT2L     0x215           /* Instruction BAT 2 Lower Register */
-#define SPRN_IBAT2U     0x214           /* Instruction BAT 2 Upper Register */
-#define SPRN_IBAT3L     0x217           /* Instruction BAT 3 Lower Register */
-#define SPRN_IBAT3U     0x216           /* Instruction BAT 3 Upper Register */
-#define SPRN_IBAT4L     0x231           /* Instruction BAT 4 Lower Register */
-#define SPRN_IBAT4U     0x230           /* Instruction BAT 4 Upper Register */
-#define SPRN_IBAT5L     0x233           /* Instruction BAT 5 Lower Register */
-#define SPRN_IBAT5U     0x232           /* Instruction BAT 5 Upper Register */
-#define SPRN_IBAT6L     0x235           /* Instruction BAT 6 Lower Register */
-#define SPRN_IBAT6U     0x234           /* Instruction BAT 6 Upper Register */
-#define SPRN_IBAT7L     0x237           /* Instruction BAT 7 Lower Register */
-#define SPRN_IBAT7U     0x236           /* Instruction BAT 7 Upper Register */
-#define SPRN_ICMP       0x3D5           /* Instruction TLB Compare Register */
-#define SPRN_ICTC       0x3FB   /* Instruction Cache Throttling Control Reg */
-#define SPRN_ICTRL      0x3F3   /* 1011 7450 icache and interrupt ctrl */
-#define ICTRL_EICE      0x08000000      /* enable icache parity errs */
-#define ICTRL_EDC       0x04000000      /* enable dcache parity errs */
-#define ICTRL_EICP      0x00000100      /* enable icache par. check */
-#define SPRN_IMISS      0x3D4           /* Instruction TLB Miss Register */
-#define SPRN_IMMR       0x27E           /* Internal Memory Map Register */
-#define SPRN_L2CR       0x3F9           /* Level 2 Cache Control Regsiter */
-#define SPRN_L2CR2      0x3f8
-#define L2CR_L2E                0x80000000      /* L2 enable */
-#define L2CR_L2PE               0x40000000      /* L2 parity enable */
-#define L2CR_L2SIZ_MASK         0x30000000      /* L2 size mask */
-#define L2CR_L2SIZ_256KB        0x10000000      /* L2 size 256KB */
-#define L2CR_L2SIZ_512KB        0x20000000      /* L2 size 512KB */
-#define L2CR_L2SIZ_1MB          0x30000000      /* L2 size 1MB */
-#define L2CR_L2CLK_MASK         0x0e000000      /* L2 clock mask */
-#define L2CR_L2CLK_DISABLED     0x00000000      /* L2 clock disabled */
-#define L2CR_L2CLK_DIV1         0x02000000      /* L2 clock / 1 */
-#define L2CR_L2CLK_DIV1_5       0x04000000      /* L2 clock / 1.5 */
-#define L2CR_L2CLK_DIV2         0x08000000      /* L2 clock / 2 */
-#define L2CR_L2CLK_DIV2_5       0x0a000000      /* L2 clock / 2.5 */
-#define L2CR_L2CLK_DIV3         0x0c000000      /* L2 clock / 3 */
-#define L2CR_L2RAM_MASK         0x01800000      /* L2 RAM type mask */
-#define L2CR_L2RAM_FLOW         0x00000000      /* L2 RAM flow through */
-#define L2CR_L2RAM_PIPE         0x01000000      /* L2 RAM pipelined */
-#define L2CR_L2RAM_PIPE_LW      0x01800000      /* L2 RAM pipelined latewr */
-#define L2CR_L2DO               0x00400000      /* L2 data only */
-#define L2CR_L2I                0x00200000      /* L2 global invalidate */
-#define L2CR_L2CTL              0x00100000      /* L2 RAM control */
-#define L2CR_L2WT               0x00080000      /* L2 write-through */
-#define L2CR_L2TS               0x00040000      /* L2 test support */
-#define L2CR_L2OH_MASK          0x00030000      /* L2 output hold mask */
-#define L2CR_L2OH_0_5           0x00000000      /* L2 output hold 0.5 ns */
-#define L2CR_L2OH_1_0           0x00010000      /* L2 output hold 1.0 ns */
-#define L2CR_L2SL               0x00008000      /* L2 DLL slow */
-#define L2CR_L2DF               0x00004000      /* L2 differential clock */
-#define L2CR_L2BYP              0x00002000      /* L2 DLL bypass */
-#define L2CR_L2IP               0x00000001      /* L2 GI in progress */
-#define L2CR_L2IO_745x          0x00100000      /* L2 instr. only (745x) */
-#define L2CR_L2DO_745x          0x00010000      /* L2 data only (745x) */
-#define L2CR_L2REP_745x         0x00001000      /* L2 repl. algorithm (745x) */
-#define L2CR_L2HWF_745x         0x00000800      /* L2 hardware flush (745x) */
-#define SPRN_L3CR               0x3FA   /* Level 3 Cache Control Regsiter */
-#define L3CR_L3E                0x80000000      /* L3 enable */
-#define L3CR_L3PE               0x40000000      /* L3 data parity enable */
-#define L3CR_L3APE              0x20000000      /* L3 addr parity enable */
-#define L3CR_L3SIZ              0x10000000      /* L3 size */
-#define L3CR_L3CLKEN            0x08000000      /* L3 clock enable */
-#define L3CR_L3RES              0x04000000      /* L3 special reserved bit */
-#define L3CR_L3CLKDIV           0x03800000      /* L3 clock divisor */
-#define L3CR_L3IO               0x00400000      /* L3 instruction only */
-#define L3CR_L3SPO              0x00040000      /* L3 sample point override */
-#define L3CR_L3CKSP             0x00030000      /* L3 clock sample point */
-#define L3CR_L3PSP              0x0000e000      /* L3 P-clock sample point */
-#define L3CR_L3REP              0x00001000      /* L3 replacement algorithm */
-#define L3CR_L3HWF              0x00000800      /* L3 hardware flush */
-#define L3CR_L3I                0x00000400      /* L3 global invalidate */
-#define L3CR_L3RT               0x00000300      /* L3 SRAM type */
-#define L3CR_L3NIRCA            0x00000080      /* L3 non-integer ratio clock adj. */
-#define L3CR_L3DO               0x00000040      /* L3 data only mode */
-#define L3CR_PMEN               0x00000004      /* L3 private memory enable */
-#define L3CR_PMSIZ              0x00000001      /* L3 private memory size */
-#define SPRN_MSSCR0     0x3f6   /* Memory Subsystem Control Register 0 */
-#define SPRN_MSSSR0     0x3f7   /* Memory Subsystem Status Register 1 */
-#define SPRN_LDSTCR     0x3f8   /* Load/Store control register */
-#define SPRN_LDSTDB     0x3f4   /* */
-#define SPRN_LR         0x008   /* Link Register */
-#define SPRN_MMCR0      0x3B8   /* Monitor Mode Control Register 0 */
-#define SPRN_MMCR1      0x3BC   /* Monitor Mode Control Register 1 */
-#ifndef SPRN_PIR
-#define SPRN_PIR        0x3FF   /* Processor Identification Register */
-#endif
-#define SPRN_PMC1       0x3B9   /* Performance Counter Register 1 */
-#define SPRN_PMC2       0x3BA   /* Performance Counter Register 2 */
-#define SPRN_PMC3       0x3BD   /* Performance Counter Register 3 */
-#define SPRN_PMC4       0x3BE   /* Performance Counter Register 4 */
-#define SPRN_PTEHI      0x3D5   /* 981 7450 PTE HI word (S/W TLB load) */
-#define SPRN_PTELO      0x3D6   /* 982 7450 PTE LO word (S/W TLB load) */
-#define SPRN_PVR        0x11F   /* Processor Version Register */
-#define SPRN_RPA        0x3D6   /* Required Physical Address Register */
-#define SPRN_SDA        0x3BF   /* Sampled Data Address Register */
-#define SPRN_SDR1       0x019   /* MMU Hash Base Register */
-#define SPRN_SIA        0x3BB   /* Sampled Instruction Address Register */
-#define SPRN_SPRG0      0x110   /* Special Purpose Register General 0 */
-#define SPRN_SPRG1      0x111   /* Special Purpose Register General 1 */
-#define SPRN_SPRG2      0x112   /* Special Purpose Register General 2 */
-#define SPRN_SPRG3      0x113   /* Special Purpose Register General 3 */
-#define SPRN_SPRG4      0x114   /* Special Purpose Register General 4 */
-#define SPRN_SPRG5      0x115   /* Special Purpose Register General 5 */
-#define SPRN_SPRG6      0x116   /* Special Purpose Register General 6 */
-#define SPRN_SPRG7      0x117   /* Special Purpose Register General 7 */
-#define SPRN_SRR0       0x01A   /* Save/Restore Register 0 */
-#define SPRN_SRR1       0x01B   /* Save/Restore Register 1 */
-#ifndef SPRN_SVR
-#define SPRN_SVR        0x11E   /* System Version Register */
-#endif
-#define SPRN_THRM1      0x3FC           /* Thermal Management Register 1 */
-/* these bits were defined in inverted endian sense originally, ugh, confusing */
-#define THRM1_TIN       (1 << 31)
-#define THRM1_TIV       (1 << 30)
-#define THRM1_THRES(x)  ((x&0x7f)<<23)
-#define THRM3_SITV(x)   ((x&0x3fff)<<1)
-#define THRM1_TID       (1<<2)
-#define THRM1_TIE       (1<<1)
-#define THRM1_V         (1<<0)
-#define SPRN_THRM2      0x3FD           /* Thermal Management Register 2 */
-#define SPRN_THRM3      0x3FE           /* Thermal Management Register 3 */
-#define THRM3_E         (1<<0)
-#define SPRN_TLBMISS    0x3D4           /* 980 7450 TLB Miss Register */
-#define SPRN_UMMCR0     0x3A8   /* User Monitor Mode Control Register 0 */
-#define SPRN_UMMCR1     0x3AC   /* User Monitor Mode Control Register 0 */
-#define SPRN_UPMC1      0x3A9   /* User Performance Counter Register 1 */
-#define SPRN_UPMC2      0x3AA   /* User Performance Counter Register 2 */
-#define SPRN_UPMC3      0x3AD   /* User Performance Counter Register 3 */
-#define SPRN_UPMC4      0x3AE   /* User Performance Counter Register 4 */
-#define SPRN_USIA       0x3AB   /* User Sampled Instruction Address Register */
-#define SPRN_VRSAVE     0x100   /* Vector Register Save Register */
-#define SPRN_XER        0x001   /* Fixed Point Exception Register */
-
-/* Bit definitions for MMCR0 and PMC1 / PMC2. */
-#define MMCR0_PMC1_CYCLES       (1 << 7)
-#define MMCR0_PMC1_ICACHEMISS   (5 << 7)
-#define MMCR0_PMC1_DTLB         (6 << 7)
-#define MMCR0_PMC2_DCACHEMISS   0x6
-#define MMCR0_PMC2_CYCLES       0x1
-#define MMCR0_PMC2_ITLB         0x7
-#define MMCR0_PMC2_LOADMISSTIME 0x5
-#define MMCR0_PMXE      (1 << 26)
-
-/* Processor Version Register */
-
-/* Processor Version Register (PVR) field extraction */
-
-#define PVR_VER(pvr)    (((pvr) >>  16) & 0xFFFF)       /* Version field */
-#define PVR_REV(pvr)    (((pvr) >>   0) & 0xFFFF)       /* Revison field */
-
-/*
- * IBM has further subdivided the standard PowerPC 16-bit version and
- * revision subfields of the PVR for the PowerPC 403s into the following:
- */
-
-#define PVR_FAM(pvr)    (((pvr) >> 20) & 0xFFF) /* Family field */
-#define PVR_MEM(pvr)    (((pvr) >> 16) & 0xF)   /* Member field */
-#define PVR_CORE(pvr)   (((pvr) >> 12) & 0xF)   /* Core field */
-#define PVR_CFG(pvr)    (((pvr) >>  8) & 0xF)   /* Configuration field */
-#define PVR_MAJ(pvr)    (((pvr) >>  4) & 0xF)   /* Major revision field */
-#define PVR_MIN(pvr)    (((pvr) >>  0) & 0xF)   /* Minor revision field */
-
-/* Processor Version Numbers */
-
-#define PVR_403GA       0x00200000
-#define PVR_403GB       0x00200100
-#define PVR_403GC       0x00200200
-#define PVR_403GCX      0x00201400
-#define PVR_405GP       0x40110000
-#define PVR_STB03XXX    0x40310000
-#define PVR_NP405H      0x41410000
-#define PVR_NP405L      0x41610000
-#define PVR_601         0x00010000
-#define PVR_602         0x00050000
-#define PVR_603         0x00030000
-#define PVR_603e        0x00060000
-#define PVR_603ev       0x00070000
-#define PVR_603r        0x00071000
-#define PVR_604         0x00040000
-#define PVR_604e        0x00090000
-#define PVR_604r        0x000A0000
-#define PVR_620         0x00140000
-#define PVR_740         0x00080000
-#define PVR_750         PVR_740
-#define PVR_740P        0x10080000
-#define PVR_750P        PVR_740P
-#define PVR_7400        0x000C0000
-#define PVR_7410        0x800C0000
-#define PVR_7450        0x80000000
-#define PVR_8540        0x80200000
-#define PVR_8560        0x80200000
-/*
- * For the 8xx processors, all of them report the same PVR family for
- * the PowerPC core. The various versions of these processors must be
- * differentiated by the version number in the Communication Processor
- * Module (CPM).
- */
-#define PVR_821         0x00500000
-#define PVR_823         PVR_821
-#define PVR_850         PVR_821
-#define PVR_860         PVR_821
-#define PVR_8240        0x00810100
-#define PVR_8245        0x80811014
-#define PVR_8260        PVR_8240
-
-#if 0
-/* Segment Registers */
-#define SR0     0
-#define SR1     1
-#define SR2     2
-#define SR3     3
-#define SR4     4
-#define SR5     5
-#define SR6     6
-#define SR7     7
-#define SR8     8
-#define SR9     9
-#define SR10    10
-#define SR11    11
-#define SR12    12
-#define SR13    13
-#define SR14    14
-#define SR15    15
-#endif
-
-/* Macros for setting and retrieving special purpose registers */
-#ifndef __ASSEMBLY__
-#define mfmsr()         ({unsigned int rval; \
-                        asm volatile("mfmsr %0" : "=r" (rval)); rval;})
-#define mtmsr(v)        asm volatile("mtmsr %0" : : "r" (v))
-
-#define mfspr(rn)       ({unsigned int rval; \
-                        asm volatile("mfspr %0," __stringify(rn) \
-                                : "=r" (rval)); rval;})
-#define mtspr(rn, v)    asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v))
-
-#define mfsrin(v)       ({unsigned int rval; \
-                        asm volatile("mfsrin %0,%1" : "=r" (rval) : "r" (v)); \
-                                        rval;})
-
-#define proc_trap()     asm volatile("trap")
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_PPC_REGS_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/rio.h b/include/asm-ppc/rio.h
new file mode 100644
index 000000000000..0018bf80cb25
--- /dev/null
+++ b/include/asm-ppc/rio.h
@@ -0,0 +1,18 @@
+/*
+ * RapidIO architecture support
+ *
+ * Copyright 2005 MontaVista Software, Inc.
+ * Matt Porter <mporter@kernel.crashing.org>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef ASM_PPC_RIO_H
+#define ASM_PPC_RIO_H
+
+extern void platform_rio_init(void);
+
+#endif                          /* ASM_PPC_RIO_H */
diff --git a/include/asm-ppc/rwsem.h b/include/asm-ppc/rwsem.h
deleted file mode 100644
index 3e738f483c11..000000000000
--- a/include/asm-ppc/rwsem.h
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * include/asm-ppc/rwsem.h: R/W semaphores for PPC using the stuff
- * in lib/rwsem.c.  Adapted largely from include/asm-i386/rwsem.h
- * by Paul Mackerras <paulus@samba.org>.
- */
-
-#ifndef _PPC_RWSEM_H
-#define _PPC_RWSEM_H
-
-#ifdef __KERNEL__
-#include <linux/list.h>
-#include <linux/spinlock.h>
-#include <asm/atomic.h>
-#include <asm/system.h>
-
-/*
- * the semaphore definition
- */
-struct rw_semaphore {
-        /* XXX this should be able to be an atomic_t  -- paulus */
-        signed long             count;
-#define RWSEM_UNLOCKED_VALUE            0x00000000
-#define RWSEM_ACTIVE_BIAS               0x00000001
-#define RWSEM_ACTIVE_MASK               0x0000ffff
-#define RWSEM_WAITING_BIAS              (-0x00010000)
-#define RWSEM_ACTIVE_READ_BIAS          RWSEM_ACTIVE_BIAS
-#define RWSEM_ACTIVE_WRITE_BIAS         (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
-        spinlock_t              wait_lock;
-        struct list_head        wait_list;
-#if RWSEM_DEBUG
-        int                     debug;
-#endif
-};
-
-/*
- * initialisation
- */
-#if RWSEM_DEBUG
-#define __RWSEM_DEBUG_INIT      , 0
-#else
-#define __RWSEM_DEBUG_INIT      /* */
-#endif
-
-#define __RWSEM_INITIALIZER(name) \
-        { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
-          LIST_HEAD_INIT((name).wait_list) \
-          __RWSEM_DEBUG_INIT }
-
-#define DECLARE_RWSEM(name)             \
-        struct rw_semaphore name = __RWSEM_INITIALIZER(name)
-
-extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
-extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
-extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
-extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
-
-static inline void init_rwsem(struct rw_semaphore *sem)
-{
-        sem->count = RWSEM_UNLOCKED_VALUE;
-        spin_lock_init(&sem->wait_lock);
-        INIT_LIST_HEAD(&sem->wait_list);
-#if RWSEM_DEBUG
-        sem->debug = 0;
-#endif
-}
-
-/*
- * lock for reading
- */
-static inline void __down_read(struct rw_semaphore *sem)
-{
-        if (atomic_inc_return((atomic_t *)(&sem->count)) > 0)
-                smp_wmb();
-        else
-                rwsem_down_read_failed(sem);
-}
-
-static inline int __down_read_trylock(struct rw_semaphore *sem)
-{
-        int tmp;
-
-        while ((tmp = sem->count) >= 0) {
-                if (tmp == cmpxchg(&sem->count, tmp,
-                                   tmp + RWSEM_ACTIVE_READ_BIAS)) {
-                        smp_wmb();
-                        return 1;
-                }
-        }
-        return 0;
-}
-
-/*
- * lock for writing
- */
-static inline void __down_write(struct rw_semaphore *sem)
-{
-        int tmp;
-
-        tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS,
-                                (atomic_t *)(&sem->count));
-        if (tmp == RWSEM_ACTIVE_WRITE_BIAS)
-                smp_wmb();
-        else
-                rwsem_down_write_failed(sem);
-}
-
-static inline int __down_write_trylock(struct rw_semaphore *sem)
-{
-        int tmp;
-
-        tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
-                      RWSEM_ACTIVE_WRITE_BIAS);
-        smp_wmb();
-        return tmp == RWSEM_UNLOCKED_VALUE;
-}
-
-/*
- * unlock after reading
- */
-static inline void __up_read(struct rw_semaphore *sem)
-{
-        int tmp;
-
-        smp_wmb();
-        tmp = atomic_dec_return((atomic_t *)(&sem->count));
-        if (tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0)
-                rwsem_wake(sem);
-}
-
-/*
- * unlock after writing
- */
-static inline void __up_write(struct rw_semaphore *sem)
-{
-        smp_wmb();
-        if (atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
-                              (atomic_t *)(&sem->count)) < 0)
-                rwsem_wake(sem);
-}
-
-/*
- * implement atomic add functionality
- */
-static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
-{
-        atomic_add(delta, (atomic_t *)(&sem->count));
-}
-
-/*
- * downgrade write lock to read lock
- */
-static inline void __downgrade_write(struct rw_semaphore *sem)
-{
-        int tmp;
-
-        smp_wmb();
-        tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count));
-        if (tmp < 0)
-                rwsem_downgrade_wake(sem);
-}
-
-/*
- * implement exchange and add functionality
- */
-static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
-{
-        smp_mb();
-        return atomic_add_return(delta, (atomic_t *)(&sem->count));
-}
-
-#endif /* __KERNEL__ */
-#endif /* _PPC_RWSEM_XADD_H */
diff --git a/include/asm-ppc/scatterlist.h b/include/asm-ppc/scatterlist.h
deleted file mode 100644
index f21f18f56548..000000000000
--- a/include/asm-ppc/scatterlist.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _PPC_SCATTERLIST_H
-#define _PPC_SCATTERLIST_H
-
-#include <asm/dma.h>
-
-struct scatterlist {
-        struct page     *page;
-        unsigned int    offset;
-        dma_addr_t      dma_address;
-        unsigned int    length;
-};
-
-/*
- * These macros should be used after a pci_map_sg call has been done
- * to get bus addresses of each of the SG entries and their lengths.
- * You should only work with the number of sg entries pci_map_sg
- * returns, or alternatively stop on the first sg_dma_len(sg) which
- * is 0.
- */
-#define sg_dma_address(sg)      ((sg)->dma_address)
-#define sg_dma_len(sg)          ((sg)->length)
-
-#endif /* !(_PPC_SCATTERLIST_H) */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/seccomp.h b/include/asm-ppc/seccomp.h
deleted file mode 100644
index 666c4da96d87..000000000000
--- a/include/asm-ppc/seccomp.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef _ASM_SECCOMP_H
-
-#include <linux/unistd.h>
-
-#define __NR_seccomp_read __NR_read
-#define __NR_seccomp_write __NR_write
-#define __NR_seccomp_exit __NR_exit
-#define __NR_seccomp_sigreturn __NR_rt_sigreturn
-
-#endif /* _ASM_SECCOMP_H */
diff --git a/include/asm-ppc/sections.h b/include/asm-ppc/sections.h
deleted file mode 100644
index ba8f43ac9bf3..000000000000
--- a/include/asm-ppc/sections.h
+++ /dev/null
@@ -1,33 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _PPC_SECTIONS_H
-#define _PPC_SECTIONS_H
-
-#include <asm-generic/sections.h>
-
-#define __pmac __attribute__ ((__section__ (".pmac.text")))
-#define __pmacdata __attribute__ ((__section__ (".pmac.data")))
-#define __pmacfunc(__argpmac) \
-        __argpmac __pmac; \
-        __argpmac
-        
-#define __prep __attribute__ ((__section__ (".prep.text")))
-#define __prepdata __attribute__ ((__section__ (".prep.data")))
-#define __prepfunc(__argprep) \
-        __argprep __prep; \
-        __argprep
-
-#define __chrp __attribute__ ((__section__ (".chrp.text")))
-#define __chrpdata __attribute__ ((__section__ (".chrp.data")))
-#define __chrpfunc(__argchrp) \
-        __argchrp __chrp; \
-        __argchrp
-
-/* this is actually just common chrp/pmac code, not OF code -- Cort */
-#define __openfirmware __attribute__ ((__section__ (".openfirmware.text")))
-#define __openfirmwaredata __attribute__ ((__section__ (".openfirmware.data")))
-#define __openfirmwarefunc(__argopenfirmware) \
-        __argopenfirmware __openfirmware; \
-        __argopenfirmware
-        
-#endif /* _PPC_SECTIONS_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/semaphore.h b/include/asm-ppc/semaphore.h
deleted file mode 100644
index 89e6e73be08c..000000000000
--- a/include/asm-ppc/semaphore.h
+++ /dev/null
@@ -1,111 +0,0 @@
-#ifndef _PPC_SEMAPHORE_H
-#define _PPC_SEMAPHORE_H
-
-/*
- * Swiped from asm-sparc/semaphore.h and modified
- * -- Cort (cort@cs.nmt.edu)
- *
- * Stole some rw spinlock-based semaphore stuff from asm-alpha/semaphore.h
- * -- Ani Joshi (ajoshi@unixbox.com)
- *
- * Remove spinlock-based RW semaphores; RW semaphore definitions are
- * now in rwsem.h and we use the generic lib/rwsem.c implementation.
- * Rework semaphores to use atomic_dec_if_positive.
- * -- Paul Mackerras (paulus@samba.org)
- */
-
-#ifdef __KERNEL__
-
-#include <asm/atomic.h>
-#include <asm/system.h>
-#include <linux/wait.h>
-#include <linux/rwsem.h>
-
-struct semaphore {
-        /*
-         * Note that any negative value of count is equivalent to 0,
-         * but additionally indicates that some process(es) might be
-         * sleeping on `wait'.
-         */
-        atomic_t count;
-        wait_queue_head_t wait;
-};
-
-#define __SEMAPHORE_INITIALIZER(name, n)                                \
-{                                                                       \
-        .count          = ATOMIC_INIT(n),                               \
-        .wait           = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait)    \
-}
-
-#define __MUTEX_INITIALIZER(name) \
-        __SEMAPHORE_INITIALIZER(name, 1)
-
-#define __DECLARE_SEMAPHORE_GENERIC(name, count) \
-        struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
-
-#define DECLARE_MUTEX(name)             __DECLARE_SEMAPHORE_GENERIC(name, 1)
-#define DECLARE_MUTEX_LOCKED(name)      __DECLARE_SEMAPHORE_GENERIC(name, 0)
-
-static inline void sema_init (struct semaphore *sem, int val)
-{
-        atomic_set(&sem->count, val);
-        init_waitqueue_head(&sem->wait);
-}
-
-static inline void init_MUTEX (struct semaphore *sem)
-{
-        sema_init(sem, 1);
-}
-
-static inline void init_MUTEX_LOCKED (struct semaphore *sem)
-{
-        sema_init(sem, 0);
-}
-
-extern void __down(struct semaphore * sem);
-extern int  __down_interruptible(struct semaphore * sem);
-extern void __up(struct semaphore * sem);
-
-extern inline void down(struct semaphore * sem)
-{
-        might_sleep();
-
-        /*
-         * Try to get the semaphore, take the slow path if we fail.
-         */
-        if (atomic_dec_return(&sem->count) < 0)
-                __down(sem);
-        smp_wmb();
-}
-
-extern inline int down_interruptible(struct semaphore * sem)
-{
-        int ret = 0;
-
-        might_sleep();
-
-        if (atomic_dec_return(&sem->count) < 0)
-                ret = __down_interruptible(sem);
-        smp_wmb();
-        return ret;
-}
-
-extern inline int down_trylock(struct semaphore * sem)
-{
-        int ret;
-
-        ret = atomic_dec_if_positive(&sem->count) < 0;
-        smp_wmb();
-        return ret;
-}
-
-extern inline void up(struct semaphore * sem)
-{
-        smp_wmb();
-        if (atomic_inc_return(&sem->count) <= 0)
-                __up(sem);
-}
-
-#endif /* __KERNEL__ */
-
-#endif /* !(_PPC_SEMAPHORE_H) */
diff --git a/include/asm-ppc/sigcontext.h b/include/asm-ppc/sigcontext.h
deleted file mode 100644
index b7a417e0a921..000000000000
--- a/include/asm-ppc/sigcontext.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef _ASM_PPC_SIGCONTEXT_H
-#define _ASM_PPC_SIGCONTEXT_H
-
-#include <asm/ptrace.h>
-#include <linux/compiler.h>
-
-struct sigcontext {
-        unsigned long   _unused[4];
-        int             signal;
-        unsigned long   handler;
-        unsigned long   oldmask;
-        struct pt_regs  __user *regs;
-};
-
-#endif
diff --git a/include/asm-ppc/signal.h b/include/asm-ppc/signal.h
deleted file mode 100644
index caf6ede3710f..000000000000
--- a/include/asm-ppc/signal.h
+++ /dev/null
@@ -1,153 +0,0 @@
-#ifndef _ASMPPC_SIGNAL_H
-#define _ASMPPC_SIGNAL_H
-
-#ifdef __KERNEL__
-#include <linux/types.h>
-#endif /* __KERNEL__ */
-
-/* Avoid too many header ordering problems.  */
-struct siginfo;
-
-/* Most things should be clean enough to redefine this at will, if care
-   is taken to make libc match.  */
-
-#define _NSIG           64
-#define _NSIG_BPW       32
-#define _NSIG_WORDS     (_NSIG / _NSIG_BPW)
-
-typedef unsigned long old_sigset_t;             /* at least 32 bits */
-
-typedef struct {
-        unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-
-#define SIGHUP           1
-#define SIGINT           2
-#define SIGQUIT          3
-#define SIGILL           4
-#define SIGTRAP          5
-#define SIGABRT          6
-#define SIGIOT           6
-#define SIGBUS           7
-#define SIGFPE           8
-#define SIGKILL          9
-#define SIGUSR1         10
-#define SIGSEGV         11
-#define SIGUSR2         12
-#define SIGPIPE         13
-#define SIGALRM         14
-#define SIGTERM         15
-#define SIGSTKFLT       16
-#define SIGCHLD         17
-#define SIGCONT         18
-#define SIGSTOP         19
-#define SIGTSTP         20
-#define SIGTTIN         21
-#define SIGTTOU         22
-#define SIGURG          23
-#define SIGXCPU         24
-#define SIGXFSZ         25
-#define SIGVTALRM       26
-#define SIGPROF         27
-#define SIGWINCH        28
-#define SIGIO           29
-#define SIGPOLL         SIGIO
-/*
-#define SIGLOST         29
-*/
-#define SIGPWR          30
-#define SIGSYS          31
-#define SIGUNUSED       31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN        32
-#define SIGRTMAX        _NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK is not currently supported, but will allow sigaltstack(2).
- * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP    0x00000001
-#define SA_NOCLDWAIT    0x00000002
-#define SA_SIGINFO      0x00000004
-#define SA_ONSTACK      0x08000000
-#define SA_RESTART      0x10000000
-#define SA_NODEFER      0x40000000
-#define SA_RESETHAND    0x80000000
-
-#define SA_NOMASK       SA_NODEFER
-#define SA_ONESHOT      SA_RESETHAND
-#define SA_INTERRUPT    0x20000000 /* dummy -- ignored */
-
-#define SA_RESTORER     0x04000000
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK      1
-#define SS_DISABLE      2
-
-#define MINSIGSTKSZ     2048
-#define SIGSTKSZ        8192
-
-#include <asm-generic/signal.h>
-
-struct old_sigaction {
-        __sighandler_t sa_handler;
-        old_sigset_t sa_mask;
-        unsigned long sa_flags;
-        __sigrestore_t sa_restorer;
-};
-
-struct sigaction {
-        __sighandler_t sa_handler;
-        unsigned long sa_flags;
-        __sigrestore_t sa_restorer;
-        sigset_t sa_mask;               /* mask last for extensibility */
-};
-
-struct k_sigaction {
-        struct sigaction sa;
-};
-
-typedef struct sigaltstack {
-        void __user *ss_sp;
-        int ss_flags;
-        size_t ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
-#include <asm/sigcontext.h>
-#define ptrace_signal_deliver(regs, cookie) do { } while (0)
-#endif /* __KERNEL__ */
-
-/*
- * These are parameters to dbg_sigreturn syscall.  They enable or
- * disable certain debugging things that can be done from signal
- * handlers.  The dbg_sigreturn syscall *must* be called from a
- * SA_SIGINFO signal so the ucontext can be passed to it.  It takes an
- * array of struct sig_dbg_op, which has the debug operations to
- * perform before returning from the signal.
- */
-struct sig_dbg_op {
-        int dbg_type;
-        unsigned long dbg_value;
-};
-
-/* Enable or disable single-stepping.  The value sets the state. */
-#define SIG_DBG_SINGLE_STEPPING         1
-
-/* Enable or disable branch tracing.  The value sets the state. */
-#define SIG_DBG_BRANCH_TRACING          2
-
-#endif
diff --git a/include/asm-ppc/smp.h b/include/asm-ppc/smp.h
index 829481c0a9dc..30e9268a888c 100644
--- a/include/asm-ppc/smp.h
+++ b/include/asm-ppc/smp.h
@@ -35,6 +35,7 @@ extern cpumask_t cpu_possible_map;
 extern unsigned long smp_proc_in_lock[];
 extern volatile unsigned long cpu_callin_map[];
 extern int smp_tb_synchronized;
+extern struct smp_ops_t *smp_ops;
 
 extern void smp_send_tlb_invalidate(int);
 extern void smp_send_xmon_break(int cpu);
@@ -45,32 +46,31 @@ extern int __cpu_disable(void);
 extern void __cpu_die(unsigned int cpu);
 extern void cpu_die(void) __attribute__((noreturn));
 
-#define NO_PROC_ID              0xFF            /* No processor magic marker */
-#define PROC_CHANGE_PENALTY     20
-
 #define raw_smp_processor_id()  (current_thread_info()->cpu)
 
 extern int __cpu_up(unsigned int cpu);
 
 extern int smp_hw_index[];
-#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
-
-struct klock_info_struct {
-        unsigned long kernel_flag;
-        unsigned char akp;
-};
-
-extern struct klock_info_struct klock_info;
-#define KLOCK_HELD       0xffffffff
-#define KLOCK_CLEAR      0x0
-
+#define hard_smp_processor_id()         (smp_hw_index[smp_processor_id()])
+#define get_hard_smp_processor_id(cpu)  (smp_hw_index[(cpu)])
+#define set_hard_smp_processor_id(cpu, phys)\
+                                        (smp_hw_index[(cpu)] = (phys))
+ 
 #endif /* __ASSEMBLY__ */
 
 #else /* !(CONFIG_SMP) */
 
 static inline void cpu_die(void) { }
+#define get_hard_smp_processor_id(cpu) 0
+#define set_hard_smp_processor_id(cpu, phys)
+#define hard_smp_processor_id() 0
 
 #endif /* !(CONFIG_SMP) */
 
+#ifndef __ASSEMBLY__
+extern int boot_cpuid;
+extern int boot_cpuid_phys;
+#endif
+
 #endif /* !(_PPC_SMP_H) */
 #endif /* __KERNEL__ */
diff --git a/include/asm-ppc/spinlock.h b/include/asm-ppc/spinlock.h
index 20edcf2a6e0c..5c64b75f0295 100644
--- a/include/asm-ppc/spinlock.h
+++ b/include/asm-ppc/spinlock.h
@@ -9,7 +9,7 @@
  * (the type definitions are in asm/raw_spinlock_types.h)
  */
 
-#define __raw_spin_is_locked(x)         ((x)->lock != 0)
+#define __raw_spin_is_locked(x)         ((x)->slock != 0)
 #define __raw_spin_unlock_wait(lock) \
         do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
 #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
@@ -31,17 +31,17 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
         bne-    2b\n\
         isync"
         : "=&r"(tmp)
-        : "r"(&lock->lock), "r"(1)
+        : "r"(&lock->slock), "r"(1)
         : "cr0", "memory");
 }
 
 static inline void __raw_spin_unlock(raw_spinlock_t *lock)
 {
         __asm__ __volatile__("eieio     # __raw_spin_unlock": : :"memory");
-        lock->lock = 0;
+        lock->slock = 0;
 }
 
-#define __raw_spin_trylock(l) (!test_and_set_bit(0,&(l)->lock))
+#define __raw_spin_trylock(l) (!test_and_set_bit(0,(volatile unsigned long *)(&(l)->slock)))
 
 /*
  * Read-write spinlocks, allowing multiple readers
diff --git a/include/asm-ppc/spinlock_types.h b/include/asm-ppc/spinlock_types.h
deleted file mode 100644
index 7919ccc75b8a..000000000000
--- a/include/asm-ppc/spinlock_types.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef __ASM_SPINLOCK_TYPES_H
-#define __ASM_SPINLOCK_TYPES_H
-
-#ifndef __LINUX_SPINLOCK_TYPES_H
-# error "please don't include this file directly"
-#endif
-
-typedef struct {
-        volatile unsigned long lock;
-} raw_spinlock_t;
-
-#define __RAW_SPIN_LOCK_UNLOCKED        { 0 }
-
-typedef struct {
-        volatile signed int lock;
-} raw_rwlock_t;
-
-#define __RAW_RW_LOCK_UNLOCKED          { 0 }
-
-#endif
diff --git a/include/asm-ppc/stat.h b/include/asm-ppc/stat.h
deleted file mode 100644
index cadb34298496..000000000000
--- a/include/asm-ppc/stat.h
+++ /dev/null
@@ -1,69 +0,0 @@
-#ifndef _PPC_STAT_H
-#define _PPC_STAT_H
-
-#ifdef __KERNEL__
-#include <linux/types.h>
-#endif /* __KERNEL__ */
-
-struct __old_kernel_stat {
-        unsigned short st_dev;
-        unsigned short st_ino;
-        unsigned short st_mode;
-        unsigned short st_nlink;
-        unsigned short st_uid;
-        unsigned short st_gid;
-        unsigned short st_rdev;
-        unsigned long  st_size;
-        unsigned long  st_atime;
-        unsigned long  st_mtime;
-        unsigned long  st_ctime;
-};
-
-#define STAT_HAVE_NSEC 1
-
-struct stat {
-        unsigned        st_dev;
-        ino_t           st_ino;
-        mode_t          st_mode;
-        nlink_t         st_nlink;
-        uid_t           st_uid;
-        gid_t           st_gid;
-        unsigned        st_rdev;
-        off_t           st_size;
-        unsigned long   st_blksize;
-        unsigned long   st_blocks;
-        unsigned long   st_atime;
-        unsigned long   st_atime_nsec;
-        unsigned long   st_mtime;
-        unsigned long   st_mtime_nsec;
-        unsigned long   st_ctime;
-        unsigned long   st_ctime_nsec;
-        unsigned long   __unused4;
-        unsigned long   __unused5;
-};
-
-/* This matches struct stat64 in glibc2.1.
- */
-struct stat64 {
-        unsigned long long st_dev;      /* Device.  */
-        unsigned long long st_ino;      /* File serial number.  */
-        unsigned int st_mode;           /* File mode.  */
-        unsigned int st_nlink;          /* Link count.  */
-        unsigned int st_uid;            /* User ID of the file's owner.  */
-        unsigned int st_gid;            /* Group ID of the file's group. */
-        unsigned long long st_rdev;     /* Device number, if device.  */
-        unsigned short int __pad2;
-        long long st_size;              /* Size of file, in bytes.  */
-        long st_blksize;                /* Optimal block size for I/O.  */
-
-        long long st_blocks;            /* Number 512-byte blocks allocated. */
-        long st_atime;                  /* Time of last access.  */
-        unsigned long st_atime_nsec;
-        long st_mtime;                  /* Time of last modification.  */
-        unsigned long int st_mtime_nsec;
-        long st_ctime;                  /* Time of last status change.  */
-        unsigned long int st_ctime_nsec;
-        unsigned long int __unused4;
-        unsigned long int __unused5;
-};
-#endif
diff --git a/include/asm-ppc/statfs.h b/include/asm-ppc/statfs.h
deleted file mode 100644
index 807c69954a1b..000000000000
--- a/include/asm-ppc/statfs.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef _PPC_STATFS_H
-#define _PPC_STATFS_H
-
-#include <asm-generic/statfs.h>
-#endif
-
-
-
diff --git a/include/asm-ppc/system.h b/include/asm-ppc/system.h
index d754ab570fe0..bd99cb53a19f 100644
--- a/include/asm-ppc/system.h
+++ b/include/asm-ppc/system.h
@@ -70,25 +70,47 @@ extern void _set_L3CR(unsigned long);
 #endif
 extern void via_cuda_init(void);
 extern void pmac_nvram_init(void);
+extern void chrp_nvram_init(void);
 extern void read_rtc_time(void);
 extern void pmac_find_display(void);
 extern void giveup_fpu(struct task_struct *);
 extern void enable_kernel_fp(void);
+extern void flush_fp_to_thread(struct task_struct *);
 extern void enable_kernel_altivec(void);
 extern void giveup_altivec(struct task_struct *);
 extern void load_up_altivec(struct task_struct *);
+extern int emulate_altivec(struct pt_regs *);
 extern void giveup_spe(struct task_struct *);
 extern void load_up_spe(struct task_struct *);
 extern int fix_alignment(struct pt_regs *);
-extern void cvt_fd(float *from, double *to, unsigned long *fpscr);
-extern void cvt_df(double *from, float *to, unsigned long *fpscr);
+extern void cvt_fd(float *from, double *to, struct thread_struct *thread);
+extern void cvt_df(double *from, float *to, struct thread_struct *thread);
+
+#ifdef CONFIG_ALTIVEC
+extern void flush_altivec_to_thread(struct task_struct *);
+#else
+static inline void flush_altivec_to_thread(struct task_struct *t)
+{
+}
+#endif
+
+#ifdef CONFIG_SPE
+extern void flush_spe_to_thread(struct task_struct *);
+#else
+static inline void flush_spe_to_thread(struct task_struct *t)
+{
+}
+#endif
+
 extern int call_rtas(const char *, int, int, unsigned long *, ...);
 extern void cacheable_memzero(void *p, unsigned int nb);
 extern void *cacheable_memcpy(void *, const void *, unsigned int);
 extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
 extern void bad_page_fault(struct pt_regs *, unsigned long, int);
-extern void die(const char *, struct pt_regs *, long);
+extern int die(const char *, struct pt_regs *, long);
 extern void _exception(int, struct pt_regs *, int, unsigned long);
+void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
+
 #ifdef CONFIG_BOOKE_WDT
 extern u32 booke_wdt_enabled;
 extern u32 booke_wdt_period;
diff --git a/include/asm-ppc/thread_info.h b/include/asm-ppc/thread_info.h
deleted file mode 100644
index 27903db42efc..000000000000
--- a/include/asm-ppc/thread_info.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/* thread_info.h: PPC low-level thread information
- * adapted from the i386 version by Paul Mackerras
- *
- * Copyright (C) 2002  David Howells (dhowells@redhat.com)
- * - Incorporating suggestions made by Linus Torvalds and Dave Miller
- */
-
-#ifndef _ASM_THREAD_INFO_H
-#define _ASM_THREAD_INFO_H
-
-#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
-/*
- * low level task data.
- * If you change this, change the TI_* offsets below to match.
- */
-struct thread_info {
-        struct task_struct      *task;          /* main task structure */
-        struct exec_domain      *exec_domain;   /* execution domain */
-        unsigned long           flags;          /* low level flags */
-        unsigned long           local_flags;    /* non-racy flags */
-        int                     cpu;            /* cpu we're on */
-        int                     preempt_count;  /* 0 => preemptable,
-                                                   <0 => BUG */
-        struct restart_block    restart_block;
-};
-
-#define INIT_THREAD_INFO(tsk)                   \
-{                                               \
-        .task =         &tsk,                   \
-        .exec_domain =  &default_exec_domain,   \
-        .flags =        0,                      \
-        .local_flags =  0,                      \
-        .cpu =          0,                      \
-        .preempt_count = 1,                     \
-        .restart_block = {                      \
-                .fn = do_no_restart_syscall,    \
-        },                                      \
-}
-
-#define init_thread_info        (init_thread_union.thread_info)
-#define init_stack              (init_thread_union.stack)
-
-/*
- * macros/functions for gaining access to the thread information structure
- */
-
-/* how to get the thread information struct from C */
-static inline struct thread_info *current_thread_info(void)
-{
-        struct thread_info *ti;
-        __asm__("rlwinm %0,1,0,0,18" : "=r"(ti));
-        return ti;
-}
-
-/* thread information allocation */
-#define alloc_thread_info(tsk) ((struct thread_info *) \
-                                __get_free_pages(GFP_KERNEL, 1))
-#define free_thread_info(ti)    free_pages((unsigned long) (ti), 1)
-#define get_thread_info(ti)     get_task_struct((ti)->task)
-#define put_thread_info(ti)     put_task_struct((ti)->task)
-#endif /* __ASSEMBLY__ */
-
-/*
- * Size of kernel stack for each process.
- */
-#define THREAD_SIZE             8192    /* 2 pages */
-
-#define PREEMPT_ACTIVE          0x10000000
-
-/*
- * thread information flag bit numbers
- */
-#define TIF_SYSCALL_TRACE       0       /* syscall trace active */
-#define TIF_NOTIFY_RESUME       1       /* resumption notification requested */
-#define TIF_SIGPENDING          2       /* signal pending */
-#define TIF_NEED_RESCHED        3       /* rescheduling necessary */
-#define TIF_POLLING_NRFLAG      4       /* true if poll_idle() is polling
-                                           TIF_NEED_RESCHED */
-#define TIF_MEMDIE              5
-#define TIF_SYSCALL_AUDIT       6       /* syscall auditing active */
-#define TIF_SECCOMP             7      /* secure computing */
-
-/* as above, but as bit values */
-#define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
-#define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
-#define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
-#define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
-#define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
-#define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
-#define _TIF_SECCOMP            (1<<TIF_SECCOMP)
-
-#define _TIF_SYSCALL_T_OR_A     (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
-
-/*
- * Non racy (local) flags bit numbers
- */
-#define TIFL_FORCE_NOERROR      0       /* don't return error from current
-                                           syscall even if result < 0 */
-
-/* as above, but as bit values */
-#define _TIFL_FORCE_NOERROR     (1<<TIFL_FORCE_NOERROR)
-
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_THREAD_INFO_H */
diff --git a/include/asm-ppc/tlb.h b/include/asm-ppc/tlb.h
deleted file mode 100644
index 2c142c5d8584..000000000000
--- a/include/asm-ppc/tlb.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- *      TLB shootdown specifics for PPC
- *
- * Copyright (C) 2002 Paul Mackerras, IBM Corp.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef _PPC_TLB_H
-#define _PPC_TLB_H
-
-#include <linux/config.h>
-#include <asm/pgtable.h>
-#include <asm/pgalloc.h>
-#include <asm/tlbflush.h>
-#include <asm/page.h>
-#include <asm/mmu.h>
-
-#ifdef CONFIG_PPC_STD_MMU
-/* Classic PPC with hash-table based MMU... */
-
-struct mmu_gather;
-extern void tlb_flush(struct mmu_gather *tlb);
-
-/* Get the generic bits... */
-#include <asm-generic/tlb.h>
-
-/* Nothing needed here in fact... */
-#define tlb_start_vma(tlb, vma) do { } while (0)
-#define tlb_end_vma(tlb, vma)   do { } while (0)
-
-extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
-                             unsigned long address);
-
-static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
-                                        unsigned long address)
-{
-        if (pte_val(*ptep) & _PAGE_HASHPTE)
-                flush_hash_entry(tlb->mm, ptep, address);
-}
-
-#else
-/* Embedded PPC with software-loaded TLB, very simple... */
-
-#define tlb_start_vma(tlb, vma)         do { } while (0)
-#define tlb_end_vma(tlb, vma)           do { } while (0)
-#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
-#define tlb_flush(tlb)                  flush_tlb_mm((tlb)->mm)
-
-/* Get the generic bits... */
-#include <asm-generic/tlb.h>
-
-#endif /* CONFIG_PPC_STD_MMU */
-
-#endif /* __PPC_TLB_H */
diff --git a/include/asm-ppc/tlbflush.h b/include/asm-ppc/tlbflush.h
deleted file mode 100644
index 9afee4ffc835..000000000000
--- a/include/asm-ppc/tlbflush.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * include/asm-ppc/tlbflush.h
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- */
-#ifdef __KERNEL__
-#ifndef _PPC_TLBFLUSH_H
-#define _PPC_TLBFLUSH_H
-
-#include <linux/config.h>
-#include <linux/mm.h>
-
-extern void _tlbie(unsigned long address);
-extern void _tlbia(void);
-
-#if defined(CONFIG_4xx)
-
-#ifndef CONFIG_44x
-#define __tlbia()       asm volatile ("sync; tlbia; isync" : : : "memory")
-#else
-#define __tlbia         _tlbia
-#endif
-
-static inline void flush_tlb_mm(struct mm_struct *mm)
-        { __tlbia(); }
-static inline void flush_tlb_page(struct vm_area_struct *vma,
-                                unsigned long vmaddr)
-        { _tlbie(vmaddr); }
-static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
-                                         unsigned long vmaddr)
-        { _tlbie(vmaddr); }
-static inline void flush_tlb_range(struct vm_area_struct *vma,
-                                unsigned long start, unsigned long end)
-        { __tlbia(); }
-static inline void flush_tlb_kernel_range(unsigned long start,
-                                unsigned long end)
-        { __tlbia(); }
-
-#elif defined(CONFIG_FSL_BOOKE)
-
-/* TODO: determine if flush_tlb_range & flush_tlb_kernel_range
- * are best implemented as tlbia vs specific tlbie's */
-
-#define __tlbia()       _tlbia()
-
-static inline void flush_tlb_mm(struct mm_struct *mm)
-        { __tlbia(); }
-static inline void flush_tlb_page(struct vm_area_struct *vma,
-                                unsigned long vmaddr)
-        { _tlbie(vmaddr); }
-static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
-                                         unsigned long vmaddr)
-        { _tlbie(vmaddr); }
-static inline void flush_tlb_range(struct vm_area_struct *vma,
-                                unsigned long start, unsigned long end)
-        { __tlbia(); }
-static inline void flush_tlb_kernel_range(unsigned long start,
-                                unsigned long end)
-        { __tlbia(); }
-
-#elif defined(CONFIG_8xx)
-#define __tlbia()       asm volatile ("tlbia; sync" : : : "memory")
-
-static inline void flush_tlb_mm(struct mm_struct *mm)
-        { __tlbia(); }
-static inline void flush_tlb_page(struct vm_area_struct *vma,
-                                unsigned long vmaddr)
-        { _tlbie(vmaddr); }
-static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
-                                         unsigned long vmaddr)
-        { _tlbie(vmaddr); }
-static inline void flush_tlb_range(struct vm_area_struct *vma,
-                                unsigned long start, unsigned long end)
-        { __tlbia(); }
-static inline void flush_tlb_kernel_range(unsigned long start,
-                                unsigned long end)
-        { __tlbia(); }
-
-#else   /* 6xx, 7xx, 7xxx cpus */
-struct mm_struct;
-struct vm_area_struct;
-extern void flush_tlb_mm(struct mm_struct *mm);
-extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
-extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
-extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
-                            unsigned long end);
-extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
-#endif
-
-/*
- * This is called in munmap when we have freed up some page-table
- * pages.  We don't need to do anything here, there's nothing special
- * about our page-table pages.  -- paulus
- */
-static inline void flush_tlb_pgtables(struct mm_struct *mm,
-                                      unsigned long start, unsigned long end)
-{
-}
-
-/*
- * This gets called at the end of handling a page fault, when
- * the kernel has put a new PTE into the page table for the process.
- * We use it to ensure coherency between the i-cache and d-cache
- * for the page which has just been mapped in.
- * On machines which use an MMU hash table, we use this to put a
- * corresponding HPTE into the hash table ahead of time, instead of
- * waiting for the inevitable extra hash-table miss exception.
- */
-extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
-
-#endif /* _PPC_TLBFLUSH_H */
-#endif /*__KERNEL__ */
diff --git a/include/asm-ppc/types.h b/include/asm-ppc/types.h
deleted file mode 100644
index 77dc24d7d2ad..000000000000
--- a/include/asm-ppc/types.h
+++ /dev/null
@@ -1,69 +0,0 @@
-#ifndef _PPC_TYPES_H
-#define _PPC_TYPES_H
-
-#ifndef __ASSEMBLY__
-
-typedef __signed__ char __s8;
-typedef unsigned char __u8;
-
-typedef __signed__ short __s16;
-typedef unsigned short __u16;
-
-typedef __signed__ int __s32;
-typedef unsigned int __u32;
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
-typedef __signed__ long long __s64;
-typedef unsigned long long __u64;
-#endif
-
-typedef struct {
-        __u32 u[4];
-} __vector128;
-
-/*
- * XXX allowed outside of __KERNEL__ for now, until glibc gets
- * a proper set of asm headers of its own.  -- paulus
- */
-typedef unsigned short umode_t;
-
-#endif /* __ASSEMBLY__ */
-
-#ifdef __KERNEL__
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-#define BITS_PER_LONG 32
-
-#ifndef __ASSEMBLY__
-
-#include <linux/config.h>
-
-typedef signed char s8;
-typedef unsigned char u8;
-
-typedef signed short s16;
-typedef unsigned short u16;
-
-typedef signed int s32;
-typedef unsigned int u32;
-
-typedef signed long long s64;
-typedef unsigned long long u64;
-
-typedef __vector128 vector128;
-
-/* DMA addresses are 32-bits wide */
-typedef u32 dma_addr_t;
-typedef u64 dma64_addr_t;
-
-#ifdef CONFIG_LBD
-typedef u64 sector_t;
-#define HAVE_SECTOR_T
-#endif
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* __KERNEL__ */
-
-#endif
diff --git a/include/asm-ppc/uaccess.h b/include/asm-ppc/uaccess.h
deleted file mode 100644
index 63f56224da8c..000000000000
--- a/include/asm-ppc/uaccess.h
+++ /dev/null
@@ -1,393 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _PPC_UACCESS_H
-#define _PPC_UACCESS_H
-
-#ifndef __ASSEMBLY__
-#include <linux/sched.h>
-#include <linux/errno.h>
-#include <asm/processor.h>
-
-#define VERIFY_READ     0
-#define VERIFY_WRITE    1
-
-/*
- * The fs value determines whether argument validity checking should be
- * performed or not.  If get_fs() == USER_DS, checking is performed, with
- * get_fs() == KERNEL_DS, checking is bypassed.
- *
- * For historical reasons, these macros are grossly misnamed.
- *
- * The fs/ds values are now the highest legal address in the "segment".
- * This simplifies the checking in the routines below.
- */
-
-#define KERNEL_DS       ((mm_segment_t) { ~0UL })
-#define USER_DS         ((mm_segment_t) { TASK_SIZE - 1 })
-
-#define get_ds()        (KERNEL_DS)
-#define get_fs()        (current->thread.fs)
-#define set_fs(val)     (current->thread.fs = (val))
-
-#define segment_eq(a,b) ((a).seg == (b).seg)
-
-#define __access_ok(addr,size)                                              \
-        ((addr) <= current->thread.fs.seg                                   \
-         && ((size) == 0 || (size) - 1 <= current->thread.fs.seg - (addr)))
-
-#define access_ok(type, addr, size) \
-        (__chk_user_ptr(addr),__access_ok((unsigned long)(addr),(size)))
-
-/*
- * The exception table consists of pairs of addresses: the first is the
- * address of an instruction that is allowed to fault, and the second is
- * the address at which the program should continue.  No registers are
- * modified, so it is entirely up to the continuation code to figure out
- * what to do.
- *
- * All the routines below use bits of fixup code that are out of line
- * with the main instruction path.  This means when everything is well,
- * we don't even have to jump over them.  Further, they do not intrude
- * on our cache or tlb entries.
- */
-
-struct exception_table_entry
-{
-        unsigned long insn, fixup;
-};
-
-/*
- * These are the main single-value transfer routines.  They automatically
- * use the right size if we just have the right pointer type.
- *
- * This gets kind of ugly. We want to return _two_ values in "get_user()"
- * and yet we don't want to do any pointers, because that is too much
- * of a performance impact. Thus we have a few rather ugly macros here,
- * and hide all the ugliness from the user.
- *
- * The "__xxx" versions of the user access functions are versions that
- * do not verify the address space, that must have been done previously
- * with a separate "access_ok()" call (this is used when we do multiple
- * accesses to the same area of user memory).
- *
- * As we use the same address space for kernel and user data on the
- * PowerPC, we can just do these as direct assignments.  (Of course, the
- * exception handling means that it's no longer "just"...)
- *
- * The "user64" versions of the user access functions are versions that 
- * allow access of 64-bit data. The "get_user" functions do not 
- * properly handle 64-bit data because the value gets down cast to a long. 
- * The "put_user" functions already handle 64-bit data properly but we add 
- * "user64" versions for completeness
- */
-#define get_user(x,ptr) \
-  __get_user_check((x),(ptr),sizeof(*(ptr)))
-#define get_user64(x,ptr) \
-  __get_user64_check((x),(ptr),sizeof(*(ptr)))
-#define put_user(x,ptr) \
-  __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
-#define put_user64(x,ptr) put_user(x,ptr)
-
-#define __get_user(x,ptr) \
-  __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
-#define __get_user64(x,ptr) \
-  __get_user64_nocheck((x),(ptr),sizeof(*(ptr)))
-#define __put_user(x,ptr) \
-  __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
-#define __put_user64(x,ptr) __put_user(x,ptr)
-
-extern long __put_user_bad(void);
-
-#define __put_user_nocheck(x,ptr,size)                  \
-({                                                      \
-        long __pu_err;                                  \
-        __chk_user_ptr(ptr);                            \
-        __put_user_size((x),(ptr),(size),__pu_err);     \
-        __pu_err;                                       \
-})
-
-#define __put_user_check(x,ptr,size)                            \
-({                                                              \
-        long __pu_err = -EFAULT;                                \
-        __typeof__(*(ptr)) __user *__pu_addr = (ptr);           \
-        if (access_ok(VERIFY_WRITE,__pu_addr,size))             \
-                __put_user_size((x),__pu_addr,(size),__pu_err); \
-        __pu_err;                                               \
-})
-
-#define __put_user_size(x,ptr,size,retval)              \
-do {                                                    \
-        retval = 0;                                     \
-        switch (size) {                                 \
-        case 1:                                         \
-                __put_user_asm(x, ptr, retval, "stb");  \
-                break;                                  \
-        case 2:                                         \
-                __put_user_asm(x, ptr, retval, "sth");  \
-                break;                                  \
-        case 4:                                         \
-                __put_user_asm(x, ptr, retval, "stw");  \
-                break;                                  \
-        case 8:                                         \
-                __put_user_asm2(x, ptr, retval);        \
-                break;                                  \
-        default:                                        \
-                __put_user_bad();                       \
-        }                                               \
-} while (0)
-
-/*
- * We don't tell gcc that we are accessing memory, but this is OK
- * because we do not write to any memory gcc knows about, so there
- * are no aliasing issues.
- */
-#define __put_user_asm(x, addr, err, op)                        \
-        __asm__ __volatile__(                                   \
-                "1:     "op" %1,0(%2)\n"                        \
-                "2:\n"                                          \
-                ".section .fixup,\"ax\"\n"                      \
-                "3:     li %0,%3\n"                             \
-                "       b 2b\n"                                 \
-                ".previous\n"                                   \
-                ".section __ex_table,\"a\"\n"                   \
-                "       .align 2\n"                             \
-                "       .long 1b,3b\n"                          \
-                ".previous"                                     \
-                : "=r" (err)                                    \
-                : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
-
-#define __put_user_asm2(x, addr, err)                           \
-        __asm__ __volatile__(                                   \
-                "1:     stw %1,0(%2)\n"                         \
-                "2:     stw %1+1,4(%2)\n"                       \
-                "3:\n"                                          \
-                ".section .fixup,\"ax\"\n"                      \
-                "4:     li %0,%3\n"                             \
-                "       b 3b\n"                                 \
-                ".previous\n"                                   \
-                ".section __ex_table,\"a\"\n"                   \
-                "       .align 2\n"                             \
-                "       .long 1b,4b\n"                          \
-                "       .long 2b,4b\n"                          \
-                ".previous"                                     \
-                : "=r" (err)                                    \
-                : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
-
-#define __get_user_nocheck(x, ptr, size)                        \
-({                                                              \
-        long __gu_err;                                          \
-        unsigned long __gu_val;                                 \
-        __chk_user_ptr(ptr);                                    \
-        __get_user_size(__gu_val, (ptr), (size), __gu_err);     \
-        (x) = (__typeof__(*(ptr)))__gu_val;                     \
-        __gu_err;                                               \
-})
-
-#define __get_user64_nocheck(x, ptr, size)                      \
-({                                                              \
-        long __gu_err;                                          \
-        long long __gu_val;                                     \
-        __chk_user_ptr(ptr);                                    \
-        __get_user_size64(__gu_val, (ptr), (size), __gu_err);   \
-        (x) = (__typeof__(*(ptr)))__gu_val;                     \
-        __gu_err;                                               \
-})
-
-#define __get_user_check(x, ptr, size)                                  \
-({                                                                      \
-        long __gu_err = -EFAULT;                                        \
-        unsigned long  __gu_val = 0;                                    \
-        const __typeof__(*(ptr)) __user *__gu_addr = (ptr);             \
-        if (access_ok(VERIFY_READ, __gu_addr, (size)))                  \
-                __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \
-        (x) = (__typeof__(*(ptr)))__gu_val;                             \
-        __gu_err;                                                       \
-})
-
-#define __get_user64_check(x, ptr, size)                                  \
-({                                                                        \
-        long __gu_err = -EFAULT;                                          \
-        long long __gu_val = 0;                                           \
-        const __typeof__(*(ptr)) __user *__gu_addr = (ptr);               \
-        if (access_ok(VERIFY_READ, __gu_addr, (size)))                    \
-                __get_user_size64(__gu_val, __gu_addr, (size), __gu_err); \
-        (x) = (__typeof__(*(ptr)))__gu_val;                               \
-        __gu_err;                                                         \
-})
-
-extern long __get_user_bad(void);
-
-#define __get_user_size(x, ptr, size, retval)                   \
-do {                                                            \
-        retval = 0;                                             \
-        switch (size) {                                         \
-        case 1:                                                 \
-                __get_user_asm(x, ptr, retval, "lbz");          \
-                break;                                          \
-        case 2:                                                 \
-                __get_user_asm(x, ptr, retval, "lhz");          \
-                break;                                          \
-        case 4:                                                 \
-                __get_user_asm(x, ptr, retval, "lwz");          \
-                break;                                          \
-        default:                                                \
-                x = __get_user_bad();                           \
-        }                                                       \
-} while (0)
-
-#define __get_user_size64(x, ptr, size, retval)                 \
-do {                                                            \
-        retval = 0;                                             \
-        switch (size) {                                         \
-        case 1:                                                 \
-                __get_user_asm(x, ptr, retval, "lbz");          \
-                break;                                          \
-        case 2:                                                 \
-                __get_user_asm(x, ptr, retval, "lhz");          \
-                break;                                          \
-        case 4:                                                 \
-                __get_user_asm(x, ptr, retval, "lwz");          \
-                break;                                          \
-        case 8:                                                 \
-                __get_user_asm2(x, ptr, retval);                \
-                break;                                          \
-        default:                                                \
-                x = __get_user_bad();                           \
-        }                                                       \
-} while (0)
-
-#define __get_user_asm(x, addr, err, op)                \
-        __asm__ __volatile__(                           \
-                "1:     "op" %1,0(%2)\n"                \
-                "2:\n"                                  \
-                ".section .fixup,\"ax\"\n"              \
-                "3:     li %0,%3\n"                     \
-                "       li %1,0\n"                      \
-                "       b 2b\n"                         \
-                ".previous\n"                           \
-                ".section __ex_table,\"a\"\n"           \
-                "       .align 2\n"                     \
-                "       .long 1b,3b\n"                  \
-                ".previous"                             \
-                : "=r"(err), "=r"(x)                    \
-                : "b"(addr), "i"(-EFAULT), "0"(err))
-
-#define __get_user_asm2(x, addr, err)                   \
-        __asm__ __volatile__(                           \
-                "1:     lwz %1,0(%2)\n"                 \
-                "2:     lwz %1+1,4(%2)\n"               \
-                "3:\n"                                  \
-                ".section .fixup,\"ax\"\n"              \
-                "4:     li %0,%3\n"                     \
-                "       li %1,0\n"                      \
-                "       li %1+1,0\n"                    \
-                "       b 3b\n"                         \
-                ".previous\n"                           \
-                ".section __ex_table,\"a\"\n"           \
-                "       .align 2\n"                     \
-                "       .long 1b,4b\n"                  \
-                "       .long 2b,4b\n"                  \
-                ".previous"                             \
-                : "=r"(err), "=&r"(x)                   \
-                : "b"(addr), "i"(-EFAULT), "0"(err))
-
-/* more complex routines */
-
-extern int __copy_tofrom_user(void __user *to, const void __user *from,
-                              unsigned long size);
-
-extern inline unsigned long
-copy_from_user(void *to, const void __user *from, unsigned long n)
-{
-        unsigned long over;
-
-        if (access_ok(VERIFY_READ, from, n))
-                return __copy_tofrom_user((__force void __user *)to, from, n);
-        if ((unsigned long)from < TASK_SIZE) {
-                over = (unsigned long)from + n - TASK_SIZE;
-                return __copy_tofrom_user((__force void __user *)to, from, n - over) + over;
-        }
-        return n;
-}
-
-extern inline unsigned long
-copy_to_user(void __user *to, const void *from, unsigned long n)
-{
-        unsigned long over;
-
-        if (access_ok(VERIFY_WRITE, to, n))
-                return __copy_tofrom_user(to, (__force void __user *) from, n);
-        if ((unsigned long)to < TASK_SIZE) {
-                over = (unsigned long)to + n - TASK_SIZE;
-                return __copy_tofrom_user(to, (__force void __user *) from, n - over) + over;
-        }
-        return n;
-}
-
-static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long size)
-{
-        return __copy_tofrom_user((__force void __user *)to, from, size);
-}
-
-static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long size)
-{
-        return __copy_tofrom_user(to, (__force void __user *)from, size);
-}
-
-#define __copy_to_user_inatomic __copy_to_user
-#define __copy_from_user_inatomic __copy_from_user
-
-extern unsigned long __clear_user(void __user *addr, unsigned long size);
-
-extern inline unsigned long
-clear_user(void __user *addr, unsigned long size)
-{
-        if (access_ok(VERIFY_WRITE, addr, size))
-                return __clear_user(addr, size);
-        if ((unsigned long)addr < TASK_SIZE) {
-                unsigned long over = (unsigned long)addr + size - TASK_SIZE;
-                return __clear_user(addr, size - over) + over;
-        }
-        return size;
-}
-
-extern int __strncpy_from_user(char *dst, const char __user *src, long count);
-
-extern inline long
-strncpy_from_user(char *dst, const char __user *src, long count)
-{
-        if (access_ok(VERIFY_READ, src, 1))
-                return __strncpy_from_user(dst, src, count);
-        return -EFAULT;
-}
-
-/*
- * Return the size of a string (including the ending 0)
- *
- * Return 0 for error
- */
-
-extern int __strnlen_user(const char __user *str, long len, unsigned long top);
-
-/*
- * Returns the length of the string at str (including the null byte),
- * or 0 if we hit a page we can't access,
- * or something > len if we didn't find a null byte.
- *
- * The `top' parameter to __strnlen_user is to make sure that
- * we can never overflow from the user area into kernel space.
- */
-extern __inline__ int strnlen_user(const char __user *str, long len)
-{
-        unsigned long top = current->thread.fs.seg;
-
-        if ((unsigned long)str > top)
-                return 0;
-        return __strnlen_user(str, len, top);
-}
-
-#define strlen_user(str)        strnlen_user((str), 0x7ffffffe)
-
-#endif  /* __ASSEMBLY__ */
-
-#endif  /* _PPC_UACCESS_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ucontext.h b/include/asm-ppc/ucontext.h
deleted file mode 100644
index 664bc984d51f..000000000000
--- a/include/asm-ppc/ucontext.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef _ASMPPC_UCONTEXT_H
-#define _ASMPPC_UCONTEXT_H
-
-#include <asm/elf.h>
-#include <asm/signal.h>
-
-struct mcontext {
-        elf_gregset_t   mc_gregs;
-        elf_fpregset_t  mc_fregs;
-        unsigned long   mc_pad[2];
-        elf_vrregset_t  mc_vregs __attribute__((__aligned__(16)));
-};
-
-struct ucontext {
-        unsigned long    uc_flags;
-        struct ucontext __user *uc_link;
-        stack_t          uc_stack;
-        int              uc_pad[7];
-        struct mcontext __user *uc_regs;/* points to uc_mcontext field */
-        sigset_t         uc_sigmask;
-        /* glibc has 1024-bit signal masks, ours are 64-bit */
-        int              uc_maskext[30];
-        int              uc_pad2[3];
-        struct mcontext  uc_mcontext;
-};
-
-#endif /* !_ASMPPC_UCONTEXT_H */
diff --git a/include/asm-ppc/uninorth.h b/include/asm-ppc/uninorth.h
deleted file mode 100644
index f737732c3861..000000000000
--- a/include/asm-ppc/uninorth.h
+++ /dev/null
@@ -1,229 +0,0 @@
-/*
- * uninorth.h: definitions for using the "UniNorth" host bridge chip
- *             from Apple. This chip is used on "Core99" machines
- *             This also includes U2 used on more recent MacRISC2/3
- *             machines and U3 (G5) 
- *
- */
-#ifdef __KERNEL__
-#ifndef __ASM_UNINORTH_H__
-#define __ASM_UNINORTH_H__
-
-/*
- * Uni-N and U3 config space reg. definitions
- *
- * (Little endian)
- */
-
-/* Address ranges selection. This one should work with Bandit too */
-/* Not U3 */
-#define UNI_N_ADDR_SELECT               0x48
-#define UNI_N_ADDR_COARSE_MASK          0xffff0000      /* 256Mb regions at *0000000 */
-#define UNI_N_ADDR_FINE_MASK            0x0000ffff      /*  16Mb regions at f*000000 */
-
-/* AGP registers */
-/* Not U3 */
-#define UNI_N_CFG_GART_BASE             0x8c
-#define UNI_N_CFG_AGP_BASE              0x90
-#define UNI_N_CFG_GART_CTRL             0x94
-#define UNI_N_CFG_INTERNAL_STATUS       0x98
-#define UNI_N_CFG_GART_DUMMY_PAGE       0xa4
-
-/* UNI_N_CFG_GART_CTRL bits definitions */
-#define UNI_N_CFG_GART_INVAL            0x00000001
-#define UNI_N_CFG_GART_ENABLE           0x00000100
-#define UNI_N_CFG_GART_2xRESET          0x00010000
-#define UNI_N_CFG_GART_DISSBADET        0x00020000
-/* The following seems to only be used only on U3 <j.glisse@gmail.com> */
-#define U3_N_CFG_GART_SYNCMODE          0x00040000
-#define U3_N_CFG_GART_PERFRD            0x00080000
-#define U3_N_CFG_GART_B2BGNT            0x00200000
-#define U3_N_CFG_GART_FASTDDR           0x00400000
-
-/* My understanding of UniNorth AGP as of UniNorth rev 1.0x,
- * revision 1.5 (x4 AGP) may need further changes.
- *
- * AGP_BASE register contains the base address of the AGP aperture on
- * the AGP bus. It doesn't seem to be visible to the CPU as of UniNorth 1.x,
- * even if decoding of this address range is enabled in the address select
- * register. Apparently, the only supported bases are 256Mb multiples
- * (high 4 bits of that register).
- *
- * GART_BASE register appear to contain the physical address of the GART
- * in system memory in the high address bits (page aligned), and the
- * GART size in the low order bits (number of GART pages)
- *
- * The GART format itself is one 32bits word per physical memory page.
- * This word contains, in little-endian format (!!!), the physical address
- * of the page in the high bits, and what appears to be an "enable" bit
- * in the LSB bit (0) that must be set to 1 when the entry is valid.
- *
- * Obviously, the GART is not cache coherent and so any change to it
- * must be flushed to memory (or maybe just make the GART space non
- * cachable). AGP memory itself doens't seem to be cache coherent neither.
- *
- * In order to invalidate the GART (which is probably necessary to inval
- * the bridge internal TLBs), the following sequence has to be written,
- * in order, to the GART_CTRL register:
- *
- *   UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL
- *   UNI_N_CFG_GART_ENABLE
- *   UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_2xRESET
- *   UNI_N_CFG_GART_ENABLE
- *
- * As far as AGP "features" are concerned, it looks like fast write may
- * not be supported but this has to be confirmed.
- *
- * Turning on AGP seem to require a double invalidate operation, one before
- * setting the AGP command register, on after.
- *
- * Turning off AGP seems to require the following sequence: first wait
- * for the AGP to be idle by reading the internal status register, then
- * write in that order to the GART_CTRL register:
- *
- *   UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL
- *   0
- *   UNI_N_CFG_GART_2xRESET
- *   0
- */
-
-/*
- * Uni-N memory mapped reg. definitions
- *
- * Those registers are Big-Endian !!
- *
- * Their meaning come from either Darwin and/or from experiments I made with
- * the bootrom, I'm not sure about their exact meaning yet
- *
- */
-
-/* Version of the UniNorth chip */
-#define UNI_N_VERSION                   0x0000          /* Known versions: 3,7 and 8 */
-
-#define UNI_N_VERSION_107               0x0003          /* 1.0.7 */
-#define UNI_N_VERSION_10A               0x0007          /* 1.0.10 */
-#define UNI_N_VERSION_150               0x0011          /* 1.5 */
-#define UNI_N_VERSION_200               0x0024          /* 2.0 */
-#define UNI_N_VERSION_PANGEA            0x00C0          /* Integrated U1 + K */
-#define UNI_N_VERSION_INTREPID          0x00D2          /* Integrated U2 + K */
-#define UNI_N_VERSION_300               0x0030          /* 3.0 (U3 on G5) */
-
-/* This register is used to enable/disable various clocks */
-#define UNI_N_CLOCK_CNTL                0x0020
-#define UNI_N_CLOCK_CNTL_PCI            0x00000001      /* PCI2 clock control */
-#define UNI_N_CLOCK_CNTL_GMAC           0x00000002      /* GMAC clock control */
-#define UNI_N_CLOCK_CNTL_FW             0x00000004      /* FireWire clock control */
-#define UNI_N_CLOCK_CNTL_ATA100         0x00000010      /* ATA-100 clock control (U2) */
-
-/* Power Management control */
-#define UNI_N_POWER_MGT                 0x0030
-#define UNI_N_POWER_MGT_NORMAL          0x00
-#define UNI_N_POWER_MGT_IDLE2           0x01
-#define UNI_N_POWER_MGT_SLEEP           0x02
-
-/* This register is configured by Darwin depending on the UniN
- * revision
- */
-#define UNI_N_ARB_CTRL                  0x0040
-#define UNI_N_ARB_CTRL_QACK_DELAY_SHIFT 15
-#define UNI_N_ARB_CTRL_QACK_DELAY_MASK  0x0e1f8000
-#define UNI_N_ARB_CTRL_QACK_DELAY       0x30
-#define UNI_N_ARB_CTRL_QACK_DELAY105    0x00
-
-/* This one _might_ return the CPU number of the CPU reading it;
- * the bootROM decides whether to boot or to sleep/spinloop depending
- * on this register beeing 0 or not
- */
-#define UNI_N_CPU_NUMBER                0x0050
-
-/* This register appear to be read by the bootROM to decide what
- *  to do on a non-recoverable reset (powerup or wakeup)
- */
-#define UNI_N_HWINIT_STATE              0x0070
-#define UNI_N_HWINIT_STATE_SLEEPING     0x01
-#define UNI_N_HWINIT_STATE_RUNNING      0x02
-/* This last bit appear to be used by the bootROM to know the second
- * CPU has started and will enter it's sleep loop with IP=0
- */
-#define UNI_N_HWINIT_STATE_CPU1_FLAG    0x10000000
-
-/* This register controls AACK delay, which is set when 2004 iBook/PowerBook
- * is in low speed mode.
- */
-#define UNI_N_AACK_DELAY                0x0100
-#define UNI_N_AACK_DELAY_ENABLE         0x00000001
-
-/* Clock status for Intrepid */
-#define UNI_N_CLOCK_STOP_STATUS0        0x0150
-#define UNI_N_CLOCK_STOPPED_EXTAGP      0x00200000
-#define UNI_N_CLOCK_STOPPED_AGPDEL      0x00100000
-#define UNI_N_CLOCK_STOPPED_I2S0_45_49  0x00080000
-#define UNI_N_CLOCK_STOPPED_I2S0_18     0x00040000
-#define UNI_N_CLOCK_STOPPED_I2S1_45_49  0x00020000
-#define UNI_N_CLOCK_STOPPED_I2S1_18     0x00010000
-#define UNI_N_CLOCK_STOPPED_TIMER       0x00008000
-#define UNI_N_CLOCK_STOPPED_SCC_RTCLK18 0x00004000
-#define UNI_N_CLOCK_STOPPED_SCC_RTCLK32 0x00002000
-#define UNI_N_CLOCK_STOPPED_SCC_VIA32   0x00001000
-#define UNI_N_CLOCK_STOPPED_SCC_SLOT0   0x00000800
-#define UNI_N_CLOCK_STOPPED_SCC_SLOT1   0x00000400
-#define UNI_N_CLOCK_STOPPED_SCC_SLOT2   0x00000200
-#define UNI_N_CLOCK_STOPPED_PCI_FBCLKO  0x00000100
-#define UNI_N_CLOCK_STOPPED_VEO0        0x00000080
-#define UNI_N_CLOCK_STOPPED_VEO1        0x00000040
-#define UNI_N_CLOCK_STOPPED_USB0        0x00000020
-#define UNI_N_CLOCK_STOPPED_USB1        0x00000010
-#define UNI_N_CLOCK_STOPPED_USB2        0x00000008
-#define UNI_N_CLOCK_STOPPED_32          0x00000004
-#define UNI_N_CLOCK_STOPPED_45          0x00000002
-#define UNI_N_CLOCK_STOPPED_49          0x00000001
-
-#define UNI_N_CLOCK_STOP_STATUS1        0x0160
-#define UNI_N_CLOCK_STOPPED_PLL4REF     0x00080000
-#define UNI_N_CLOCK_STOPPED_CPUDEL      0x00040000
-#define UNI_N_CLOCK_STOPPED_CPU         0x00020000
-#define UNI_N_CLOCK_STOPPED_BUF_REFCKO  0x00010000
-#define UNI_N_CLOCK_STOPPED_PCI2        0x00008000
-#define UNI_N_CLOCK_STOPPED_FW          0x00004000
-#define UNI_N_CLOCK_STOPPED_GB          0x00002000
-#define UNI_N_CLOCK_STOPPED_ATA66       0x00001000
-#define UNI_N_CLOCK_STOPPED_ATA100      0x00000800
-#define UNI_N_CLOCK_STOPPED_MAX         0x00000400
-#define UNI_N_CLOCK_STOPPED_PCI1        0x00000200
-#define UNI_N_CLOCK_STOPPED_KLPCI       0x00000100
-#define UNI_N_CLOCK_STOPPED_USB0PCI     0x00000080
-#define UNI_N_CLOCK_STOPPED_USB1PCI     0x00000040
-#define UNI_N_CLOCK_STOPPED_USB2PCI     0x00000020
-#define UNI_N_CLOCK_STOPPED_7PCI1       0x00000008
-#define UNI_N_CLOCK_STOPPED_AGP         0x00000004
-#define UNI_N_CLOCK_STOPPED_PCI0        0x00000002
-#define UNI_N_CLOCK_STOPPED_18          0x00000001
-
-/* Intrepid registe to OF do-platform-clockspreading */
-#define UNI_N_CLOCK_SPREADING           0x190
-
-/* Uninorth 1.5 rev. has additional perf. monitor registers at 0xf00-0xf50 */
-
-
-/*
- * U3 specific registers
- */
-
-
-/* U3 Toggle */
-#define U3_TOGGLE_REG                   0x00e0
-#define U3_PMC_START_STOP               0x0001
-#define U3_MPIC_RESET                   0x0002
-#define U3_MPIC_OUTPUT_ENABLE           0x0004
-
-/* U3 API PHY Config 1 */
-#define U3_API_PHY_CONFIG_1             0x23030
-
-/* U3 HyperTransport registers */
-#define U3_HT_CONFIG_BASE               0x70000
-#define U3_HT_LINK_COMMAND              0x100
-#define U3_HT_LINK_CONFIG               0x110
-#define U3_HT_LINK_FREQ                 0x120
-
-#endif /* __ASM_UNINORTH_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/unistd.h b/include/asm-ppc/unistd.h
deleted file mode 100644
index 3173ab3d2eb9..000000000000
--- a/include/asm-ppc/unistd.h
+++ /dev/null
@@ -1,493 +0,0 @@
-#ifndef _ASM_PPC_UNISTD_H_
-#define _ASM_PPC_UNISTD_H_
-
-/*
- * This file contains the system call numbers.
- */
-#define __NR_restart_syscall      0
-#define __NR_exit                 1
-#define __NR_fork                 2
-#define __NR_read                 3
-#define __NR_write                4
-#define __NR_open                 5
-#define __NR_close                6
-#define __NR_waitpid              7
-#define __NR_creat                8
-#define __NR_link                 9
-#define __NR_unlink              10
-#define __NR_execve              11
-#define __NR_chdir               12
-#define __NR_time                13
-#define __NR_mknod               14
-#define __NR_chmod               15
-#define __NR_lchown              16
-#define __NR_break               17
-#define __NR_oldstat             18
-#define __NR_lseek               19
-#define __NR_getpid              20
-#define __NR_mount               21
-#define __NR_umount              22
-#define __NR_setuid              23
-#define __NR_getuid              24
-#define __NR_stime               25
-#define __NR_ptrace              26
-#define __NR_alarm               27
-#define __NR_oldfstat            28
-#define __NR_pause               29
-#define __NR_utime               30
-#define __NR_stty                31
-#define __NR_gtty                32
-#define __NR_access              33
-#define __NR_nice                34
-#define __NR_ftime               35
-#define __NR_sync                36
-#define __NR_kill                37
-#define __NR_rename              38
-#define __NR_mkdir               39
-#define __NR_rmdir               40
-#define __NR_dup                 41
-#define __NR_pipe                42
-#define __NR_times               43
-#define __NR_prof                44
-#define __NR_brk                 45
-#define __NR_setgid              46
-#define __NR_getgid              47
-#define __NR_signal              48
-#define __NR_geteuid             49
-#define __NR_getegid             50
-#define __NR_acct                51
-#define __NR_umount2             52
-#define __NR_lock                53
-#define __NR_ioctl               54
-#define __NR_fcntl               55
-#define __NR_mpx                 56
-#define __NR_setpgid             57
-#define __NR_ulimit              58
-#define __NR_oldolduname         59
-#define __NR_umask               60
-#define __NR_chroot              61
-#define __NR_ustat               62
-#define __NR_dup2                63
-#define __NR_getppid             64
-#define __NR_getpgrp             65
-#define __NR_setsid              66
-#define __NR_sigaction           67
-#define __NR_sgetmask            68
-#define __NR_ssetmask            69
-#define __NR_setreuid            70
-#define __NR_setregid            71
-#define __NR_sigsuspend          72
-#define __NR_sigpending          73
-#define __NR_sethostname         74
-#define __NR_setrlimit           75
-#define __NR_getrlimit           76
-#define __NR_getrusage           77
-#define __NR_gettimeofday        78
-#define __NR_settimeofday        79
-#define __NR_getgroups           80
-#define __NR_setgroups           81
-#define __NR_select              82
-#define __NR_symlink             83
-#define __NR_oldlstat            84
-#define __NR_readlink            85
-#define __NR_uselib              86
-#define __NR_swapon              87
-#define __NR_reboot              88
-#define __NR_readdir             89
-#define __NR_mmap                90
-#define __NR_munmap              91
-#define __NR_truncate            92
-#define __NR_ftruncate           93
-#define __NR_fchmod              94
-#define __NR_fchown              95
-#define __NR_getpriority         96
-#define __NR_setpriority         97
-#define __NR_profil              98
-#define __NR_statfs              99
-#define __NR_fstatfs            100
-#define __NR_ioperm             101
-#define __NR_socketcall         102
-#define __NR_syslog             103
-#define __NR_setitimer          104
-#define __NR_getitimer          105
-#define __NR_stat               106
-#define __NR_lstat              107
-#define __NR_fstat              108
-#define __NR_olduname           109
-#define __NR_iopl               110
-#define __NR_vhangup            111
-#define __NR_idle               112
-#define __NR_vm86               113
-#define __NR_wait4              114
-#define __NR_swapoff            115
-#define __NR_sysinfo            116
-#define __NR_ipc                117
-#define __NR_fsync              118
-#define __NR_sigreturn          119
-#define __NR_clone              120
-#define __NR_setdomainname      121
-#define __NR_uname              122
-#define __NR_modify_ldt         123
-#define __NR_adjtimex           124
-#define __NR_mprotect           125
-#define __NR_sigprocmask        126
-#define __NR_create_module      127
-#define __NR_init_module        128
-#define __NR_delete_module      129
-#define __NR_get_kernel_syms    130
-#define __NR_quotactl           131
-#define __NR_getpgid            132
-#define __NR_fchdir             133
-#define __NR_bdflush            134
-#define __NR_sysfs              135
-#define __NR_personality        136
-#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
-#define __NR_setfsuid           138
-#define __NR_setfsgid           139
-#define __NR__llseek            140
-#define __NR_getdents           141
-#define __NR__newselect         142
-#define __NR_flock              143
-#define __NR_msync              144
-#define __NR_readv              145
-#define __NR_writev             146
-#define __NR_getsid             147
-#define __NR_fdatasync          148
-#define __NR__sysctl            149
-#define __NR_mlock              150
-#define __NR_munlock            151
-#define __NR_mlockall           152
-#define __NR_munlockall         153
-#define __NR_sched_setparam             154
-#define __NR_sched_getparam             155
-#define __NR_sched_setscheduler         156
-#define __NR_sched_getscheduler         157
-#define __NR_sched_yield                158
-#define __NR_sched_get_priority_max     159
-#define __NR_sched_get_priority_min     160
-#define __NR_sched_rr_get_interval      161
-#define __NR_nanosleep          162
-#define __NR_mremap             163
-#define __NR_setresuid          164
-#define __NR_getresuid          165
-#define __NR_query_module       166
-#define __NR_poll               167
-#define __NR_nfsservctl         168
-#define __NR_setresgid          169
-#define __NR_getresgid          170
-#define __NR_prctl              171
-#define __NR_rt_sigreturn       172
-#define __NR_rt_sigaction       173
-#define __NR_rt_sigprocmask     174
-#define __NR_rt_sigpending      175
-#define __NR_rt_sigtimedwait    176
-#define __NR_rt_sigqueueinfo    177
-#define __NR_rt_sigsuspend      178
-#define __NR_pread64            179
-#define __NR_pwrite64           180
-#define __NR_chown              181
-#define __NR_getcwd             182
-#define __NR_capget             183
-#define __NR_capset             184
-#define __NR_sigaltstack        185
-#define __NR_sendfile           186
-#define __NR_getpmsg            187     /* some people actually want streams */
-#define __NR_putpmsg            188     /* some people actually want streams */
-#define __NR_vfork              189
-#define __NR_ugetrlimit         190     /* SuS compliant getrlimit */
-#define __NR_readahead          191
-#define __NR_mmap2              192
-#define __NR_truncate64         193
-#define __NR_ftruncate64        194
-#define __NR_stat64             195
-#define __NR_lstat64            196
-#define __NR_fstat64            197
-#define __NR_pciconfig_read     198
-#define __NR_pciconfig_write    199
-#define __NR_pciconfig_iobase   200
-#define __NR_multiplexer        201
-#define __NR_getdents64         202
-#define __NR_pivot_root         203
-#define __NR_fcntl64            204
-#define __NR_madvise            205
-#define __NR_mincore            206
-#define __NR_gettid             207
-#define __NR_tkill              208
-#define __NR_setxattr           209
-#define __NR_lsetxattr          210
-#define __NR_fsetxattr          211
-#define __NR_getxattr           212
-#define __NR_lgetxattr          213
-#define __NR_fgetxattr          214
-#define __NR_listxattr          215
-#define __NR_llistxattr         216
-#define __NR_flistxattr         217
-#define __NR_removexattr        218
-#define __NR_lremovexattr       219
-#define __NR_fremovexattr       220
-#define __NR_futex              221
-#define __NR_sched_setaffinity  222
-#define __NR_sched_getaffinity  223
-/* 224 currently unused */
-#define __NR_tuxcall            225
-#define __NR_sendfile64         226
-#define __NR_io_setup           227
-#define __NR_io_destroy         228
-#define __NR_io_getevents       229
-#define __NR_io_submit          230
-#define __NR_io_cancel          231
-#define __NR_set_tid_address    232
-#define __NR_fadvise64          233
-#define __NR_exit_group         234
-#define __NR_lookup_dcookie     235
-#define __NR_epoll_create       236
-#define __NR_epoll_ctl          237
-#define __NR_epoll_wait         238
-#define __NR_remap_file_pages   239
-#define __NR_timer_create       240
-#define __NR_timer_settime      241
-#define __NR_timer_gettime      242
-#define __NR_timer_getoverrun   243
-#define __NR_timer_delete       244
-#define __NR_clock_settime      245
-#define __NR_clock_gettime      246
-#define __NR_clock_getres       247
-#define __NR_clock_nanosleep    248
-#define __NR_swapcontext        249
-#define __NR_tgkill             250
-#define __NR_utimes             251
-#define __NR_statfs64           252
-#define __NR_fstatfs64          253
-#define __NR_fadvise64_64       254
-#define __NR_rtas               255
-#define __NR_sys_debug_setcontext 256
-/* Number 257 is reserved for vserver */
-/* 258 currently unused */
-/* Number 259 is reserved for new sys_mbind */
-/* Number 260 is reserved for new sys_get_mempolicy */
-/* Number 261 is reserved for new sys_set_mempolicy */
-#define __NR_mq_open            262
-#define __NR_mq_unlink          263
-#define __NR_mq_timedsend       264
-#define __NR_mq_timedreceive    265
-#define __NR_mq_notify          266
-#define __NR_mq_getsetattr      267
-#define __NR_kexec_load         268
-#define __NR_add_key            269
-#define __NR_request_key        270
-#define __NR_keyctl             271
-#define __NR_waitid             272
-#define __NR_ioprio_set         273
-#define __NR_ioprio_get         274
-#define __NR_inotify_init       275
-#define __NR_inotify_add_watch  276
-#define __NR_inotify_rm_watch   277
-
-#define __NR_syscalls           278
-
-#define __NR(n) #n
-
-/* On powerpc a system call basically clobbers the same registers like a
- * function call, with the exception of LR (which is needed for the
- * "sc; bnslr" sequence) and CR (where only CR0.SO is clobbered to signal
- * an error return status).
- */
-
-#define __syscall_nr(nr, type, name, args...)                           \
-        unsigned long __sc_ret, __sc_err;                               \
-        {                                                               \
-                register unsigned long __sc_0  __asm__ ("r0");          \
-                register unsigned long __sc_3  __asm__ ("r3");          \
-                register unsigned long __sc_4  __asm__ ("r4");          \
-                register unsigned long __sc_5  __asm__ ("r5");          \
-                register unsigned long __sc_6  __asm__ ("r6");          \
-                register unsigned long __sc_7  __asm__ ("r7");          \
-                register unsigned long __sc_8  __asm__ ("r8");          \
-                                                                        \
-                __sc_loadargs_##nr(name, args);                         \
-                __asm__ __volatile__                                    \
-                        ("sc           \n\t"                            \
-                         "mfcr %0      "                                \
-                        : "=&r" (__sc_0),                               \
-                          "=&r" (__sc_3),  "=&r" (__sc_4),              \
-                          "=&r" (__sc_5),  "=&r" (__sc_6),              \
-                          "=&r" (__sc_7),  "=&r" (__sc_8)               \
-                        : __sc_asm_input_##nr                           \
-                        : "cr0", "ctr", "memory",                       \
-                          "r9", "r10","r11", "r12");                    \
-                __sc_ret = __sc_3;                                      \
-                __sc_err = __sc_0;                                      \
-        }                                                               \
-        if (__sc_err & 0x10000000)                                      \
-        {                                                               \
-                errno = __sc_ret;                                       \
-                __sc_ret = -1;                                          \
-        }                                                               \
-        return (type) __sc_ret
-
-#define __sc_loadargs_0(name, dummy...)                                 \
-        __sc_0 = __NR_##name
-#define __sc_loadargs_1(name, arg1)                                     \
-        __sc_loadargs_0(name);                                          \
-        __sc_3 = (unsigned long) (arg1)
-#define __sc_loadargs_2(name, arg1, arg2)                               \
-        __sc_loadargs_1(name, arg1);                                    \
-        __sc_4 = (unsigned long) (arg2)
-#define __sc_loadargs_3(name, arg1, arg2, arg3)                         \
-        __sc_loadargs_2(name, arg1, arg2);                              \
-        __sc_5 = (unsigned long) (arg3)
-#define __sc_loadargs_4(name, arg1, arg2, arg3, arg4)                   \
-        __sc_loadargs_3(name, arg1, arg2, arg3);                        \
-        __sc_6 = (unsigned long) (arg4)
-#define __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5)             \
-        __sc_loadargs_4(name, arg1, arg2, arg3, arg4);                  \
-        __sc_7 = (unsigned long) (arg5)
-#define __sc_loadargs_6(name, arg1, arg2, arg3, arg4, arg5, arg6)       \
-        __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5);            \
-        __sc_8 = (unsigned long) (arg6)
-
-#define __sc_asm_input_0 "0" (__sc_0)
-#define __sc_asm_input_1 __sc_asm_input_0, "1" (__sc_3)
-#define __sc_asm_input_2 __sc_asm_input_1, "2" (__sc_4)
-#define __sc_asm_input_3 __sc_asm_input_2, "3" (__sc_5)
-#define __sc_asm_input_4 __sc_asm_input_3, "4" (__sc_6)
-#define __sc_asm_input_5 __sc_asm_input_4, "5" (__sc_7)
-#define __sc_asm_input_6 __sc_asm_input_5, "6" (__sc_8)
-
-#define _syscall0(type,name)                                            \
-type name(void)                                                         \
-{                                                                       \
-        __syscall_nr(0, type, name);                                    \
-}
-
-#define _syscall1(type,name,type1,arg1)                                 \
-type name(type1 arg1)                                                   \
-{                                                                       \
-        __syscall_nr(1, type, name, arg1);                              \
-}
-
-#define _syscall2(type,name,type1,arg1,type2,arg2)                      \
-type name(type1 arg1, type2 arg2)                                       \
-{                                                                       \
-        __syscall_nr(2, type, name, arg1, arg2);                        \
-}
-
-#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3)           \
-type name(type1 arg1, type2 arg2, type3 arg3)                           \
-{                                                                       \
-        __syscall_nr(3, type, name, arg1, arg2, arg3);                  \
-}
-
-#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
-type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4)               \
-{                                                                       \
-        __syscall_nr(4, type, name, arg1, arg2, arg3, arg4);            \
-}
-
-#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
-type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5)   \
-{                                                                       \
-        __syscall_nr(5, type, name, arg1, arg2, arg3, arg4, arg5);      \
-}
-
-#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \
-type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \
-{                                                                       \
-        __syscall_nr(6, type, name, arg1, arg2, arg3, arg4, arg5, arg6); \
-}
-
-#ifdef __KERNEL__
-
-#define __NR__exit __NR_exit
-#define NR_syscalls     __NR_syscalls
-
-#define __ARCH_WANT_IPC_PARSE_VERSION
-#define __ARCH_WANT_OLD_READDIR
-#define __ARCH_WANT_OLD_STAT
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_SGETMASK
-#define __ARCH_WANT_SYS_SIGNAL
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_WAITPID
-#define __ARCH_WANT_SYS_SOCKETCALL
-#define __ARCH_WANT_SYS_FADVISE64
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLD_GETRLIMIT
-#define __ARCH_WANT_SYS_OLDUMOUNT
-#define __ARCH_WANT_SYS_SIGPENDING
-#define __ARCH_WANT_SYS_SIGPROCMASK
-#define __ARCH_WANT_SYS_RT_SIGACTION
-
-/*
- * Forking from kernel space will result in the child getting a new,
- * empty kernel stack area.  Thus the child cannot access automatic
- * variables set in the parent unless they are in registers, and the
- * procedure where the fork was done cannot return to its caller in
- * the child.
- */
-
-#ifdef __KERNEL_SYSCALLS__
-
-#include <linux/compiler.h>
-#include <linux/types.h>
-
-/*
- * System call prototypes.
- */
-extern pid_t setsid(void);
-extern int write(int fd, const char *buf, off_t count);
-extern int read(int fd, char *buf, off_t count);
-extern off_t lseek(int fd, off_t offset, int count);
-extern int dup(int fd);
-extern int execve(const char *file, char **argv, char **envp);
-extern int open(const char *file, int flag, int mode);
-extern int close(int fd);
-extern pid_t waitpid(pid_t pid, int *wait_stat, int options);
-
-unsigned long sys_mmap(unsigned long addr, size_t len,
-                        unsigned long prot, unsigned long flags,
-                        unsigned long fd, off_t offset);
-unsigned long sys_mmap2(unsigned long addr, size_t len,
-                        unsigned long prot, unsigned long flags,
-                        unsigned long fd, unsigned long pgoff);
-struct pt_regs;
-int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
-                unsigned long a3, unsigned long a4, unsigned long a5,
-                struct pt_regs *regs);
-int sys_clone(unsigned long clone_flags, unsigned long usp,
-              int __user *parent_tidp, void __user *child_threadptr,
-              int __user *child_tidp, int p6,
-              struct pt_regs *regs);
-int sys_fork(int p1, int p2, int p3, int p4, int p5, int p6,
-                struct pt_regs *regs);
-int sys_vfork(int p1, int p2, int p3, int p4, int p5, int p6,
-                struct pt_regs *regs);
-int sys_pipe(int __user *fildes);
-int sys_ptrace(long request, long pid, long addr, long data);
-struct sigaction;
-long sys_rt_sigaction(int sig,
-                      const struct sigaction __user *act,
-                      struct sigaction __user *oact,
-                      size_t sigsetsize);
-
-#endif /* __KERNEL_SYSCALLS__ */
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#ifndef cond_syscall
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-#endif
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_PPC_UNISTD_H_ */
diff --git a/include/asm-ppc/vga.h b/include/asm-ppc/vga.h
deleted file mode 100644
index c5864734e3e1..000000000000
--- a/include/asm-ppc/vga.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- *      Access to VGA videoram
- *
- *      (c) 1998 Martin Mares <mj@ucw.cz>
- */
-
-#ifdef __KERNEL__
-#ifndef _LINUX_ASM_VGA_H_
-#define _LINUX_ASM_VGA_H_
-
-#include <asm/io.h>
-
-#include <linux/config.h>
-
-#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_MDA_CONSOLE)
-
-#define VT_BUF_HAVE_RW
-/*
- *  These are only needed for supporting VGA or MDA text mode, which use little
- *  endian byte ordering.
- *  In other cases, we can optimize by using native byte ordering and
- *  <linux/vt_buffer.h> has already done the right job for us.
- */
-
-extern inline void scr_writew(u16 val, volatile u16 *addr)
-{
-    st_le16(addr, val);
-}
-
-extern inline u16 scr_readw(volatile const u16 *addr)
-{
-    return ld_le16(addr);
-}
-
-#define VT_BUF_HAVE_MEMCPYW
-#define scr_memcpyw     memcpy
-
-#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */
-
-extern unsigned long vgacon_remap_base;
-#define VGA_MAP_MEM(x) (x + vgacon_remap_base)
-#define vga_readb(x) (*(x))
-#define vga_writeb(x,y) (*(y) = (x))
-
-#endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/xmon.h b/include/asm-ppc/xmon.h
deleted file mode 100644
index 042b83e6680d..000000000000
--- a/include/asm-ppc/xmon.h
+++ /dev/null
@@ -1,17 +0,0 @@
-#ifndef __PPC_XMON_H
-#define __PPC_XMON_H
-#ifdef __KERNEL__
-
-struct pt_regs;
-
-extern void xmon(struct pt_regs *excp);
-extern void xmon_printf(const char *fmt, ...);
-extern void xmon_map_scc(void);
-extern int xmon_bpt(struct pt_regs *regs);
-extern int xmon_sstep(struct pt_regs *regs);
-extern int xmon_iabr_match(struct pt_regs *regs);
-extern int xmon_dabr_match(struct pt_regs *regs);
-extern void (*xmon_fault_handler)(struct pt_regs *regs);
-
-#endif
-#endif