diff options
author | Steven Whitehouse <swhiteho@redhat.com> | 2006-05-12 10:48:52 -0400 |
---|---|---|
committer | Steven Whitehouse <swhiteho@redhat.com> | 2006-05-12 10:48:52 -0400 |
commit | 7d63b54a65ce902f9aaa8efe8192aa3b983264d4 (patch) | |
tree | 250a77bebe92cbd6edac70a649866044295876db /include/asm-ppc | |
parent | fd88de569b802c4a04aaa6ee74667775f4aed8c6 (diff) | |
parent | d8c3291c73b958243b33f8509d4507e76dafd055 (diff) |
Merge branch 'master'
Diffstat (limited to 'include/asm-ppc')
-rw-r--r-- | include/asm-ppc/commproc.h | 1 | ||||
-rw-r--r-- | include/asm-ppc/cpm2.h | 2 | ||||
-rw-r--r-- | include/asm-ppc/page.h | 1 | ||||
-rw-r--r-- | include/asm-ppc/ppc_sys.h | 2 | ||||
-rw-r--r-- | include/asm-ppc/reg_booke.h | 1 |
5 files changed, 6 insertions, 1 deletions
diff --git a/include/asm-ppc/commproc.h b/include/asm-ppc/commproc.h index 973e60908234..31f362966a58 100644 --- a/include/asm-ppc/commproc.h +++ b/include/asm-ppc/commproc.h | |||
@@ -35,6 +35,7 @@ | |||
35 | #define CPM_CR_INIT_TX ((ushort)0x0002) | 35 | #define CPM_CR_INIT_TX ((ushort)0x0002) |
36 | #define CPM_CR_HUNT_MODE ((ushort)0x0003) | 36 | #define CPM_CR_HUNT_MODE ((ushort)0x0003) |
37 | #define CPM_CR_STOP_TX ((ushort)0x0004) | 37 | #define CPM_CR_STOP_TX ((ushort)0x0004) |
38 | #define CPM_CR_GRA_STOP_TX ((ushort)0x0005) | ||
38 | #define CPM_CR_RESTART_TX ((ushort)0x0006) | 39 | #define CPM_CR_RESTART_TX ((ushort)0x0006) |
39 | #define CPM_CR_CLOSE_RX_BD ((ushort)0x0007) | 40 | #define CPM_CR_CLOSE_RX_BD ((ushort)0x0007) |
40 | #define CPM_CR_SET_GADDR ((ushort)0x0008) | 41 | #define CPM_CR_SET_GADDR ((ushort)0x0008) |
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h index b638b87cebe3..c70344b91049 100644 --- a/include/asm-ppc/cpm2.h +++ b/include/asm-ppc/cpm2.h | |||
@@ -69,7 +69,7 @@ | |||
69 | #define CPM_CR_INIT_TX ((ushort)0x0002) | 69 | #define CPM_CR_INIT_TX ((ushort)0x0002) |
70 | #define CPM_CR_HUNT_MODE ((ushort)0x0003) | 70 | #define CPM_CR_HUNT_MODE ((ushort)0x0003) |
71 | #define CPM_CR_STOP_TX ((ushort)0x0004) | 71 | #define CPM_CR_STOP_TX ((ushort)0x0004) |
72 | #define CPM_CR_GRA_STOP_TX ((ushort)0x0005) | 72 | #define CPM_CR_GRA_STOP_TX ((ushort)0x0005) |
73 | #define CPM_CR_RESTART_TX ((ushort)0x0006) | 73 | #define CPM_CR_RESTART_TX ((ushort)0x0006) |
74 | #define CPM_CR_SET_GADDR ((ushort)0x0008) | 74 | #define CPM_CR_SET_GADDR ((ushort)0x0008) |
75 | #define CPM_CR_START_IDMA ((ushort)0x0009) | 75 | #define CPM_CR_START_IDMA ((ushort)0x0009) |
diff --git a/include/asm-ppc/page.h b/include/asm-ppc/page.h index a70ba2ee552d..0fb68a0b0181 100644 --- a/include/asm-ppc/page.h +++ b/include/asm-ppc/page.h | |||
@@ -20,6 +20,7 @@ | |||
20 | /* This must match what is in arch/ppc/Makefile */ | 20 | /* This must match what is in arch/ppc/Makefile */ |
21 | #define PAGE_OFFSET CONFIG_KERNEL_START | 21 | #define PAGE_OFFSET CONFIG_KERNEL_START |
22 | #define KERNELBASE PAGE_OFFSET | 22 | #define KERNELBASE PAGE_OFFSET |
23 | #define is_kernel_addr(x) ((x) >= PAGE_OFFSET) | ||
23 | 24 | ||
24 | #ifndef __ASSEMBLY__ | 25 | #ifndef __ASSEMBLY__ |
25 | 26 | ||
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h index 4b94f7059ebe..40f197af6508 100644 --- a/include/asm-ppc/ppc_sys.h +++ b/include/asm-ppc/ppc_sys.h | |||
@@ -39,6 +39,8 @@ | |||
39 | #error "need definition of ppc_sys_devices" | 39 | #error "need definition of ppc_sys_devices" |
40 | #endif | 40 | #endif |
41 | 41 | ||
42 | #define PPC_SYS_IORESOURCE_FIXUPPED 0x00000001 | ||
43 | |||
42 | struct ppc_sys_spec { | 44 | struct ppc_sys_spec { |
43 | /* PPC sys is matched via (ID & mask) == value, id could be | 45 | /* PPC sys is matched via (ID & mask) == value, id could be |
44 | * PVR, SVR, IMMR, * etc. */ | 46 | * PVR, SVR, IMMR, * etc. */ |
diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h index 00ad9c754c78..4944c0fb8bea 100644 --- a/include/asm-ppc/reg_booke.h +++ b/include/asm-ppc/reg_booke.h | |||
@@ -237,6 +237,7 @@ do { \ | |||
237 | #endif | 237 | #endif |
238 | 238 | ||
239 | /* Bit definitions for CCR1. */ | 239 | /* Bit definitions for CCR1. */ |
240 | #define CCR1_DPC 0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */ | ||
240 | #define CCR1_TCS 0x00000080 /* Timer Clock Select */ | 241 | #define CCR1_TCS 0x00000080 /* Timer Clock Select */ |
241 | 242 | ||
242 | /* Bit definitions for the MCSR. */ | 243 | /* Bit definitions for the MCSR. */ |