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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2005-04-16 18:24:18 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:24:18 -0400
commit7a648b9ec09f32606fe0f27fb9d095311cf968ca (patch)
tree7bab0ea91f5af84f6fedf0422d10194308c851b2 /include/asm-ppc
parent6c26e03b2db4b66d79bfb774628c1fc9b458b943 (diff)
[PATCH] ppc32: Fix cpufreq problems
This patch updates the PowerMac cpufreq driver. It depends on the addition of the suspend() method (my previous patch) and on the new flag I defined to silence some warnings that are normal for us. It fixes various issues related to cpufreq on pmac, including some crashes on some models when sleeping the machine while in low speed, proper voltage control on some newer machines, and adds voltage control on 750FX based G3 laptops. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-ppc')
-rw-r--r--include/asm-ppc/open_pic.h1
-rw-r--r--include/asm-ppc/reg.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-ppc/open_pic.h b/include/asm-ppc/open_pic.h
index 58545e4cdbc0..dbe853319741 100644
--- a/include/asm-ppc/open_pic.h
+++ b/include/asm-ppc/open_pic.h
@@ -56,6 +56,7 @@ extern void smp_openpic_message_pass(int target, int msg, unsigned long data,
56 int wait); 56 int wait);
57extern void openpic_set_k2_cascade(int irq); 57extern void openpic_set_k2_cascade(int irq);
58extern void openpic_set_priority(u_int pri); 58extern void openpic_set_priority(u_int pri);
59extern u_int openpic_get_priority(void);
59 60
60extern inline int openpic_to_irq(int irq) 61extern inline int openpic_to_irq(int irq)
61{ 62{
diff --git a/include/asm-ppc/reg.h b/include/asm-ppc/reg.h
index 3372dee36a8c..c418aab7cd34 100644
--- a/include/asm-ppc/reg.h
+++ b/include/asm-ppc/reg.h
@@ -181,6 +181,7 @@
181#define HID1_PC3 (1<<13) /* 7450 PLL_CFG[3] */ 181#define HID1_PC3 (1<<13) /* 7450 PLL_CFG[3] */
182#define HID1_SYNCBE (1<<11) /* 7450 ABE for sync, eieio */ 182#define HID1_SYNCBE (1<<11) /* 7450 ABE for sync, eieio */
183#define HID1_ABE (1<<10) /* 7450 Address Broadcast Enable */ 183#define HID1_ABE (1<<10) /* 7450 Address Broadcast Enable */
184#define HID1_PS (1<<16) /* 750FX PLL selection */
184#define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */ 185#define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */
185#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ 186#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
186#define SPRN_HID4 0x3F4 /* 970 HID4 */ 187#define SPRN_HID4 0x3F4 /* 970 HID4 */