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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2005-09-19 23:52:50 -0400
committerPaul Mackerras <paulus@samba.org>2005-09-21 05:21:07 -0400
commit61b1a94254a2158d053458764a5bd30331d73a54 (patch)
tree4a2aa56ae5d3182c1015b5e9a4351aeb8fab2f3a /include/asm-ppc64
parent637a6ff6ce525d8495df944550efea0f023dd521 (diff)
[PATCH] ppc64: Store virtual address in TLB flush batches
This patch slightly change the TLB flush batch mecanism so that we store the full vaddr (including vsid) when adding an entry to the batch so that the flush part doesn't have to get to the context. This cleans it a bit, and paves the way to future updates like dynamic vsids. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-ppc64')
-rw-r--r--include/asm-ppc64/machdep.h5
-rw-r--r--include/asm-ppc64/tlbflush.h7
2 files changed, 4 insertions, 8 deletions
diff --git a/include/asm-ppc64/machdep.h b/include/asm-ppc64/machdep.h
index 8027160ec96d..d35d9d3e44cf 100644
--- a/include/asm-ppc64/machdep.h
+++ b/include/asm-ppc64/machdep.h
@@ -56,9 +56,8 @@ struct machdep_calls {
56 unsigned long vflags, 56 unsigned long vflags,
57 unsigned long rflags); 57 unsigned long rflags);
58 long (*hpte_remove)(unsigned long hpte_group); 58 long (*hpte_remove)(unsigned long hpte_group);
59 void (*flush_hash_range)(unsigned long context, 59 void (*flush_hash_range)(unsigned long number, int local);
60 unsigned long number, 60
61 int local);
62 /* special for kexec, to be called in real mode, linar mapping is 61 /* special for kexec, to be called in real mode, linar mapping is
63 * destroyed as well */ 62 * destroyed as well */
64 void (*hpte_clear_all)(void); 63 void (*hpte_clear_all)(void);
diff --git a/include/asm-ppc64/tlbflush.h b/include/asm-ppc64/tlbflush.h
index 45411a67e082..800bc0010cfb 100644
--- a/include/asm-ppc64/tlbflush.h
+++ b/include/asm-ppc64/tlbflush.h
@@ -20,10 +20,8 @@
20struct mm_struct; 20struct mm_struct;
21struct ppc64_tlb_batch { 21struct ppc64_tlb_batch {
22 unsigned long index; 22 unsigned long index;
23 unsigned long context;
24 struct mm_struct *mm; 23 struct mm_struct *mm;
25 pte_t pte[PPC64_TLB_BATCH_NR]; 24 pte_t pte[PPC64_TLB_BATCH_NR];
26 unsigned long addr[PPC64_TLB_BATCH_NR];
27 unsigned long vaddr[PPC64_TLB_BATCH_NR]; 25 unsigned long vaddr[PPC64_TLB_BATCH_NR];
28}; 26};
29DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); 27DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
@@ -47,8 +45,7 @@ static inline void flush_tlb_pending(void)
47#define flush_tlb_kernel_range(start, end) flush_tlb_pending() 45#define flush_tlb_kernel_range(start, end) flush_tlb_pending()
48#define flush_tlb_pgtables(mm, start, end) do { } while (0) 46#define flush_tlb_pgtables(mm, start, end) do { } while (0)
49 47
50extern void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte, 48extern void flush_hash_page(unsigned long va, pte_t pte, int local);
51 int local); 49void flush_hash_range(unsigned long number, int local);
52void flush_hash_range(unsigned long context, unsigned long number, int local);
53 50
54#endif /* _PPC64_TLBFLUSH_H */ 51#endif /* _PPC64_TLBFLUSH_H */