diff options
author | Stephen Rothwell <sfr@canb.auug.org.au> | 2005-11-04 00:58:59 -0500 |
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committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2005-11-04 00:58:59 -0500 |
commit | 1970282f3b453b7aac3b192a44705dcb5277fd82 (patch) | |
tree | 03993bd7b9e69619313da19c137cdde2df9416c5 /include/asm-ppc64 | |
parent | 9a0f78f63bc05d195aab781486ed57d1418d5f59 (diff) |
powerpc: merge tlbflush.h
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'include/asm-ppc64')
-rw-r--r-- | include/asm-ppc64/tlbflush.h | 52 |
1 files changed, 0 insertions, 52 deletions
diff --git a/include/asm-ppc64/tlbflush.h b/include/asm-ppc64/tlbflush.h deleted file mode 100644 index 626f505c6ee3..000000000000 --- a/include/asm-ppc64/tlbflush.h +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | #ifndef _PPC64_TLBFLUSH_H | ||
2 | #define _PPC64_TLBFLUSH_H | ||
3 | |||
4 | /* | ||
5 | * TLB flushing: | ||
6 | * | ||
7 | * - flush_tlb_mm(mm) flushes the specified mm context TLB's | ||
8 | * - flush_tlb_page(vma, vmaddr) flushes one page | ||
9 | * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB | ||
10 | * - flush_tlb_range(vma, start, end) flushes a range of pages | ||
11 | * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages | ||
12 | * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables | ||
13 | */ | ||
14 | |||
15 | #include <linux/percpu.h> | ||
16 | #include <asm/page.h> | ||
17 | |||
18 | #define PPC64_TLB_BATCH_NR 192 | ||
19 | |||
20 | struct mm_struct; | ||
21 | struct ppc64_tlb_batch { | ||
22 | unsigned long index; | ||
23 | struct mm_struct *mm; | ||
24 | pte_t pte[PPC64_TLB_BATCH_NR]; | ||
25 | unsigned long vaddr[PPC64_TLB_BATCH_NR]; | ||
26 | unsigned int large; | ||
27 | }; | ||
28 | DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); | ||
29 | |||
30 | extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch); | ||
31 | |||
32 | static inline void flush_tlb_pending(void) | ||
33 | { | ||
34 | struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch); | ||
35 | |||
36 | if (batch->index) | ||
37 | __flush_tlb_pending(batch); | ||
38 | put_cpu_var(ppc64_tlb_batch); | ||
39 | } | ||
40 | |||
41 | #define flush_tlb_mm(mm) flush_tlb_pending() | ||
42 | #define flush_tlb_page(vma, addr) flush_tlb_pending() | ||
43 | #define flush_tlb_page_nohash(vma, addr) do { } while (0) | ||
44 | #define flush_tlb_range(vma, start, end) \ | ||
45 | do { (void)(start); flush_tlb_pending(); } while (0) | ||
46 | #define flush_tlb_kernel_range(start, end) flush_tlb_pending() | ||
47 | #define flush_tlb_pgtables(mm, start, end) do { } while (0) | ||
48 | |||
49 | extern void flush_hash_page(unsigned long va, pte_t pte, int local); | ||
50 | void flush_hash_range(unsigned long number, int local); | ||
51 | |||
52 | #endif /* _PPC64_TLBFLUSH_H */ | ||