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authorJames Bottomley <jejb@titanic.(none)>2005-05-20 16:27:44 -0400
committerJames Bottomley <jejb@titanic.(none)>2005-05-20 16:27:44 -0400
commitad34ea2cc3845ef4dcd7d12fb0fa8484734bd672 (patch)
treead434400f5ecaa33b433c8f830e40792d8d6c05c /include/asm-ppc64/mmu.h
parent90356ac3194bf91a441a5f9c3067af386ef62462 (diff)
parent88d7bd8cb9eb8d64bf7997600b0d64f7834047c5 (diff)
merge by hand - fix up rejections in Documentation/DocBook/Makefile
Diffstat (limited to 'include/asm-ppc64/mmu.h')
-rw-r--r--include/asm-ppc64/mmu.h193
1 files changed, 147 insertions, 46 deletions
diff --git a/include/asm-ppc64/mmu.h b/include/asm-ppc64/mmu.h
index 188987e9d9d4..c78282a67d8e 100644
--- a/include/asm-ppc64/mmu.h
+++ b/include/asm-ppc64/mmu.h
@@ -15,19 +15,10 @@
15 15
16#include <linux/config.h> 16#include <linux/config.h>
17#include <asm/page.h> 17#include <asm/page.h>
18#include <linux/stringify.h>
19 18
20#ifndef __ASSEMBLY__ 19/*
21 20 * Segment table
22/* Time to allow for more things here */ 21 */
23typedef unsigned long mm_context_id_t;
24typedef struct {
25 mm_context_id_t id;
26#ifdef CONFIG_HUGETLB_PAGE
27 pgd_t *huge_pgdir;
28 u16 htlb_segs; /* bitmask */
29#endif
30} mm_context_t;
31 22
32#define STE_ESID_V 0x80 23#define STE_ESID_V 0x80
33#define STE_ESID_KS 0x20 24#define STE_ESID_KS 0x20
@@ -36,15 +27,48 @@ typedef struct {
36 27
37#define STE_VSID_SHIFT 12 28#define STE_VSID_SHIFT 12
38 29
39struct stab_entry { 30/* Location of cpu0's segment table */
40 unsigned long esid_data; 31#define STAB0_PAGE 0x9
41 unsigned long vsid_data; 32#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT)
42}; 33#define STAB0_VIRT_ADDR (KERNELBASE+STAB0_PHYS_ADDR)
34
35/*
36 * SLB
37 */
43 38
44/* Hardware Page Table Entry */ 39#define SLB_NUM_BOLTED 3
40#define SLB_CACHE_ENTRIES 8
41
42/* Bits in the SLB ESID word */
43#define SLB_ESID_V ASM_CONST(0x0000000008000000) /* valid */
44
45/* Bits in the SLB VSID word */
46#define SLB_VSID_SHIFT 12
47#define SLB_VSID_KS ASM_CONST(0x0000000000000800)
48#define SLB_VSID_KP ASM_CONST(0x0000000000000400)
49#define SLB_VSID_N ASM_CONST(0x0000000000000200) /* no-execute */
50#define SLB_VSID_L ASM_CONST(0x0000000000000100) /* largepage 16M */
51#define SLB_VSID_C ASM_CONST(0x0000000000000080) /* class */
52
53#define SLB_VSID_KERNEL (SLB_VSID_KP|SLB_VSID_C)
54#define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS)
55
56/*
57 * Hash table
58 */
45 59
46#define HPTES_PER_GROUP 8 60#define HPTES_PER_GROUP 8
47 61
62/* Values for PP (assumes Ks=0, Kp=1) */
63/* pp0 will always be 0 for linux */
64#define PP_RWXX 0 /* Supervisor read/write, User none */
65#define PP_RWRX 1 /* Supervisor read/write, User read */
66#define PP_RWRW 2 /* Supervisor read/write, User read/write */
67#define PP_RXRX 3 /* Supervisor read, User read */
68
69#ifndef __ASSEMBLY__
70
71/* Hardware Page Table Entry */
48typedef struct { 72typedef struct {
49 unsigned long avpn:57; /* vsid | api == avpn */ 73 unsigned long avpn:57; /* vsid | api == avpn */
50 unsigned long : 2; /* Software use */ 74 unsigned long : 2; /* Software use */
@@ -90,14 +114,6 @@ typedef struct {
90 } dw1; 114 } dw1;
91} HPTE; 115} HPTE;
92 116
93/* Values for PP (assumes Ks=0, Kp=1) */
94/* pp0 will always be 0 for linux */
95#define PP_RWXX 0 /* Supervisor read/write, User none */
96#define PP_RWRX 1 /* Supervisor read/write, User read */
97#define PP_RWRW 2 /* Supervisor read/write, User read/write */
98#define PP_RXRX 3 /* Supervisor read, User read */
99
100
101extern HPTE * htab_address; 117extern HPTE * htab_address;
102extern unsigned long htab_hash_mask; 118extern unsigned long htab_hash_mask;
103 119
@@ -174,31 +190,70 @@ extern int __hash_page(unsigned long ea, unsigned long access,
174 190
175extern void htab_finish_init(void); 191extern void htab_finish_init(void);
176 192
193extern void hpte_init_native(void);
194extern void hpte_init_lpar(void);
195extern void hpte_init_iSeries(void);
196
197extern long pSeries_lpar_hpte_insert(unsigned long hpte_group,
198 unsigned long va, unsigned long prpn,
199 int secondary, unsigned long hpteflags,
200 int bolted, int large);
201extern long native_hpte_insert(unsigned long hpte_group, unsigned long va,
202 unsigned long prpn, int secondary,
203 unsigned long hpteflags, int bolted, int large);
204
177#endif /* __ASSEMBLY__ */ 205#endif /* __ASSEMBLY__ */
178 206
179/* 207/*
180 * Location of cpu0's segment table 208 * VSID allocation
209 *
210 * We first generate a 36-bit "proto-VSID". For kernel addresses this
211 * is equal to the ESID, for user addresses it is:
212 * (context << 15) | (esid & 0x7fff)
213 *
214 * The two forms are distinguishable because the top bit is 0 for user
215 * addresses, whereas the top two bits are 1 for kernel addresses.
216 * Proto-VSIDs with the top two bits equal to 0b10 are reserved for
217 * now.
218 *
219 * The proto-VSIDs are then scrambled into real VSIDs with the
220 * multiplicative hash:
221 *
222 * VSID = (proto-VSID * VSID_MULTIPLIER) % VSID_MODULUS
223 * where VSID_MULTIPLIER = 268435399 = 0xFFFFFC7
224 * VSID_MODULUS = 2^36-1 = 0xFFFFFFFFF
225 *
226 * This scramble is only well defined for proto-VSIDs below
227 * 0xFFFFFFFFF, so both proto-VSID and actual VSID 0xFFFFFFFFF are
228 * reserved. VSID_MULTIPLIER is prime, so in particular it is
229 * co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
230 * Because the modulus is 2^n-1 we can compute it efficiently without
231 * a divide or extra multiply (see below).
232 *
233 * This scheme has several advantages over older methods:
234 *
235 * - We have VSIDs allocated for every kernel address
236 * (i.e. everything above 0xC000000000000000), except the very top
237 * segment, which simplifies several things.
238 *
239 * - We allow for 15 significant bits of ESID and 20 bits of
240 * context for user addresses. i.e. 8T (43 bits) of address space for
241 * up to 1M contexts (although the page table structure and context
242 * allocation will need changes to take advantage of this).
243 *
244 * - The scramble function gives robust scattering in the hash
245 * table (at least based on some initial results). The previous
246 * method was more susceptible to pathological cases giving excessive
247 * hash collisions.
248 */
249/*
250 * WARNING - If you change these you must make sure the asm
251 * implementations in slb_allocate (slb_low.S), do_stab_bolted
252 * (head.S) and ASM_VSID_SCRAMBLE (below) are changed accordingly.
253 *
254 * You'll also need to change the precomputed VSID values in head.S
255 * which are used by the iSeries firmware.
181 */ 256 */
182#define STAB0_PAGE 0x9
183#define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT)
184#define STAB0_VIRT_ADDR (KERNELBASE+STAB0_PHYS_ADDR)
185
186#define SLB_NUM_BOLTED 3
187#define SLB_CACHE_ENTRIES 8
188
189/* Bits in the SLB ESID word */
190#define SLB_ESID_V 0x0000000008000000 /* entry is valid */
191
192/* Bits in the SLB VSID word */
193#define SLB_VSID_SHIFT 12
194#define SLB_VSID_KS 0x0000000000000800
195#define SLB_VSID_KP 0x0000000000000400
196#define SLB_VSID_N 0x0000000000000200 /* no-execute */
197#define SLB_VSID_L 0x0000000000000100 /* largepage (4M) */
198#define SLB_VSID_C 0x0000000000000080 /* class */
199
200#define SLB_VSID_KERNEL (SLB_VSID_KP|SLB_VSID_C)
201#define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS)
202 257
203#define VSID_MULTIPLIER ASM_CONST(200730139) /* 28-bit prime */ 258#define VSID_MULTIPLIER ASM_CONST(200730139) /* 28-bit prime */
204#define VSID_BITS 36 259#define VSID_BITS 36
@@ -239,4 +294,50 @@ extern void htab_finish_init(void);
239 srdi rx,rx,VSID_BITS; /* extract 2^36 bit */ \ 294 srdi rx,rx,VSID_BITS; /* extract 2^36 bit */ \
240 add rt,rt,rx 295 add rt,rt,rx
241 296
297
298#ifndef __ASSEMBLY__
299
300typedef unsigned long mm_context_id_t;
301
302typedef struct {
303 mm_context_id_t id;
304#ifdef CONFIG_HUGETLB_PAGE
305 pgd_t *huge_pgdir;
306 u16 htlb_segs; /* bitmask */
307#endif
308} mm_context_t;
309
310
311static inline unsigned long vsid_scramble(unsigned long protovsid)
312{
313#if 0
314 /* The code below is equivalent to this function for arguments
315 * < 2^VSID_BITS, which is all this should ever be called
316 * with. However gcc is not clever enough to compute the
317 * modulus (2^n-1) without a second multiply. */
318 return ((protovsid * VSID_MULTIPLIER) % VSID_MODULUS);
319#else /* 1 */
320 unsigned long x;
321
322 x = protovsid * VSID_MULTIPLIER;
323 x = (x >> VSID_BITS) + (x & VSID_MODULUS);
324 return (x + ((x+1) >> VSID_BITS)) & VSID_MODULUS;
325#endif /* 1 */
326}
327
328/* This is only valid for addresses >= KERNELBASE */
329static inline unsigned long get_kernel_vsid(unsigned long ea)
330{
331 return vsid_scramble(ea >> SID_SHIFT);
332}
333
334/* This is only valid for user addresses (which are below 2^41) */
335static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
336{
337 return vsid_scramble((context << USER_ESID_BITS)
338 | (ea >> SID_SHIFT));
339}
340
341#endif /* __ASSEMBLY */
342
242#endif /* _PPC64_MMU_H_ */ 343#endif /* _PPC64_MMU_H_ */