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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-ppc64/memory.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-ppc64/memory.h')
-rw-r--r--include/asm-ppc64/memory.h59
1 files changed, 59 insertions, 0 deletions
diff --git a/include/asm-ppc64/memory.h b/include/asm-ppc64/memory.h
new file mode 100644
index 000000000000..56e09face9a8
--- /dev/null
+++ b/include/asm-ppc64/memory.h
@@ -0,0 +1,59 @@
1#ifndef _ASM_PPC64_MEMORY_H_
2#define _ASM_PPC64_MEMORY_H_
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#include <linux/config.h>
12
13/*
14 * Arguably the bitops and *xchg operations don't imply any memory barrier
15 * or SMP ordering, but in fact a lot of drivers expect them to imply
16 * both, since they do on x86 cpus.
17 */
18#ifdef CONFIG_SMP
19#define EIEIO_ON_SMP "eieio\n"
20#define ISYNC_ON_SMP "\n\tisync"
21#else
22#define EIEIO_ON_SMP
23#define ISYNC_ON_SMP
24#endif
25
26static inline void eieio(void)
27{
28 __asm__ __volatile__ ("eieio" : : : "memory");
29}
30
31static inline void isync(void)
32{
33 __asm__ __volatile__ ("isync" : : : "memory");
34}
35
36#ifdef CONFIG_SMP
37#define eieio_on_smp() eieio()
38#define isync_on_smp() isync()
39#else
40#define eieio_on_smp() __asm__ __volatile__("": : :"memory")
41#define isync_on_smp() __asm__ __volatile__("": : :"memory")
42#endif
43
44/* Macros for adjusting thread priority (hardware multi-threading) */
45#define HMT_very_low() asm volatile("or 31,31,31 # very low priority")
46#define HMT_low() asm volatile("or 1,1,1 # low priority")
47#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority")
48#define HMT_medium() asm volatile("or 2,2,2 # medium priority")
49#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority")
50#define HMT_high() asm volatile("or 3,3,3 # high priority")
51
52#define HMT_VERY_LOW "\tor 31,31,31 # very low priority\n"
53#define HMT_LOW "\tor 1,1,1 # low priority\n"
54#define HMT_MEDIUM_LOW "\tor 6,6,6 # medium low priority\n"
55#define HMT_MEDIUM "\tor 2,2,2 # medium priority\n"
56#define HMT_MEDIUM_HIGH "\tor 5,5,5 # medium high priority\n"
57#define HMT_HIGH "\tor 3,3,3 # high priority\n"
58
59#endif