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authorJeff Garzik <jgarzik@pobox.com>2005-11-04 21:39:31 -0500
committerJeff Garzik <jgarzik@pobox.com>2005-11-04 21:39:31 -0500
commitc2cc87ca9561ddfe744d446789cc10f507e87db9 (patch)
treed505fc0110eb1a3d8750ba2f67648c131f0d9aca /include/asm-ppc64/irq.h
parentce1eeb95fc4eb25109c00bea3e83a87eeff6b07d (diff)
parent7015faa7df829876a0f931cd18aa6d7c24a1b581 (diff)
Merge branch 'master'
Diffstat (limited to 'include/asm-ppc64/irq.h')
-rw-r--r--include/asm-ppc64/irq.h120
1 files changed, 0 insertions, 120 deletions
diff --git a/include/asm-ppc64/irq.h b/include/asm-ppc64/irq.h
deleted file mode 100644
index 99782afb4cde..000000000000
--- a/include/asm-ppc64/irq.h
+++ /dev/null
@@ -1,120 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _ASM_IRQ_H
3#define _ASM_IRQ_H
4
5/*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/config.h>
13#include <linux/threads.h>
14
15/*
16 * Maximum number of interrupt sources that we can handle.
17 */
18#define NR_IRQS 512
19
20/* this number is used when no interrupt has been assigned */
21#define NO_IRQ (-1)
22
23/*
24 * These constants are used for passing information about interrupt
25 * signal polarity and level/edge sensing to the low-level PIC chip
26 * drivers.
27 */
28#define IRQ_SENSE_MASK 0x1
29#define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */
30#define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */
31
32#define IRQ_POLARITY_MASK 0x2
33#define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */
34#define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */
35
36/*
37 * IRQ line status macro IRQ_PER_CPU is used
38 */
39#define ARCH_HAS_IRQ_PER_CPU
40
41#define get_irq_desc(irq) (&irq_desc[(irq)])
42
43/* Define a way to iterate across irqs. */
44#define for_each_irq(i) \
45 for ((i) = 0; (i) < NR_IRQS; ++(i))
46
47/* Interrupt numbers are virtual in case they are sparsely
48 * distributed by the hardware.
49 */
50extern unsigned int virt_irq_to_real_map[NR_IRQS];
51
52/* Create a mapping for a real_irq if it doesn't already exist.
53 * Return the virtual irq as a convenience.
54 */
55int virt_irq_create_mapping(unsigned int real_irq);
56void virt_irq_init(void);
57
58static inline unsigned int virt_irq_to_real(unsigned int virt_irq)
59{
60 return virt_irq_to_real_map[virt_irq];
61}
62
63extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq);
64
65/*
66 * Because many systems have two overlapping names spaces for
67 * interrupts (ISA and XICS for example), and the ISA interrupts
68 * have historically not been easy to renumber, we allow ISA
69 * interrupts to take values 0 - 15, and shift up the remaining
70 * interrupts by 0x10.
71 */
72#define NUM_ISA_INTERRUPTS 0x10
73extern int __irq_offset_value;
74
75static inline int irq_offset_up(int irq)
76{
77 return(irq + __irq_offset_value);
78}
79
80static inline int irq_offset_down(int irq)
81{
82 return(irq - __irq_offset_value);
83}
84
85static inline int irq_offset_value(void)
86{
87 return __irq_offset_value;
88}
89
90static __inline__ int irq_canonicalize(int irq)
91{
92 return irq;
93}
94
95extern int distribute_irqs;
96
97struct irqaction;
98struct pt_regs;
99
100#ifdef CONFIG_IRQSTACKS
101/*
102 * Per-cpu stacks for handling hard and soft interrupts.
103 */
104extern struct thread_info *hardirq_ctx[NR_CPUS];
105extern struct thread_info *softirq_ctx[NR_CPUS];
106
107extern void irq_ctx_init(void);
108extern void call_do_softirq(struct thread_info *tp);
109extern int call_handle_IRQ_event(int irq, struct pt_regs *regs,
110 struct irqaction *action, struct thread_info *tp);
111
112#define __ARCH_HAS_DO_SOFTIRQ
113
114#else
115#define irq_ctx_init()
116
117#endif /* CONFIG_IRQSTACKS */
118
119#endif /* _ASM_IRQ_H */
120#endif /* __KERNEL__ */