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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-ppc64/io.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-ppc64/io.h')
-rw-r--r--include/asm-ppc64/io.h458
1 files changed, 458 insertions, 0 deletions
diff --git a/include/asm-ppc64/io.h b/include/asm-ppc64/io.h
new file mode 100644
index 000000000000..aba1dfa388ba
--- /dev/null
+++ b/include/asm-ppc64/io.h
@@ -0,0 +1,458 @@
1#ifndef _PPC64_IO_H
2#define _PPC64_IO_H
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#include <linux/config.h>
12#include <linux/compiler.h>
13#include <asm/page.h>
14#include <asm/byteorder.h>
15#ifdef CONFIG_PPC_ISERIES
16#include <asm/iSeries/iSeries_io.h>
17#endif
18#include <asm/memory.h>
19#include <asm/delay.h>
20
21#include <asm-generic/iomap.h>
22
23#define __ide_mm_insw(p, a, c) _insw_ns((volatile u16 *)(p), (a), (c))
24#define __ide_mm_insl(p, a, c) _insl_ns((volatile u32 *)(p), (a), (c))
25#define __ide_mm_outsw(p, a, c) _outsw_ns((volatile u16 *)(p), (a), (c))
26#define __ide_mm_outsl(p, a, c) _outsl_ns((volatile u32 *)(p), (a), (c))
27
28
29#define SIO_CONFIG_RA 0x398
30#define SIO_CONFIG_RD 0x399
31
32#define SLOW_DOWN_IO
33
34extern unsigned long isa_io_base;
35extern unsigned long pci_io_base;
36extern unsigned long io_page_mask;
37
38#define MAX_ISA_PORT 0x10000
39
40#define _IO_IS_VALID(port) ((port) >= MAX_ISA_PORT || (1 << (port>>PAGE_SHIFT)) \
41 & io_page_mask)
42
43#ifdef CONFIG_PPC_ISERIES
44/* __raw_* accessors aren't supported on iSeries */
45#define __raw_readb(addr) { BUG(); 0; }
46#define __raw_readw(addr) { BUG(); 0; }
47#define __raw_readl(addr) { BUG(); 0; }
48#define __raw_readq(addr) { BUG(); 0; }
49#define __raw_writeb(v, addr) { BUG(); 0; }
50#define __raw_writew(v, addr) { BUG(); 0; }
51#define __raw_writel(v, addr) { BUG(); 0; }
52#define __raw_writeq(v, addr) { BUG(); 0; }
53#define readb(addr) iSeries_Read_Byte(addr)
54#define readw(addr) iSeries_Read_Word(addr)
55#define readl(addr) iSeries_Read_Long(addr)
56#define writeb(data, addr) iSeries_Write_Byte((data),(addr))
57#define writew(data, addr) iSeries_Write_Word((data),(addr))
58#define writel(data, addr) iSeries_Write_Long((data),(addr))
59#define memset_io(a,b,c) iSeries_memset_io((a),(b),(c))
60#define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((a), (b), (c))
61#define memcpy_toio(a,b,c) iSeries_memcpy_toio((a), (b), (c))
62
63#define inb(addr) readb(((void __iomem *)(long)(addr)))
64#define inw(addr) readw(((void __iomem *)(long)(addr)))
65#define inl(addr) readl(((void __iomem *)(long)(addr)))
66#define outb(data,addr) writeb(data,((void __iomem *)(long)(addr)))
67#define outw(data,addr) writew(data,((void __iomem *)(long)(addr)))
68#define outl(data,addr) writel(data,((void __iomem *)(long)(addr)))
69/*
70 * The *_ns versions below don't do byte-swapping.
71 * Neither do the standard versions now, these are just here
72 * for older code.
73 */
74#define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
75#define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
76#else
77
78static inline unsigned char __raw_readb(const volatile void __iomem *addr)
79{
80 return *(volatile unsigned char __force *)addr;
81}
82static inline unsigned short __raw_readw(const volatile void __iomem *addr)
83{
84 return *(volatile unsigned short __force *)addr;
85}
86static inline unsigned int __raw_readl(const volatile void __iomem *addr)
87{
88 return *(volatile unsigned int __force *)addr;
89}
90static inline unsigned long __raw_readq(const volatile void __iomem *addr)
91{
92 return *(volatile unsigned long __force *)addr;
93}
94static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
95{
96 *(volatile unsigned char __force *)addr = v;
97}
98static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
99{
100 *(volatile unsigned short __force *)addr = v;
101}
102static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
103{
104 *(volatile unsigned int __force *)addr = v;
105}
106static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
107{
108 *(volatile unsigned long __force *)addr = v;
109}
110#define readb(addr) eeh_readb(addr)
111#define readw(addr) eeh_readw(addr)
112#define readl(addr) eeh_readl(addr)
113#define readq(addr) eeh_readq(addr)
114#define writeb(data, addr) eeh_writeb((data), (addr))
115#define writew(data, addr) eeh_writew((data), (addr))
116#define writel(data, addr) eeh_writel((data), (addr))
117#define writeq(data, addr) eeh_writeq((data), (addr))
118#define memset_io(a,b,c) eeh_memset_io((a),(b),(c))
119#define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c))
120#define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c))
121#define inb(port) eeh_inb((unsigned long)port)
122#define outb(val, port) eeh_outb(val, (unsigned long)port)
123#define inw(port) eeh_inw((unsigned long)port)
124#define outw(val, port) eeh_outw(val, (unsigned long)port)
125#define inl(port) eeh_inl((unsigned long)port)
126#define outl(val, port) eeh_outl(val, (unsigned long)port)
127
128/*
129 * The insw/outsw/insl/outsl macros don't do byte-swapping.
130 * They are only used in practice for transferring buffers which
131 * are arrays of bytes, and byte-swapping is not appropriate in
132 * that case. - paulus */
133#define insb(port, buf, ns) eeh_insb((port), (buf), (ns))
134#define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
135#define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
136#define insw_ns(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
137#define insl_ns(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
138
139#define outsb(port, buf, ns) _outsb((u8 *)((port)+pci_io_base), (buf), (ns))
140#define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
141#define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
142
143#endif
144
145#define readb_relaxed(addr) readb(addr)
146#define readw_relaxed(addr) readw(addr)
147#define readl_relaxed(addr) readl(addr)
148#define readq_relaxed(addr) readq(addr)
149
150extern void _insb(volatile u8 *port, void *buf, int ns);
151extern void _outsb(volatile u8 *port, const void *buf, int ns);
152extern void _insw(volatile u16 *port, void *buf, int ns);
153extern void _outsw(volatile u16 *port, const void *buf, int ns);
154extern void _insl(volatile u32 *port, void *buf, int nl);
155extern void _outsl(volatile u32 *port, const void *buf, int nl);
156extern void _insw_ns(volatile u16 *port, void *buf, int ns);
157extern void _outsw_ns(volatile u16 *port, const void *buf, int ns);
158extern void _insl_ns(volatile u32 *port, void *buf, int nl);
159extern void _outsl_ns(volatile u32 *port, const void *buf, int nl);
160
161#define mmiowb()
162
163/*
164 * output pause versions need a delay at least for the
165 * w83c105 ide controller in a p610.
166 */
167#define inb_p(port) inb(port)
168#define outb_p(val, port) (udelay(1), outb((val), (port)))
169#define inw_p(port) inw(port)
170#define outw_p(val, port) (udelay(1), outw((val), (port)))
171#define inl_p(port) inl(port)
172#define outl_p(val, port) (udelay(1), outl((val), (port)))
173
174/*
175 * The *_ns versions below don't do byte-swapping.
176 * Neither do the standard versions now, these are just here
177 * for older code.
178 */
179#define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
180#define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
181
182
183#define IO_SPACE_LIMIT ~(0UL)
184
185
186#ifdef __KERNEL__
187extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr,
188 unsigned long size, unsigned long flags);
189extern void __iomem *__ioremap(unsigned long address, unsigned long size,
190 unsigned long flags);
191
192/**
193 * ioremap - map bus memory into CPU space
194 * @address: bus address of the memory
195 * @size: size of the resource to map
196 *
197 * ioremap performs a platform specific sequence of operations to
198 * make bus memory CPU accessible via the readb/readw/readl/writeb/
199 * writew/writel functions and the other mmio helpers. The returned
200 * address is not guaranteed to be usable directly as a virtual
201 * address.
202 */
203extern void __iomem *ioremap(unsigned long address, unsigned long size);
204
205#define ioremap_nocache(addr, size) ioremap((addr), (size))
206extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size);
207extern void iounmap(volatile void __iomem *addr);
208extern void __iomem * reserve_phb_iospace(unsigned long size);
209
210/**
211 * virt_to_phys - map virtual addresses to physical
212 * @address: address to remap
213 *
214 * The returned physical address is the physical (CPU) mapping for
215 * the memory address given. It is only valid to use this function on
216 * addresses directly mapped or allocated via kmalloc.
217 *
218 * This function does not give bus mappings for DMA transfers. In
219 * almost all conceivable cases a device driver should not be using
220 * this function
221 */
222static inline unsigned long virt_to_phys(volatile void * address)
223{
224 return __pa((unsigned long)address);
225}
226
227/**
228 * phys_to_virt - map physical address to virtual
229 * @address: address to remap
230 *
231 * The returned virtual address is a current CPU mapping for
232 * the memory address given. It is only valid to use this function on
233 * addresses that have a kernel mapping
234 *
235 * This function does not handle bus mappings for DMA transfers. In
236 * almost all conceivable cases a device driver should not be using
237 * this function
238 */
239static inline void * phys_to_virt(unsigned long address)
240{
241 return (void *)__va(address);
242}
243
244/*
245 * Change "struct page" to physical address.
246 */
247#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
248
249/* We do NOT want virtual merging, it would put too much pressure on
250 * our iommu allocator. Instead, we want drivers to be smart enough
251 * to coalesce sglists that happen to have been mapped in a contiguous
252 * way by the iommu
253 */
254#define BIO_VMERGE_BOUNDARY 0
255
256#endif /* __KERNEL__ */
257
258static inline void iosync(void)
259{
260 __asm__ __volatile__ ("sync" : : : "memory");
261}
262
263/* Enforce in-order execution of data I/O.
264 * No distinction between read/write on PPC; use eieio for all three.
265 */
266#define iobarrier_rw() eieio()
267#define iobarrier_r() eieio()
268#define iobarrier_w() eieio()
269
270/*
271 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
272 * These routines do not perform EEH-related I/O address translation,
273 * and should not be used directly by device drivers. Use inb/readb
274 * instead.
275 */
276static inline int in_8(const volatile unsigned char __iomem *addr)
277{
278 int ret;
279
280 __asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
281 : "=r" (ret) : "m" (*addr));
282 return ret;
283}
284
285static inline void out_8(volatile unsigned char __iomem *addr, int val)
286{
287 __asm__ __volatile__("stb%U0%X0 %1,%0; sync"
288 : "=m" (*addr) : "r" (val));
289}
290
291static inline int in_le16(const volatile unsigned short __iomem *addr)
292{
293 int ret;
294
295 __asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync"
296 : "=r" (ret) : "r" (addr), "m" (*addr));
297 return ret;
298}
299
300static inline int in_be16(const volatile unsigned short __iomem *addr)
301{
302 int ret;
303
304 __asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
305 : "=r" (ret) : "m" (*addr));
306 return ret;
307}
308
309static inline void out_le16(volatile unsigned short __iomem *addr, int val)
310{
311 __asm__ __volatile__("sthbrx %1,0,%2; sync"
312 : "=m" (*addr) : "r" (val), "r" (addr));
313}
314
315static inline void out_be16(volatile unsigned short __iomem *addr, int val)
316{
317 __asm__ __volatile__("sth%U0%X0 %1,%0; sync"
318 : "=m" (*addr) : "r" (val));
319}
320
321static inline unsigned in_le32(const volatile unsigned __iomem *addr)
322{
323 unsigned ret;
324
325 __asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync"
326 : "=r" (ret) : "r" (addr), "m" (*addr));
327 return ret;
328}
329
330static inline unsigned in_be32(const volatile unsigned __iomem *addr)
331{
332 unsigned ret;
333
334 __asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
335 : "=r" (ret) : "m" (*addr));
336 return ret;
337}
338
339static inline void out_le32(volatile unsigned __iomem *addr, int val)
340{
341 __asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr)
342 : "r" (val), "r" (addr));
343}
344
345static inline void out_be32(volatile unsigned __iomem *addr, int val)
346{
347 __asm__ __volatile__("stw%U0%X0 %1,%0; sync"
348 : "=m" (*addr) : "r" (val));
349}
350
351static inline unsigned long in_le64(const volatile unsigned long __iomem *addr)
352{
353 unsigned long tmp, ret;
354
355 __asm__ __volatile__(
356 "ld %1,0(%2)\n"
357 "twi 0,%1,0\n"
358 "isync\n"
359 "rldimi %0,%1,5*8,1*8\n"
360 "rldimi %0,%1,3*8,2*8\n"
361 "rldimi %0,%1,1*8,3*8\n"
362 "rldimi %0,%1,7*8,4*8\n"
363 "rldicl %1,%1,32,0\n"
364 "rlwimi %0,%1,8,8,31\n"
365 "rlwimi %0,%1,24,16,23\n"
366 : "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr));
367 return ret;
368}
369
370static inline unsigned long in_be64(const volatile unsigned long __iomem *addr)
371{
372 unsigned long ret;
373
374 __asm__ __volatile__("ld%U1%X1 %0,%1; twi 0,%0,0; isync"
375 : "=r" (ret) : "m" (*addr));
376 return ret;
377}
378
379static inline void out_le64(volatile unsigned long __iomem *addr, unsigned long val)
380{
381 unsigned long tmp;
382
383 __asm__ __volatile__(
384 "rldimi %0,%1,5*8,1*8\n"
385 "rldimi %0,%1,3*8,2*8\n"
386 "rldimi %0,%1,1*8,3*8\n"
387 "rldimi %0,%1,7*8,4*8\n"
388 "rldicl %1,%1,32,0\n"
389 "rlwimi %0,%1,8,8,31\n"
390 "rlwimi %0,%1,24,16,23\n"
391 "std %0,0(%3)\n"
392 "sync"
393 : "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr));
394}
395
396static inline void out_be64(volatile unsigned long __iomem *addr, unsigned long val)
397{
398 __asm__ __volatile__("std%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val));
399}
400
401#ifndef CONFIG_PPC_ISERIES
402#include <asm/eeh.h>
403#endif
404
405#ifdef __KERNEL__
406
407/**
408 * check_signature - find BIOS signatures
409 * @io_addr: mmio address to check
410 * @signature: signature block
411 * @length: length of signature
412 *
413 * Perform a signature comparison with the mmio address io_addr. This
414 * address should have been obtained by ioremap.
415 * Returns 1 on a match.
416 */
417static inline int check_signature(const volatile void __iomem * io_addr,
418 const unsigned char *signature, int length)
419{
420 int retval = 0;
421#ifndef CONFIG_PPC_ISERIES
422 do {
423 if (readb(io_addr) != *signature)
424 goto out;
425 io_addr++;
426 signature++;
427 length--;
428 } while (length);
429 retval = 1;
430out:
431#endif
432 return retval;
433}
434
435/* Nothing to do */
436
437#define dma_cache_inv(_start,_size) do { } while (0)
438#define dma_cache_wback(_start,_size) do { } while (0)
439#define dma_cache_wback_inv(_start,_size) do { } while (0)
440
441/* Check of existence of legacy devices */
442extern int check_legacy_ioport(unsigned long base_port);
443
444
445/*
446 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
447 * access
448 */
449#define xlate_dev_mem_ptr(p) __va(p)
450
451/*
452 * Convert a virtual cached pointer to an uncached pointer
453 */
454#define xlate_dev_kmem_ptr(p) p
455
456#endif /* __KERNEL__ */
457
458#endif /* _PPC64_IO_H */