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authorDavid Woodhouse <dwmw2@shinybook.infradead.org>2005-07-02 08:39:09 -0400
committerDavid Woodhouse <dwmw2@shinybook.infradead.org>2005-07-02 08:39:09 -0400
commitd2f6409584e2c62ffad81690562330ff3bf4a458 (patch)
tree3bdfb97d0b51be2f7f414f2107e97603c1206abb /include/asm-ppc64/iSeries/HvCallPci.h
parente1b09eba2686eca94a3a188042b518df6044a3c1 (diff)
parent4a89a04f1ee21a7c1f4413f1ad7dcfac50ff9b63 (diff)
Merge with master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Diffstat (limited to 'include/asm-ppc64/iSeries/HvCallPci.h')
-rw-r--r--include/asm-ppc64/iSeries/HvCallPci.h486
1 files changed, 173 insertions, 313 deletions
diff --git a/include/asm-ppc64/iSeries/HvCallPci.h b/include/asm-ppc64/iSeries/HvCallPci.h
index 6887b619288e..c8d675c40f5e 100644
--- a/include/asm-ppc64/iSeries/HvCallPci.h
+++ b/include/asm-ppc64/iSeries/HvCallPci.h
@@ -1,26 +1,26 @@
1/************************************************************************/ 1/*
2/* Provides the Hypervisor PCI calls for iSeries Linux Parition. */ 2 * Provides the Hypervisor PCI calls for iSeries Linux Parition.
3/* Copyright (C) 2001 <Wayne G Holm> <IBM Corporation> */ 3 * Copyright (C) 2001 <Wayne G Holm> <IBM Corporation>
4/* */ 4 *
5/* This program is free software; you can redistribute it and/or modify */ 5 * This program is free software; you can redistribute it and/or modify
6/* it under the terms of the GNU General Public License as published by */ 6 * it under the terms of the GNU General Public License as published by
7/* the Free Software Foundation; either version 2 of the License, or */ 7 * the Free Software Foundation; either version 2 of the License, or
8/* (at your option) any later version. */ 8 * (at your option) any later version.
9/* */ 9 *
10/* This program is distributed in the hope that it will be useful, */ 10 * This program is distributed in the hope that it will be useful,
11/* but WITHOUT ANY WARRANTY; without even the implied warranty of */ 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13/* GNU General Public License for more details. */ 13 * GNU General Public License for more details.
14/* */ 14 *
15/* You should have received a copy of the GNU General Public License */ 15 * You should have received a copy of the GNU General Public License
16/* along with this program; if not, write to the: */ 16 * along with this program; if not, write to the:
17/* Free Software Foundation, Inc., */ 17 * Free Software Foundation, Inc.,
18/* 59 Temple Place, Suite 330, */ 18 * 59 Temple Place, Suite 330,
19/* Boston, MA 02111-1307 USA */ 19 * Boston, MA 02111-1307 USA
20/************************************************************************/ 20 *
21/* Change Activity: */ 21 * Change Activity:
22/* Created, Jan 9, 2001 */ 22 * Created, Jan 9, 2001
23/************************************************************************/ 23 */
24 24
25#ifndef _HVCALLPCI_H 25#ifndef _HVCALLPCI_H
26#define _HVCALLPCI_H 26#define _HVCALLPCI_H
@@ -34,8 +34,8 @@
34 */ 34 */
35struct HvCallPci_DsaAddr { 35struct HvCallPci_DsaAddr {
36 u16 busNumber; /* PHB index? */ 36 u16 busNumber; /* PHB index? */
37 u8 subBusNumber; /* PCI bus number? */ 37 u8 subBusNumber; /* PCI bus number? */
38 u8 deviceId; /* device and function? */ 38 u8 deviceId; /* device and function? */
39 u8 barNumber; 39 u8 barNumber;
40 u8 reserved[3]; 40 u8 reserved[3];
41}; 41};
@@ -52,34 +52,37 @@ struct HvCallPci_LoadReturn {
52 52
53enum HvCallPci_DeviceType { 53enum HvCallPci_DeviceType {
54 HvCallPci_NodeDevice = 1, 54 HvCallPci_NodeDevice = 1,
55 HvCallPci_SpDevice = 2, 55 HvCallPci_SpDevice = 2,
56 HvCallPci_IopDevice = 3, 56 HvCallPci_IopDevice = 3,
57 HvCallPci_BridgeDevice = 4, 57 HvCallPci_BridgeDevice = 4,
58 HvCallPci_MultiFunctionDevice = 5, 58 HvCallPci_MultiFunctionDevice = 5,
59 HvCallPci_IoaDevice = 6 59 HvCallPci_IoaDevice = 6
60}; 60};
61 61
62 62
63struct HvCallPci_DeviceInfo { 63struct HvCallPci_DeviceInfo {
64 u32 deviceType; // See DeviceType enum for values 64 u32 deviceType; /* See DeviceType enum for values */
65}; 65};
66 66
67struct HvCallPci_BusUnitInfo { 67struct HvCallPci_BusUnitInfo {
68 u32 sizeReturned; // length of data returned 68 u32 sizeReturned; /* length of data returned */
69 u32 deviceType; // see DeviceType enum for values 69 u32 deviceType; /* see DeviceType enum for values */
70}; 70};
71 71
72struct HvCallPci_BridgeInfo { 72struct HvCallPci_BridgeInfo {
73 struct HvCallPci_BusUnitInfo busUnitInfo; // Generic bus unit info 73 struct HvCallPci_BusUnitInfo busUnitInfo; /* Generic bus unit info */
74 u8 subBusNumber; // Bus number of secondary bus 74 u8 subBusNumber; /* Bus number of secondary bus */
75 u8 maxAgents; // Max idsels on secondary bus 75 u8 maxAgents; /* Max idsels on secondary bus */
76 u8 maxSubBusNumber; // Max Sub Bus 76 u8 maxSubBusNumber; /* Max Sub Bus */
77 u8 logicalSlotNumber; // Logical Slot Number for IOA 77 u8 logicalSlotNumber; /* Logical Slot Number for IOA */
78}; 78};
79
80 79
81// Maximum BusUnitInfo buffer size. Provided for clients so they can allocate 80
82// a buffer big enough for any type of bus unit. Increase as needed. 81/*
82 * Maximum BusUnitInfo buffer size. Provided for clients so
83 * they can allocate a buffer big enough for any type of bus
84 * unit. Increase as needed.
85 */
83enum {HvCallPci_MaxBusUnitInfoSize = 128}; 86enum {HvCallPci_MaxBusUnitInfoSize = 128};
84 87
85struct HvCallPci_BarParms { 88struct HvCallPci_BarParms {
@@ -89,12 +92,12 @@ struct HvCallPci_BarParms {
89 u64 protectStart; 92 u64 protectStart;
90 u64 protectEnd; 93 u64 protectEnd;
91 u64 relocationOffset; 94 u64 relocationOffset;
92 u64 pciAddress; 95 u64 pciAddress;
93 u64 reserved[3]; 96 u64 reserved[3];
94}; 97};
95 98
96enum HvCallPci_VpdType { 99enum HvCallPci_VpdType {
97 HvCallPci_BusVpd = 1, 100 HvCallPci_BusVpd = 1,
98 HvCallPci_BusAdapterVpd = 2 101 HvCallPci_BusAdapterVpd = 2
99}; 102};
100 103
@@ -123,15 +126,13 @@ enum HvCallPci_VpdType {
123#define HvCallPciUnmaskInterrupts HvCallPci + 49 126#define HvCallPciUnmaskInterrupts HvCallPci + 49
124#define HvCallPciGetBusUnitInfo HvCallPci + 50 127#define HvCallPciGetBusUnitInfo HvCallPci + 50
125 128
126//============================================================================
127static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber, 129static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
128 u8 deviceId, u32 offset, 130 u8 deviceId, u32 offset, u8 *value)
129 u8 *value)
130{ 131{
131 struct HvCallPci_DsaAddr dsa; 132 struct HvCallPci_DsaAddr dsa;
132 struct HvCallPci_LoadReturn retVal; 133 struct HvCallPci_LoadReturn retVal;
133 134
134 *((u64*)&dsa) = 0; 135 *((u64*)&dsa) = 0;
135 136
136 dsa.busNumber = busNumber; 137 dsa.busNumber = busNumber;
137 dsa.subBusNumber = subBusNumber; 138 dsa.subBusNumber = subBusNumber;
@@ -139,21 +140,18 @@ static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
139 140
140 HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0); 141 HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0);
141 142
142 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
143
144 *value = retVal.value; 143 *value = retVal.value;
145 144
146 return retVal.rc; 145 return retVal.rc;
147} 146}
148//============================================================================ 147
149static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber, 148static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
150 u8 deviceId, u32 offset, 149 u8 deviceId, u32 offset, u16 *value)
151 u16 *value)
152{ 150{
153 struct HvCallPci_DsaAddr dsa; 151 struct HvCallPci_DsaAddr dsa;
154 struct HvCallPci_LoadReturn retVal; 152 struct HvCallPci_LoadReturn retVal;
155 153
156 *((u64*)&dsa) = 0; 154 *((u64*)&dsa) = 0;
157 155
158 dsa.busNumber = busNumber; 156 dsa.busNumber = busNumber;
159 dsa.subBusNumber = subBusNumber; 157 dsa.subBusNumber = subBusNumber;
@@ -161,21 +159,18 @@ static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
161 159
162 HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0); 160 HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
163 161
164 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
165
166 *value = retVal.value; 162 *value = retVal.value;
167 163
168 return retVal.rc; 164 return retVal.rc;
169} 165}
170//============================================================================ 166
171static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber, 167static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
172 u8 deviceId, u32 offset, 168 u8 deviceId, u32 offset, u32 *value)
173 u32 *value)
174{ 169{
175 struct HvCallPci_DsaAddr dsa; 170 struct HvCallPci_DsaAddr dsa;
176 struct HvCallPci_LoadReturn retVal; 171 struct HvCallPci_LoadReturn retVal;
177 172
178 *((u64*)&dsa) = 0; 173 *((u64*)&dsa) = 0;
179 174
180 dsa.busNumber = busNumber; 175 dsa.busNumber = busNumber;
181 dsa.subBusNumber = subBusNumber; 176 dsa.subBusNumber = subBusNumber;
@@ -183,84 +178,61 @@ static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
183 178
184 HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0); 179 HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
185 180
186 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
187
188 *value = retVal.value; 181 *value = retVal.value;
189 182
190 return retVal.rc; 183 return retVal.rc;
191} 184}
192//============================================================================ 185
193static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber, 186static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
194 u8 deviceId, u32 offset, 187 u8 deviceId, u32 offset, u8 value)
195 u8 value)
196{ 188{
197 struct HvCallPci_DsaAddr dsa; 189 struct HvCallPci_DsaAddr dsa;
198 u64 retVal;
199 190
200 *((u64*)&dsa) = 0; 191 *((u64*)&dsa) = 0;
201 192
202 dsa.busNumber = busNumber; 193 dsa.busNumber = busNumber;
203 dsa.subBusNumber = subBusNumber; 194 dsa.subBusNumber = subBusNumber;
204 dsa.deviceId = deviceId; 195 dsa.deviceId = deviceId;
205 196
206 retVal = HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0); 197 return HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
207
208 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
209
210 return retVal;
211} 198}
212//============================================================================ 199
213static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber, 200static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
214 u8 deviceId, u32 offset, 201 u8 deviceId, u32 offset, u16 value)
215 u16 value)
216{ 202{
217 struct HvCallPci_DsaAddr dsa; 203 struct HvCallPci_DsaAddr dsa;
218 u64 retVal;
219 204
220 *((u64*)&dsa) = 0; 205 *((u64*)&dsa) = 0;
221 206
222 dsa.busNumber = busNumber; 207 dsa.busNumber = busNumber;
223 dsa.subBusNumber = subBusNumber; 208 dsa.subBusNumber = subBusNumber;
224 dsa.deviceId = deviceId; 209 dsa.deviceId = deviceId;
225 210
226 retVal = HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0); 211 return HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
227
228 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
229
230 return retVal;
231} 212}
232//============================================================================ 213
233static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber, 214static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
234 u8 deviceId, u32 offset, 215 u8 deviceId, u32 offset, u32 value)
235 u32 value)
236{ 216{
237 struct HvCallPci_DsaAddr dsa; 217 struct HvCallPci_DsaAddr dsa;
238 u64 retVal;
239 218
240 *((u64*)&dsa) = 0; 219 *((u64*)&dsa) = 0;
241 220
242 dsa.busNumber = busNumber; 221 dsa.busNumber = busNumber;
243 dsa.subBusNumber = subBusNumber; 222 dsa.subBusNumber = subBusNumber;
244 dsa.deviceId = deviceId; 223 dsa.deviceId = deviceId;
245 224
246 retVal = HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0); 225 return HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
247
248 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
249
250 return retVal;
251} 226}
252//============================================================================ 227
253static inline u64 HvCallPci_barLoad8(u16 busNumberParm, 228static inline u64 HvCallPci_barLoad8(u16 busNumberParm, u8 subBusParm,
254 u8 subBusParm, 229 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
255 u8 deviceIdParm, 230 u8 *valueParm)
256 u8 barNumberParm,
257 u64 offsetParm,
258 u8* valueParm)
259{ 231{
260 struct HvCallPci_DsaAddr dsa; 232 struct HvCallPci_DsaAddr dsa;
261 struct HvCallPci_LoadReturn retVal; 233 struct HvCallPci_LoadReturn retVal;
262 234
263 *((u64*)&dsa) = 0; 235 *((u64*)&dsa) = 0;
264 236
265 dsa.busNumber = busNumberParm; 237 dsa.busNumber = busNumberParm;
266 dsa.subBusNumber = subBusParm; 238 dsa.subBusNumber = subBusParm;
@@ -269,24 +241,19 @@ static inline u64 HvCallPci_barLoad8(u16 busNumberParm,
269 241
270 HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0); 242 HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0);
271 243
272 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
273
274 *valueParm = retVal.value; 244 *valueParm = retVal.value;
275 245
276 return retVal.rc; 246 return retVal.rc;
277} 247}
278//============================================================================ 248
279static inline u64 HvCallPci_barLoad16(u16 busNumberParm, 249static inline u64 HvCallPci_barLoad16(u16 busNumberParm, u8 subBusParm,
280 u8 subBusParm, 250 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
281 u8 deviceIdParm, 251 u16 *valueParm)
282 u8 barNumberParm,
283 u64 offsetParm,
284 u16* valueParm)
285{ 252{
286 struct HvCallPci_DsaAddr dsa; 253 struct HvCallPci_DsaAddr dsa;
287 struct HvCallPci_LoadReturn retVal; 254 struct HvCallPci_LoadReturn retVal;
288 255
289 *((u64*)&dsa) = 0; 256 *((u64*)&dsa) = 0;
290 257
291 dsa.busNumber = busNumberParm; 258 dsa.busNumber = busNumberParm;
292 dsa.subBusNumber = subBusParm; 259 dsa.subBusNumber = subBusParm;
@@ -295,24 +262,19 @@ static inline u64 HvCallPci_barLoad16(u16 busNumberParm,
295 262
296 HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0); 263 HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0);
297 264
298 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
299
300 *valueParm = retVal.value; 265 *valueParm = retVal.value;
301 266
302 return retVal.rc; 267 return retVal.rc;
303} 268}
304//============================================================================ 269
305static inline u64 HvCallPci_barLoad32(u16 busNumberParm, 270static inline u64 HvCallPci_barLoad32(u16 busNumberParm, u8 subBusParm,
306 u8 subBusParm, 271 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
307 u8 deviceIdParm, 272 u32 *valueParm)
308 u8 barNumberParm,
309 u64 offsetParm,
310 u32* valueParm)
311{ 273{
312 struct HvCallPci_DsaAddr dsa; 274 struct HvCallPci_DsaAddr dsa;
313 struct HvCallPci_LoadReturn retVal; 275 struct HvCallPci_LoadReturn retVal;
314 276
315 *((u64*)&dsa) = 0; 277 *((u64*)&dsa) = 0;
316 278
317 dsa.busNumber = busNumberParm; 279 dsa.busNumber = busNumberParm;
318 dsa.subBusNumber = subBusParm; 280 dsa.subBusNumber = subBusParm;
@@ -321,24 +283,19 @@ static inline u64 HvCallPci_barLoad32(u16 busNumberParm,
321 283
322 HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0); 284 HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0);
323 285
324 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
325
326 *valueParm = retVal.value; 286 *valueParm = retVal.value;
327 287
328 return retVal.rc; 288 return retVal.rc;
329} 289}
330//============================================================================ 290
331static inline u64 HvCallPci_barLoad64(u16 busNumberParm, 291static inline u64 HvCallPci_barLoad64(u16 busNumberParm, u8 subBusParm,
332 u8 subBusParm, 292 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
333 u8 deviceIdParm, 293 u64 *valueParm)
334 u8 barNumberParm,
335 u64 offsetParm,
336 u64* valueParm)
337{ 294{
338 struct HvCallPci_DsaAddr dsa; 295 struct HvCallPci_DsaAddr dsa;
339 struct HvCallPci_LoadReturn retVal; 296 struct HvCallPci_LoadReturn retVal;
340 297
341 *((u64*)&dsa) = 0; 298 *((u64*)&dsa) = 0;
342 299
343 dsa.busNumber = busNumberParm; 300 dsa.busNumber = busNumberParm;
344 dsa.subBusNumber = subBusParm; 301 dsa.subBusNumber = subBusParm;
@@ -347,112 +304,81 @@ static inline u64 HvCallPci_barLoad64(u16 busNumberParm,
347 304
348 HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0); 305 HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0);
349 306
350 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
351
352 *valueParm = retVal.value; 307 *valueParm = retVal.value;
353 308
354 return retVal.rc; 309 return retVal.rc;
355} 310}
356//============================================================================ 311
357static inline u64 HvCallPci_barStore8(u16 busNumberParm, 312static inline u64 HvCallPci_barStore8(u16 busNumberParm, u8 subBusParm,
358 u8 subBusParm, 313 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
359 u8 deviceIdParm, 314 u8 valueParm)
360 u8 barNumberParm,
361 u64 offsetParm,
362 u8 valueParm)
363{ 315{
364 struct HvCallPci_DsaAddr dsa; 316 struct HvCallPci_DsaAddr dsa;
365 u64 retVal;
366 317
367 *((u64*)&dsa) = 0; 318 *((u64*)&dsa) = 0;
368 319
369 dsa.busNumber = busNumberParm; 320 dsa.busNumber = busNumberParm;
370 dsa.subBusNumber = subBusParm; 321 dsa.subBusNumber = subBusParm;
371 dsa.deviceId = deviceIdParm; 322 dsa.deviceId = deviceIdParm;
372 dsa.barNumber = barNumberParm; 323 dsa.barNumber = barNumberParm;
373 324
374 retVal = HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, valueParm, 0); 325 return HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm,
375 326 valueParm, 0);
376 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
377
378 return retVal;
379} 327}
380//============================================================================ 328
381static inline u64 HvCallPci_barStore16(u16 busNumberParm, 329static inline u64 HvCallPci_barStore16(u16 busNumberParm, u8 subBusParm,
382 u8 subBusParm, 330 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
383 u8 deviceIdParm, 331 u16 valueParm)
384 u8 barNumberParm,
385 u64 offsetParm,
386 u16 valueParm)
387{ 332{
388 struct HvCallPci_DsaAddr dsa; 333 struct HvCallPci_DsaAddr dsa;
389 u64 retVal;
390 334
391 *((u64*)&dsa) = 0; 335 *((u64*)&dsa) = 0;
392 336
393 dsa.busNumber = busNumberParm; 337 dsa.busNumber = busNumberParm;
394 dsa.subBusNumber = subBusParm; 338 dsa.subBusNumber = subBusParm;
395 dsa.deviceId = deviceIdParm; 339 dsa.deviceId = deviceIdParm;
396 dsa.barNumber = barNumberParm; 340 dsa.barNumber = barNumberParm;
397 341
398 retVal = HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, valueParm, 0); 342 return HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm,
399 343 valueParm, 0);
400 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
401
402 return retVal;
403} 344}
404//============================================================================ 345
405static inline u64 HvCallPci_barStore32(u16 busNumberParm, 346static inline u64 HvCallPci_barStore32(u16 busNumberParm, u8 subBusParm,
406 u8 subBusParm, 347 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
407 u8 deviceIdParm, 348 u32 valueParm)
408 u8 barNumberParm,
409 u64 offsetParm,
410 u32 valueParm)
411{ 349{
412 struct HvCallPci_DsaAddr dsa; 350 struct HvCallPci_DsaAddr dsa;
413 u64 retVal;
414 351
415 *((u64*)&dsa) = 0; 352 *((u64*)&dsa) = 0;
416 353
417 dsa.busNumber = busNumberParm; 354 dsa.busNumber = busNumberParm;
418 dsa.subBusNumber = subBusParm; 355 dsa.subBusNumber = subBusParm;
419 dsa.deviceId = deviceIdParm; 356 dsa.deviceId = deviceIdParm;
420 dsa.barNumber = barNumberParm; 357 dsa.barNumber = barNumberParm;
421 358
422 retVal = HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, valueParm, 0); 359 return HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm,
423 360 valueParm, 0);
424 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
425
426 return retVal;
427} 361}
428//============================================================================ 362
429static inline u64 HvCallPci_barStore64(u16 busNumberParm, 363static inline u64 HvCallPci_barStore64(u16 busNumberParm, u8 subBusParm,
430 u8 subBusParm, 364 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
431 u8 deviceIdParm, 365 u64 valueParm)
432 u8 barNumberParm,
433 u64 offsetParm,
434 u64 valueParm)
435{ 366{
436 struct HvCallPci_DsaAddr dsa; 367 struct HvCallPci_DsaAddr dsa;
437 u64 retVal;
438 368
439 *((u64*)&dsa) = 0; 369 *((u64*)&dsa) = 0;
440 370
441 dsa.busNumber = busNumberParm; 371 dsa.busNumber = busNumberParm;
442 dsa.subBusNumber = subBusParm; 372 dsa.subBusNumber = subBusParm;
443 dsa.deviceId = deviceIdParm; 373 dsa.deviceId = deviceIdParm;
444 dsa.barNumber = barNumberParm; 374 dsa.barNumber = barNumberParm;
445 375
446 retVal = HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, valueParm, 0); 376 return HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm,
447 377 valueParm, 0);
448 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
449
450 return retVal;
451} 378}
452//============================================================================ 379
453static inline u64 HvCallPci_eoi(u16 busNumberParm, 380static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm,
454 u8 subBusParm, 381 u8 deviceIdParm)
455 u8 deviceIdParm)
456{ 382{
457 struct HvCallPci_DsaAddr dsa; 383 struct HvCallPci_DsaAddr dsa;
458 struct HvCallPci_LoadReturn retVal; 384 struct HvCallPci_LoadReturn retVal;
@@ -465,20 +391,13 @@ static inline u64 HvCallPci_eoi(u16 busNumberParm,
465 391
466 HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa); 392 HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
467 393
468 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
469
470 return retVal.rc; 394 return retVal.rc;
471} 395}
472//============================================================================ 396
473static inline u64 HvCallPci_getBarParms(u16 busNumberParm, 397static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm,
474 u8 subBusParm, 398 u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms)
475 u8 deviceIdParm,
476 u8 barNumberParm,
477 u64 parms,
478 u32 sizeofParms)
479{ 399{
480 struct HvCallPci_DsaAddr dsa; 400 struct HvCallPci_DsaAddr dsa;
481 u64 retVal;
482 401
483 *((u64*)&dsa) = 0; 402 *((u64*)&dsa) = 0;
484 403
@@ -487,62 +406,41 @@ static inline u64 HvCallPci_getBarParms(u16 busNumberParm,
487 dsa.deviceId = deviceIdParm; 406 dsa.deviceId = deviceIdParm;
488 dsa.barNumber = barNumberParm; 407 dsa.barNumber = barNumberParm;
489 408
490 retVal = HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms); 409 return HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
491
492 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
493
494 return retVal;
495} 410}
496//============================================================================ 411
497static inline u64 HvCallPci_maskFisr(u16 busNumberParm, 412static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm,
498 u8 subBusParm, 413 u8 deviceIdParm, u64 fisrMask)
499 u8 deviceIdParm,
500 u64 fisrMask)
501{ 414{
502 struct HvCallPci_DsaAddr dsa; 415 struct HvCallPci_DsaAddr dsa;
503 u64 retVal;
504 416
505 *((u64*)&dsa) = 0; 417 *((u64*)&dsa) = 0;
506 418
507 dsa.busNumber = busNumberParm; 419 dsa.busNumber = busNumberParm;
508 dsa.subBusNumber = subBusParm; 420 dsa.subBusNumber = subBusParm;
509 dsa.deviceId = deviceIdParm; 421 dsa.deviceId = deviceIdParm;
510 422
511 retVal = HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask); 423 return HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
512
513 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
514
515 return retVal;
516} 424}
517//============================================================================ 425
518static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, 426static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm,
519 u8 subBusParm, 427 u8 deviceIdParm, u64 fisrMask)
520 u8 deviceIdParm,
521 u64 fisrMask)
522{ 428{
523 struct HvCallPci_DsaAddr dsa; 429 struct HvCallPci_DsaAddr dsa;
524 u64 retVal;
525 430
526 *((u64*)&dsa) = 0; 431 *((u64*)&dsa) = 0;
527 432
528 dsa.busNumber = busNumberParm; 433 dsa.busNumber = busNumberParm;
529 dsa.subBusNumber = subBusParm; 434 dsa.subBusNumber = subBusParm;
530 dsa.deviceId = deviceIdParm; 435 dsa.deviceId = deviceIdParm;
531 436
532 retVal = HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask); 437 return HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
533
534 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
535
536 return retVal;
537} 438}
538//============================================================================ 439
539static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, 440static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, u8 subBusParm,
540 u8 subBusParm, 441 u8 deviceIdParm, u64 onNotOff)
541 u8 deviceIdParm,
542 u64 onNotOff)
543{ 442{
544 struct HvCallPci_DsaAddr dsa; 443 struct HvCallPci_DsaAddr dsa;
545 u64 retVal;
546 444
547 *((u64*)&dsa) = 0; 445 *((u64*)&dsa) = 0;
548 446
@@ -550,21 +448,13 @@ static inline u64 HvCallPci_setSlotReset(u16 busNumberParm,
550 dsa.subBusNumber = subBusParm; 448 dsa.subBusNumber = subBusParm;
551 dsa.deviceId = deviceIdParm; 449 dsa.deviceId = deviceIdParm;
552 450
553 retVal = HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff); 451 return HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
554
555 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
556
557 return retVal;
558} 452}
559//============================================================================ 453
560static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, 454static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm,
561 u8 subBusParm, 455 u8 deviceNumberParm, u64 parms, u32 sizeofParms)
562 u8 deviceNumberParm,
563 u64 parms,
564 u32 sizeofParms)
565{ 456{
566 struct HvCallPci_DsaAddr dsa; 457 struct HvCallPci_DsaAddr dsa;
567 u64 retVal;
568 458
569 *((u64*)&dsa) = 0; 459 *((u64*)&dsa) = 0;
570 460
@@ -572,102 +462,72 @@ static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm,
572 dsa.subBusNumber = subBusParm; 462 dsa.subBusNumber = subBusParm;
573 dsa.deviceId = deviceNumberParm << 4; 463 dsa.deviceId = deviceNumberParm << 4;
574 464
575 retVal = HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms); 465 return HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
576
577 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
578
579 return retVal;
580} 466}
581//============================================================================ 467
582static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, 468static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm,
583 u8 subBusParm, 469 u8 deviceIdParm, u64 interruptMask)
584 u8 deviceIdParm,
585 u64 interruptMask)
586{ 470{
587 struct HvCallPci_DsaAddr dsa; 471 struct HvCallPci_DsaAddr dsa;
588 u64 retVal;
589 472
590 *((u64*)&dsa) = 0; 473 *((u64*)&dsa) = 0;
591 474
592 dsa.busNumber = busNumberParm; 475 dsa.busNumber = busNumberParm;
593 dsa.subBusNumber = subBusParm; 476 dsa.subBusNumber = subBusParm;
594 dsa.deviceId = deviceIdParm; 477 dsa.deviceId = deviceIdParm;
595 478
596 retVal = HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask); 479 return HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
597
598 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
599
600 return retVal;
601} 480}
602//============================================================================ 481
603static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, 482static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm,
604 u8 subBusParm, 483 u8 deviceIdParm, u64 interruptMask)
605 u8 deviceIdParm,
606 u64 interruptMask)
607{ 484{
608 struct HvCallPci_DsaAddr dsa; 485 struct HvCallPci_DsaAddr dsa;
609 u64 retVal;
610 486
611 *((u64*)&dsa) = 0; 487 *((u64*)&dsa) = 0;
612 488
613 dsa.busNumber = busNumberParm; 489 dsa.busNumber = busNumberParm;
614 dsa.subBusNumber = subBusParm; 490 dsa.subBusNumber = subBusParm;
615 dsa.deviceId = deviceIdParm; 491 dsa.deviceId = deviceIdParm;
616 492
617 retVal = HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask); 493 return HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
618
619 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
620
621 return retVal;
622} 494}
623//============================================================================
624 495
625static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, 496static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm,
626 u8 subBusParm, 497 u8 deviceIdParm, u64 parms, u32 sizeofParms)
627 u8 deviceIdParm,
628 u64 parms,
629 u32 sizeofParms)
630{ 498{
631 struct HvCallPci_DsaAddr dsa; 499 struct HvCallPci_DsaAddr dsa;
632 u64 retVal;
633 500
634 *((u64*)&dsa) = 0; 501 *((u64*)&dsa) = 0;
635 502
636 dsa.busNumber = busNumberParm; 503 dsa.busNumber = busNumberParm;
637 dsa.subBusNumber = subBusParm; 504 dsa.subBusNumber = subBusParm;
638 dsa.deviceId = deviceIdParm; 505 dsa.deviceId = deviceIdParm;
639 506
640 retVal = HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, sizeofParms); 507 return HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms,
641 508 sizeofParms);
642 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
643
644 return retVal;
645} 509}
646//============================================================================
647 510
648static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm, u16 sizeParm) 511static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm,
512 u16 sizeParm)
649{ 513{
650 int xRetSize; 514 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
651 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusVpd); 515 sizeParm, HvCallPci_BusVpd);
652 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
653 if (xRc == -1) 516 if (xRc == -1)
654 xRetSize = -1; 517 return -1;
655 else 518 else
656 xRetSize = xRc & 0xFFFF; 519 return xRc & 0xFFFF;
657 return xRetSize;
658} 520}
659//============================================================================
660 521
661static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm, u16 sizeParm) 522static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm,
523 u16 sizeParm)
662{ 524{
663 int xRetSize; 525 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm,
664 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusAdapterVpd); 526 sizeParm, HvCallPci_BusAdapterVpd);
665 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
666 if (xRc == -1) 527 if (xRc == -1)
667 xRetSize = -1; 528 return -1;
668 else 529 else
669 xRetSize = xRc & 0xFFFF; 530 return xRc & 0xFFFF;
670 return xRetSize;
671} 531}
672//============================================================================ 532
673#endif /* _HVCALLPCI_H */ 533#endif /* _HVCALLPCI_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 06:39:38 -0500