Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (114 commits)
  [POWERPC] Fix ohare IDE irq workaround on old powermacs
  [POWERPC] EEH: Power4 systems sometimes need multiple resets.
  [POWERPC] Include <asm/mmu.h> in arch/powerpc/sysdev/fsl_soc.h for phys_addr_t.
  [POWERPC] Demacrofy arch/powerpc/platforms/maple/pci.c
  [POWERPC] Maple U3 HT - reject inappropriate config space access
  [POWERPC] Fix IPIC pending register assignments
  [POWERPC] powerpc: fix building gdb against asm/ptrace.h
  [POWERPC] Remove DISCONTIGMEM cruft from page.h
  [POWERPC] Merge iSeries i/o operations with the rest
  [POWERPC] 40x: Fix debug status register defines
  [POWERPC] Fix compile error in sbc8560
  [POWERPC] EEH: support MMIO enable recovery step
  [POWERPC] EEH: enable MMIO/DMA on frozen slot
  [POWERPC] EEH: code comment cleanup
  [POWERPC] EEH: balance pcidev_get/put calls
  [POWERPC] PPC: Fix xmon stack frame address in backtrace
  [POWERPC] Add AT_PLATFORM value for Xilinx Virtex-4 FX
  [POWERPC] Start arch/powerpc/boot code reorganization
  [POWERPC] Define of_read_ulong helper
  [POWERPC] iseries: eliminate a couple of warnings
  ...

1 files changed, 8 insertions, 8 deletions

diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h
index 4944c0fb8bea..602fbadeaf48 100644
--- a/include/asm-ppc/reg_booke.h
+++ b/include/asm-ppc/reg_booke.h
@@ -300,14 +300,14 @@ do {						\
 #define DBSR_IC         0x80000000      /* Instruction Completion */
 #define DBSR_BT         0x40000000      /* Branch taken */
 #define DBSR_TIE        0x10000000      /* Trap Instruction debug Event */
-#define DBSR_IAC1       0x00800000      /* Instruction Address Compare 1 Event */
-#define DBSR_IAC2       0x00400000      /* Instruction Address Compare 2 Event */
-#define DBSR_IAC3       0x00200000      /* Instruction Address Compare 3 Event */
-#define DBSR_IAC4       0x00100000      /* Instruction Address Compare 4 Event */
-#define DBSR_DAC1R      0x00080000      /* Data Address Compare 1 Read Event */
-#define DBSR_DAC1W      0x00040000      /* Data Address Compare 1 Write Event */
-#define DBSR_DAC2R      0x00020000      /* Data Address Compare 2 Read Event */
-#define DBSR_DAC2W      0x00010000      /* Data Address Compare 2 Write Event */
+#define DBSR_IAC1       0x04000000      /* Instruction Address Compare 1 Event */
+#define DBSR_IAC2       0x02000000      /* Instruction Address Compare 2 Event */
+#define DBSR_IAC3       0x00080000      /* Instruction Address Compare 3 Event */
+#define DBSR_IAC4       0x00040000      /* Instruction Address Compare 4 Event */
+#define DBSR_DAC1R      0x01000000      /* Data Address Compare 1 Read Event */
+#define DBSR_DAC1W      0x00800000      /* Data Address Compare 1 Write Event */
+#define DBSR_DAC2R      0x00400000      /* Data Address Compare 2 Read Event */
+#define DBSR_DAC2W      0x00200000      /* Data Address Compare 2 Write Event */
 #endif
 
 /* Bit definitions related to the ESR. */