[PATCH] ppc32: refactor FPU exception handling

Moved common FPU exception handling code out of head.S so it can be used by
several of the sub-architectures that might of a full PowerPC FPU.

Also, uses new CONFIG_PPC_FPU define to fix alignment exception handling
for floating point load/store instructions to only occur if we have a
hardware FPU.

Signed-off-by: Jason McMullan <jason.mcmullan@timesys.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 1 insertions, 0 deletions

diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h
index e70c25f3c339..45c5e6f2b7ab 100644
--- a/include/asm-ppc/reg_booke.h
+++ b/include/asm-ppc/reg_booke.h
@@ -305,6 +305,7 @@ do {						\
 #define ESR_PIL         0x08000000      /* Program Exception - Illegal */
 #define ESR_PPR         0x04000000      /* Program Exception - Priveleged */
 #define ESR_PTR         0x02000000      /* Program Exception - Trap */
+#define ESR_FP          0x01000000      /* Floating Point Operation */
 #define ESR_DST         0x00800000      /* Storage Exception - Data miss */
 #define ESR_DIZ         0x00400000      /* Storage Exception - Zone fault */
 #define ESR_ST          0x00800000      /* Store Operation */