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authorKumar Gala <galak@kernel.crashing.org>2006-12-11 00:15:47 -0500
committerKumar Gala <galak@kernel.crashing.org>2006-12-11 00:15:47 -0500
commit45d8e7aaf47668550fdb6c2d3abbe42f48a76df2 (patch)
tree6884852ff83c8c8b7d09883783587e1db43ca9d4 /include/asm-ppc/reg_booke.h
parentc99767974ebd2a719d849fdeaaa1674456f5283f (diff)
[POWERPC] Only export __mtdcr/__mfdcr if CONFIG_PPC_DCR is set
On 85xx we don't build in dcr support because the core doesn't implement the instructions. This caused problems when building an 85xx kernel. Additionally made it so we only build __mtdcr/__mfdcr if we are CONFIG_PPC_DCR_NATIVE. The 85xx build issue wasPointed out by Dai Haruki. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-ppc/reg_booke.h')
-rw-r--r--include/asm-ppc/reg_booke.h36
1 files changed, 2 insertions, 34 deletions
diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h
index 602fbadeaf48..a263fc1e65c4 100644
--- a/include/asm-ppc/reg_booke.h
+++ b/include/asm-ppc/reg_booke.h
@@ -9,41 +9,9 @@
9#ifndef __ASM_PPC_REG_BOOKE_H__ 9#ifndef __ASM_PPC_REG_BOOKE_H__
10#define __ASM_PPC_REG_BOOKE_H__ 10#define __ASM_PPC_REG_BOOKE_H__
11 11
12#ifndef __ASSEMBLY__ 12#include <asm/dcr.h>
13/* Device Control Registers */
14void __mtdcr(int reg, unsigned int val);
15unsigned int __mfdcr(int reg);
16#define mfdcr(rn) \
17 ({unsigned int rval; \
18 if (__builtin_constant_p(rn)) \
19 asm volatile("mfdcr %0," __stringify(rn) \
20 : "=r" (rval)); \
21 else \
22 rval = __mfdcr(rn); \
23 rval;})
24
25#define mtdcr(rn, v) \
26do { \
27 if (__builtin_constant_p(rn)) \
28 asm volatile("mtdcr " __stringify(rn) ",%0" \
29 : : "r" (v)); \
30 else \
31 __mtdcr(rn, v); \
32} while (0)
33
34/* R/W of indirect DCRs make use of standard naming conventions for DCRs */
35#define mfdcri(base, reg) \
36({ \
37 mtdcr(base ## _CFGADDR, base ## _ ## reg); \
38 mfdcr(base ## _CFGDATA); \
39})
40
41#define mtdcri(base, reg, data) \
42do { \
43 mtdcr(base ## _CFGADDR, base ## _ ## reg); \
44 mtdcr(base ## _CFGDATA, data); \
45} while (0)
46 13
14#ifndef __ASSEMBLY__
47/* Performance Monitor Registers */ 15/* Performance Monitor Registers */
48#define mfpmr(rn) ({unsigned int rval; \ 16#define mfpmr(rn) ({unsigned int rval; \
49 asm volatile("mfpmr %0," __stringify(rn) \ 17 asm volatile("mfpmr %0," __stringify(rn) \